Unified Coverage Report :: Group :: uart_env_pkg::uart_env_cov::rx_break_err_cg

Group : uart_env_pkg::uart_env_cov::rx_break_err_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv

---

Summary for Group uart_env_pkg::uart_env_cov::rx_break_err_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00

Variables for Group uart_env_pkg::uart_env_cov::rx_break_err_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_break_level	4	0	4	100.00	100	1	1	0

Summary for Variable cp_break_level

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for cp_break_level

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_levels[0]	238	1			T8	4		T11	4		T16	1
all_levels[1]	31	1			T14	1		T15	1		T440	3
all_levels[2]	23	1			T13	1		T15	4		T456	2
all_levels[3]	37	1			T13	1		T444	2		T29	1