Unified Coverage Report :: Group :: uart_env_pkg::uart_env_cov::rx_watermark_cg

Group : uart_env_pkg::uart_env_cov::rx_watermark_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv

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Summary for Group uart_env_pkg::uart_env_cov::rx_watermark_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	8	0	8	100.00

Variables for Group uart_env_pkg::uart_env_cov::rx_watermark_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_watermark_lvl	8	0	8	100.00	100	1	1	0

Summary for Variable cp_watermark_lvl

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_watermark_lvl

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_levels[0]	1202	1			T3	2		T8	2		T77	15
all_levels[1]	455	1			T9	3		T19	4		T77	8
all_levels[2]	405	1			T16	3		T77	4		T110	2
all_levels[3]	259	1			T9	9		T16	4		T45	27
all_levels[4]	189	1			T4	1		T11	2		T40	3
all_levels[5]	155	1			T20	9		T38	1		T427	8
all_levels[6]	58	1			T113	2		T22	3		T36	1
all_levels[7]	50	1			T425	6		T428	6		T429	6