UART Lint Results

Sunday March 10 2024 19:02:34 UTC

GitHub Revision: 8d1fda3660

Branch: os_regression

Tool: VERILATOR

Build Mode Flow Warnings Flow Errors Lint Warnings Lint Errors
default 0 2 1 0

Messages for Build Mode 'default'

Flow Errors

ERROR: %Warning-WIDTH: ../src/lowrisc_ip_uart_0.1/rtl/uart_core.sv:156:37: Operator ASSIGNW expects 3 bits on the Assign RHS, but Assign RHS's CONST '2'h0' generates 2 bits.

ERROR: Failed to build lowrisc:ip:uart:0.1 : '['make', 'Vuart.mk']' exited with an error: 2

Lint Warnings

%Warning-WIDTH: ../src/lowrisc_ip_uart_0.1/rtl/uart_core.sv:383:28: Operator ASSIGNDLY expects 8 bits on the Assign RHS, but Assign RHS's CONST '6'h0' generates 6 bits.

Past Results