Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::crc16_cg

Group : usbdev_env_pkg::usbdev_env_cov::crc16_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
62.50	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	1	3	75.00
Crosses	4	2	2	50.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_crc16	2	1	1	50.00	100	1	1	0
cp_dir	2	0	2	100.00	100	1	1	2

Crosses for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_crc16_X_dir	4	2	2	50.00	100	1	1	0

Summary for Variable cp_crc16

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	1	1	50.00

User Defined Bins for cp_crc16

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER
all_ones	0	1	1

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
six_ones	26	1		T16	1		T88	1		T162	1

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Summary for Variable cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_dir

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	137035	1		T1	72		T3	17		T27	1
auto[1]	61955	1		T1	72		T27	1		T29	1

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Summary for Cross cr_crc16_X_dir

Samples crossed: cp_crc16 cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	2	2	50.00	2

Automatically Generated Cross Bins for cr_crc16_X_dir

Element holes

cp_crc16	cp_dir	COUNT	AT LEAST	NUMBER
[all_ones]	*	--	--	2

Covered bins

cp_crc16

cp_dir

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

six_ones

auto[0]

19

1

T16

1

T88

1

T162

1

six_ones

auto[1]

7

1

T279

1

T280

1

T281

1