Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	1939	1		T18	11		T90	7		T154	1
range_16_to_126	184197	1		T2	1		T3	2		T27	1
fifteen	1292	1		T18	6		T37	255		T90	8
range_2_to_14	20009	1		T18	82		T20	2		T101	1
seven	3069	1		T18	3		T9	2		T90	8
one	3009	1		T18	5		T19	1		T90	8
zero	728	1		T18	4		T90	12		T108	1

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seven	16158	1		T5	33		T18	116		T20	6
three	15238	1		T3	2		T5	33		T18	122

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	150	1		T109	2		T260	26		T92	2
range_127	three	121	1		T90	1		T260	24		T236	29
range_16_to_126	seven	14277	1		T5	33		T18	111		T20	5
range_16_to_126	three	12572	1		T3	2		T5	33		T18	116
fifteen	seven	19	1		T18	1		T177	1		T160	1
fifteen	three	292	1		T90	2		T174	1		T167	1
range_2_to_14	seven	1598	1		T18	4		T20	1		T148	27
range_2_to_14	three	1205	1		T18	5		T148	27		T11	2
seven	seven	227	1		T18	1		T90	3		T265	1
seven	three	203	1		T160	1		T174	60		T293	1
one	seven	92	1		T90	2		T265	1		T154	1
one	three	1017	1		T177	1		T294	880		T174	1
zero	seven	22	1		T90	1		T174	2		T293	2
zero	three	31	1		T18	1		T295	14		T174	1