Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

---

Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	1682	1		T3	2		T7	2		T89	1
range_16_to_126	185747	1		T1	1		T2	313		T34	1
fifteen	2498	1		T4	1		T153	1		T212	2
range_2_to_14	18940	1		T28	14		T19	219		T25	1
seven	498	1		T28	14		T292	1		T293	1
one	857	1		T153	1		T165	147		T292	1
zero	2218	1		T77	1		T25	1		T212	1

---

Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seven	13537	1		T2	20		T34	1		T4	4
three	13334	1		T1	1		T2	35		T4	4

---

Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	77	1		T269	1		T270	1		T294	1
range_127	three	67	1		T92	1		T181	1		T164	1
range_16_to_126	seven	11488	1		T2	20		T34	1		T4	4
range_16_to_126	three	11246	1		T1	1		T2	35		T4	4
fifteen	seven	303	1		T95	1		T269	2		T176	1
fifteen	three	154	1		T95	1		T176	1		T164	47
range_2_to_14	seven	1402	1		T233	43		T92	28		T91	1
range_2_to_14	three	1363	1		T89	1		T153	1		T172	1
seven	seven	16	1		T295	1		T94	1		T95	1
seven	three	24	1		T293	1		T269	1		T181	1
one	seven	27	1		T92	1		T95	2		T176	1
one	three	420	1		T165	147		T14	2		T95	1
zero	seven	240	1		T295	1		T181	1		T164	2
zero	three	84	1		T296	3		T269	1		T181	1