Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	2848	1		T164	1		T339	1		T340	2
range_16_to_126	147401	1		T1	1		T3	8		T30	24
fifteen	1860	1		T340	1		T88	4		T341	7
range_2_to_14	14906	1		T4	3		T107	105		T86	1
seven	644	1		T4	1		T92	1		T88	4
one	1534	1		T34	2		T86	1		T342	1
zero	1662	1		T305	1		T74	1		T88	1

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seven	12442	1		T3	8		T30	2		T4	2
three	10874	1		T30	2		T4	2		T5	19

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	242	1		T164	1		T343	1		T344	1
range_127	three	134	1		T186	1		T344	1		T184	1
range_16_to_126	seven	10178	1		T3	8		T30	2		T4	2
range_16_to_126	three	9775	1		T30	2		T4	2		T5	19
fifteen	seven	35	1		T88	1		T184	1		T345	1
fifteen	three	53	1		T90	1		T184	1		T346	1
range_2_to_14	seven	1834	1		T107	15		T88	3		T311	1
range_2_to_14	three	747	1		T107	15		T305	1		T88	2
seven	seven	27	1		T88	1		T91	1		T179	1
seven	three	32	1		T312	1		T90	1		T186	1
one	seven	33	1		T85	1		T186	1		T184	1
one	three	25	1		T85	3		T91	1		T184	1
zero	seven	120	1		T88	1		T91	1		T176	1
zero	three	140	1		T174	3		T179	2		T176	1