Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::crc16_cg

Group : usbdev_env_pkg::usbdev_env_cov::crc16_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_crc16	2	0	2	100.00	100	1	1	0
cp_dir	2	0	2	100.00	100	1	1	2

Crosses for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_crc16_X_dir	4	0	4	100.00	100	1	1	0

Summary for Variable cp_crc16

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_crc16

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
six_ones	33	1		T110	1		T90	1		T344	1
all_ones	7	1		T185	1		T347	1		T80	1

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Summary for Variable cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_dir

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	110697	1		T3	8		T30	12		T32	1
auto[1]	43238	1		T30	12		T32	1		T4	45

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Summary for Cross cr_crc16_X_dir

Samples crossed: cp_crc16 cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cr_crc16_X_dir

Bins

cp_crc16	cp_dir	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
six_ones	auto[0]	25	1		T110	1		T90	1		T344	1
six_ones	auto[1]	8	1		T133	1		T348	1		T349	1
all_ones	auto[0]	5	1		T185	1		T347	1		T80	1
all_ones	auto[1]	2	1		T82	1		T350	1		-	-