Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	1549	1		T38	3		T20	11		T92	1
range_16_to_126	160578	1		T2	1		T3	1		T30	12
fifteen	640	1		T38	2		T244	1		T20	8
range_2_to_14	13524	1		T32	4		T78	1		T38	67
seven	977	1		T38	7		T20	6		T161	6
one	904	1		T38	5		T20	9		T114	1
zero	1270	1		T38	9		T20	3		T21	2

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
seven	13573	1		T30	1		T38	92		T64	21
three	15150	1		T30	2		T32	1		T6	19

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	133	1		T20	1		T103	83		T161	2
range_127	three	119	1		T20	4		T103	71		T94	1
range_16_to_126	seven	12204	1		T30	1		T38	87		T64	21
range_16_to_126	three	13887	1		T30	2		T6	19		T38	87
fifteen	seven	35	1		T320	2		T94	1		T168	1
fifteen	three	30	1		T244	1		T20	2		T320	2
range_2_to_14	seven	1111	1		T38	4		T20	7		T91	1
range_2_to_14	three	1029	1		T32	1		T38	1		T20	7
seven	seven	42	1		T38	1		T168	1		T321	1
seven	three	46	1		T169	1		T186	1		T322	1
one	seven	72	1		T20	3		T94	1		T168	1
one	three	62	1		T323	1		T324	13		T188	2
zero	seven	18	1		T38	1		T94	1		T161	1
zero	three	23	1		T38	1		T161	1		T168	1