Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	1178	1			T37	1		T66	4		T103	1
range_16_to_126	161696	1			T1	5		T29	3		T30	2
fifteen	677	1			T37	4		T66	1		T104	4
range_2_to_14	19101	1			T1	1		T2	2		T3	1
seven	2481	1			T66	1		T105	1		T104	4
one	743	1			T37	1		T66	3		T95	111
zero	1274	1			T37	4		T21	1		T79	1

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

seven

11575

1

T33

1

T4

96

T37

46

three

15934

1

T37

42

T89

3

T47

2

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	74	1			T66	1		T103	1		T385	11
range_127	three	85	1			T104	1		T386	1		T187	1
range_16_to_126	seven	10157	1			T33	1		T4	96		T37	16
range_16_to_126	three	14420	1			T37	17		T47	2		T5	25
fifteen	seven	53	1			T66	1		T255	3		T387	27
fifteen	three	22	1			T388	1		T177	1		T386	1
range_2_to_14	seven	1005	1			T37	30		T24	2		T66	3
range_2_to_14	three	1212	1			T37	25		T89	3		T6	1
seven	seven	126	1			T176	2		T386	2		T389	1
seven	three	134	1			T177	1		T390	1		T391	70
one	seven	119	1			T176	1		T177	1		T194	1
one	three	127	1			T66	1		T95	111		T176	1
zero	seven	167	1			T66	1		T176	1		T392	1
zero	three	68	1			T386	1		T194	2		T212	1