| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 96.80 | 98.12 | 96.03 | 97.44 | 96.61 | 98.34 | 98.17 | 92.85 |
| T3569 | /workspace/coverage/default/0.usbdev_aon_wake_disconnect.1581762458 | Aug 12 06:28:19 PM PDT 24 | Aug 12 06:28:27 PM PDT 24 | 5161807316 ps | ||
| T3570 | /workspace/coverage/default/67.usbdev_endpoint_types.135091538 | Aug 12 06:37:03 PM PDT 24 | Aug 12 06:37:04 PM PDT 24 | 446046241 ps | ||
| T3571 | /workspace/coverage/default/4.usbdev_in_trans.1606129598 | Aug 12 06:29:54 PM PDT 24 | Aug 12 06:29:56 PM PDT 24 | 225813482 ps | ||
| T3572 | /workspace/coverage/default/7.usbdev_out_stall.2330735278 | Aug 12 06:30:40 PM PDT 24 | Aug 12 06:30:41 PM PDT 24 | 176669259 ps | ||
| T3573 | /workspace/coverage/default/17.usbdev_setup_stage.4169838600 | Aug 12 06:32:28 PM PDT 24 | Aug 12 06:32:29 PM PDT 24 | 147485431 ps | ||
| T3574 | /workspace/coverage/default/14.usbdev_disconnected.2288804587 | Aug 12 06:32:00 PM PDT 24 | Aug 12 06:32:01 PM PDT 24 | 162179638 ps | ||
| T3575 | /workspace/coverage/default/37.usbdev_smoke.1811579187 | Aug 12 06:35:16 PM PDT 24 | Aug 12 06:35:17 PM PDT 24 | 180439641 ps | ||
| T3576 | /workspace/coverage/default/1.usbdev_link_in_err.3790625601 | Aug 12 06:28:57 PM PDT 24 | Aug 12 06:28:58 PM PDT 24 | 206195180 ps | ||
| T3577 | /workspace/coverage/default/35.usbdev_disable_endpoint.2860396580 | Aug 12 06:35:12 PM PDT 24 | Aug 12 06:35:13 PM PDT 24 | 322250999 ps | ||
| T3578 | /workspace/coverage/default/45.usbdev_phy_pins_sense.1375457972 | Aug 12 06:36:14 PM PDT 24 | Aug 12 06:36:15 PM PDT 24 | 41724612 ps | ||
| T3579 | /workspace/coverage/default/29.usbdev_in_iso.2325826690 | Aug 12 06:34:11 PM PDT 24 | Aug 12 06:34:12 PM PDT 24 | 227292523 ps | ||
| T3580 | /workspace/coverage/default/0.usbdev_pkt_buffer.211068364 | Aug 12 06:28:36 PM PDT 24 | Aug 12 06:29:08 PM PDT 24 | 11807505874 ps | ||
| T3581 | /workspace/coverage/default/4.usbdev_stream_len_max.413102326 | Aug 12 06:29:58 PM PDT 24 | Aug 12 06:30:02 PM PDT 24 | 1306867850 ps | ||
| T3582 | /workspace/coverage/default/10.usbdev_min_length_out_transaction.1953011131 | Aug 12 06:31:23 PM PDT 24 | Aug 12 06:31:24 PM PDT 24 | 151793724 ps | ||
| T3583 | /workspace/coverage/default/47.usbdev_in_stall.4245041477 | Aug 12 06:36:43 PM PDT 24 | Aug 12 06:36:44 PM PDT 24 | 166636859 ps | ||
| T3584 | /workspace/coverage/default/30.usbdev_endpoint_types.730073005 | Aug 12 06:34:08 PM PDT 24 | Aug 12 06:34:10 PM PDT 24 | 575419741 ps | ||
| T3585 | /workspace/coverage/default/223.usbdev_tx_rx_disruption.1347377618 | Aug 12 06:38:01 PM PDT 24 | Aug 12 06:38:03 PM PDT 24 | 537094530 ps | ||
| T3586 | /workspace/coverage/default/31.usbdev_phy_config_pinflip.3899900449 | Aug 12 06:34:39 PM PDT 24 | Aug 12 06:34:40 PM PDT 24 | 214283883 ps | ||
| T3587 | /workspace/coverage/default/25.usbdev_out_stall.740109892 | Aug 12 06:34:00 PM PDT 24 | Aug 12 06:34:01 PM PDT 24 | 148361634 ps | ||
| T3588 | /workspace/coverage/default/2.usbdev_invalid_sync.1834277876 | Aug 12 06:29:11 PM PDT 24 | Aug 12 06:31:27 PM PDT 24 | 4474987874 ps | ||
| T317 | /workspace/coverage/default/43.usbdev_rx_full.2292773229 | Aug 12 06:36:09 PM PDT 24 | Aug 12 06:36:10 PM PDT 24 | 249643181 ps | ||
| T3589 | /workspace/coverage/default/429.usbdev_tx_rx_disruption.1563897096 | Aug 12 06:38:14 PM PDT 24 | Aug 12 06:38:16 PM PDT 24 | 718617887 ps | ||
| T3590 | /workspace/coverage/default/5.usbdev_av_buffer.1233203127 | Aug 12 06:30:08 PM PDT 24 | Aug 12 06:30:09 PM PDT 24 | 177818902 ps | ||
| T3591 | /workspace/coverage/default/363.usbdev_tx_rx_disruption.1121031948 | Aug 12 06:38:10 PM PDT 24 | Aug 12 06:38:11 PM PDT 24 | 603952092 ps | ||
| T3592 | /workspace/coverage/default/34.usbdev_device_timeout.1981812200 | Aug 12 06:34:44 PM PDT 24 | Aug 12 06:34:57 PM PDT 24 | 1548993424 ps | ||
| T3593 | /workspace/coverage/default/31.usbdev_stall_trans.1167395808 | Aug 12 06:34:32 PM PDT 24 | Aug 12 06:34:33 PM PDT 24 | 177970037 ps | ||
| T3594 | /workspace/coverage/default/19.usbdev_tx_rx_disruption.316197649 | Aug 12 06:32:46 PM PDT 24 | Aug 12 06:32:47 PM PDT 24 | 458132309 ps | ||
| T3595 | /workspace/coverage/default/39.usbdev_max_inter_pkt_delay.2738725137 | Aug 12 06:35:21 PM PDT 24 | Aug 12 06:36:35 PM PDT 24 | 2542297775 ps | ||
| T3596 | /workspace/coverage/default/4.usbdev_freq_loclk_max.55660617 | Aug 12 06:29:54 PM PDT 24 | Aug 12 06:32:42 PM PDT 24 | 103005767596 ps | ||
| T3597 | /workspace/coverage/default/43.usbdev_endpoint_access.428755286 | Aug 12 06:36:08 PM PDT 24 | Aug 12 06:36:11 PM PDT 24 | 1074298801 ps | ||
| T3598 | /workspace/coverage/default/41.usbdev_aon_wake_reset.2567376042 | Aug 12 06:35:46 PM PDT 24 | Aug 12 06:36:09 PM PDT 24 | 19512820798 ps | ||
| T3599 | /workspace/coverage/default/1.usbdev_endpoint_access.2621723012 | Aug 12 06:28:48 PM PDT 24 | Aug 12 06:28:51 PM PDT 24 | 889655708 ps | ||
| T3600 | /workspace/coverage/default/32.usbdev_low_speed_traffic.1751266269 | Aug 12 06:34:53 PM PDT 24 | Aug 12 06:35:33 PM PDT 24 | 4725602890 ps | ||
| T3601 | /workspace/coverage/default/10.usbdev_setup_trans_ignored.3220633029 | Aug 12 06:31:23 PM PDT 24 | Aug 12 06:31:24 PM PDT 24 | 215328732 ps | ||
| T3602 | /workspace/coverage/default/20.usbdev_disconnected.693241628 | Aug 12 06:33:01 PM PDT 24 | Aug 12 06:33:02 PM PDT 24 | 155667985 ps | ||
| T3603 | /workspace/coverage/default/174.usbdev_endpoint_types.1209272135 | Aug 12 06:37:35 PM PDT 24 | Aug 12 06:37:37 PM PDT 24 | 531884616 ps | ||
| T3604 | /workspace/coverage/default/21.usbdev_nak_trans.3281729925 | Aug 12 06:33:10 PM PDT 24 | Aug 12 06:33:11 PM PDT 24 | 229815738 ps | ||
| T3605 | /workspace/coverage/default/2.usbdev_rand_bus_disconnects.1154863904 | Aug 12 06:29:19 PM PDT 24 | Aug 12 06:30:41 PM PDT 24 | 12860461654 ps | ||
| T3606 | /workspace/coverage/default/144.usbdev_endpoint_types.2130922830 | Aug 12 06:37:30 PM PDT 24 | Aug 12 06:37:32 PM PDT 24 | 718088941 ps | ||
| T3607 | /workspace/coverage/default/48.usbdev_invalid_sync.4284094166 | Aug 12 06:36:51 PM PDT 24 | Aug 12 06:38:28 PM PDT 24 | 3395552203 ps | ||
| T3608 | /workspace/coverage/default/8.usbdev_fifo_rst.2415977536 | Aug 12 06:30:57 PM PDT 24 | Aug 12 06:30:58 PM PDT 24 | 158289579 ps | ||
| T3609 | /workspace/coverage/default/26.usbdev_min_length_in_transaction.3027495350 | Aug 12 06:33:55 PM PDT 24 | Aug 12 06:33:56 PM PDT 24 | 158419543 ps | ||
| T3610 | /workspace/coverage/default/68.usbdev_tx_rx_disruption.3363359313 | Aug 12 06:37:13 PM PDT 24 | Aug 12 06:37:15 PM PDT 24 | 583955543 ps | ||
| T3611 | /workspace/coverage/default/18.usbdev_invalid_sync.185474872 | Aug 12 06:32:36 PM PDT 24 | Aug 12 06:34:08 PM PDT 24 | 3246132413 ps | ||
| T3612 | /workspace/coverage/default/9.usbdev_phy_config_usb_ref_disable.4156643684 | Aug 12 06:31:09 PM PDT 24 | Aug 12 06:31:10 PM PDT 24 | 163425807 ps | ||
| T3613 | /workspace/coverage/default/42.usbdev_aon_wake_resume.3786826342 | Aug 12 06:36:08 PM PDT 24 | Aug 12 06:36:45 PM PDT 24 | 29186844307 ps | ||
| T3614 | /workspace/coverage/default/39.usbdev_link_in_err.743130247 | Aug 12 06:35:48 PM PDT 24 | Aug 12 06:35:50 PM PDT 24 | 218753595 ps | ||
| T3615 | /workspace/coverage/default/4.usbdev_device_timeout.246978066 | Aug 12 06:29:54 PM PDT 24 | Aug 12 06:30:13 PM PDT 24 | 874244476 ps | ||
| T3616 | /workspace/coverage/default/9.usbdev_rand_bus_disconnects.455763200 | Aug 12 06:31:10 PM PDT 24 | Aug 12 06:32:27 PM PDT 24 | 3194262981 ps | ||
| T3617 | /workspace/coverage/default/0.usbdev_freq_loclk.2948187704 | Aug 12 06:28:28 PM PDT 24 | Aug 12 06:31:30 PM PDT 24 | 112101216005 ps | ||
| T3618 | /workspace/coverage/default/7.usbdev_endpoint_types.2697586944 | Aug 12 06:30:43 PM PDT 24 | Aug 12 06:30:44 PM PDT 24 | 332320433 ps | ||
| T3619 | /workspace/coverage/default/14.usbdev_av_buffer.3780519047 | Aug 12 06:31:55 PM PDT 24 | Aug 12 06:31:56 PM PDT 24 | 216813829 ps | ||
| T3620 | /workspace/coverage/default/28.usbdev_link_in_err.662756408 | Aug 12 06:34:04 PM PDT 24 | Aug 12 06:34:06 PM PDT 24 | 240083430 ps | ||
| T3621 | /workspace/coverage/default/32.usbdev_timeout_missing_host_handshake.1972034073 | Aug 12 06:34:32 PM PDT 24 | Aug 12 06:34:59 PM PDT 24 | 3704941115 ps | ||
| T3622 | /workspace/coverage/default/23.usbdev_stream_len_max.93997646 | Aug 12 06:33:37 PM PDT 24 | Aug 12 06:33:38 PM PDT 24 | 451152508 ps | ||
| T3623 | /workspace/coverage/default/5.usbdev_data_toggle_restore.192567519 | Aug 12 06:30:07 PM PDT 24 | Aug 12 06:30:09 PM PDT 24 | 461467802 ps | ||
| T3624 | /workspace/coverage/default/14.usbdev_bitstuff_err.3802826732 | Aug 12 06:31:57 PM PDT 24 | Aug 12 06:31:58 PM PDT 24 | 164804757 ps | ||
| T3625 | /workspace/coverage/default/47.usbdev_device_address.2897592106 | Aug 12 06:36:56 PM PDT 24 | Aug 12 06:37:34 PM PDT 24 | 22140621585 ps | ||
| T3626 | /workspace/coverage/default/34.usbdev_phy_pins_sense.90220372 | Aug 12 06:35:06 PM PDT 24 | Aug 12 06:35:06 PM PDT 24 | 29399492 ps | ||
| T3627 | /workspace/coverage/default/17.usbdev_min_inter_pkt_delay.2263677682 | Aug 12 06:32:26 PM PDT 24 | Aug 12 06:34:28 PM PDT 24 | 4293582723 ps | ||
| T3628 | /workspace/coverage/default/250.usbdev_tx_rx_disruption.4232046174 | Aug 12 06:38:10 PM PDT 24 | Aug 12 06:38:12 PM PDT 24 | 614017306 ps | ||
| T3629 | /workspace/coverage/default/31.usbdev_pkt_received.489782011 | Aug 12 06:34:31 PM PDT 24 | Aug 12 06:34:32 PM PDT 24 | 197961747 ps | ||
| T3630 | /workspace/coverage/default/42.usbdev_pkt_sent.3002647172 | Aug 12 06:36:08 PM PDT 24 | Aug 12 06:36:09 PM PDT 24 | 233565076 ps | ||
| T3631 | /workspace/coverage/default/31.usbdev_min_length_out_transaction.3250942186 | Aug 12 06:34:36 PM PDT 24 | Aug 12 06:34:37 PM PDT 24 | 149073083 ps | ||
| T254 | /workspace/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2852265291 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 115415050 ps | ||
| T222 | /workspace/coverage/cover_reg_top/34.usbdev_intr_test.2223314586 | Aug 12 05:38:11 PM PDT 24 | Aug 12 05:38:12 PM PDT 24 | 44566848 ps | ||
| T225 | /workspace/coverage/cover_reg_top/22.usbdev_intr_test.1167065679 | Aug 12 05:37:58 PM PDT 24 | Aug 12 05:37:59 PM PDT 24 | 64061248 ps | ||
| T255 | /workspace/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.3519577244 | Aug 12 05:37:47 PM PDT 24 | Aug 12 05:37:49 PM PDT 24 | 101596932 ps | ||
| T223 | /workspace/coverage/cover_reg_top/17.usbdev_intr_test.986706413 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 35104778 ps | ||
| T224 | /workspace/coverage/cover_reg_top/37.usbdev_intr_test.1711498488 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:02 PM PDT 24 | 58761334 ps | ||
| T284 | /workspace/coverage/cover_reg_top/2.usbdev_mem_partial_access.2087547001 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:53 PM PDT 24 | 165056221 ps | ||
| T218 | /workspace/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1796012113 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:38:00 PM PDT 24 | 93223395 ps | ||
| T219 | /workspace/coverage/cover_reg_top/9.usbdev_tl_errors.2492678808 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:59 PM PDT 24 | 113259142 ps | ||
| T227 | /workspace/coverage/cover_reg_top/28.usbdev_intr_test.4021732955 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:01 PM PDT 24 | 52776976 ps | ||
| T3632 | /workspace/coverage/cover_reg_top/4.usbdev_mem_walk.1484715383 | Aug 12 05:37:41 PM PDT 24 | Aug 12 05:37:43 PM PDT 24 | 272248895 ps | ||
| T220 | /workspace/coverage/cover_reg_top/13.usbdev_tl_intg_err.1078684908 | Aug 12 05:38:16 PM PDT 24 | Aug 12 05:38:19 PM PDT 24 | 403746190 ps | ||
| T285 | /workspace/coverage/cover_reg_top/3.usbdev_mem_partial_access.2348741612 | Aug 12 05:38:02 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 84637763 ps | ||
| T299 | /workspace/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.1598475624 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:02 PM PDT 24 | 87601481 ps | ||
| T226 | /workspace/coverage/cover_reg_top/42.usbdev_intr_test.525862092 | Aug 12 05:38:09 PM PDT 24 | Aug 12 05:38:10 PM PDT 24 | 36393226 ps | ||
| T253 | /workspace/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1109745424 | Aug 12 05:38:17 PM PDT 24 | Aug 12 05:38:19 PM PDT 24 | 225813412 ps | ||
| T300 | /workspace/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3617153385 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 60536366 ps | ||
| T257 | /workspace/coverage/cover_reg_top/10.usbdev_tl_intg_err.278209678 | Aug 12 05:37:59 PM PDT 24 | Aug 12 05:38:03 PM PDT 24 | 1023294104 ps | ||
| T294 | /workspace/coverage/cover_reg_top/8.usbdev_csr_rw.4280665748 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:54 PM PDT 24 | 86491352 ps | ||
| T286 | /workspace/coverage/cover_reg_top/2.usbdev_csr_aliasing.386025140 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:37:59 PM PDT 24 | 171650806 ps | ||
| T270 | /workspace/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2643253997 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 77271066 ps | ||
| T287 | /workspace/coverage/cover_reg_top/16.usbdev_csr_rw.3467975355 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:02 PM PDT 24 | 81576517 ps | ||
| T310 | /workspace/coverage/cover_reg_top/0.usbdev_intr_test.2762325313 | Aug 12 05:37:35 PM PDT 24 | Aug 12 05:37:36 PM PDT 24 | 42699361 ps | ||
| T301 | /workspace/coverage/cover_reg_top/18.usbdev_csr_rw.3584286864 | Aug 12 05:38:20 PM PDT 24 | Aug 12 05:38:21 PM PDT 24 | 115354690 ps | ||
| T302 | /workspace/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3426845789 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 131597419 ps | ||
| T288 | /workspace/coverage/cover_reg_top/3.usbdev_csr_hw_reset.1932013235 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 81123852 ps | ||
| T289 | /workspace/coverage/cover_reg_top/15.usbdev_csr_rw.1447430637 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:59 PM PDT 24 | 90855075 ps | ||
| T271 | /workspace/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.2649269242 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 82613239 ps | ||
| T340 | /workspace/coverage/cover_reg_top/3.usbdev_intr_test.3965937413 | Aug 12 05:37:58 PM PDT 24 | Aug 12 05:37:59 PM PDT 24 | 41253170 ps | ||
| T290 | /workspace/coverage/cover_reg_top/6.usbdev_csr_rw.3279540470 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 54934684 ps | ||
| T3633 | /workspace/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3922634349 | Aug 12 05:37:51 PM PDT 24 | Aug 12 05:37:53 PM PDT 24 | 93505136 ps | ||
| T261 | /workspace/coverage/cover_reg_top/4.usbdev_tl_errors.481438042 | Aug 12 05:37:37 PM PDT 24 | Aug 12 05:37:38 PM PDT 24 | 66592383 ps | ||
| T291 | /workspace/coverage/cover_reg_top/1.usbdev_csr_aliasing.3049743 | Aug 12 05:37:43 PM PDT 24 | Aug 12 05:37:47 PM PDT 24 | 123213653 ps | ||
| T3634 | /workspace/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.3209494655 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:37:59 PM PDT 24 | 188557862 ps | ||
| T262 | /workspace/coverage/cover_reg_top/11.usbdev_tl_errors.2208031786 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 96791571 ps | ||
| T3635 | /workspace/coverage/cover_reg_top/4.usbdev_csr_hw_reset.252232521 | Aug 12 05:37:37 PM PDT 24 | Aug 12 05:37:38 PM PDT 24 | 165070308 ps | ||
| T336 | /workspace/coverage/cover_reg_top/24.usbdev_intr_test.3652408331 | Aug 12 05:38:15 PM PDT 24 | Aug 12 05:38:16 PM PDT 24 | 52259718 ps | ||
| T263 | /workspace/coverage/cover_reg_top/12.usbdev_tl_errors.2850953618 | Aug 12 05:38:03 PM PDT 24 | Aug 12 05:38:05 PM PDT 24 | 143576766 ps | ||
| T3636 | /workspace/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1437761460 | Aug 12 05:37:51 PM PDT 24 | Aug 12 05:37:53 PM PDT 24 | 195296521 ps | ||
| T308 | /workspace/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3094586241 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 385048510 ps | ||
| T3637 | /workspace/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2722531571 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 136609337 ps | ||
| T3638 | /workspace/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.670746342 | Aug 12 05:37:52 PM PDT 24 | Aug 12 05:37:53 PM PDT 24 | 137899778 ps | ||
| T337 | /workspace/coverage/cover_reg_top/43.usbdev_intr_test.130157021 | Aug 12 05:38:03 PM PDT 24 | Aug 12 05:38:09 PM PDT 24 | 61806979 ps | ||
| T3639 | /workspace/coverage/cover_reg_top/2.usbdev_csr_bit_bash.1412058777 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:07 PM PDT 24 | 534079784 ps | ||
| T266 | /workspace/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3475704639 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 166197798 ps | ||
| T339 | /workspace/coverage/cover_reg_top/47.usbdev_intr_test.3320663105 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 54179273 ps | ||
| T260 | /workspace/coverage/cover_reg_top/2.usbdev_tl_intg_err.2828208513 | Aug 12 05:37:58 PM PDT 24 | Aug 12 05:38:01 PM PDT 24 | 622664702 ps | ||
| T344 | /workspace/coverage/cover_reg_top/48.usbdev_intr_test.4021397737 | Aug 12 05:38:02 PM PDT 24 | Aug 12 05:38:03 PM PDT 24 | 84594113 ps | ||
| T343 | /workspace/coverage/cover_reg_top/39.usbdev_intr_test.446764203 | Aug 12 05:38:12 PM PDT 24 | Aug 12 05:38:13 PM PDT 24 | 39788347 ps | ||
| T309 | /workspace/coverage/cover_reg_top/10.usbdev_csr_rw.3159605534 | Aug 12 05:37:43 PM PDT 24 | Aug 12 05:37:45 PM PDT 24 | 81563539 ps | ||
| T272 | /workspace/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1546177651 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 193584733 ps | ||
| T338 | /workspace/coverage/cover_reg_top/33.usbdev_intr_test.3876043281 | Aug 12 05:38:03 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 56338516 ps | ||
| T510 | /workspace/coverage/cover_reg_top/19.usbdev_tl_intg_err.1678884190 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 323940711 ps | ||
| T515 | /workspace/coverage/cover_reg_top/17.usbdev_tl_intg_err.407724109 | Aug 12 05:38:04 PM PDT 24 | Aug 12 05:38:07 PM PDT 24 | 1121255990 ps | ||
| T3640 | /workspace/coverage/cover_reg_top/13.usbdev_csr_rw.3109856280 | Aug 12 05:38:03 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 66243449 ps | ||
| T264 | /workspace/coverage/cover_reg_top/13.usbdev_tl_errors.2384046973 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:54 PM PDT 24 | 107371570 ps | ||
| T265 | /workspace/coverage/cover_reg_top/1.usbdev_tl_errors.366121245 | Aug 12 05:37:35 PM PDT 24 | Aug 12 05:37:39 PM PDT 24 | 128890824 ps | ||
| T3641 | /workspace/coverage/cover_reg_top/7.usbdev_tl_errors.683321602 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 120525082 ps | ||
| T341 | /workspace/coverage/cover_reg_top/46.usbdev_intr_test.4008095281 | Aug 12 05:38:37 PM PDT 24 | Aug 12 05:38:38 PM PDT 24 | 41858087 ps | ||
| T3642 | /workspace/coverage/cover_reg_top/25.usbdev_intr_test.3931833917 | Aug 12 05:38:06 PM PDT 24 | Aug 12 05:38:07 PM PDT 24 | 50002035 ps | ||
| T342 | /workspace/coverage/cover_reg_top/27.usbdev_intr_test.2318694844 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 32922529 ps | ||
| T3643 | /workspace/coverage/cover_reg_top/49.usbdev_intr_test.3960573473 | Aug 12 05:38:05 PM PDT 24 | Aug 12 05:38:06 PM PDT 24 | 39362892 ps | ||
| T3644 | /workspace/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1342551626 | Aug 12 05:38:16 PM PDT 24 | Aug 12 05:38:19 PM PDT 24 | 91401406 ps | ||
| T3645 | /workspace/coverage/cover_reg_top/9.usbdev_intr_test.2883636658 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 48398285 ps | ||
| T511 | /workspace/coverage/cover_reg_top/9.usbdev_tl_intg_err.1766820911 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 461256117 ps | ||
| T3646 | /workspace/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2689230066 | Aug 12 05:38:00 PM PDT 24 | Aug 12 05:38:02 PM PDT 24 | 132729899 ps | ||
| T3647 | /workspace/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.4282884515 | Aug 12 05:38:04 PM PDT 24 | Aug 12 05:38:06 PM PDT 24 | 181801815 ps | ||
| T292 | /workspace/coverage/cover_reg_top/2.usbdev_csr_hw_reset.3579649584 | Aug 12 05:38:14 PM PDT 24 | Aug 12 05:38:15 PM PDT 24 | 93163516 ps | ||
| T3648 | /workspace/coverage/cover_reg_top/45.usbdev_intr_test.1946451799 | Aug 12 05:38:18 PM PDT 24 | Aug 12 05:38:18 PM PDT 24 | 39991322 ps | ||
| T3649 | /workspace/coverage/cover_reg_top/3.usbdev_tl_errors.3055543166 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:54 PM PDT 24 | 282293427 ps | ||
| T3650 | /workspace/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.1985791423 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:52 PM PDT 24 | 130558446 ps | ||
| T3651 | /workspace/coverage/cover_reg_top/36.usbdev_intr_test.1148085082 | Aug 12 05:38:00 PM PDT 24 | Aug 12 05:38:01 PM PDT 24 | 34782840 ps | ||
| T3652 | /workspace/coverage/cover_reg_top/2.usbdev_csr_rw.570373642 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:52 PM PDT 24 | 50911358 ps | ||
| T3653 | /workspace/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1543470074 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 70283870 ps | ||
| T512 | /workspace/coverage/cover_reg_top/3.usbdev_tl_intg_err.1062482025 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:59 PM PDT 24 | 566041587 ps | ||
| T3654 | /workspace/coverage/cover_reg_top/32.usbdev_intr_test.3885532611 | Aug 12 05:38:09 PM PDT 24 | Aug 12 05:38:10 PM PDT 24 | 59971750 ps | ||
| T293 | /workspace/coverage/cover_reg_top/11.usbdev_csr_rw.1061611335 | Aug 12 05:37:59 PM PDT 24 | Aug 12 05:38:00 PM PDT 24 | 89850207 ps | ||
| T3655 | /workspace/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2309246773 | Aug 12 05:37:37 PM PDT 24 | Aug 12 05:37:38 PM PDT 24 | 104461112 ps | ||
| T508 | /workspace/coverage/cover_reg_top/18.usbdev_tl_intg_err.1972661547 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 449911127 ps | ||
| T3656 | /workspace/coverage/cover_reg_top/0.usbdev_mem_walk.3522253240 | Aug 12 05:37:46 PM PDT 24 | Aug 12 05:37:51 PM PDT 24 | 487994316 ps | ||
| T295 | /workspace/coverage/cover_reg_top/12.usbdev_csr_rw.4264115381 | Aug 12 05:38:08 PM PDT 24 | Aug 12 05:38:10 PM PDT 24 | 93262199 ps | ||
| T3657 | /workspace/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.727219920 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 145570076 ps | ||
| T3658 | /workspace/coverage/cover_reg_top/8.usbdev_tl_errors.3452454547 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 97423406 ps | ||
| T3659 | /workspace/coverage/cover_reg_top/18.usbdev_intr_test.1432751075 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:51 PM PDT 24 | 111209098 ps | ||
| T3660 | /workspace/coverage/cover_reg_top/23.usbdev_intr_test.4267517421 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 35610420 ps | ||
| T3661 | /workspace/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.2160721183 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:52 PM PDT 24 | 58951853 ps | ||
| T3662 | /workspace/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.759473339 | Aug 12 05:37:34 PM PDT 24 | Aug 12 05:37:36 PM PDT 24 | 156283208 ps | ||
| T3663 | /workspace/coverage/cover_reg_top/19.usbdev_tl_errors.3588862517 | Aug 12 05:38:00 PM PDT 24 | Aug 12 05:38:01 PM PDT 24 | 106203807 ps | ||
| T296 | /workspace/coverage/cover_reg_top/1.usbdev_mem_partial_access.3661015769 | Aug 12 05:37:38 PM PDT 24 | Aug 12 05:37:39 PM PDT 24 | 148578964 ps | ||
| T3664 | /workspace/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.3449721050 | Aug 12 05:38:02 PM PDT 24 | Aug 12 05:38:03 PM PDT 24 | 56224058 ps | ||
| T3665 | /workspace/coverage/cover_reg_top/2.usbdev_mem_walk.3129131958 | Aug 12 05:37:41 PM PDT 24 | Aug 12 05:37:44 PM PDT 24 | 367714102 ps | ||
| T3666 | /workspace/coverage/cover_reg_top/5.usbdev_tl_errors.3835819126 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 164249418 ps | ||
| T513 | /workspace/coverage/cover_reg_top/6.usbdev_tl_intg_err.2204096068 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 806976021 ps | ||
| T3667 | /workspace/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2506080034 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 73136142 ps | ||
| T3668 | /workspace/coverage/cover_reg_top/15.usbdev_tl_intg_err.690039628 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 683960640 ps | ||
| T3669 | /workspace/coverage/cover_reg_top/5.usbdev_intr_test.2462399994 | Aug 12 05:37:51 PM PDT 24 | Aug 12 05:37:52 PM PDT 24 | 36641352 ps | ||
| T3670 | /workspace/coverage/cover_reg_top/14.usbdev_tl_errors.1895153247 | Aug 12 05:38:05 PM PDT 24 | Aug 12 05:38:07 PM PDT 24 | 77757182 ps | ||
| T3671 | /workspace/coverage/cover_reg_top/9.usbdev_csr_rw.3290213613 | Aug 12 05:38:03 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 64868616 ps | ||
| T516 | /workspace/coverage/cover_reg_top/5.usbdev_tl_intg_err.3262163416 | Aug 12 05:37:46 PM PDT 24 | Aug 12 05:37:52 PM PDT 24 | 1430754143 ps | ||
| T297 | /workspace/coverage/cover_reg_top/5.usbdev_csr_rw.1914029662 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 43263830 ps | ||
| T3672 | /workspace/coverage/cover_reg_top/1.usbdev_csr_bit_bash.375145611 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:38:01 PM PDT 24 | 931416890 ps | ||
| T3673 | /workspace/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1943354425 | Aug 12 05:37:52 PM PDT 24 | Aug 12 05:38:00 PM PDT 24 | 1249059971 ps | ||
| T518 | /workspace/coverage/cover_reg_top/16.usbdev_tl_intg_err.206089991 | Aug 12 05:38:04 PM PDT 24 | Aug 12 05:38:09 PM PDT 24 | 786043391 ps | ||
| T298 | /workspace/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2405187074 | Aug 12 05:37:58 PM PDT 24 | Aug 12 05:38:05 PM PDT 24 | 525400546 ps | ||
| T3674 | /workspace/coverage/cover_reg_top/40.usbdev_intr_test.241376127 | Aug 12 05:38:27 PM PDT 24 | Aug 12 05:38:28 PM PDT 24 | 60013839 ps | ||
| T3675 | /workspace/coverage/cover_reg_top/13.usbdev_intr_test.3339366185 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 116435181 ps | ||
| T3676 | /workspace/coverage/cover_reg_top/11.usbdev_intr_test.1309333703 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 43847974 ps | ||
| T3677 | /workspace/coverage/cover_reg_top/15.usbdev_intr_test.965380249 | Aug 12 05:38:18 PM PDT 24 | Aug 12 05:38:19 PM PDT 24 | 49902190 ps | ||
| T509 | /workspace/coverage/cover_reg_top/4.usbdev_tl_intg_err.123980298 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 1008214157 ps | ||
| T3678 | /workspace/coverage/cover_reg_top/10.usbdev_intr_test.4162001443 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:37:59 PM PDT 24 | 83839903 ps | ||
| T3679 | /workspace/coverage/cover_reg_top/1.usbdev_csr_hw_reset.1910013750 | Aug 12 05:37:36 PM PDT 24 | Aug 12 05:37:37 PM PDT 24 | 92652790 ps | ||
| T3680 | /workspace/coverage/cover_reg_top/7.usbdev_intr_test.2883844519 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 31287196 ps | ||
| T517 | /workspace/coverage/cover_reg_top/7.usbdev_tl_intg_err.2279495035 | Aug 12 05:37:49 PM PDT 24 | Aug 12 05:37:53 PM PDT 24 | 830911111 ps | ||
| T3681 | /workspace/coverage/cover_reg_top/29.usbdev_intr_test.2291544866 | Aug 12 05:38:14 PM PDT 24 | Aug 12 05:38:15 PM PDT 24 | 57895583 ps | ||
| T3682 | /workspace/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.1229541171 | Aug 12 05:37:48 PM PDT 24 | Aug 12 05:37:50 PM PDT 24 | 61590533 ps | ||
| T3683 | /workspace/coverage/cover_reg_top/6.usbdev_tl_errors.1301487391 | Aug 12 05:38:01 PM PDT 24 | Aug 12 05:38:03 PM PDT 24 | 109849635 ps | ||
| T3684 | /workspace/coverage/cover_reg_top/0.usbdev_csr_hw_reset.2676433552 | Aug 12 05:37:46 PM PDT 24 | Aug 12 05:37:47 PM PDT 24 | 199433970 ps | ||
| T3685 | /workspace/coverage/cover_reg_top/17.usbdev_tl_errors.2487991145 | Aug 12 05:38:03 PM PDT 24 | Aug 12 05:38:05 PM PDT 24 | 165431810 ps | ||
| T3686 | /workspace/coverage/cover_reg_top/38.usbdev_intr_test.2788139506 | Aug 12 05:38:03 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 57451236 ps | ||
| T3687 | /workspace/coverage/cover_reg_top/16.usbdev_tl_errors.597496651 | Aug 12 05:38:00 PM PDT 24 | Aug 12 05:38:03 PM PDT 24 | 154525247 ps | ||
| T3688 | /workspace/coverage/cover_reg_top/21.usbdev_intr_test.882943788 | Aug 12 05:38:04 PM PDT 24 | Aug 12 05:38:05 PM PDT 24 | 36954498 ps | ||
| T3689 | /workspace/coverage/cover_reg_top/7.usbdev_csr_rw.3697331617 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 76833069 ps | ||
| T3690 | /workspace/coverage/cover_reg_top/19.usbdev_intr_test.2197879844 | Aug 12 05:38:06 PM PDT 24 | Aug 12 05:38:07 PM PDT 24 | 84357810 ps | ||
| T3691 | /workspace/coverage/cover_reg_top/4.usbdev_csr_aliasing.3826202293 | Aug 12 05:37:46 PM PDT 24 | Aug 12 05:37:48 PM PDT 24 | 178984339 ps | ||
| T3692 | /workspace/coverage/cover_reg_top/41.usbdev_intr_test.628957314 | Aug 12 05:38:18 PM PDT 24 | Aug 12 05:38:19 PM PDT 24 | 111973584 ps | ||
| T3693 | /workspace/coverage/cover_reg_top/3.usbdev_csr_rw.1795441225 | Aug 12 05:38:11 PM PDT 24 | Aug 12 05:38:12 PM PDT 24 | 93688256 ps | ||
| T3694 | /workspace/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.1287726440 | Aug 12 05:37:47 PM PDT 24 | Aug 12 05:37:48 PM PDT 24 | 97197220 ps | ||
| T3695 | /workspace/coverage/cover_reg_top/3.usbdev_mem_walk.2383515433 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:38:00 PM PDT 24 | 377041329 ps | ||
| T3696 | /workspace/coverage/cover_reg_top/8.usbdev_intr_test.469329171 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 42042356 ps | ||
| T3697 | /workspace/coverage/cover_reg_top/31.usbdev_intr_test.4135643720 | Aug 12 05:38:04 PM PDT 24 | Aug 12 05:38:05 PM PDT 24 | 60378867 ps | ||
| T267 | /workspace/coverage/cover_reg_top/0.usbdev_tl_intg_err.751062823 | Aug 12 05:37:51 PM PDT 24 | Aug 12 05:37:54 PM PDT 24 | 499304329 ps | ||
| T3698 | /workspace/coverage/cover_reg_top/1.usbdev_mem_walk.544562440 | Aug 12 05:37:37 PM PDT 24 | Aug 12 05:37:39 PM PDT 24 | 257837722 ps | ||
| T3699 | /workspace/coverage/cover_reg_top/12.usbdev_tl_intg_err.2325839092 | Aug 12 05:38:02 PM PDT 24 | Aug 12 05:38:07 PM PDT 24 | 1192154782 ps | ||
| T3700 | /workspace/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.372476244 | Aug 12 05:38:02 PM PDT 24 | Aug 12 05:38:03 PM PDT 24 | 121538706 ps | ||
| T3701 | /workspace/coverage/cover_reg_top/1.usbdev_intr_test.2758301599 | Aug 12 05:37:35 PM PDT 24 | Aug 12 05:37:36 PM PDT 24 | 43181070 ps | ||
| T3702 | /workspace/coverage/cover_reg_top/19.usbdev_csr_rw.175540809 | Aug 12 05:38:13 PM PDT 24 | Aug 12 05:38:14 PM PDT 24 | 53129667 ps | ||
| T3703 | /workspace/coverage/cover_reg_top/0.usbdev_mem_partial_access.1191466886 | Aug 12 05:37:32 PM PDT 24 | Aug 12 05:37:34 PM PDT 24 | 89120173 ps | ||
| T3704 | /workspace/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2640209013 | Aug 12 05:37:51 PM PDT 24 | Aug 12 05:37:53 PM PDT 24 | 95148042 ps | ||
| T3705 | /workspace/coverage/cover_reg_top/4.usbdev_intr_test.2143354933 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 44288576 ps | ||
| T3706 | /workspace/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.3839784399 | Aug 12 05:38:02 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 114038667 ps | ||
| T3707 | /workspace/coverage/cover_reg_top/18.usbdev_tl_errors.2334184756 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:38:00 PM PDT 24 | 114115293 ps | ||
| T3708 | /workspace/coverage/cover_reg_top/2.usbdev_intr_test.3217214419 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 50425093 ps | ||
| T3709 | /workspace/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3605620484 | Aug 12 05:38:21 PM PDT 24 | Aug 12 05:38:22 PM PDT 24 | 93944101 ps | ||
| T3710 | /workspace/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.458435234 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 184890611 ps | ||
| T3711 | /workspace/coverage/cover_reg_top/20.usbdev_intr_test.320661852 | Aug 12 05:38:07 PM PDT 24 | Aug 12 05:38:07 PM PDT 24 | 43817157 ps | ||
| T3712 | /workspace/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1101679678 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:55 PM PDT 24 | 88150761 ps | ||
| T3713 | /workspace/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1874547337 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 169090637 ps | ||
| T3714 | /workspace/coverage/cover_reg_top/30.usbdev_intr_test.349282290 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 40830065 ps | ||
| T3715 | /workspace/coverage/cover_reg_top/17.usbdev_csr_rw.4167066444 | Aug 12 05:38:09 PM PDT 24 | Aug 12 05:38:10 PM PDT 24 | 82544644 ps | ||
| T3716 | /workspace/coverage/cover_reg_top/44.usbdev_intr_test.2630024106 | Aug 12 05:38:04 PM PDT 24 | Aug 12 05:38:04 PM PDT 24 | 35195129 ps | ||
| T3717 | /workspace/coverage/cover_reg_top/4.usbdev_csr_bit_bash.2859736263 | Aug 12 05:37:47 PM PDT 24 | Aug 12 05:37:53 PM PDT 24 | 1455065978 ps | ||
| T3718 | /workspace/coverage/cover_reg_top/14.usbdev_csr_rw.2982949004 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:54 PM PDT 24 | 65153217 ps | ||
| T3719 | /workspace/coverage/cover_reg_top/14.usbdev_intr_test.1571296446 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 48457978 ps | ||
| T3720 | /workspace/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.1897238794 | Aug 12 05:37:50 PM PDT 24 | Aug 12 05:37:52 PM PDT 24 | 72997398 ps | ||
| T3721 | /workspace/coverage/cover_reg_top/1.usbdev_csr_rw.1295367966 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 150031092 ps | ||
| T3722 | /workspace/coverage/cover_reg_top/4.usbdev_mem_partial_access.2843325122 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 86878656 ps | ||
| T3723 | /workspace/coverage/cover_reg_top/2.usbdev_tl_errors.2776465208 | Aug 12 05:37:36 PM PDT 24 | Aug 12 05:37:39 PM PDT 24 | 210679368 ps | ||
| T3724 | /workspace/coverage/cover_reg_top/0.usbdev_tl_errors.801816755 | Aug 12 05:37:35 PM PDT 24 | Aug 12 05:37:37 PM PDT 24 | 65371349 ps | ||
| T3725 | /workspace/coverage/cover_reg_top/12.usbdev_intr_test.3813264627 | Aug 12 05:38:05 PM PDT 24 | Aug 12 05:38:06 PM PDT 24 | 47913217 ps | ||
| T3726 | /workspace/coverage/cover_reg_top/15.usbdev_tl_errors.3118632102 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:37:58 PM PDT 24 | 64778776 ps | ||
| T3727 | /workspace/coverage/cover_reg_top/11.usbdev_tl_intg_err.2476031324 | Aug 12 05:38:15 PM PDT 24 | Aug 12 05:38:18 PM PDT 24 | 337381459 ps | ||
| T3728 | /workspace/coverage/cover_reg_top/3.usbdev_csr_aliasing.337165193 | Aug 12 05:38:13 PM PDT 24 | Aug 12 05:38:15 PM PDT 24 | 83116452 ps | ||
| T3729 | /workspace/coverage/cover_reg_top/4.usbdev_csr_rw.2539528141 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:54 PM PDT 24 | 54226701 ps | ||
| T3730 | /workspace/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3164348052 | Aug 12 05:37:58 PM PDT 24 | Aug 12 05:38:00 PM PDT 24 | 86876464 ps | ||
| T3731 | /workspace/coverage/cover_reg_top/10.usbdev_tl_errors.3025302677 | Aug 12 05:37:57 PM PDT 24 | Aug 12 05:38:00 PM PDT 24 | 298847650 ps | ||
| T3732 | /workspace/coverage/cover_reg_top/6.usbdev_intr_test.3444151729 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 30753953 ps | ||
| T3733 | /workspace/coverage/cover_reg_top/35.usbdev_intr_test.2104070673 | Aug 12 05:38:26 PM PDT 24 | Aug 12 05:38:26 PM PDT 24 | 62194288 ps | ||
| T3734 | /workspace/coverage/cover_reg_top/26.usbdev_intr_test.852020425 | Aug 12 05:38:02 PM PDT 24 | Aug 12 05:38:03 PM PDT 24 | 91260928 ps | ||
| T3735 | /workspace/coverage/cover_reg_top/0.usbdev_csr_rw.900017257 | Aug 12 05:37:37 PM PDT 24 | Aug 12 05:37:38 PM PDT 24 | 127079606 ps | ||
| T514 | /workspace/coverage/cover_reg_top/1.usbdev_tl_intg_err.2581193177 | Aug 12 05:37:51 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 958051365 ps | ||
| T3736 | /workspace/coverage/cover_reg_top/16.usbdev_intr_test.4072725246 | Aug 12 05:37:55 PM PDT 24 | Aug 12 05:37:56 PM PDT 24 | 37746722 ps | ||
| T268 | /workspace/coverage/cover_reg_top/14.usbdev_tl_intg_err.3429824874 | Aug 12 05:38:18 PM PDT 24 | Aug 12 05:38:21 PM PDT 24 | 391337157 ps | ||
| T3737 | /workspace/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.282546129 | Aug 12 05:37:53 PM PDT 24 | Aug 12 05:37:54 PM PDT 24 | 155870969 ps | ||
| T3738 | /workspace/coverage/cover_reg_top/8.usbdev_tl_intg_err.1982864999 | Aug 12 05:37:56 PM PDT 24 | Aug 12 05:38:01 PM PDT 24 | 682612711 ps | ||
| T3739 | /workspace/coverage/cover_reg_top/0.usbdev_csr_aliasing.794045969 | Aug 12 05:37:54 PM PDT 24 | Aug 12 05:37:57 PM PDT 24 | 195156259 ps |
| Test location | /workspace/coverage/default/25.usbdev_device_address.3184592113 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 46502365995 ps |
| CPU time | 81.11 seconds |
| Started | Aug 12 06:33:32 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-549e5911-b8d4-4708-a037-e41d3bfe15a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31845 92113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.3184592113 |
| Directory | /workspace/25.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_disconnect.2456734239 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 8742290693 ps |
| CPU time | 11.29 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:34 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-8da9397a-a8c5-4c9f-9b3c-fb2df8f73f95 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2456734239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_a on_wake_disconnect.2456734239 |
| Directory | /workspace/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/cover_reg_top/34.usbdev_intr_test.2223314586 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 44566848 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 05:38:11 PM PDT 24 |
| Finished | Aug 12 05:38:12 PM PDT 24 |
| Peak memory | 206960 kb |
| Host | smart-3f9d5f17-913b-42fa-8446-13f1f24f51f1 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2223314586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.2223314586 |
| Directory | /workspace/34.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/27.usbdev_low_speed_traffic.3821203264 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 2911478979 ps |
| CPU time | 83.6 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:35:21 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-2410d127-4a39-4d4e-bc62-9788e9398d47 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3821203264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.3821203264 |
| Directory | /workspace/27.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_resume.2331239187 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 28694792562 ps |
| CPU time | 32.57 seconds |
| Started | Aug 12 06:35:00 PM PDT 24 |
| Finished | Aug 12 06:35:33 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-de590aa3-f534-4bde-821a-ffc7e8e1bfcc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23312 39187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_resume.2331239187 |
| Directory | /workspace/34.usbdev_link_resume/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1109745424 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 225813412 ps |
| CPU time | 1.94 seconds |
| Started | Aug 12 05:38:17 PM PDT 24 |
| Finished | Aug 12 05:38:19 PM PDT 24 |
| Peak memory | 218192 kb |
| Host | smart-9ed6b683-8bfa-457d-b916-66a76853a1c5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1109745424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbde v_csr_mem_rw_with_rand_reset.1109745424 |
| Directory | /workspace/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/default/19.usbdev_data_toggle_restore.1498970191 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 570627037 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:32:48 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a0db512f-5e1a-44c2-82a3-cc75073369b9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1498970191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.1498970191 |
| Directory | /workspace/19.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_resume.153473202 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 12817837304 ps |
| CPU time | 16.93 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:32:59 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-bc0cb229-0e8d-4d46-9fcb-274f2d92b1dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15347 3202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_resume.153473202 |
| Directory | /workspace/19.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2586611748 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 339258304 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-ba7d0ed6-76b6-43f5-a27f-956ec16846f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25866 11748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test_mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.2586611748 |
| Directory | /workspace/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspace/coverage/default/346.usbdev_tx_rx_disruption.1734409267 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 571329890 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-68cc21fe-d165-4a63-b7d5-bc2d92c11021 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1734409267 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 346.usbdev_tx_rx_disruption.1734409267 |
| Directory | /workspace/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_pins_sense.1629351216 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 68741834 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:44 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-d5781370-e706-4612-a545-93e8cc62b20f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16293 51216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.1629351216 |
| Directory | /workspace/3.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_buffer.3157130050 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 17644197717 ps |
| CPU time | 40.67 seconds |
| Started | Aug 12 06:32:51 PM PDT 24 |
| Finished | Aug 12 06:33:32 PM PDT 24 |
| Peak memory | 224140 kb |
| Host | smart-6fffc1e2-1a87-40f2-918a-751ec1693018 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31571 30050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_buffer.3157130050 |
| Directory | /workspace/20.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_intr_test.2762325313 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 42699361 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 05:37:35 PM PDT 24 |
| Finished | Aug 12 05:37:36 PM PDT 24 |
| Peak memory | 206864 kb |
| Host | smart-cfadce29-fe1c-4144-bea5-7593c6706f9d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2762325313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.2762325313 |
| Directory | /workspace/0.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_reset.74704716 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 20226471532 ps |
| CPU time | 24.29 seconds |
| Started | Aug 12 06:31:58 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-ad787293-9ae0-4d95-a187-daf8b4a7f191 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=74704716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.74704716 |
| Directory | /workspace/14.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_tl_intg_err.278209678 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 1023294104 ps |
| CPU time | 4.37 seconds |
| Started | Aug 12 05:37:59 PM PDT 24 |
| Finished | Aug 12 05:38:03 PM PDT 24 |
| Peak memory | 207156 kb |
| Host | smart-42d01504-bbb3-4bb1-ac46-d370674dac43 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=278209678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.278209678 |
| Directory | /workspace/10.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/376.usbdev_tx_rx_disruption.1546393411 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 623730259 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:38:26 PM PDT 24 |
| Finished | Aug 12 06:38:28 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7bdcd416-4767-4fb4-8099-253ad4efc89e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1546393411 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 376.usbdev_tx_rx_disruption.1546393411 |
| Directory | /workspace/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_disconnect.465862512 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 6503992907 ps |
| CPU time | 10.04 seconds |
| Started | Aug 12 06:28:44 PM PDT 24 |
| Finished | Aug 12 06:28:54 PM PDT 24 |
| Peak memory | 215908 kb |
| Host | smart-820914e4-0bef-47a3-b547-43d232cace65 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=465862512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon _wake_disconnect.465862512 |
| Directory | /workspace/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/76.usbdev_tx_rx_disruption.4050253424 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 516658008 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:07 PM PDT 24 |
| Finished | Aug 12 06:37:09 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4798bc7c-0bcb-4a5a-80f4-30c3b414ec44 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4050253424 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 76.usbdev_tx_rx_disruption.4050253424 |
| Directory | /workspace/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/1.usbdev_sec_cm.621659184 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 772332276 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:13 PM PDT 24 |
| Peak memory | 224260 kb |
| Host | smart-44a11e7a-db06-4d8a-84da-b38f470fdbd9 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=621659184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.621659184 |
| Directory | /workspace/1.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/9.usbdev_tx_rx_disruption.2016314684 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 479519932 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:31:06 PM PDT 24 |
| Finished | Aug 12 06:31:07 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4bcb5ea3-4538-460f-8c7b-6cb9a6069159 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2016314684 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_tx_rx_disruption.2016314684 |
| Directory | /workspace/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/13.usbdev_alert_test.653132136 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 48385335 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:31:56 PM PDT 24 |
| Finished | Aug 12 06:31:56 PM PDT 24 |
| Peak memory | 206372 kb |
| Host | smart-8a731278-a301-47ac-b2dc-8098777f6817 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=653132136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.653132136 |
| Directory | /workspace/13.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/29.usbdev_device_address.3575633100 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 39528824648 ps |
| CPU time | 65.38 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:35:10 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-311510ca-141a-4fcc-a546-e000d7aa56fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35756 33100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.3575633100 |
| Directory | /workspace/29.usbdev_device_address/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_csr_rw.1447430637 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 90855075 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:59 PM PDT 24 |
| Peak memory | 206920 kb |
| Host | smart-1c3d54e4-237f-475a-9b88-73c97f76b668 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1447430637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.1447430637 |
| Directory | /workspace/15.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/default/47.usbdev_rx_full.763836811 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 255431642 ps |
| CPU time | 1.15 seconds |
| Started | Aug 12 06:36:58 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3a588a1b-afee-4514-92b9-7435824c7842 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76383 6811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_rx_full.763836811 |
| Directory | /workspace/47.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/22.usbdev_bitstuff_err.611096845 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 172885154 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f9c64bd8-4c1a-439e-b969-e44458c94d12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61109 6845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_bitstuff_err.611096845 |
| Directory | /workspace/22.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/158.usbdev_tx_rx_disruption.2267155878 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 656707664 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2ffa2e42-95a7-498e-8892-d86a6e7f0b44 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2267155878 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 158.usbdev_tx_rx_disruption.2267155878 |
| Directory | /workspace/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/37.usbdev_endpoint_types.819169531 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 584527809 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:35:18 PM PDT 24 |
| Finished | Aug 12 06:35:20 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-d56e4a9d-bbcf-495b-a7f4-161638123ffe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=819169531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.819169531 |
| Directory | /workspace/37.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_tl_errors.2492678808 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 113259142 ps |
| CPU time | 2.94 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:59 PM PDT 24 |
| Peak memory | 207232 kb |
| Host | smart-0955cb94-7fbe-4ddb-a9c5-2a26f0ab4fd9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2492678808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.2492678808 |
| Directory | /workspace/9.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_crc_err.3898895998 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 181572305 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:29:04 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-0d6cd475-e3e9-4c28-9ddf-06e76bc89303 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38988 95998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_crc_err.3898895998 |
| Directory | /workspace/1.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/199.usbdev_endpoint_types.1876165705 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 406047856 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8007ebd9-76c0-4b9b-b0fb-6ac2261b7549 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1876165705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.1876165705 |
| Directory | /workspace/199.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/113.usbdev_endpoint_types.516834422 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 716551983 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:37:22 PM PDT 24 |
| Finished | Aug 12 06:37:24 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-cd0d5692-3dfa-4a8e-a744-9ca764bbd66e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=516834422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.516834422 |
| Directory | /workspace/113.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/52.usbdev_endpoint_types.3642865361 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 700227470 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-6999b1ff-f75a-401e-b190-770eb930b6af |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3642865361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.3642865361 |
| Directory | /workspace/52.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/0.usbdev_disconnected.3392545014 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 143475447 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:28:21 PM PDT 24 |
| Finished | Aug 12 06:28:22 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-6fe437d2-3a30-4a7a-913c-71d2dc3c8971 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33925 45014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disconnected.3392545014 |
| Directory | /workspace/0.usbdev_disconnected/latest |
| Test location | /workspace/coverage/cover_reg_top/39.usbdev_intr_test.446764203 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 39788347 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 05:38:12 PM PDT 24 |
| Finished | Aug 12 05:38:13 PM PDT 24 |
| Peak memory | 206828 kb |
| Host | smart-ff3180f3-ce0a-4a16-89f5-dac070346ad0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=446764203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.446764203 |
| Directory | /workspace/39.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/116.usbdev_endpoint_types.2684245878 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 488323853 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:44 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-b86dff05-cc67-4e62-a15e-9e6d560470b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2684245878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.2684245878 |
| Directory | /workspace/116.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/185.usbdev_endpoint_types.1217124439 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 554990186 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e08dc056-e666-4ef7-8f1d-4fc12d633c99 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1217124439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.1217124439 |
| Directory | /workspace/185.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/76.usbdev_endpoint_types.506090827 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 428990526 ps |
| CPU time | 1.36 seconds |
| Started | Aug 12 06:37:05 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-98d72940-9e27-433b-a857-d8d99e17282d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=506090827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.506090827 |
| Directory | /workspace/76.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/110.usbdev_endpoint_types.2113699637 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 456223945 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-174d5778-a6a9-4aab-a0e3-f1b3251a1c0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2113699637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.2113699637 |
| Directory | /workspace/110.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/197.usbdev_endpoint_types.1043420044 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 507710181 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:40 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cc40150a-b3f9-4dd5-905b-5181672d9917 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1043420044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.1043420044 |
| Directory | /workspace/197.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/45.usbdev_data_toggle_restore.1758479297 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 906167357 ps |
| CPU time | 2.42 seconds |
| Started | Aug 12 06:36:27 PM PDT 24 |
| Finished | Aug 12 06:36:29 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-dc51c95a-bbc3-4717-98d1-e82af0b5c965 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1758479297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.1758479297 |
| Directory | /workspace/45.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/88.usbdev_endpoint_types.366698959 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 622619629 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-0fe3d391-8ad3-4a0b-9f98-bb9384dd293e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=366698959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.366698959 |
| Directory | /workspace/88.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/35.usbdev_device_address.1883145153 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 43308222311 ps |
| CPU time | 67.6 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-29db3897-6ea7-4214-89be-9ff84eb8ab90 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18831 45153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.1883145153 |
| Directory | /workspace/35.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/1.usbdev_stress_usb_traffic.2459172673 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 10629054841 ps |
| CPU time | 60.42 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:30:03 PM PDT 24 |
| Peak memory | 218416 kb |
| Host | smart-ae4d901f-2e37-4e8c-a385-4e0848a9837f |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2459172673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.2459172673 |
| Directory | /workspace/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/102.usbdev_endpoint_types.3691695425 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 415748567 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:37:11 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6ef2b5da-f098-4371-afef-ac4506c8ef1e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3691695425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.3691695425 |
| Directory | /workspace/102.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/79.usbdev_endpoint_types.3210502814 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 601860066 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:36:57 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-16186c10-5779-4556-b2bd-d89c50c6cbea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3210502814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.3210502814 |
| Directory | /workspace/79.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_priority.4275449262 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 388940645 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:37 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-85df9c30-8dc3-4135-9d66-c5567480accd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42754 49262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.4275449262 |
| Directory | /workspace/0.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/0.usbdev_invalid_sync.3287408021 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 4913633096 ps |
| CPU time | 50.01 seconds |
| Started | Aug 12 06:28:30 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 217852 kb |
| Host | smart-7c4c275b-1f51-4b17-aef1-918fff376c5b |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3287408021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.3287408021 |
| Directory | /workspace/0.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/cover_reg_top/33.usbdev_intr_test.3876043281 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 56338516 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 05:38:03 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 206856 kb |
| Host | smart-b8f20127-f44f-4b25-82db-559aaad571e3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3876043281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.3876043281 |
| Directory | /workspace/33.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/118.usbdev_endpoint_types.313034310 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 450461821 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c26f176f-80cb-495c-8360-833919d0ccf2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=313034310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.313034310 |
| Directory | /workspace/118.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/142.usbdev_endpoint_types.2416132810 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 618508917 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:37:25 PM PDT 24 |
| Finished | Aug 12 06:37:27 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-5e0b87e8-8ec1-4f99-833f-21c26444aeee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2416132810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.2416132810 |
| Directory | /workspace/142.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/147.usbdev_endpoint_types.267081082 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 362379714 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:37:22 PM PDT 24 |
| Finished | Aug 12 06:37:23 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2f38d96f-2e02-4517-aad5-fa6cf90e5eb4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=267081082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.267081082 |
| Directory | /workspace/147.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/68.usbdev_endpoint_types.3482436691 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 474621420 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-3cbad03e-30b3-4c7e-9743-e67ea84fec8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3482436691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.3482436691 |
| Directory | /workspace/68.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/11.usbdev_invalid_sync.1966293686 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 4124997149 ps |
| CPU time | 30.65 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 217752 kb |
| Host | smart-97b77e82-3561-49d5-8ed7-0006e0b84f48 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1966293686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.1966293686 |
| Directory | /workspace/11.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/45.usbdev_device_address.378184825 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 28321577742 ps |
| CPU time | 41.18 seconds |
| Started | Aug 12 06:36:17 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-66bd3ee5-9405-42ab-9646-aca4ef90b741 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37818 4825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.378184825 |
| Directory | /workspace/45.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_received.474750827 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 158481293 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-282e14a2-ff7f-441e-9d87-8096ee45ffb0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47475 0827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_received.474750827 |
| Directory | /workspace/12.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/125.usbdev_endpoint_types.2011901111 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 602289391 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:24 PM PDT 24 |
| Finished | Aug 12 06:37:26 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-72d15328-81a3-40bc-bcd1-0adcd833b9b3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2011901111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.2011901111 |
| Directory | /workspace/125.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/146.usbdev_endpoint_types.3430486756 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 618599702 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:37:53 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-057639e0-1c0d-4912-8326-33d581328029 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3430486756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.3430486756 |
| Directory | /workspace/146.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/166.usbdev_endpoint_types.1162546470 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 294317770 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-0bced181-2b53-4116-8828-01ee7fd0bd4b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1162546470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1162546470 |
| Directory | /workspace/166.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_hiclk.2298552073 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 109190644482 ps |
| CPU time | 190.46 seconds |
| Started | Aug 12 06:29:56 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-9d59119c-d81b-46fa-8185-fa9bf3d1c85e |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2298552073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.2298552073 |
| Directory | /workspace/4.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/50.usbdev_endpoint_types.908445414 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 540666249 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-67f28cc9-959c-41f9-b12f-deaca0681d29 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=908445414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.908445414 |
| Directory | /workspace/50.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/8.usbdev_data_toggle_restore.1800077216 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 1205564967 ps |
| CPU time | 3.18 seconds |
| Started | Aug 12 06:30:51 PM PDT 24 |
| Finished | Aug 12 06:30:55 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-1dacd1bf-9ba5-41ae-9615-3753ac74878f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1800077216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.1800077216 |
| Directory | /workspace/8.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/94.usbdev_endpoint_types.3744797591 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 386784715 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:37:11 PM PDT 24 |
| Finished | Aug 12 06:37:13 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-8e357877-e9ef-43ba-aadb-b37a21ad53c3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3744797591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.3744797591 |
| Directory | /workspace/94.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_bus_disconnects.1621240000 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 6853780657 ps |
| CPU time | 36.37 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:56 PM PDT 24 |
| Peak memory | 218636 kb |
| Host | smart-b92af4fc-158c-49d9-8310-1256781bc98c |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1621240000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.1621240000 |
| Directory | /workspace/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/293.usbdev_tx_rx_disruption.532724136 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 484128505 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-20017133-f1eb-4e5a-9a61-c8ad72c122c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=532724136 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 293.usbdev_tx_rx_disruption.532724136 |
| Directory | /workspace/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/0.usbdev_stress_usb_traffic.1265431485 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 2861450275 ps |
| CPU time | 75 seconds |
| Started | Aug 12 06:28:42 PM PDT 24 |
| Finished | Aug 12 06:29:57 PM PDT 24 |
| Peak memory | 223984 kb |
| Host | smart-5330aa90-a9ea-4715-a366-7e872db163c9 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1265431485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.1265431485 |
| Directory | /workspace/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_overflow.1379643586 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 171722294 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:28:18 PM PDT 24 |
| Finished | Aug 12 06:28:19 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-1a870b58-5078-4f95-be11-7f6d39ed7883 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13796 43586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_overflow.1379643586 |
| Directory | /workspace/0.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_tl_intg_err.2581193177 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 958051365 ps |
| CPU time | 4.74 seconds |
| Started | Aug 12 05:37:51 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 207148 kb |
| Host | smart-a63a3393-b4fd-415b-9866-9d700a547155 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2581193177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.2581193177 |
| Directory | /workspace/1.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_tl_intg_err.1062482025 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 566041587 ps |
| CPU time | 2.86 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:59 PM PDT 24 |
| Peak memory | 207168 kb |
| Host | smart-ebb24384-819d-4371-89a8-40551c6d30ac |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1062482025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.1062482025 |
| Directory | /workspace/3.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/123.usbdev_endpoint_types.4057404455 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 340597845 ps |
| CPU time | 1.17 seconds |
| Started | Aug 12 06:37:28 PM PDT 24 |
| Finished | Aug 12 06:37:29 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d0a5df34-b0e8-487b-8280-ec0d791ef5f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4057404455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.4057404455 |
| Directory | /workspace/123.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/159.usbdev_endpoint_types.954548281 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 440774411 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-deeadbf9-504d-411b-8de4-abc24320d365 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=954548281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.954548281 |
| Directory | /workspace/159.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/168.usbdev_endpoint_types.3186843894 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 848967545 ps |
| CPU time | 2.01 seconds |
| Started | Aug 12 06:37:33 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-dbcdc3ab-28ad-45ab-a1db-0862fe42baa2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3186843894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.3186843894 |
| Directory | /workspace/168.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/174.usbdev_endpoint_types.1209272135 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 531884616 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a48c7385-2e2b-4cd9-b5d2-32c3f418f7e0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1209272135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.1209272135 |
| Directory | /workspace/174.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/193.usbdev_endpoint_types.3029614169 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 614151524 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:42 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-90807eb8-46da-4501-a5d0-7bf64ad2cf3e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3029614169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.3029614169 |
| Directory | /workspace/193.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/21.usbdev_endpoint_types.3904092531 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 652775463 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:32:56 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-bc86efbc-3830-45e0-b4f8-112ae685345e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3904092531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.3904092531 |
| Directory | /workspace/21.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/46.usbdev_endpoint_types.3626945853 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 436642116 ps |
| CPU time | 1.34 seconds |
| Started | Aug 12 06:36:36 PM PDT 24 |
| Finished | Aug 12 06:36:38 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-8c283d8b-ed5d-473a-bf6d-690abfdef310 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3626945853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.3626945853 |
| Directory | /workspace/46.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/6.usbdev_endpoint_types.3004233759 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 610334508 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:24 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-b1320b2e-a448-44a0-b9d2-213b0e5c7729 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3004233759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.3004233759 |
| Directory | /workspace/6.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/78.usbdev_endpoint_types.1280957681 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 503736925 ps |
| CPU time | 1.31 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-b448253d-d376-4c39-9a14-59750058f4ae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1280957681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.1280957681 |
| Directory | /workspace/78.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/1.usbdev_nak_trans.4121760295 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 178162645 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:28:56 PM PDT 24 |
| Finished | Aug 12 06:28:57 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-8af6593f-3289-41a8-ae60-dab74ca0f426 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41217 60295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_nak_trans.4121760295 |
| Directory | /workspace/1.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_bus_disconnects.2290692688 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 7451651518 ps |
| CPU time | 32.01 seconds |
| Started | Aug 12 06:29:44 PM PDT 24 |
| Finished | Aug 12 06:30:16 PM PDT 24 |
| Peak memory | 224072 kb |
| Host | smart-b88d0cf5-a7ba-43a4-8351-5d8598bc589b |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2290692688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.2290692688 |
| Directory | /workspace/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/18.usbdev_spurious_pids_ignored.3787521604 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 3180137334 ps |
| CPU time | 87.6 seconds |
| Started | Aug 12 06:32:36 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-d6274dc6-cb90-43e3-91ac-5f74705a9455 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3787521604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.3787521604 |
| Directory | /workspace/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_tl_intg_err.751062823 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 499304329 ps |
| CPU time | 2.59 seconds |
| Started | Aug 12 05:37:51 PM PDT 24 |
| Finished | Aug 12 05:37:54 PM PDT 24 |
| Peak memory | 207212 kb |
| Host | smart-d4e166d1-ebb6-4cd5-95f3-2fb2d8c04bf6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=751062823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.751062823 |
| Directory | /workspace/0.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/109.usbdev_tx_rx_disruption.1512670421 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 572692175 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:37:10 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7019a55b-a653-4115-86be-75de9d569196 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1512670421 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 109.usbdev_tx_rx_disruption.1512670421 |
| Directory | /workspace/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_pins_sense.788851468 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 52685331 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 06:29:21 PM PDT 24 |
| Finished | Aug 12 06:29:22 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8fa5c618-4009-4f01-84bb-450a579056a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78885 1468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.788851468 |
| Directory | /workspace/2.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_tl_intg_err.2828208513 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 622664702 ps |
| CPU time | 3.17 seconds |
| Started | Aug 12 05:37:58 PM PDT 24 |
| Finished | Aug 12 05:38:01 PM PDT 24 |
| Peak memory | 207204 kb |
| Host | smart-c7e21829-58b2-4356-b0af-c9e55b2e0e42 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2828208513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.2828208513 |
| Directory | /workspace/2.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_dpi_config_host.3703370112 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 5106819895 ps |
| CPU time | 140.97 seconds |
| Started | Aug 12 06:28:20 PM PDT 24 |
| Finished | Aug 12 06:30:42 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-c3939af9-16be-4252-980c-080f07dc9353 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37033 70112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.3703370112 |
| Directory | /workspace/0.usbdev_dpi_config_host/latest |
| Test location | /workspace/coverage/default/1.usbdev_low_speed_traffic.3014267896 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 4002746036 ps |
| CPU time | 122.94 seconds |
| Started | Aug 12 06:28:55 PM PDT 24 |
| Finished | Aug 12 06:30:58 PM PDT 24 |
| Peak memory | 218428 kb |
| Host | smart-14063b3e-e9f5-4bf6-bbe8-8b4299ea4d98 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3014267896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.3014267896 |
| Directory | /workspace/1.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_stall_priority_over_nak.1166083307 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 196024048 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:29:05 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-3bb27a30-b1c7-4533-a261-bad0cc958f98 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11660 83307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.1166083307 |
| Directory | /workspace/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/108.usbdev_endpoint_types.2614470270 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 256301069 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e2294b3e-328f-4f97-a637-fbc0f684449f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2614470270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.2614470270 |
| Directory | /workspace/108.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/112.usbdev_endpoint_types.837663549 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 690250445 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f789a313-6591-4bb1-93a8-56021fb7aa5c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=837663549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.837663549 |
| Directory | /workspace/112.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/150.usbdev_endpoint_types.2017978366 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 402239677 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:37:28 PM PDT 24 |
| Finished | Aug 12 06:37:30 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-2e737ed4-edd7-44a9-b271-7f30f661ea61 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2017978366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.2017978366 |
| Directory | /workspace/150.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/17.usbdev_endpoint_types.1158478370 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 320951653 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:32:20 PM PDT 24 |
| Finished | Aug 12 06:32:21 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-30c6f85b-2930-4a80-9aa0-e24aa7ed91b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1158478370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.1158478370 |
| Directory | /workspace/17.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/18.usbdev_data_toggle_restore.3458257958 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 527636373 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-9588e102-9cbe-44d7-9f45-53993c5e0fac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3458257958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.3458257958 |
| Directory | /workspace/18.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/194.usbdev_endpoint_types.3031749484 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 426110799 ps |
| CPU time | 1.28 seconds |
| Started | Aug 12 06:37:33 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-cda54db2-4af1-4106-89ad-b07d76235e06 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3031749484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.3031749484 |
| Directory | /workspace/194.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/195.usbdev_endpoint_types.3496067608 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 526922721 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-35af54d3-f1ee-49b2-b239-eed0680dac17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3496067608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.3496067608 |
| Directory | /workspace/195.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_hiclk.1771168085 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 96254607350 ps |
| CPU time | 161.6 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:31:52 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-f816c36d-1c2d-46d9-a2cb-7ffb431566a2 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1771168085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.1771168085 |
| Directory | /workspace/2.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/21.usbdev_rx_full.3584782356 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 381277220 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6ea08c0e-d49a-4835-bfc7-7cbe6558eaa2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35847 82356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_rx_full.3584782356 |
| Directory | /workspace/21.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/29.usbdev_rx_full.777366391 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 252640730 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-1a88c903-20d0-438c-a648-74c2a0d22b60 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77736 6391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_rx_full.777366391 |
| Directory | /workspace/29.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_loclk_max.3821331543 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 115912737671 ps |
| CPU time | 183.7 seconds |
| Started | Aug 12 06:29:28 PM PDT 24 |
| Finished | Aug 12 06:32:32 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-7dc54aad-dd21-4c15-b59b-8afdc8804f97 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3821331543 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk_max.3821331543 |
| Directory | /workspace/3.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/33.usbdev_endpoint_types.2881803758 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 382230621 ps |
| CPU time | 1.36 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-def3bca8-e090-4c0b-a61c-2b1930bd6f2b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2881803758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.2881803758 |
| Directory | /workspace/33.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/61.usbdev_endpoint_types.687911995 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 544093114 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-79b787fb-c1a3-4de5-a1f2-a599c330d6fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=687911995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.687911995 |
| Directory | /workspace/61.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/87.usbdev_endpoint_types.1974612094 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 264978383 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:37:08 PM PDT 24 |
| Finished | Aug 12 06:37:14 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-a44c6f58-b536-4af4-9368-b0f7522eac3f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1974612094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.1974612094 |
| Directory | /workspace/87.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_usb_ref_disable.2552943538 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 143617426 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-6e4cd1a5-9bea-4c5f-8ac0-75e5b746a300 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25529 43538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.2552943538 |
| Directory | /workspace/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_suspends.1157952929 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 17300992124 ps |
| CPU time | 104.48 seconds |
| Started | Aug 12 06:28:37 PM PDT 24 |
| Finished | Aug 12 06:30:22 PM PDT 24 |
| Peak memory | 224096 kb |
| Host | smart-ffeecaf9-165b-4874-bddb-9e065c0d86bc |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1157952929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.1157952929 |
| Directory | /workspace/0.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_overflow.2744228502 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 159824011 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:28:46 PM PDT 24 |
| Finished | Aug 12 06:28:47 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ad87a9c6-0dd5-4fe0-882f-ef9601e449c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27442 28502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_overflow.2744228502 |
| Directory | /workspace/1.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_tl_errors.366121245 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 128890824 ps |
| CPU time | 3.13 seconds |
| Started | Aug 12 05:37:35 PM PDT 24 |
| Finished | Aug 12 05:37:39 PM PDT 24 |
| Peak memory | 207196 kb |
| Host | smart-2c9cdca4-f870-4678-9484-22e85b2b0619 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=366121245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.366121245 |
| Directory | /workspace/1.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_empty.2076449426 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 175588911 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:28:21 PM PDT 24 |
| Finished | Aug 12 06:28:22 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-724e1dd2-b4f8-4590-bd46-fd1fe48d8fa9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20764 49426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_empty.2076449426 |
| Directory | /workspace/0.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/0.usbdev_device_address.3469483546 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 14132868192 ps |
| CPU time | 24.11 seconds |
| Started | Aug 12 06:28:22 PM PDT 24 |
| Finished | Aug 12 06:28:46 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-862b0821-e8e3-4648-b486-f3f0eae1385c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34694 83546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.3469483546 |
| Directory | /workspace/0.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/0.usbdev_host_lost.330808310 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 4174333578 ps |
| CPU time | 10.72 seconds |
| Started | Aug 12 06:28:31 PM PDT 24 |
| Finished | Aug 12 06:28:42 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-70e3f204-bb80-4ab5-86f4-855c55046d37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33080 8310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_host_lost.330808310 |
| Directory | /workspace/0.usbdev_host_lost/latest |
| Test location | /workspace/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.432661123 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 491594957 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:28:27 PM PDT 24 |
| Finished | Aug 12 06:28:28 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a9baae33-36a6-4588-b92c-f6d5b39d444a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43266 1123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.432661123 |
| Directory | /workspace/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_reset.937773949 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 229147886 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:28:27 PM PDT 24 |
| Finished | Aug 12 06:28:28 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f2851ef9-c98e-4805-9150-1ba087447b0d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93777 3949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_reset.937773949 |
| Directory | /workspace/0.usbdev_link_reset/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_pid_err.208041730 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 183204640 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-24d880b6-7721-45a2-a77c-8cd9be917ff9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20804 1730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_pid_err.208041730 |
| Directory | /workspace/0.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_empty.4042836397 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 152720991 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:12 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-944e87ae-1416-4396-8ef3-1c51edab148e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40428 36397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_empty.4042836397 |
| Directory | /workspace/2.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/0.usbdev_nak_trans.2190968991 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 184060851 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:28:35 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-d7d552bd-2a1b-4370-a4f8-d682f5bb3460 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21909 68991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_nak_trans.2190968991 |
| Directory | /workspace/0.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_data_toggle_restore.2490861937 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 854122797 ps |
| CPU time | 2.38 seconds |
| Started | Aug 12 06:28:42 PM PDT 24 |
| Finished | Aug 12 06:28:45 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-42968684-39cf-4bef-818d-0d7aab2bfe8b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2490861937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.2490861937 |
| Directory | /workspace/1.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/1.usbdev_fifo_rst.1313493168 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 146090731 ps |
| CPU time | 1.2 seconds |
| Started | Aug 12 06:28:47 PM PDT 24 |
| Finished | Aug 12 06:28:48 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-1e177829-4534-489c-b445-fee573e7c6c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13134 93168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_fifo_rst.1313493168 |
| Directory | /workspace/1.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_buffer.4163633753 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 22592584139 ps |
| CPU time | 56.53 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:30:00 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-33d3d557-3c2b-4af1-995b-586f72ff73ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41636 33753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_buffer.4163633753 |
| Directory | /workspace/1.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/1.usbdev_tx_rx_disruption.4048128829 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 508995756 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:29:06 PM PDT 24 |
| Finished | Aug 12 06:29:08 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-cea181ab-1868-4101-8d3f-033d08824602 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4048128829 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_tx_rx_disruption.4048128829 |
| Directory | /workspace/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/10.usbdev_nak_trans.4064271489 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 164246636 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-693e98c5-2581-4dba-96ab-85604e76deab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40642 71489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_nak_trans.4064271489 |
| Directory | /workspace/10.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/101.usbdev_tx_rx_disruption.1244751077 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 543585655 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-479ee632-3845-4c46-9c9c-2f6da5990d86 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1244751077 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 101.usbdev_tx_rx_disruption.1244751077 |
| Directory | /workspace/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/11.usbdev_nak_trans.898647301 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 240602913 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-579bee8e-b33d-45a0-9da5-ac78a98f5b1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89864 7301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_nak_trans.898647301 |
| Directory | /workspace/11.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_nak_trans.1211923397 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 182820730 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d15aa620-181b-4f6f-b156-49c5f7e6ee2a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12119 23397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_nak_trans.1211923397 |
| Directory | /workspace/12.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/125.usbdev_tx_rx_disruption.4236477976 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 689766879 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:37:19 PM PDT 24 |
| Finished | Aug 12 06:37:21 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-0efe7b2e-2745-428e-8225-ebd53f411b84 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4236477976 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 125.usbdev_tx_rx_disruption.4236477976 |
| Directory | /workspace/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/15.usbdev_nak_trans.2569191448 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 234205054 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:01 PM PDT 24 |
| Finished | Aug 12 06:32:02 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-c804ea96-1672-451b-bc26-14ef2c6dbc8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25691 91448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_nak_trans.2569191448 |
| Directory | /workspace/15.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/153.usbdev_endpoint_types.1544694339 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 470291167 ps |
| CPU time | 1.37 seconds |
| Started | Aug 12 06:37:25 PM PDT 24 |
| Finished | Aug 12 06:37:26 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-9a90a2af-100a-4a32-bef3-84150f975365 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1544694339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.1544694339 |
| Directory | /workspace/153.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/16.usbdev_nak_trans.3086030407 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 183179121 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:32:18 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-3e76f811-28d5-476c-8d4d-13cd62ec3dc3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30860 30407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_nak_trans.3086030407 |
| Directory | /workspace/16.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_nak_trans.73378121 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 225423712 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-a1248b09-9b4c-4d3c-84fb-eb21c5bd7ea0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73378 121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_nak_trans.73378121 |
| Directory | /workspace/19.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_stress_usb_traffic.945841935 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 7538565783 ps |
| CPU time | 201 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:32:48 PM PDT 24 |
| Peak memory | 218552 kb |
| Host | smart-9bdb9551-c3bd-4b64-9ee2-ffa048ecb8c7 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=945841935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.945841935 |
| Directory | /workspace/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/20.usbdev_nak_trans.3248149536 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 191452838 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:32:58 PM PDT 24 |
| Finished | Aug 12 06:32:59 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-823fc6ad-405b-4df7-b3f8-f43e9ae1c718 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32481 49536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_nak_trans.3248149536 |
| Directory | /workspace/20.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_nak_trans.707535279 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 215110925 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:23 PM PDT 24 |
| Finished | Aug 12 06:34:24 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-490cb379-24de-4f01-b54d-d1778be71388 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70753 5279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_nak_trans.707535279 |
| Directory | /workspace/31.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/378.usbdev_tx_rx_disruption.2493005612 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 620609399 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:08 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-d10f5acc-1f4a-4bdb-ac13-0a96baa47f38 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2493005612 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 378.usbdev_tx_rx_disruption.2493005612 |
| Directory | /workspace/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/7.usbdev_nak_trans.2470581077 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 266745738 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:30:38 PM PDT 24 |
| Finished | Aug 12 06:30:39 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3a9dccba-f2a4-4c7d-8544-1edda824a9cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24705 81077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_nak_trans.2470581077 |
| Directory | /workspace/7.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_aliasing.794045969 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 195156259 ps |
| CPU time | 2.1 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 207020 kb |
| Host | smart-c1ceb9fa-06b6-4a5b-b162-f32c76911722 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=794045969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.794045969 |
| Directory | /workspace/0.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2405187074 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 525400546 ps |
| CPU time | 7.03 seconds |
| Started | Aug 12 05:37:58 PM PDT 24 |
| Finished | Aug 12 05:38:05 PM PDT 24 |
| Peak memory | 207080 kb |
| Host | smart-f7c2bdcf-8500-4331-bcf1-cb57ad053b0a |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2405187074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.2405187074 |
| Directory | /workspace/0.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_hw_reset.2676433552 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 199433970 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 05:37:46 PM PDT 24 |
| Finished | Aug 12 05:37:47 PM PDT 24 |
| Peak memory | 206952 kb |
| Host | smart-f114576d-ed0b-474c-be9b-edc4b919dd4b |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2676433552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.2676433552 |
| Directory | /workspace/0.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.759473339 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 156283208 ps |
| CPU time | 2.1 seconds |
| Started | Aug 12 05:37:34 PM PDT 24 |
| Finished | Aug 12 05:37:36 PM PDT 24 |
| Peak memory | 215484 kb |
| Host | smart-30d50df6-caca-489d-b5cd-d86c2d3caf66 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=759473339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev _csr_mem_rw_with_rand_reset.759473339 |
| Directory | /workspace/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_rw.900017257 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 127079606 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 05:37:37 PM PDT 24 |
| Finished | Aug 12 05:37:38 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-7755229c-2ea3-41e8-ac07-8f7b6fabf39c |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=900017257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.900017257 |
| Directory | /workspace/0.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_mem_partial_access.1191466886 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 89120173 ps |
| CPU time | 2.13 seconds |
| Started | Aug 12 05:37:32 PM PDT 24 |
| Finished | Aug 12 05:37:34 PM PDT 24 |
| Peak memory | 215348 kb |
| Host | smart-c12f3e40-0e8f-414f-bad2-b00ceb9c08ef |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1191466886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.1191466886 |
| Directory | /workspace/0.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_mem_walk.3522253240 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 487994316 ps |
| CPU time | 4.81 seconds |
| Started | Aug 12 05:37:46 PM PDT 24 |
| Finished | Aug 12 05:37:51 PM PDT 24 |
| Peak memory | 207052 kb |
| Host | smart-64ae6ebc-41f6-4b5e-aa9d-461711230943 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3522253240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.3522253240 |
| Directory | /workspace/0.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2722531571 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 136609337 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 207116 kb |
| Host | smart-30c6aa1f-c214-48e3-b13b-9f112472bc69 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2722531571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.2722531571 |
| Directory | /workspace/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_tl_errors.801816755 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 65371349 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 05:37:35 PM PDT 24 |
| Finished | Aug 12 05:37:37 PM PDT 24 |
| Peak memory | 207172 kb |
| Host | smart-8bf7d8ea-e5fc-424a-b21e-049d8027c678 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=801816755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.801816755 |
| Directory | /workspace/0.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_aliasing.3049743 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 123213653 ps |
| CPU time | 3.23 seconds |
| Started | Aug 12 05:37:43 PM PDT 24 |
| Finished | Aug 12 05:37:47 PM PDT 24 |
| Peak memory | 207136 kb |
| Host | smart-a3cfc81a-444c-4697-bf1c-539ef3b9a075 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3049743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tg l+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.3049743 |
| Directory | /workspace/1.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_bit_bash.375145611 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 931416890 ps |
| CPU time | 4.49 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:38:01 PM PDT 24 |
| Peak memory | 207172 kb |
| Host | smart-63bf86dd-a5f4-4c49-a8a9-79ca30cf988f |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=375145611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.375145611 |
| Directory | /workspace/1.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_hw_reset.1910013750 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 92652790 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 05:37:36 PM PDT 24 |
| Finished | Aug 12 05:37:37 PM PDT 24 |
| Peak memory | 206960 kb |
| Host | smart-c814d5ee-6f1e-4b1b-8005-df613b515d27 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1910013750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.1910013750 |
| Directory | /workspace/1.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2309246773 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 104461112 ps |
| CPU time | 1.3 seconds |
| Started | Aug 12 05:37:37 PM PDT 24 |
| Finished | Aug 12 05:37:38 PM PDT 24 |
| Peak memory | 215424 kb |
| Host | smart-3a3e50cb-150a-4a48-945b-60d5ac90597f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2309246773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbde v_csr_mem_rw_with_rand_reset.2309246773 |
| Directory | /workspace/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_rw.1295367966 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 150031092 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 206860 kb |
| Host | smart-fe195e92-032c-4ccf-8a4a-dd2faafac306 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1295367966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.1295367966 |
| Directory | /workspace/1.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_intr_test.2758301599 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 43181070 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 05:37:35 PM PDT 24 |
| Finished | Aug 12 05:37:36 PM PDT 24 |
| Peak memory | 206848 kb |
| Host | smart-7571a0c1-318c-4729-b1b0-1d6e6c6b8f24 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2758301599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.2758301599 |
| Directory | /workspace/1.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_mem_partial_access.3661015769 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 148578964 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 05:37:38 PM PDT 24 |
| Finished | Aug 12 05:37:39 PM PDT 24 |
| Peak memory | 215320 kb |
| Host | smart-3e2bc218-cc4e-4d95-9bd8-9bfb18559c3a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3661015769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.3661015769 |
| Directory | /workspace/1.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_mem_walk.544562440 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 257837722 ps |
| CPU time | 2.47 seconds |
| Started | Aug 12 05:37:37 PM PDT 24 |
| Finished | Aug 12 05:37:39 PM PDT 24 |
| Peak memory | 207000 kb |
| Host | smart-c6f3f214-f45f-4fde-936d-ec5f8b29d851 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=544562440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.544562440 |
| Directory | /workspace/1.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.282546129 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 155870969 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:54 PM PDT 24 |
| Peak memory | 207148 kb |
| Host | smart-75406a1a-1c8e-4f17-a6cb-c3cb8db4b7ac |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=282546129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.282546129 |
| Directory | /workspace/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3164348052 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 86876464 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 05:37:58 PM PDT 24 |
| Finished | Aug 12 05:38:00 PM PDT 24 |
| Peak memory | 215428 kb |
| Host | smart-9de656f9-b90d-4009-b035-a923cf7e3603 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3164348052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbd ev_csr_mem_rw_with_rand_reset.3164348052 |
| Directory | /workspace/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_csr_rw.3159605534 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 81563539 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 05:37:43 PM PDT 24 |
| Finished | Aug 12 05:37:45 PM PDT 24 |
| Peak memory | 206816 kb |
| Host | smart-8f98ea75-62ba-49f0-a39d-5517e16cf24d |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3159605534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.3159605534 |
| Directory | /workspace/10.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_intr_test.4162001443 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 83839903 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:37:59 PM PDT 24 |
| Peak memory | 206852 kb |
| Host | smart-9cabb0bb-cab3-49d1-bfde-38f64e6a2622 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4162001443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.4162001443 |
| Directory | /workspace/10.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.670746342 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 137899778 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 05:37:52 PM PDT 24 |
| Finished | Aug 12 05:37:53 PM PDT 24 |
| Peak memory | 207156 kb |
| Host | smart-28fbbd3d-3cd6-4972-b7e0-b31b4d85c763 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=670746342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.670746342 |
| Directory | /workspace/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_tl_errors.3025302677 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 298847650 ps |
| CPU time | 3.33 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:38:00 PM PDT 24 |
| Peak memory | 220780 kb |
| Host | smart-30011953-3530-4385-bada-82ca78cad170 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3025302677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.3025302677 |
| Directory | /workspace/10.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2643253997 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 77271066 ps |
| CPU time | 1.91 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 217936 kb |
| Host | smart-51038e2a-06ee-4a03-a53a-f446f996dd65 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2643253997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbd ev_csr_mem_rw_with_rand_reset.2643253997 |
| Directory | /workspace/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_csr_rw.1061611335 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 89850207 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 05:37:59 PM PDT 24 |
| Finished | Aug 12 05:38:00 PM PDT 24 |
| Peak memory | 206924 kb |
| Host | smart-808d6418-7cf3-48a5-8f62-4d1bed4b1ab7 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1061611335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.1061611335 |
| Directory | /workspace/11.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_intr_test.1309333703 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 43847974 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 206848 kb |
| Host | smart-3e87a047-52e2-4b19-8fe8-56fb2d204c3e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1309333703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.1309333703 |
| Directory | /workspace/11.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.3209494655 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 188557862 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:37:59 PM PDT 24 |
| Peak memory | 207128 kb |
| Host | smart-55b56c85-8bb7-4550-99a3-87b941aa1be9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3209494655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.3209494655 |
| Directory | /workspace/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_tl_errors.2208031786 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 96791571 ps |
| CPU time | 2.02 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 207200 kb |
| Host | smart-42a2df0d-bbfc-490c-815d-d0fddda52ac9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2208031786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.2208031786 |
| Directory | /workspace/11.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_tl_intg_err.2476031324 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 337381459 ps |
| CPU time | 2.32 seconds |
| Started | Aug 12 05:38:15 PM PDT 24 |
| Finished | Aug 12 05:38:18 PM PDT 24 |
| Peak memory | 207252 kb |
| Host | smart-aaa4cd20-1482-4977-8d23-e4a64aec3b34 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2476031324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.2476031324 |
| Directory | /workspace/11.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2689230066 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 132729899 ps |
| CPU time | 1.34 seconds |
| Started | Aug 12 05:38:00 PM PDT 24 |
| Finished | Aug 12 05:38:02 PM PDT 24 |
| Peak memory | 223588 kb |
| Host | smart-eb95066d-81dd-4e33-8bd4-a8a4ee3b99a3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2689230066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbd ev_csr_mem_rw_with_rand_reset.2689230066 |
| Directory | /workspace/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_csr_rw.4264115381 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 93262199 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 05:38:08 PM PDT 24 |
| Finished | Aug 12 05:38:10 PM PDT 24 |
| Peak memory | 206964 kb |
| Host | smart-5c0b41ab-1d0d-437b-a623-c4099051b248 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=4264115381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.4264115381 |
| Directory | /workspace/12.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_intr_test.3813264627 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 47913217 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 05:38:05 PM PDT 24 |
| Finished | Aug 12 05:38:06 PM PDT 24 |
| Peak memory | 206844 kb |
| Host | smart-a3362494-8bbd-463b-bb3b-74fb9b91fe71 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3813264627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.3813264627 |
| Directory | /workspace/12.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.1598475624 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 87601481 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:02 PM PDT 24 |
| Peak memory | 207128 kb |
| Host | smart-578688b9-67f3-4423-9f4b-2aeb96eca3dc |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1598475624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.1598475624 |
| Directory | /workspace/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_tl_errors.2850953618 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 143576766 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 05:38:03 PM PDT 24 |
| Finished | Aug 12 05:38:05 PM PDT 24 |
| Peak memory | 207208 kb |
| Host | smart-e2b9e066-acba-47da-aa25-f92e4da1eb7f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2850953618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.2850953618 |
| Directory | /workspace/12.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_tl_intg_err.2325839092 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 1192154782 ps |
| CPU time | 5.52 seconds |
| Started | Aug 12 05:38:02 PM PDT 24 |
| Finished | Aug 12 05:38:07 PM PDT 24 |
| Peak memory | 207220 kb |
| Host | smart-7144c633-9676-47a6-a770-27b13796d863 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2325839092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.2325839092 |
| Directory | /workspace/12.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1543470074 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 70283870 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 215376 kb |
| Host | smart-de554fd6-8c6b-484d-aa98-afd4542c4860 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1543470074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbd ev_csr_mem_rw_with_rand_reset.1543470074 |
| Directory | /workspace/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_csr_rw.3109856280 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 66243449 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 05:38:03 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 206932 kb |
| Host | smart-6314491e-8ed6-4491-8c07-9ed65d54f8e1 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3109856280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.3109856280 |
| Directory | /workspace/13.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_intr_test.3339366185 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 116435181 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 206828 kb |
| Host | smart-5730cac5-3a45-4dfd-9ce9-46a6bf90a286 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3339366185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.3339366185 |
| Directory | /workspace/13.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.3449721050 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 56224058 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 05:38:02 PM PDT 24 |
| Finished | Aug 12 05:38:03 PM PDT 24 |
| Peak memory | 206952 kb |
| Host | smart-36eadb29-0132-492b-8fb4-86edaf6b9143 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3449721050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.3449721050 |
| Directory | /workspace/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_tl_errors.2384046973 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 107371570 ps |
| CPU time | 2.77 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:54 PM PDT 24 |
| Peak memory | 223260 kb |
| Host | smart-689d2c0a-6065-499f-88ec-fcdb48921561 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2384046973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.2384046973 |
| Directory | /workspace/13.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_tl_intg_err.1078684908 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 403746190 ps |
| CPU time | 2.76 seconds |
| Started | Aug 12 05:38:16 PM PDT 24 |
| Finished | Aug 12 05:38:19 PM PDT 24 |
| Peak memory | 207168 kb |
| Host | smart-b0e64f70-20e8-420c-9a6c-18e6417db8db |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1078684908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.1078684908 |
| Directory | /workspace/13.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.2649269242 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 82613239 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 215384 kb |
| Host | smart-b44df3f9-c786-41d3-9ca8-39b13ac7e254 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2649269242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbd ev_csr_mem_rw_with_rand_reset.2649269242 |
| Directory | /workspace/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_csr_rw.2982949004 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 65153217 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:54 PM PDT 24 |
| Peak memory | 206960 kb |
| Host | smart-b4b82958-b1d7-4218-9804-df317bbda249 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2982949004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2982949004 |
| Directory | /workspace/14.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_intr_test.1571296446 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 48457978 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 206872 kb |
| Host | smart-ba4f78e3-c51e-4306-993e-60de789899c9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1571296446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.1571296446 |
| Directory | /workspace/14.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3094586241 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 385048510 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 207132 kb |
| Host | smart-209fe2a0-4ec2-48b1-8ca0-b36ece90ea71 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3094586241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.3094586241 |
| Directory | /workspace/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_tl_errors.1895153247 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 77757182 ps |
| CPU time | 2.06 seconds |
| Started | Aug 12 05:38:05 PM PDT 24 |
| Finished | Aug 12 05:38:07 PM PDT 24 |
| Peak memory | 222908 kb |
| Host | smart-ef076489-260f-4788-953e-d09a340d046e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1895153247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.1895153247 |
| Directory | /workspace/14.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_tl_intg_err.3429824874 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 391337157 ps |
| CPU time | 2.95 seconds |
| Started | Aug 12 05:38:18 PM PDT 24 |
| Finished | Aug 12 05:38:21 PM PDT 24 |
| Peak memory | 207172 kb |
| Host | smart-96353f8b-02fb-4d2e-b9cc-f207b1fcc494 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3429824874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.3429824874 |
| Directory | /workspace/14.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1101679678 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 88150761 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 215440 kb |
| Host | smart-1279a00b-4231-4417-b9fd-21fa1e82fe5a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1101679678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbd ev_csr_mem_rw_with_rand_reset.1101679678 |
| Directory | /workspace/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_intr_test.965380249 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 49902190 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 05:38:18 PM PDT 24 |
| Finished | Aug 12 05:38:19 PM PDT 24 |
| Peak memory | 206836 kb |
| Host | smart-0b9d676c-3d05-4797-90fb-741fa5c96435 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=965380249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.965380249 |
| Directory | /workspace/15.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.372476244 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 121538706 ps |
| CPU time | 1.13 seconds |
| Started | Aug 12 05:38:02 PM PDT 24 |
| Finished | Aug 12 05:38:03 PM PDT 24 |
| Peak memory | 207048 kb |
| Host | smart-b0515f7b-61b3-4c72-885b-b49735cdc863 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=372476244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.372476244 |
| Directory | /workspace/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_tl_errors.3118632102 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 64778776 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 215312 kb |
| Host | smart-19a552a4-7cd1-4a2f-84f3-7996977fb0ec |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3118632102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.3118632102 |
| Directory | /workspace/15.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_tl_intg_err.690039628 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 683960640 ps |
| CPU time | 3.23 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 207172 kb |
| Host | smart-498f41b2-6cbb-4bd8-8205-a446b332c306 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=690039628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.690039628 |
| Directory | /workspace/15.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1796012113 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 93223395 ps |
| CPU time | 2.23 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:38:00 PM PDT 24 |
| Peak memory | 215356 kb |
| Host | smart-850fb55f-3c42-4406-be9d-5f89945e116b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1796012113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbd ev_csr_mem_rw_with_rand_reset.1796012113 |
| Directory | /workspace/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_csr_rw.3467975355 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 81576517 ps |
| CPU time | 1 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:02 PM PDT 24 |
| Peak memory | 206912 kb |
| Host | smart-4cc501ba-3539-431f-92b2-946a25964a5f |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3467975355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.3467975355 |
| Directory | /workspace/16.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_intr_test.4072725246 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 37746722 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 206816 kb |
| Host | smart-551c9ea8-6bab-48f1-bfc0-33ac60d03e13 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4072725246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.4072725246 |
| Directory | /workspace/16.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3426845789 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 131597419 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 207072 kb |
| Host | smart-c18fb82c-6170-4749-83cc-f69b2ee898de |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3426845789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.3426845789 |
| Directory | /workspace/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_tl_errors.597496651 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 154525247 ps |
| CPU time | 2.08 seconds |
| Started | Aug 12 05:38:00 PM PDT 24 |
| Finished | Aug 12 05:38:03 PM PDT 24 |
| Peak memory | 222604 kb |
| Host | smart-70cecd52-ddd5-423b-ac09-d13fff0eb26a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=597496651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.597496651 |
| Directory | /workspace/16.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_tl_intg_err.206089991 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 786043391 ps |
| CPU time | 5.22 seconds |
| Started | Aug 12 05:38:04 PM PDT 24 |
| Finished | Aug 12 05:38:09 PM PDT 24 |
| Peak memory | 207204 kb |
| Host | smart-6107fbc6-d597-4be5-a9f5-5b8ceb43b972 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=206089991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.206089991 |
| Directory | /workspace/16.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1342551626 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 91401406 ps |
| CPU time | 2.07 seconds |
| Started | Aug 12 05:38:16 PM PDT 24 |
| Finished | Aug 12 05:38:19 PM PDT 24 |
| Peak memory | 215424 kb |
| Host | smart-eaa58af5-1bbd-46a5-94e5-b6b0fa8a709f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1342551626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbd ev_csr_mem_rw_with_rand_reset.1342551626 |
| Directory | /workspace/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_csr_rw.4167066444 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 82544644 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 05:38:09 PM PDT 24 |
| Finished | Aug 12 05:38:10 PM PDT 24 |
| Peak memory | 206868 kb |
| Host | smart-69de2fae-0117-462d-876e-2d27186286f2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=4167066444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.4167066444 |
| Directory | /workspace/17.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_intr_test.986706413 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 35104778 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 206788 kb |
| Host | smart-6afebd3c-744d-4f87-8edc-f38e5e861da3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=986706413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.986706413 |
| Directory | /workspace/17.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3617153385 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 60536366 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 207140 kb |
| Host | smart-83ad84ca-591e-49d3-8fed-4cfb5f135e2c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3617153385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.3617153385 |
| Directory | /workspace/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_tl_errors.2487991145 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 165431810 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 05:38:03 PM PDT 24 |
| Finished | Aug 12 05:38:05 PM PDT 24 |
| Peak memory | 207196 kb |
| Host | smart-e13dcba5-32f0-4cd2-aae2-7c6175dce214 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2487991145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.2487991145 |
| Directory | /workspace/17.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_tl_intg_err.407724109 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 1121255990 ps |
| CPU time | 3.22 seconds |
| Started | Aug 12 05:38:04 PM PDT 24 |
| Finished | Aug 12 05:38:07 PM PDT 24 |
| Peak memory | 207192 kb |
| Host | smart-f5fceca2-7efe-4fa3-92f0-7abc9399efbd |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=407724109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.407724109 |
| Directory | /workspace/17.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3475704639 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 166197798 ps |
| CPU time | 2.1 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 215404 kb |
| Host | smart-38dda5e6-3c2d-4c5b-b34d-e261a15b01fa |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3475704639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbd ev_csr_mem_rw_with_rand_reset.3475704639 |
| Directory | /workspace/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_csr_rw.3584286864 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 115354690 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 05:38:20 PM PDT 24 |
| Finished | Aug 12 05:38:21 PM PDT 24 |
| Peak memory | 206956 kb |
| Host | smart-07cfb20e-a567-4e0c-bea7-cec6bc6f858d |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3584286864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.3584286864 |
| Directory | /workspace/18.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_intr_test.1432751075 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 111209098 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:51 PM PDT 24 |
| Peak memory | 206816 kb |
| Host | smart-84421943-1dca-418c-9aa9-1bc48ade5b2d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1432751075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.1432751075 |
| Directory | /workspace/18.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.3839784399 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 114038667 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 05:38:02 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 207096 kb |
| Host | smart-5087bbad-4ced-456f-879a-607c4d6b8c7c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3839784399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.3839784399 |
| Directory | /workspace/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_tl_errors.2334184756 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 114115293 ps |
| CPU time | 2.8 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:38:00 PM PDT 24 |
| Peak memory | 223120 kb |
| Host | smart-0c3a36f6-11cb-461f-8678-1c70438db3e7 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2334184756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.2334184756 |
| Directory | /workspace/18.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_tl_intg_err.1972661547 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 449911127 ps |
| CPU time | 2.62 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 207204 kb |
| Host | smart-94563af3-a219-452b-b541-c6ac1c1ccfff |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1972661547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.1972661547 |
| Directory | /workspace/18.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.4282884515 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 181801815 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 05:38:04 PM PDT 24 |
| Finished | Aug 12 05:38:06 PM PDT 24 |
| Peak memory | 215484 kb |
| Host | smart-7453f5e5-72ec-462e-9f2a-706acb551c65 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4282884515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbd ev_csr_mem_rw_with_rand_reset.4282884515 |
| Directory | /workspace/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_csr_rw.175540809 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 53129667 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 05:38:13 PM PDT 24 |
| Finished | Aug 12 05:38:14 PM PDT 24 |
| Peak memory | 206928 kb |
| Host | smart-0d00fb21-8075-4033-8a62-46a73f55335e |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=175540809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.175540809 |
| Directory | /workspace/19.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_intr_test.2197879844 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 84357810 ps |
| CPU time | 0.77 seconds |
| Started | Aug 12 05:38:06 PM PDT 24 |
| Finished | Aug 12 05:38:07 PM PDT 24 |
| Peak memory | 206824 kb |
| Host | smart-a72ac314-5772-43c4-b1ed-c004c00a6fd9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2197879844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.2197879844 |
| Directory | /workspace/19.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3605620484 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 93944101 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 05:38:21 PM PDT 24 |
| Finished | Aug 12 05:38:22 PM PDT 24 |
| Peak memory | 207112 kb |
| Host | smart-5c8db3ac-3eb2-4153-9943-46711351e95f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3605620484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.3605620484 |
| Directory | /workspace/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_tl_errors.3588862517 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 106203807 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 05:38:00 PM PDT 24 |
| Finished | Aug 12 05:38:01 PM PDT 24 |
| Peak memory | 207248 kb |
| Host | smart-2b738bab-88a3-4793-8364-39c29104dfe1 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3588862517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.3588862517 |
| Directory | /workspace/19.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_tl_intg_err.1678884190 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 323940711 ps |
| CPU time | 2.68 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 207220 kb |
| Host | smart-114ccdcf-b616-4d8b-ade4-31c26fb796be |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1678884190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.1678884190 |
| Directory | /workspace/19.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_aliasing.386025140 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 171650806 ps |
| CPU time | 2.11 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:37:59 PM PDT 24 |
| Peak memory | 207060 kb |
| Host | smart-65a9cc02-a877-463c-be52-463c706a3799 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=386025140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.386025140 |
| Directory | /workspace/2.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_bit_bash.1412058777 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 534079784 ps |
| CPU time | 5.27 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:07 PM PDT 24 |
| Peak memory | 207136 kb |
| Host | smart-f7b8bb48-8efe-44df-8f56-29671c1a083c |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1412058777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.1412058777 |
| Directory | /workspace/2.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_hw_reset.3579649584 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 93163516 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 05:38:14 PM PDT 24 |
| Finished | Aug 12 05:38:15 PM PDT 24 |
| Peak memory | 206936 kb |
| Host | smart-3b612921-85e6-4377-b53b-2f105a86def7 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3579649584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.3579649584 |
| Directory | /workspace/2.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.1897238794 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 72997398 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:52 PM PDT 24 |
| Peak memory | 215388 kb |
| Host | smart-c16e8add-1345-4adc-bcc3-a9cee45b4e30 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1897238794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbde v_csr_mem_rw_with_rand_reset.1897238794 |
| Directory | /workspace/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_rw.570373642 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 50911358 ps |
| CPU time | 0.77 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:52 PM PDT 24 |
| Peak memory | 206896 kb |
| Host | smart-0433f3df-4c29-44ef-a8ad-8e99d7505d4a |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=570373642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.570373642 |
| Directory | /workspace/2.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_intr_test.3217214419 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 50425093 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 206872 kb |
| Host | smart-c0b7fb9b-44a5-47bc-a74f-e3c9e0950486 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3217214419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.3217214419 |
| Directory | /workspace/2.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_mem_partial_access.2087547001 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 165056221 ps |
| CPU time | 2.38 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:53 PM PDT 24 |
| Peak memory | 215372 kb |
| Host | smart-d987445b-901f-4e48-8778-658a02db219f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2087547001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.2087547001 |
| Directory | /workspace/2.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_mem_walk.3129131958 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 367714102 ps |
| CPU time | 2.64 seconds |
| Started | Aug 12 05:37:41 PM PDT 24 |
| Finished | Aug 12 05:37:44 PM PDT 24 |
| Peak memory | 207004 kb |
| Host | smart-b9c5a282-0bb9-4bb9-9743-e9565bb09fe9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3129131958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.3129131958 |
| Directory | /workspace/2.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1874547337 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 169090637 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 207120 kb |
| Host | smart-27f041d4-8266-4aed-902b-73c9fc5cc302 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1874547337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.1874547337 |
| Directory | /workspace/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_tl_errors.2776465208 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 210679368 ps |
| CPU time | 3.71 seconds |
| Started | Aug 12 05:37:36 PM PDT 24 |
| Finished | Aug 12 05:37:39 PM PDT 24 |
| Peak memory | 222728 kb |
| Host | smart-601fdff1-eb73-44ee-ae21-5092a918a5dd |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2776465208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.2776465208 |
| Directory | /workspace/2.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/20.usbdev_intr_test.320661852 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 43817157 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 05:38:07 PM PDT 24 |
| Finished | Aug 12 05:38:07 PM PDT 24 |
| Peak memory | 206828 kb |
| Host | smart-6aa66c3f-2b92-46f4-87ca-f43fd6bb8e5b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=320661852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.320661852 |
| Directory | /workspace/20.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/21.usbdev_intr_test.882943788 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 36954498 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 05:38:04 PM PDT 24 |
| Finished | Aug 12 05:38:05 PM PDT 24 |
| Peak memory | 206864 kb |
| Host | smart-8b48218b-1a70-4e23-874a-00145773b250 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=882943788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.882943788 |
| Directory | /workspace/21.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/22.usbdev_intr_test.1167065679 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 64061248 ps |
| CPU time | 0.79 seconds |
| Started | Aug 12 05:37:58 PM PDT 24 |
| Finished | Aug 12 05:37:59 PM PDT 24 |
| Peak memory | 206876 kb |
| Host | smart-9c1f0cd9-7577-4d51-849e-96e6f618b0f4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1167065679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.1167065679 |
| Directory | /workspace/22.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/23.usbdev_intr_test.4267517421 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 35610420 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 206784 kb |
| Host | smart-b627fd80-4e03-484e-b7f6-b733387f5e13 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4267517421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.4267517421 |
| Directory | /workspace/23.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/24.usbdev_intr_test.3652408331 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 52259718 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 05:38:15 PM PDT 24 |
| Finished | Aug 12 05:38:16 PM PDT 24 |
| Peak memory | 206856 kb |
| Host | smart-ff0a9581-74ba-40b4-9ff0-dc72ca04fc72 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3652408331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.3652408331 |
| Directory | /workspace/24.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/25.usbdev_intr_test.3931833917 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 50002035 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 05:38:06 PM PDT 24 |
| Finished | Aug 12 05:38:07 PM PDT 24 |
| Peak memory | 206844 kb |
| Host | smart-05e6aa89-6ede-4344-b241-ad1bb93fe73b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3931833917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.3931833917 |
| Directory | /workspace/25.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/26.usbdev_intr_test.852020425 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 91260928 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 05:38:02 PM PDT 24 |
| Finished | Aug 12 05:38:03 PM PDT 24 |
| Peak memory | 206832 kb |
| Host | smart-f9b32884-31e1-4913-9dc2-3ab33a7f067b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=852020425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.852020425 |
| Directory | /workspace/26.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/27.usbdev_intr_test.2318694844 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 32922529 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 206864 kb |
| Host | smart-f7d15c17-6517-45be-a69e-63307bdee23d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2318694844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.2318694844 |
| Directory | /workspace/27.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/28.usbdev_intr_test.4021732955 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 52776976 ps |
| CPU time | 0.78 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:01 PM PDT 24 |
| Peak memory | 206732 kb |
| Host | smart-857f5c12-e134-458e-8426-3ee9cca06d09 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4021732955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.4021732955 |
| Directory | /workspace/28.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/29.usbdev_intr_test.2291544866 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 57895583 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 05:38:14 PM PDT 24 |
| Finished | Aug 12 05:38:15 PM PDT 24 |
| Peak memory | 206848 kb |
| Host | smart-0ad73f0b-a2a0-496a-8d9f-94cc8546a7a3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2291544866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.2291544866 |
| Directory | /workspace/29.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_aliasing.337165193 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 83116452 ps |
| CPU time | 1.86 seconds |
| Started | Aug 12 05:38:13 PM PDT 24 |
| Finished | Aug 12 05:38:15 PM PDT 24 |
| Peak memory | 207004 kb |
| Host | smart-2b17717f-3123-42a0-b06e-ff344b9688cb |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=337165193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.337165193 |
| Directory | /workspace/3.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1943354425 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 1249059971 ps |
| CPU time | 7.73 seconds |
| Started | Aug 12 05:37:52 PM PDT 24 |
| Finished | Aug 12 05:38:00 PM PDT 24 |
| Peak memory | 207096 kb |
| Host | smart-9d6fb8f4-0921-4588-9765-3374a9d2a61c |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1943354425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.1943354425 |
| Directory | /workspace/3.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_hw_reset.1932013235 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 81123852 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 206852 kb |
| Host | smart-40acd420-5bcc-47b1-828d-fa481dcd2f3e |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1932013235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.1932013235 |
| Directory | /workspace/3.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.2160721183 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 58951853 ps |
| CPU time | 1.27 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:52 PM PDT 24 |
| Peak memory | 223516 kb |
| Host | smart-b41e0431-1593-40df-8c63-ff8b6b7b1a9b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2160721183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbde v_csr_mem_rw_with_rand_reset.2160721183 |
| Directory | /workspace/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_rw.1795441225 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 93688256 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 05:38:11 PM PDT 24 |
| Finished | Aug 12 05:38:12 PM PDT 24 |
| Peak memory | 206940 kb |
| Host | smart-21efaa77-6770-445b-8276-4c9f0ae97cd0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1795441225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.1795441225 |
| Directory | /workspace/3.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_intr_test.3965937413 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 41253170 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 05:37:58 PM PDT 24 |
| Finished | Aug 12 05:37:59 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-c3dd780a-049b-49cf-9a0f-e3a31c872ad9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3965937413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.3965937413 |
| Directory | /workspace/3.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_mem_partial_access.2348741612 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 84637763 ps |
| CPU time | 2.06 seconds |
| Started | Aug 12 05:38:02 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 215288 kb |
| Host | smart-96e27418-b861-42a4-996a-c2fa6597d602 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2348741612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.2348741612 |
| Directory | /workspace/3.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_mem_walk.2383515433 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 377041329 ps |
| CPU time | 2.64 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:38:00 PM PDT 24 |
| Peak memory | 207028 kb |
| Host | smart-1efae6b1-482e-4ad4-8cc0-0b43f65079d4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2383515433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.2383515433 |
| Directory | /workspace/3.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.1287726440 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 97197220 ps |
| CPU time | 1.13 seconds |
| Started | Aug 12 05:37:47 PM PDT 24 |
| Finished | Aug 12 05:37:48 PM PDT 24 |
| Peak memory | 207000 kb |
| Host | smart-5f688467-d6d3-4d77-a108-4e98acdfb7a5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1287726440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.1287726440 |
| Directory | /workspace/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_tl_errors.3055543166 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 282293427 ps |
| CPU time | 2.98 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:54 PM PDT 24 |
| Peak memory | 223452 kb |
| Host | smart-1c728c87-0752-4a7e-9748-a8bb5da55ceb |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3055543166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.3055543166 |
| Directory | /workspace/3.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/30.usbdev_intr_test.349282290 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 40830065 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-f24fff8e-1a6a-4924-8f04-50ef952f3def |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=349282290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.349282290 |
| Directory | /workspace/30.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/31.usbdev_intr_test.4135643720 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 60378867 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 05:38:04 PM PDT 24 |
| Finished | Aug 12 05:38:05 PM PDT 24 |
| Peak memory | 206808 kb |
| Host | smart-a11c95c9-2006-4e4e-80f1-3640ff7f1192 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4135643720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.4135643720 |
| Directory | /workspace/31.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/32.usbdev_intr_test.3885532611 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 59971750 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 05:38:09 PM PDT 24 |
| Finished | Aug 12 05:38:10 PM PDT 24 |
| Peak memory | 206828 kb |
| Host | smart-49ff3911-d639-409b-aa95-b6ec89c9c702 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3885532611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.3885532611 |
| Directory | /workspace/32.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/35.usbdev_intr_test.2104070673 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 62194288 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 05:38:26 PM PDT 24 |
| Finished | Aug 12 05:38:26 PM PDT 24 |
| Peak memory | 206880 kb |
| Host | smart-6c01c1c2-aaed-4443-8f1b-ba4ee1b23e1b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2104070673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.2104070673 |
| Directory | /workspace/35.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/36.usbdev_intr_test.1148085082 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 34782840 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 05:38:00 PM PDT 24 |
| Finished | Aug 12 05:38:01 PM PDT 24 |
| Peak memory | 206772 kb |
| Host | smart-3a72e0cd-8dcb-44ba-bf1d-0c09b0e203d5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1148085082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.1148085082 |
| Directory | /workspace/36.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/37.usbdev_intr_test.1711498488 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 58761334 ps |
| CPU time | 0.78 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:02 PM PDT 24 |
| Peak memory | 206732 kb |
| Host | smart-69e5e77e-a0e8-4b4b-896b-bc695290eb85 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1711498488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.1711498488 |
| Directory | /workspace/37.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/38.usbdev_intr_test.2788139506 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 57451236 ps |
| CPU time | 0.76 seconds |
| Started | Aug 12 05:38:03 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 206832 kb |
| Host | smart-4ac90acb-8248-436d-a287-d9461d134bef |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2788139506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.2788139506 |
| Directory | /workspace/38.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_aliasing.3826202293 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 178984339 ps |
| CPU time | 2.09 seconds |
| Started | Aug 12 05:37:46 PM PDT 24 |
| Finished | Aug 12 05:37:48 PM PDT 24 |
| Peak memory | 207104 kb |
| Host | smart-c4f3b8ed-b96e-4d50-8ee2-b36bd3042e7d |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3826202293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.3826202293 |
| Directory | /workspace/4.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_bit_bash.2859736263 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 1455065978 ps |
| CPU time | 6.2 seconds |
| Started | Aug 12 05:37:47 PM PDT 24 |
| Finished | Aug 12 05:37:53 PM PDT 24 |
| Peak memory | 207192 kb |
| Host | smart-a4e73ac3-41db-4a0c-921b-a2b4da8f1490 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2859736263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.2859736263 |
| Directory | /workspace/4.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_hw_reset.252232521 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 165070308 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 05:37:37 PM PDT 24 |
| Finished | Aug 12 05:37:38 PM PDT 24 |
| Peak memory | 206864 kb |
| Host | smart-0a7e1711-5e6f-4d77-871e-29b4f826d332 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=252232521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.252232521 |
| Directory | /workspace/4.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.1229541171 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 61590533 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 05:37:48 PM PDT 24 |
| Finished | Aug 12 05:37:50 PM PDT 24 |
| Peak memory | 215444 kb |
| Host | smart-0bd74d95-c561-411a-900f-ed30b91fbbca |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1229541171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbde v_csr_mem_rw_with_rand_reset.1229541171 |
| Directory | /workspace/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_rw.2539528141 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 54226701 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:54 PM PDT 24 |
| Peak memory | 206924 kb |
| Host | smart-95dff417-d606-4adf-abec-cc242c31cf7b |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2539528141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.2539528141 |
| Directory | /workspace/4.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_intr_test.2143354933 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 44288576 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 206880 kb |
| Host | smart-2860392d-8165-4474-9e9e-db7add9e16ff |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2143354933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.2143354933 |
| Directory | /workspace/4.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_mem_partial_access.2843325122 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 86878656 ps |
| CPU time | 2.21 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 215348 kb |
| Host | smart-45aa0243-5736-424c-923a-4ffd0d604dd4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2843325122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.2843325122 |
| Directory | /workspace/4.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_mem_walk.1484715383 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 272248895 ps |
| CPU time | 2.53 seconds |
| Started | Aug 12 05:37:41 PM PDT 24 |
| Finished | Aug 12 05:37:43 PM PDT 24 |
| Peak memory | 206956 kb |
| Host | smart-606bf162-14ce-4d94-9474-d080ece7e3ab |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1484715383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.1484715383 |
| Directory | /workspace/4.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3922634349 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 93505136 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 05:37:51 PM PDT 24 |
| Finished | Aug 12 05:37:53 PM PDT 24 |
| Peak memory | 207168 kb |
| Host | smart-548f5327-3b7e-4bfb-a3d6-8615da7b1a42 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3922634349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.3922634349 |
| Directory | /workspace/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_tl_errors.481438042 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 66592383 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 05:37:37 PM PDT 24 |
| Finished | Aug 12 05:37:38 PM PDT 24 |
| Peak memory | 207240 kb |
| Host | smart-db1a9ae8-47b0-456e-9070-e3c9d50943d8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=481438042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.481438042 |
| Directory | /workspace/4.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_tl_intg_err.123980298 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 1008214157 ps |
| CPU time | 4.73 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 207216 kb |
| Host | smart-53af42a1-3ad1-4fb7-bc6c-384ab3edd5e8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=123980298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.123980298 |
| Directory | /workspace/4.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/40.usbdev_intr_test.241376127 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 60013839 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 05:38:27 PM PDT 24 |
| Finished | Aug 12 05:38:28 PM PDT 24 |
| Peak memory | 206880 kb |
| Host | smart-bcbec7e7-bee2-498e-a1ac-dab492e1661b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=241376127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.241376127 |
| Directory | /workspace/40.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/41.usbdev_intr_test.628957314 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 111973584 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 05:38:18 PM PDT 24 |
| Finished | Aug 12 05:38:19 PM PDT 24 |
| Peak memory | 206852 kb |
| Host | smart-33045b90-0765-445c-93f6-c4b49b31cec2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=628957314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.628957314 |
| Directory | /workspace/41.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/42.usbdev_intr_test.525862092 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 36393226 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 05:38:09 PM PDT 24 |
| Finished | Aug 12 05:38:10 PM PDT 24 |
| Peak memory | 206812 kb |
| Host | smart-0ea98b4c-b3c3-41ec-b8f1-6f55a4257e82 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=525862092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.525862092 |
| Directory | /workspace/42.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/43.usbdev_intr_test.130157021 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 61806979 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 05:38:03 PM PDT 24 |
| Finished | Aug 12 05:38:09 PM PDT 24 |
| Peak memory | 206852 kb |
| Host | smart-d4871129-6399-40bb-959e-1db5793198ca |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=130157021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.130157021 |
| Directory | /workspace/43.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/44.usbdev_intr_test.2630024106 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 35195129 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 05:38:04 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 206832 kb |
| Host | smart-ce1ee3ef-17a6-4288-a334-1937d2f78864 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2630024106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.2630024106 |
| Directory | /workspace/44.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/45.usbdev_intr_test.1946451799 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 39991322 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 05:38:18 PM PDT 24 |
| Finished | Aug 12 05:38:18 PM PDT 24 |
| Peak memory | 206844 kb |
| Host | smart-c61421d1-6ad1-4d18-adb6-06c8d8de498c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1946451799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.1946451799 |
| Directory | /workspace/45.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/46.usbdev_intr_test.4008095281 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 41858087 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 05:38:37 PM PDT 24 |
| Finished | Aug 12 05:38:38 PM PDT 24 |
| Peak memory | 206856 kb |
| Host | smart-0e164a46-8a6e-4b56-8832-5e9022057130 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4008095281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.4008095281 |
| Directory | /workspace/46.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/47.usbdev_intr_test.3320663105 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 54179273 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 206876 kb |
| Host | smart-04633288-9162-4804-9ed8-8fc22c46b817 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3320663105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.3320663105 |
| Directory | /workspace/47.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/48.usbdev_intr_test.4021397737 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 84594113 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 05:38:02 PM PDT 24 |
| Finished | Aug 12 05:38:03 PM PDT 24 |
| Peak memory | 206784 kb |
| Host | smart-02398944-8d82-439f-9445-b95bfea3b987 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4021397737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.4021397737 |
| Directory | /workspace/48.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/49.usbdev_intr_test.3960573473 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 39362892 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 05:38:05 PM PDT 24 |
| Finished | Aug 12 05:38:06 PM PDT 24 |
| Peak memory | 206688 kb |
| Host | smart-dd8430ac-c07d-4f86-a08c-a2ce0cc95d88 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3960573473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.3960573473 |
| Directory | /workspace/49.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1546177651 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 193584733 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 215424 kb |
| Host | smart-996210dd-8079-4881-9a02-50212c45415f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1546177651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbde v_csr_mem_rw_with_rand_reset.1546177651 |
| Directory | /workspace/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_csr_rw.1914029662 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 43263830 ps |
| CPU time | 0.78 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 206920 kb |
| Host | smart-44e53795-0ed1-4217-a850-e8a966055dc8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1914029662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.1914029662 |
| Directory | /workspace/5.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_intr_test.2462399994 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 36641352 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 05:37:51 PM PDT 24 |
| Finished | Aug 12 05:37:52 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-bf85dcca-ff1c-4587-a8ce-5e336e56811e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2462399994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.2462399994 |
| Directory | /workspace/5.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1437761460 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 195296521 ps |
| CPU time | 1.81 seconds |
| Started | Aug 12 05:37:51 PM PDT 24 |
| Finished | Aug 12 05:37:53 PM PDT 24 |
| Peak memory | 207140 kb |
| Host | smart-823ce27f-e659-4f84-bd33-dc2b71f5361d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1437761460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.1437761460 |
| Directory | /workspace/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_tl_errors.3835819126 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 164249418 ps |
| CPU time | 1.95 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 207192 kb |
| Host | smart-4a7013aa-e11e-451d-b369-7017ee5158aa |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3835819126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.3835819126 |
| Directory | /workspace/5.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_tl_intg_err.3262163416 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 1430754143 ps |
| CPU time | 4.98 seconds |
| Started | Aug 12 05:37:46 PM PDT 24 |
| Finished | Aug 12 05:37:52 PM PDT 24 |
| Peak memory | 207236 kb |
| Host | smart-af35ef08-e9b7-4e76-ba8f-540631452111 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3262163416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.3262163416 |
| Directory | /workspace/5.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.458435234 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 184890611 ps |
| CPU time | 1.97 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 215444 kb |
| Host | smart-bd9b946a-1689-4dd0-b584-0c30cca5954f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=458435234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev _csr_mem_rw_with_rand_reset.458435234 |
| Directory | /workspace/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_csr_rw.3279540470 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 54934684 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 206804 kb |
| Host | smart-503aa208-957c-495e-8fd7-d6a1c23ad297 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3279540470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.3279540470 |
| Directory | /workspace/6.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_intr_test.3444151729 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 30753953 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-64792d28-ab8c-4271-8770-3356632eb40c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3444151729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.3444151729 |
| Directory | /workspace/6.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2506080034 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 73136142 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 207132 kb |
| Host | smart-dc321843-36b6-4b67-8ce1-f65efe851322 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2506080034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.2506080034 |
| Directory | /workspace/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_tl_errors.1301487391 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 109849635 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:03 PM PDT 24 |
| Peak memory | 207192 kb |
| Host | smart-ac143bda-c564-44c9-9682-dfff962dc1bd |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1301487391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.1301487391 |
| Directory | /workspace/6.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_tl_intg_err.2204096068 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 806976021 ps |
| CPU time | 2.77 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 207208 kb |
| Host | smart-0e006d4d-0094-4ef6-9b1b-3d2fd917dc04 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2204096068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.2204096068 |
| Directory | /workspace/6.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.1985791423 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 130558446 ps |
| CPU time | 1.37 seconds |
| Started | Aug 12 05:37:50 PM PDT 24 |
| Finished | Aug 12 05:37:52 PM PDT 24 |
| Peak memory | 215476 kb |
| Host | smart-59b9110f-6d32-4701-81f2-f56b3d71941e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1985791423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbde v_csr_mem_rw_with_rand_reset.1985791423 |
| Directory | /workspace/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_csr_rw.3697331617 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 76833069 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 05:37:57 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 206852 kb |
| Host | smart-e39a5007-8726-4cca-a67b-7061db980629 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3697331617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.3697331617 |
| Directory | /workspace/7.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_intr_test.2883844519 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 31287196 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:55 PM PDT 24 |
| Peak memory | 206856 kb |
| Host | smart-6d8a3a1a-bfc5-46b1-8614-86b0ad0063aa |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2883844519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.2883844519 |
| Directory | /workspace/7.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2852265291 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 115415050 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 207128 kb |
| Host | smart-4fd43d88-65d9-43e4-9a38-8aab24f931db |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2852265291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.2852265291 |
| Directory | /workspace/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_tl_errors.683321602 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 120525082 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 207172 kb |
| Host | smart-3b67290d-f09b-4b03-bc22-96797c7ab35d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=683321602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.683321602 |
| Directory | /workspace/7.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_tl_intg_err.2279495035 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 830911111 ps |
| CPU time | 3.79 seconds |
| Started | Aug 12 05:37:49 PM PDT 24 |
| Finished | Aug 12 05:37:53 PM PDT 24 |
| Peak memory | 207200 kb |
| Host | smart-e2bac2af-d395-4c97-8bdf-5be3529fc77d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2279495035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.2279495035 |
| Directory | /workspace/7.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2640209013 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 95148042 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 05:37:51 PM PDT 24 |
| Finished | Aug 12 05:37:53 PM PDT 24 |
| Peak memory | 215416 kb |
| Host | smart-4864209a-472c-408f-8d0f-4e7b6946aa7f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2640209013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbde v_csr_mem_rw_with_rand_reset.2640209013 |
| Directory | /workspace/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_csr_rw.4280665748 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 86491352 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:54 PM PDT 24 |
| Peak memory | 206820 kb |
| Host | smart-d7bb33c5-4c7b-450e-ae42-effe4d2e7ac4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=4280665748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.4280665748 |
| Directory | /workspace/8.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_intr_test.469329171 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 42042356 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:37:57 PM PDT 24 |
| Peak memory | 206876 kb |
| Host | smart-57d78d86-1976-47af-bdbc-f9c4f05d2dbd |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=469329171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.469329171 |
| Directory | /workspace/8.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.3519577244 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 101596932 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 05:37:47 PM PDT 24 |
| Finished | Aug 12 05:37:49 PM PDT 24 |
| Peak memory | 206964 kb |
| Host | smart-5a89f239-9d6b-4b0e-a071-2e3ba800f180 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3519577244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.3519577244 |
| Directory | /workspace/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_tl_errors.3452454547 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 97423406 ps |
| CPU time | 2.68 seconds |
| Started | Aug 12 05:38:01 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 207196 kb |
| Host | smart-085be9e7-5c69-48f9-9b4d-3778ba14955c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3452454547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.3452454547 |
| Directory | /workspace/8.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_tl_intg_err.1982864999 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 682612711 ps |
| CPU time | 4.28 seconds |
| Started | Aug 12 05:37:56 PM PDT 24 |
| Finished | Aug 12 05:38:01 PM PDT 24 |
| Peak memory | 207176 kb |
| Host | smart-1c54881e-b844-48f1-97a2-941931d939c5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1982864999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.1982864999 |
| Directory | /workspace/8.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_csr_rw.3290213613 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 64868616 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 05:38:03 PM PDT 24 |
| Finished | Aug 12 05:38:04 PM PDT 24 |
| Peak memory | 206804 kb |
| Host | smart-c469f94f-a26e-43f8-ba8e-80c61812b898 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3290213613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.3290213613 |
| Directory | /workspace/9.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_intr_test.2883636658 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 48398285 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 05:37:55 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 206816 kb |
| Host | smart-7a127886-cb26-4563-a132-92b0b7abf519 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2883636658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.2883636658 |
| Directory | /workspace/9.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.727219920 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 145570076 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 05:37:54 PM PDT 24 |
| Finished | Aug 12 05:37:56 PM PDT 24 |
| Peak memory | 207136 kb |
| Host | smart-ab6292d9-b4dc-469f-b68d-c7051d7f090e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=727219920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.727219920 |
| Directory | /workspace/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_tl_intg_err.1766820911 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 461256117 ps |
| CPU time | 4.17 seconds |
| Started | Aug 12 05:37:53 PM PDT 24 |
| Finished | Aug 12 05:37:58 PM PDT 24 |
| Peak memory | 207208 kb |
| Host | smart-36c69755-47fd-47fc-9a63-96bf66fa8fef |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1766820911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.1766820911 |
| Directory | /workspace/9.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_alert_test.2104404572 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 61976121 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:28:43 PM PDT 24 |
| Finished | Aug 12 06:28:44 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-9aa1ece8-1038-4bda-8323-cf99808db2c8 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2104404572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.2104404572 |
| Directory | /workspace/0.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_disconnect.1581762458 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 5161807316 ps |
| CPU time | 8.34 seconds |
| Started | Aug 12 06:28:19 PM PDT 24 |
| Finished | Aug 12 06:28:27 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-d57ae487-ba06-409d-84ca-8113a9e11fc7 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1581762458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_ao n_wake_disconnect.1581762458 |
| Directory | /workspace/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_reset.3242187273 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 19558729215 ps |
| CPU time | 23.39 seconds |
| Started | Aug 12 06:28:20 PM PDT 24 |
| Finished | Aug 12 06:28:43 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-5a2d174a-19b8-4b8a-a354-87401ce7c7be |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3242187273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.3242187273 |
| Directory | /workspace/0.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_resume.121214270 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 26448781693 ps |
| CPU time | 35.84 seconds |
| Started | Aug 12 06:28:19 PM PDT 24 |
| Finished | Aug 12 06:28:55 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-4cead22a-9306-4a82-9583-e5efdbc98e8a |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=121214270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon _wake_resume.121214270 |
| Directory | /workspace/0.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_buffer.601745945 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 191711724 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:28:19 PM PDT 24 |
| Finished | Aug 12 06:28:20 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c40ea1ef-0c4a-46c2-bd3e-de7e711f32e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60174 5945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_buffer.601745945 |
| Directory | /workspace/0.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/0.usbdev_bitstuff_err.1350955314 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 145485041 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:28:21 PM PDT 24 |
| Finished | Aug 12 06:28:22 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-6cd99513-763a-4cfa-b664-a7a81a06dd53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13509 55314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_bitstuff_err.1350955314 |
| Directory | /workspace/0.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_data_toggle_clear.3800381156 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 177549426 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:28:20 PM PDT 24 |
| Finished | Aug 12 06:28:21 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-61a3c3b2-525f-45d9-900e-3ca93dac2cf4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38003 81156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_clear.3800381156 |
| Directory | /workspace/0.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/0.usbdev_data_toggle_restore.4112686806 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 838599187 ps |
| CPU time | 2.37 seconds |
| Started | Aug 12 06:28:18 PM PDT 24 |
| Finished | Aug 12 06:28:20 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-84680168-f3c3-4de9-b927-dbaf05b46d5a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4112686806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.4112686806 |
| Directory | /workspace/0.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/0.usbdev_device_timeout.257423325 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 975907142 ps |
| CPU time | 22.89 seconds |
| Started | Aug 12 06:28:21 PM PDT 24 |
| Finished | Aug 12 06:28:44 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-6e888c8c-bde1-408d-8e2a-408a37d09f5c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=257423325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.257423325 |
| Directory | /workspace/0.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/0.usbdev_disable_endpoint.1299479556 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 938055264 ps |
| CPU time | 2.45 seconds |
| Started | Aug 12 06:28:18 PM PDT 24 |
| Finished | Aug 12 06:28:20 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-86c83540-27e3-4be0-9f26-9476a00b8ae2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12994 79556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disable_endpoint.1299479556 |
| Directory | /workspace/0.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/0.usbdev_enable.221670373 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 39927385 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:28:21 PM PDT 24 |
| Finished | Aug 12 06:28:22 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-439f54c4-2e4d-4121-ba77-a0c6c7c68dbd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22167 0373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_enable.221670373 |
| Directory | /workspace/0.usbdev_enable/latest |
| Test location | /workspace/coverage/default/0.usbdev_endpoint_access.3013125058 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 766752143 ps |
| CPU time | 2.41 seconds |
| Started | Aug 12 06:28:20 PM PDT 24 |
| Finished | Aug 12 06:28:22 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-937442fa-007b-4bba-a479-fccf235c870f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30131 25058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.3013125058 |
| Directory | /workspace/0.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/0.usbdev_endpoint_types.2257364956 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 537325928 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:28:20 PM PDT 24 |
| Finished | Aug 12 06:28:21 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-7e23646d-c069-4112-8da2-4276212e7622 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2257364956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.2257364956 |
| Directory | /workspace/0.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/0.usbdev_fifo_rst.2601062765 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 259702363 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:28:18 PM PDT 24 |
| Finished | Aug 12 06:28:20 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-c4e4a4f0-3268-4233-8c7b-a73911ac6135 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26010 62765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_fifo_rst.2601062765 |
| Directory | /workspace/0.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_hiclk.2266390438 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 91179109095 ps |
| CPU time | 156.98 seconds |
| Started | Aug 12 06:28:21 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-b60c3020-a642-4b5c-8e75-a6dbca986d60 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2266390438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.2266390438 |
| Directory | /workspace/0.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_hiclk_max.4172243318 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 104313425382 ps |
| CPU time | 161.24 seconds |
| Started | Aug 12 06:28:29 PM PDT 24 |
| Finished | Aug 12 06:31:10 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-8bcb95a3-ecd5-4d51-b80e-04ecc244bca4 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4172243318 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk_max.4172243318 |
| Directory | /workspace/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_loclk.2948187704 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 112101216005 ps |
| CPU time | 182.2 seconds |
| Started | Aug 12 06:28:28 PM PDT 24 |
| Finished | Aug 12 06:31:30 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-3f1a4c5a-b8cb-4d66-8625-3a4c82c580a3 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2948187704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.2948187704 |
| Directory | /workspace/0.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_loclk_max.1307983171 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 111951507241 ps |
| CPU time | 167.55 seconds |
| Started | Aug 12 06:28:26 PM PDT 24 |
| Finished | Aug 12 06:31:14 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-8f3c817e-c2bb-4c5e-89c4-d4c061e3fb6f |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1307983171 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk_max.1307983171 |
| Directory | /workspace/0.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_phase.279688902 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 86221383256 ps |
| CPU time | 150.7 seconds |
| Started | Aug 12 06:28:25 PM PDT 24 |
| Finished | Aug 12 06:30:56 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-87a4a174-c59f-4563-b7c6-565bd52dfdab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27968 8902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_phase.279688902 |
| Directory | /workspace/0.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_iso.2275620061 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 173796844 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:28:30 PM PDT 24 |
| Finished | Aug 12 06:28:31 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-6da3e4d7-9aa9-406c-977f-05cf3e8beda3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2275620061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.2275620061 |
| Directory | /workspace/0.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_stall.1824892077 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 145533992 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:28:30 PM PDT 24 |
| Finished | Aug 12 06:28:31 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-859b38ed-a395-4977-9522-2df0d63d1344 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18248 92077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_stall.1824892077 |
| Directory | /workspace/0.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_trans.3226683220 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 161656647 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:28:29 PM PDT 24 |
| Finished | Aug 12 06:28:30 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-0e9cfd3d-b086-4369-bb78-18195599432d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32266 83220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_trans.3226683220 |
| Directory | /workspace/0.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_iso_retraction.3793954361 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 10294135739 ps |
| CPU time | 128.21 seconds |
| Started | Aug 12 06:28:28 PM PDT 24 |
| Finished | Aug 12 06:30:36 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-96e7d75a-4083-44ad-bfd0-0ef89c0bb8d2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3793954361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.3793954361 |
| Directory | /workspace/0.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_in_err.2013439206 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 264474800 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:28:29 PM PDT 24 |
| Finished | Aug 12 06:28:30 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-31c6d5d0-0042-43b2-ac1e-f3d2b18f10d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20134 39206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_in_err.2013439206 |
| Directory | /workspace/0.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_out_err.2900071163 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 457552900 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:28:28 PM PDT 24 |
| Finished | Aug 12 06:28:29 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d58381bb-0d03-49e7-bd7e-8661d86a5fe8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29000 71163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_out_err.2900071163 |
| Directory | /workspace/0.usbdev_link_out_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_resume.960931801 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 33917471384 ps |
| CPU time | 62.57 seconds |
| Started | Aug 12 06:28:27 PM PDT 24 |
| Finished | Aug 12 06:29:30 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-3ebde7a8-6e28-4d4b-8707-6d1546d4e2b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96093 1801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_resume.960931801 |
| Directory | /workspace/0.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_suspend.3120570656 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 3770393283 ps |
| CPU time | 6.27 seconds |
| Started | Aug 12 06:28:28 PM PDT 24 |
| Finished | Aug 12 06:28:34 PM PDT 24 |
| Peak memory | 216060 kb |
| Host | smart-8cdb13e7-fadf-40d0-8a68-f0ef942fc481 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31205 70656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_suspend.3120570656 |
| Directory | /workspace/0.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/0.usbdev_low_speed_traffic.1969229425 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 5298216513 ps |
| CPU time | 58.58 seconds |
| Started | Aug 12 06:28:27 PM PDT 24 |
| Finished | Aug 12 06:29:26 PM PDT 24 |
| Peak memory | 224088 kb |
| Host | smart-cb955c4c-0e3f-424c-8213-bfa1509b4f20 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1969229425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.1969229425 |
| Directory | /workspace/0.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_inter_pkt_delay.2437440940 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 3022084526 ps |
| CPU time | 88.32 seconds |
| Started | Aug 12 06:28:27 PM PDT 24 |
| Finished | Aug 12 06:29:56 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-a629693f-fd73-4a24-be46-c9f178d57fbe |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2437440940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.2437440940 |
| Directory | /workspace/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_length_in_transaction.818805020 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 254868889 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:28:27 PM PDT 24 |
| Finished | Aug 12 06:28:28 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-36f612e7-712b-42ff-9074-ffbd0c9cb62b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=818805020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.818805020 |
| Directory | /workspace/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_length_out_transaction.3445871389 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 198140211 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:28:27 PM PDT 24 |
| Finished | Aug 12 06:28:29 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-42bee4c6-aa4c-4ac5-96d8-ef8d6aaa7115 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34458 71389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.3445871389 |
| Directory | /workspace/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_non_iso_usb_traffic.3032258857 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 2048643730 ps |
| CPU time | 59.81 seconds |
| Started | Aug 12 06:28:26 PM PDT 24 |
| Finished | Aug 12 06:29:26 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-a60f3c9c-3f15-4c10-92ef-512ad552563d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30322 58857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.3032258857 |
| Directory | /workspace/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_usb_traffic.2367087622 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 2529826460 ps |
| CPU time | 25.05 seconds |
| Started | Aug 12 06:28:26 PM PDT 24 |
| Finished | Aug 12 06:28:52 PM PDT 24 |
| Peak memory | 224132 kb |
| Host | smart-d222bd68-08f1-4205-a057-4c669db370c2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2367087622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.2367087622 |
| Directory | /workspace/0.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_inter_pkt_delay.3939384816 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 3791877650 ps |
| CPU time | 110.29 seconds |
| Started | Aug 12 06:28:26 PM PDT 24 |
| Finished | Aug 12 06:30:16 PM PDT 24 |
| Peak memory | 217532 kb |
| Host | smart-8444a5cc-aa18-4b49-83b0-3f3a83e7ea55 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3939384816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.3939384816 |
| Directory | /workspace/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_length_in_transaction.2127975179 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 162578741 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:28:26 PM PDT 24 |
| Finished | Aug 12 06:28:27 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-1c7ef71e-31c8-4afe-a606-efedc438fded |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2127975179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.2127975179 |
| Directory | /workspace/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_length_out_transaction.2708535170 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 149013946 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-42db3ab3-85e7-4f5b-855c-1b1ad40705e8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27085 35170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.2708535170 |
| Directory | /workspace/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1949206653 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 520202565 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-6a06bfcd-8bd3-40fd-b132-9e3281528f00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19492 06653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1949206653 |
| Directory | /workspace/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_iso.1035218609 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 135391528 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:28:39 PM PDT 24 |
| Finished | Aug 12 06:28:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-26ddbf51-83a6-4815-bb3c-15d873ad5f01 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10352 18609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_iso.1035218609 |
| Directory | /workspace/0.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_stall.834603817 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 161946919 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:28:36 PM PDT 24 |
| Finished | Aug 12 06:28:37 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-effd4c12-192c-426e-8156-030c6f64c3b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83460 3817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_stall.834603817 |
| Directory | /workspace/0.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_trans_nak.199959706 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 168986389 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-6a10e241-aee5-473a-a75c-1d4653e89364 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19995 9706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_trans_nak.199959706 |
| Directory | /workspace/0.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/0.usbdev_pending_in_trans.3854368283 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 151173739 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:28:35 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-692ac798-f835-4c0c-a9c2-7bd5f66c59c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38543 68283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pending_in_trans.3854368283 |
| Directory | /workspace/0.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.3598004212 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 178106184 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:28:36 PM PDT 24 |
| Finished | Aug 12 06:28:37 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-b83397da-6955-4ee0-93e5-26125c6e10c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35980 04212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_bit_handling_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.3598004212 |
| Directory | /workspace/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_pinflip.2935566380 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 199039833 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:28:35 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-7e4364c4-b47a-419d-9749-ff81cbc516b9 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2935566380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.2935566380 |
| Directory | /workspace/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_rand_bus_type.2175238341 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 203489384 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:28:35 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-5c38f641-8f1a-4b7e-add2-411ecaae085d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21752 38341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.2175238341 |
| Directory | /workspace/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_rx_dp_dn.344912019 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 238706529 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:28:33 PM PDT 24 |
| Finished | Aug 12 06:28:35 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-33d391e2-6c82-4d6f-bec7-cc2a8a7f9dbd |
| User | root |
| Command | /workspace/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=344912019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asse rt -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.344912019 |
| Directory | /workspace/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_tx_use_d_se0.4114083758 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 249273639 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2c7b91f2-ba53-4800-bb2c-17c58178022c |
| User | root |
| Command | /workspace/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4114083758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ass ert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.4114083758 |
| Directory | /workspace/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_pins_sense.4102263584 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 44031669 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-373d16d1-56d9-42ca-9985-24c3fe994f5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41022 63584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.4102263584 |
| Directory | /workspace/0.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_buffer.211068364 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 11807505874 ps |
| CPU time | 31.65 seconds |
| Started | Aug 12 06:28:36 PM PDT 24 |
| Finished | Aug 12 06:29:08 PM PDT 24 |
| Peak memory | 220040 kb |
| Host | smart-7c65111e-91ea-4bcd-8692-a92e967eabe9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21106 8364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_buffer.211068364 |
| Directory | /workspace/0.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_received.594573110 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 185171148 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:28:33 PM PDT 24 |
| Finished | Aug 12 06:28:34 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-202d7c4d-2836-4b76-bb67-756528d16f8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59457 3110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_received.594573110 |
| Directory | /workspace/0.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_sent.891418989 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 239811536 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:28:33 PM PDT 24 |
| Finished | Aug 12 06:28:34 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b8dd2790-5e8d-4acc-868d-c2cd81d7fec7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89141 8989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_sent.891418989 |
| Directory | /workspace/0.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_bus_disconnects.429935302 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 10731930363 ps |
| CPU time | 71.26 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 217692 kb |
| Host | smart-92f86261-bc99-43d7-b32a-b17a729fce5f |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=429935302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.429935302 |
| Directory | /workspace/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_bus_resets.1444251087 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 8703053970 ps |
| CPU time | 58.78 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:29:33 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-08d7b42d-674d-455b-b4b6-144b6c2cccc6 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1444251087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.1444251087 |
| Directory | /workspace/0.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/0.usbdev_random_length_in_transaction.2893048619 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 286511327 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:37 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3eed57d3-df7f-47c1-aa42-d8e1b6018180 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28930 48619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_in_transaction.2893048619 |
| Directory | /workspace/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_random_length_out_transaction.2170777217 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 257131202 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:28:36 PM PDT 24 |
| Finished | Aug 12 06:28:37 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-2542599f-f476-4f81-996a-df313d3ce749 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21707 77217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.2170777217 |
| Directory | /workspace/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_resume_link_active.3447191189 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 20163379379 ps |
| CPU time | 22.77 seconds |
| Started | Aug 12 06:28:34 PM PDT 24 |
| Finished | Aug 12 06:28:57 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-6e58dca1-6d4a-4174-a537-c85638d2789d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34471 91189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_resume_link_active.3447191189 |
| Directory | /workspace/0.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_crc_err.2815425816 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 159720175 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:28:37 PM PDT 24 |
| Finished | Aug 12 06:28:38 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-0c37a8ab-9295-4092-90df-9be1eadfe734 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28154 25816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_crc_err.2815425816 |
| Directory | /workspace/0.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_full.1898430864 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 324637686 ps |
| CPU time | 1.17 seconds |
| Started | Aug 12 06:28:35 PM PDT 24 |
| Finished | Aug 12 06:28:36 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6269ae6e-d7ff-468c-9ead-e114deca0c52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18984 30864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_full.1898430864 |
| Directory | /workspace/0.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/0.usbdev_sec_cm.2198055733 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 226541727 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:28:43 PM PDT 24 |
| Finished | Aug 12 06:28:44 PM PDT 24 |
| Peak memory | 223456 kb |
| Host | smart-40bb3488-9de3-40b0-9eec-599ad4b485c7 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2198055733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.2198055733 |
| Directory | /workspace/0.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_priority_over_stall_response.4178467614 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 191615763 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:28:43 PM PDT 24 |
| Finished | Aug 12 06:28:44 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-99fd3ea1-c48e-4696-a6e6-119dec330a3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41784 67614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.4178467614 |
| Directory | /workspace/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_stage.3627656771 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 165765265 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:28:43 PM PDT 24 |
| Finished | Aug 12 06:28:44 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-f7149f94-8b0c-41c4-92dd-8a514b8e975d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36276 56771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_stage.3627656771 |
| Directory | /workspace/0.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_trans_ignored.105364859 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 160985660 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:28:42 PM PDT 24 |
| Finished | Aug 12 06:28:43 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ef353705-bdad-441e-8bb1-7e5e5e9c26dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10536 4859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_trans_ignored.105364859 |
| Directory | /workspace/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/0.usbdev_smoke.3052119535 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 222762912 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:28:44 PM PDT 24 |
| Finished | Aug 12 06:28:45 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f1d899a1-1b67-48bd-bd36-425504d045d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30521 19535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.3052119535 |
| Directory | /workspace/0.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/0.usbdev_spurious_pids_ignored.1183928578 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 2359786115 ps |
| CPU time | 19.29 seconds |
| Started | Aug 12 06:28:42 PM PDT 24 |
| Finished | Aug 12 06:29:01 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-1a2dc5d1-089f-406d-a888-b4663d062db2 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1183928578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.1183928578 |
| Directory | /workspace/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/0.usbdev_stall_priority_over_nak.1712537354 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 202654421 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:28:43 PM PDT 24 |
| Finished | Aug 12 06:28:44 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-34a809cf-5edb-4c3c-8f00-12df25d12b9d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17125 37354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.1712537354 |
| Directory | /workspace/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/0.usbdev_stall_trans.2967905548 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 234596427 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:28:44 PM PDT 24 |
| Finished | Aug 12 06:28:45 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-58378739-8639-4b42-b244-5824aad1ef65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29679 05548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_trans.2967905548 |
| Directory | /workspace/0.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_stream_len_max.3597145039 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 773171747 ps |
| CPU time | 2.11 seconds |
| Started | Aug 12 06:28:44 PM PDT 24 |
| Finished | Aug 12 06:28:46 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-1575793c-75ee-4d21-80f4-8dd0dcc4495d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35971 45039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.3597145039 |
| Directory | /workspace/0.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_streaming_out.3043980818 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 2572630104 ps |
| CPU time | 26.81 seconds |
| Started | Aug 12 06:28:46 PM PDT 24 |
| Finished | Aug 12 06:29:13 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-895aad8a-acea-45c7-bb53-6f0c262d32b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30439 80818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_streaming_out.3043980818 |
| Directory | /workspace/0.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/0.usbdev_timeout_missing_host_handshake.3433046827 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 664891637 ps |
| CPU time | 5.19 seconds |
| Started | Aug 12 06:28:19 PM PDT 24 |
| Finished | Aug 12 06:28:25 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-ac8fe95f-68cc-4ed3-b632-7c93175b1917 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3433046827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host _handshake.3433046827 |
| Directory | /workspace/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/0.usbdev_tx_rx_disruption.439543583 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 644059836 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:28:44 PM PDT 24 |
| Finished | Aug 12 06:28:46 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-83e7412a-dbaa-4fc6-8683-b73fa6d49508 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=439543583 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 0.usbdev_tx_rx_disruption.439543583 |
| Directory | /workspace/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/1.usbdev_alert_test.3076376759 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 32131909 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:12 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-332a1a31-5799-45b5-9615-d4bac446b3c3 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3076376759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.3076376759 |
| Directory | /workspace/1.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_reset.1829404639 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 13704701413 ps |
| CPU time | 18.9 seconds |
| Started | Aug 12 06:28:42 PM PDT 24 |
| Finished | Aug 12 06:29:01 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-273fa3b4-fff4-4704-b6a6-793174205f37 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1829404639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.1829404639 |
| Directory | /workspace/1.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_resume.2313840588 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 28527284914 ps |
| CPU time | 42.14 seconds |
| Started | Aug 12 06:28:44 PM PDT 24 |
| Finished | Aug 12 06:29:27 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-49f495a1-1217-4813-b8c2-f3f551e3d2b6 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2313840588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_ao n_wake_resume.2313840588 |
| Directory | /workspace/1.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_buffer.1437145562 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 160265064 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:28:43 PM PDT 24 |
| Finished | Aug 12 06:28:44 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ddc8bf65-7d4a-4e07-a219-f9e0f270de36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14371 45562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_buffer.1437145562 |
| Directory | /workspace/1.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_empty.2977939935 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 176476876 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:28:42 PM PDT 24 |
| Finished | Aug 12 06:28:43 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-06f8d73b-e835-4e0c-a62a-5808ed2ad46b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29779 39935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_empty.2977939935 |
| Directory | /workspace/1.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/1.usbdev_bitstuff_err.1601057080 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 149144350 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:28:42 PM PDT 24 |
| Finished | Aug 12 06:28:43 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-b83b6cec-6827-4a11-9e25-12b4add5ae72 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16010 57080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_bitstuff_err.1601057080 |
| Directory | /workspace/1.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_data_toggle_clear.2482258767 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 249255850 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:28:47 PM PDT 24 |
| Finished | Aug 12 06:28:48 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e414b24c-55de-4664-a130-47293a3d7493 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24822 58767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_clear.2482258767 |
| Directory | /workspace/1.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/1.usbdev_device_address.1200049081 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 40872264899 ps |
| CPU time | 61.5 seconds |
| Started | Aug 12 06:28:50 PM PDT 24 |
| Finished | Aug 12 06:29:52 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-10ffddf9-a5e2-4970-94fa-c9c4e9b4fee6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12000 49081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.1200049081 |
| Directory | /workspace/1.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/1.usbdev_device_timeout.1996282619 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 2481211446 ps |
| CPU time | 22.09 seconds |
| Started | Aug 12 06:28:50 PM PDT 24 |
| Finished | Aug 12 06:29:12 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-b0a1e5f1-d4b4-4738-9596-dd6ef7ed06bd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1996282619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.1996282619 |
| Directory | /workspace/1.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/1.usbdev_disable_endpoint.843623519 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 708229128 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:28:51 PM PDT 24 |
| Finished | Aug 12 06:28:53 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-39885f34-c3dc-40b0-9e67-3a3483625b78 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84362 3519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disable_endpoint.843623519 |
| Directory | /workspace/1.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/1.usbdev_disconnected.3645716804 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 145374010 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:28:49 PM PDT 24 |
| Finished | Aug 12 06:28:50 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8ebff745-f9cc-4906-bd37-9442e97691b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36457 16804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disconnected.3645716804 |
| Directory | /workspace/1.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/1.usbdev_enable.2424214540 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 40848732 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:28:49 PM PDT 24 |
| Finished | Aug 12 06:28:50 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9bc9dc45-e0df-42bf-b169-9e219dc7f0d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24242 14540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_enable.2424214540 |
| Directory | /workspace/1.usbdev_enable/latest |
| Test location | /workspace/coverage/default/1.usbdev_endpoint_access.2621723012 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 889655708 ps |
| CPU time | 2.39 seconds |
| Started | Aug 12 06:28:48 PM PDT 24 |
| Finished | Aug 12 06:28:51 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-92fb9401-9886-4764-bc77-5e9d05b6d8eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26217 23012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.2621723012 |
| Directory | /workspace/1.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/1.usbdev_endpoint_types.1063498623 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 245113381 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:28:50 PM PDT 24 |
| Finished | Aug 12 06:28:51 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-df2735f8-837a-45d7-9dcd-e85322c90843 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1063498623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.1063498623 |
| Directory | /workspace/1.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_hiclk.2814868111 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 86176919676 ps |
| CPU time | 144.73 seconds |
| Started | Aug 12 06:28:48 PM PDT 24 |
| Finished | Aug 12 06:31:13 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-e725c1b4-e2d1-4e1b-8df3-28187ebc12d5 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2814868111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.2814868111 |
| Directory | /workspace/1.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_hiclk_max.3730324574 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 109235426754 ps |
| CPU time | 172.48 seconds |
| Started | Aug 12 06:28:49 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-69ba101f-5851-4538-9968-b1536f33233b |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3730324574 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk_max.3730324574 |
| Directory | /workspace/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_loclk.3991805831 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 96104901751 ps |
| CPU time | 141.38 seconds |
| Started | Aug 12 06:28:51 PM PDT 24 |
| Finished | Aug 12 06:31:12 PM PDT 24 |
| Peak memory | 207864 kb |
| Host | smart-6a4156e3-99ad-4822-8112-9c9a824f62ef |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3991805831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.3991805831 |
| Directory | /workspace/1.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_loclk_max.4052111477 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 81234688108 ps |
| CPU time | 134.73 seconds |
| Started | Aug 12 06:28:51 PM PDT 24 |
| Finished | Aug 12 06:31:06 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-117b2cfe-ff74-48fb-b31b-ad229a8ff0b2 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4052111477 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk_max.4052111477 |
| Directory | /workspace/1.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_phase.334483157 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 103149771845 ps |
| CPU time | 168.81 seconds |
| Started | Aug 12 06:28:48 PM PDT 24 |
| Finished | Aug 12 06:31:37 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-8a31cd71-cebc-48ad-b127-d8e5da24d8f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33448 3157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_phase.334483157 |
| Directory | /workspace/1.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_iso.298552987 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 181443300 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:28:48 PM PDT 24 |
| Finished | Aug 12 06:28:49 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-e788789f-fd86-40a9-bcd1-783d481254c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=298552987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.298552987 |
| Directory | /workspace/1.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_stall.4119604919 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 140525996 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:28:51 PM PDT 24 |
| Finished | Aug 12 06:28:52 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-553e807c-1c38-4163-98a8-4a68641bdfbb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41196 04919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_stall.4119604919 |
| Directory | /workspace/1.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_trans.830443732 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 206135650 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:28:50 PM PDT 24 |
| Finished | Aug 12 06:28:51 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-5655aee7-b7f4-4d30-853e-a0fb0cb12791 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83044 3732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_trans.830443732 |
| Directory | /workspace/1.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_invalid_sync.2817959396 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 5485747714 ps |
| CPU time | 158.94 seconds |
| Started | Aug 12 06:28:50 PM PDT 24 |
| Finished | Aug 12 06:31:30 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-09beb63e-4da6-480d-9ea1-6bff0d9e37b7 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2817959396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.2817959396 |
| Directory | /workspace/1.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/1.usbdev_iso_retraction.2336981387 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 12459737232 ps |
| CPU time | 88.93 seconds |
| Started | Aug 12 06:28:48 PM PDT 24 |
| Finished | Aug 12 06:30:17 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-52ae4963-aee8-4700-8b6c-e12bfc5f6ff6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2336981387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.2336981387 |
| Directory | /workspace/1.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_in_err.3790625601 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 206195180 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:28:57 PM PDT 24 |
| Finished | Aug 12 06:28:58 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d4981f7e-93b8-461d-91b0-3e0cc5a94be7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37906 25601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_in_err.3790625601 |
| Directory | /workspace/1.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_resume.3863364510 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 31776517017 ps |
| CPU time | 45.54 seconds |
| Started | Aug 12 06:29:04 PM PDT 24 |
| Finished | Aug 12 06:29:49 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-26278900-abad-4cd4-ac1a-8e9f1ad5838f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38633 64510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_resume.3863364510 |
| Directory | /workspace/1.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_suspend.1670196253 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 10761290072 ps |
| CPU time | 15.95 seconds |
| Started | Aug 12 06:28:55 PM PDT 24 |
| Finished | Aug 12 06:29:11 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-a5c239c3-393a-4b46-b68b-caac5fa4fe3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16701 96253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_suspend.1670196253 |
| Directory | /workspace/1.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_inter_pkt_delay.1834236023 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 3083982475 ps |
| CPU time | 32.24 seconds |
| Started | Aug 12 06:28:56 PM PDT 24 |
| Finished | Aug 12 06:29:28 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-390798a7-bf8d-418d-b1d6-9712ca1a04bd |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1834236023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1834236023 |
| Directory | /workspace/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_length_in_transaction.998843968 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 291906352 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:28:56 PM PDT 24 |
| Finished | Aug 12 06:28:58 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-5c2b9293-a1f4-4d4b-9454-09a183d14d94 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=998843968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.998843968 |
| Directory | /workspace/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_length_out_transaction.453813990 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 196685487 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:29:00 PM PDT 24 |
| Finished | Aug 12 06:29:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-29606471-6190-4d16-9c88-451023e9a913 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45381 3990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.453813990 |
| Directory | /workspace/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_non_iso_usb_traffic.1618142993 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 2376911159 ps |
| CPU time | 17.55 seconds |
| Started | Aug 12 06:28:56 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 224048 kb |
| Host | smart-1346d83a-0044-4c88-988c-3be489512432 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16181 42993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.1618142993 |
| Directory | /workspace/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_usb_traffic.317188550 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 2837850241 ps |
| CPU time | 83.4 seconds |
| Started | Aug 12 06:28:56 PM PDT 24 |
| Finished | Aug 12 06:30:20 PM PDT 24 |
| Peak memory | 218004 kb |
| Host | smart-5e87c610-a332-44d0-9794-9bdc87e89a52 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=317188550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.317188550 |
| Directory | /workspace/1.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_inter_pkt_delay.1655961194 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 2459345176 ps |
| CPU time | 69.33 seconds |
| Started | Aug 12 06:29:04 PM PDT 24 |
| Finished | Aug 12 06:30:14 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-2a6afe1a-6449-4cf6-8e1a-839c545ad7ff |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1655961194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.1655961194 |
| Directory | /workspace/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_length_in_transaction.424939876 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 164839884 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:28:57 PM PDT 24 |
| Finished | Aug 12 06:28:58 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d6b5f8d2-ffef-4111-879c-bfa8ca235da7 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=424939876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.424939876 |
| Directory | /workspace/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_length_out_transaction.1050661979 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 137585424 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:28:57 PM PDT 24 |
| Finished | Aug 12 06:28:58 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-c33ae848-dd68-4b5d-9b4c-35afeca3cc91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10506 61979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.1050661979 |
| Directory | /workspace/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_iso.188215779 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 202584596 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:28:56 PM PDT 24 |
| Finished | Aug 12 06:28:58 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-e0a4add0-65c3-494c-9740-fe9d2b87e9bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18821 5779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_iso.188215779 |
| Directory | /workspace/1.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_stall.3927003394 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 155691522 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:29:04 PM PDT 24 |
| Finished | Aug 12 06:29:05 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a20dd0af-2904-4662-9f03-eef146d01d33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39270 03394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_stall.3927003394 |
| Directory | /workspace/1.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_trans_nak.378372052 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 149251909 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:28:57 PM PDT 24 |
| Finished | Aug 12 06:28:58 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-2dbce21e-d4aa-4f74-8504-72e8195fdb35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37837 2052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_trans_nak.378372052 |
| Directory | /workspace/1.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/1.usbdev_pending_in_trans.3967911865 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 197883017 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:28:58 PM PDT 24 |
| Finished | Aug 12 06:28:59 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-94db9494-b9cc-4569-8fd1-9d83be628281 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39679 11865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pending_in_trans.3967911865 |
| Directory | /workspace/1.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_pinflip.908878400 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 197677891 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:28:56 PM PDT 24 |
| Finished | Aug 12 06:28:57 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-dfea934c-96e5-423d-97fe-33f39e7c0d51 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=908878400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.908878400 |
| Directory | /workspace/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_rand_bus_type.3939148755 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 244140274 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:28:56 PM PDT 24 |
| Finished | Aug 12 06:28:57 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-e2ccbb7f-d741-4b82-af81-a36f07f6faba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39391 48755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.3939148755 |
| Directory | /workspace/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_usb_ref_disable.2113402470 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 142644312 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:29:00 PM PDT 24 |
| Finished | Aug 12 06:29:01 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d2925a47-e429-4219-84c8-dad9cc7c0e4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21134 02470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.2113402470 |
| Directory | /workspace/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_pins_sense.1696435368 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 36888146 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:28:59 PM PDT 24 |
| Finished | Aug 12 06:28:59 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-e338e005-9b9e-4643-b941-df663517168a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16964 35368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.1696435368 |
| Directory | /workspace/1.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_received.4038835261 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 183838358 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:29:04 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-05eb2bf3-46da-48b5-b3ac-1ceacfd828fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40388 35261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_received.4038835261 |
| Directory | /workspace/1.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_sent.3910286308 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 213545499 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:29:04 PM PDT 24 |
| Finished | Aug 12 06:29:06 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-885958b4-0c9f-4980-98d7-064c0be47c5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39102 86308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_sent.3910286308 |
| Directory | /workspace/1.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_bus_disconnects.413453819 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 6494202647 ps |
| CPU time | 28.91 seconds |
| Started | Aug 12 06:29:07 PM PDT 24 |
| Finished | Aug 12 06:29:36 PM PDT 24 |
| Peak memory | 218484 kb |
| Host | smart-6c60099c-b678-4fb8-9038-850aa184491b |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=413453819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.413453819 |
| Directory | /workspace/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_bus_resets.1023517285 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 5837750817 ps |
| CPU time | 23.2 seconds |
| Started | Aug 12 06:29:05 PM PDT 24 |
| Finished | Aug 12 06:29:29 PM PDT 24 |
| Peak memory | 218832 kb |
| Host | smart-9d44a3cb-1d80-480b-b5ff-55eda32ddf91 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1023517285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.1023517285 |
| Directory | /workspace/1.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_suspends.3820324842 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 10800132339 ps |
| CPU time | 215.39 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:32:39 PM PDT 24 |
| Peak memory | 218644 kb |
| Host | smart-72efad08-c567-4289-9214-203334d14270 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3820324842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.3820324842 |
| Directory | /workspace/1.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/1.usbdev_random_length_in_transaction.3026880896 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 218169031 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:29:04 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d5893604-364d-4010-866f-96d0770d0222 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30268 80896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_in_transaction.3026880896 |
| Directory | /workspace/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_random_length_out_transaction.1515771075 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 183864227 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:29:02 PM PDT 24 |
| Finished | Aug 12 06:29:03 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-8cea0c2a-7a1e-4cee-9fbb-eafdf2ecf86a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15157 71075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.1515771075 |
| Directory | /workspace/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_resume_link_active.2236824824 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 20156010268 ps |
| CPU time | 22.51 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:29:26 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-5cdbf81d-c0e4-4b73-a368-83ff12ed4e68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22368 24824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_resume_link_active.2236824824 |
| Directory | /workspace/1.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_full.2219522395 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 246139824 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:29:07 PM PDT 24 |
| Finished | Aug 12 06:29:08 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-1f963a23-7b50-493e-82f5-0bb3148be23f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22195 22395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_full.2219522395 |
| Directory | /workspace/1.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_pid_err.2703730754 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 272885131 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:29:04 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e0ff762f-318c-4fc3-9fc6-43ebe5afc478 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27037 30754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_pid_err.2703730754 |
| Directory | /workspace/1.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_priority.997568901 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 393460982 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:29:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-33ae77b5-d8ef-4854-b002-7401091d62ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99756 8901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.997568901 |
| Directory | /workspace/1.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_priority_over_stall_response.3479906698 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 266892692 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:29:04 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-db39003d-57de-4460-9f00-5459fceb7c1b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34799 06698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.3479906698 |
| Directory | /workspace/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_stage.1692582569 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 170463152 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:29:05 PM PDT 24 |
| Finished | Aug 12 06:29:06 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8d3c4c99-3c90-452b-b5dc-97c4e49f18c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16925 82569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_stage.1692582569 |
| Directory | /workspace/1.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_trans_ignored.836008293 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 169883038 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:29:05 PM PDT 24 |
| Finished | Aug 12 06:29:06 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-bf93f60a-1182-47c3-95fd-ee9000a53a83 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83600 8293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_trans_ignored.836008293 |
| Directory | /workspace/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/1.usbdev_smoke.1155129058 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 185960861 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:29:04 PM PDT 24 |
| Finished | Aug 12 06:29:05 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-c306acf5-fad8-4c2b-9810-69e86e09f380 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11551 29058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.1155129058 |
| Directory | /workspace/1.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/1.usbdev_spurious_pids_ignored.1192062153 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 1998187522 ps |
| CPU time | 16.86 seconds |
| Started | Aug 12 06:29:02 PM PDT 24 |
| Finished | Aug 12 06:29:19 PM PDT 24 |
| Peak memory | 217564 kb |
| Host | smart-dbfc571c-40c3-4190-b44a-0236c2473510 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1192062153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.1192062153 |
| Directory | /workspace/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/1.usbdev_stall_trans.4020753370 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 213428208 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:29:02 PM PDT 24 |
| Finished | Aug 12 06:29:03 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3be29704-8f4a-4fa4-8cd7-ac2275f4c687 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40207 53370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_trans.4020753370 |
| Directory | /workspace/1.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_stream_len_max.728966229 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 760055765 ps |
| CPU time | 1.98 seconds |
| Started | Aug 12 06:29:05 PM PDT 24 |
| Finished | Aug 12 06:29:07 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-8af1b1e8-db0a-4a7c-903a-c43d3ddc0b76 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72896 6229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.728966229 |
| Directory | /workspace/1.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_streaming_out.224646957 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 2107664826 ps |
| CPU time | 58.18 seconds |
| Started | Aug 12 06:29:03 PM PDT 24 |
| Finished | Aug 12 06:30:01 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-ddf37c6d-2b4a-4f50-bbc2-5bb89d56cfbe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22464 6957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_streaming_out.224646957 |
| Directory | /workspace/1.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/1.usbdev_timeout_missing_host_handshake.3547050895 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 4347376137 ps |
| CPU time | 32.3 seconds |
| Started | Aug 12 06:28:51 PM PDT 24 |
| Finished | Aug 12 06:29:23 PM PDT 24 |
| Peak memory | 207848 kb |
| Host | smart-879293e3-1d1d-4530-91d0-e8bcea2fb321 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3547050895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host _handshake.3547050895 |
| Directory | /workspace/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/10.usbdev_alert_test.2389731900 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 52328394 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:31:24 PM PDT 24 |
| Finished | Aug 12 06:31:25 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-676095bb-8c1f-456a-85d4-b3193546fa97 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2389731900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.2389731900 |
| Directory | /workspace/10.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_disconnect.2300442972 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 5491128683 ps |
| CPU time | 8.4 seconds |
| Started | Aug 12 06:31:08 PM PDT 24 |
| Finished | Aug 12 06:31:17 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-462a828a-1f13-4448-88d1-e6de210ae50d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2300442972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_a on_wake_disconnect.2300442972 |
| Directory | /workspace/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_reset.1869000818 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 19320943444 ps |
| CPU time | 27.18 seconds |
| Started | Aug 12 06:31:15 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-0aeb7895-1778-4f42-99a0-0418df1a236e |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1869000818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.1869000818 |
| Directory | /workspace/10.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_resume.4127768641 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 25739609375 ps |
| CPU time | 29.66 seconds |
| Started | Aug 12 06:31:15 PM PDT 24 |
| Finished | Aug 12 06:31:44 PM PDT 24 |
| Peak memory | 216048 kb |
| Host | smart-a63247ba-b9ce-4317-88c5-8dc4760587ef |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4127768641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_a on_wake_resume.4127768641 |
| Directory | /workspace/10.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/10.usbdev_av_buffer.2244996037 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 189131716 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:31:20 PM PDT 24 |
| Finished | Aug 12 06:31:21 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-65e01e78-6136-4e53-a704-7bdc582eb4c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22449 96037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_av_buffer.2244996037 |
| Directory | /workspace/10.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/10.usbdev_bitstuff_err.4093782790 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 175796318 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:12 PM PDT 24 |
| Finished | Aug 12 06:31:13 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ab44e893-3ade-4a2b-93c0-e14622c0c4a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40937 82790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_bitstuff_err.4093782790 |
| Directory | /workspace/10.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_data_toggle_clear.2291202606 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 451869318 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:31:14 PM PDT 24 |
| Finished | Aug 12 06:31:15 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-32060a99-1776-48d2-a495-1d56c46e1ae6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22912 02606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_clear.2291202606 |
| Directory | /workspace/10.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/10.usbdev_data_toggle_restore.3793263687 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 550230497 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:31:15 PM PDT 24 |
| Finished | Aug 12 06:31:16 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-57664d71-d2a4-41dc-90db-e8c2c92effcb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3793263687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.3793263687 |
| Directory | /workspace/10.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/10.usbdev_device_address.3298617994 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 29957709914 ps |
| CPU time | 45.36 seconds |
| Started | Aug 12 06:31:16 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-fcb287c2-da90-412a-ab42-03b5902fafe7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32986 17994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.3298617994 |
| Directory | /workspace/10.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/10.usbdev_device_timeout.3240231027 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 696894353 ps |
| CPU time | 15.08 seconds |
| Started | Aug 12 06:31:13 PM PDT 24 |
| Finished | Aug 12 06:31:28 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-d7e7577d-dbd0-46c9-80a0-8faa05083466 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3240231027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.3240231027 |
| Directory | /workspace/10.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/10.usbdev_disable_endpoint.3418782567 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 780906653 ps |
| CPU time | 2.01 seconds |
| Started | Aug 12 06:31:17 PM PDT 24 |
| Finished | Aug 12 06:31:19 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a12bd036-7629-4f43-beb1-835410fbb1f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34187 82567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disable_endpoint.3418782567 |
| Directory | /workspace/10.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/10.usbdev_disconnected.2632327669 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 153151366 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:31:14 PM PDT 24 |
| Finished | Aug 12 06:31:15 PM PDT 24 |
| Peak memory | 207268 kb |
| Host | smart-6bcf0c76-6cf2-49e1-8925-a315c6b4494a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26323 27669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disconnected.2632327669 |
| Directory | /workspace/10.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/10.usbdev_enable.1140976814 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 46109871 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:31:14 PM PDT 24 |
| Finished | Aug 12 06:31:15 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8364ee47-2efe-4052-b479-fbcaa915b17f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11409 76814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_enable.1140976814 |
| Directory | /workspace/10.usbdev_enable/latest |
| Test location | /workspace/coverage/default/10.usbdev_endpoint_access.2044139442 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 893499286 ps |
| CPU time | 2.34 seconds |
| Started | Aug 12 06:31:20 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-30d1cda7-93f6-49c8-8d19-21092be34b95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20441 39442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.2044139442 |
| Directory | /workspace/10.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/10.usbdev_endpoint_types.3800216150 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 494775799 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:31:14 PM PDT 24 |
| Finished | Aug 12 06:31:16 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d14f53b1-c489-4fb5-b326-39e807a437eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3800216150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.3800216150 |
| Directory | /workspace/10.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/10.usbdev_fifo_rst.3697414662 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 171781693 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:31:13 PM PDT 24 |
| Finished | Aug 12 06:31:15 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-1c3fde09-c167-4d8e-87d0-f73e758cb39e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36974 14662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_fifo_rst.3697414662 |
| Directory | /workspace/10.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_iso.1966614485 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 261401519 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:31:13 PM PDT 24 |
| Finished | Aug 12 06:31:15 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-06162bd7-4865-48eb-a2c7-d1d473e721c3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1966614485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.1966614485 |
| Directory | /workspace/10.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_stall.3526044637 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 155373450 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d829220b-2268-4f6e-918f-bc0f8cccfcd1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35260 44637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_stall.3526044637 |
| Directory | /workspace/10.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_trans.1745017993 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 244484334 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:31:17 PM PDT 24 |
| Finished | Aug 12 06:31:18 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-64c680b4-c95b-4a36-b1e0-0f0a4d79385f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17450 17993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_trans.1745017993 |
| Directory | /workspace/10.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_invalid_sync.1623840867 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 4062150485 ps |
| CPU time | 32.51 seconds |
| Started | Aug 12 06:31:18 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 218112 kb |
| Host | smart-7eff20ad-dd94-45f2-a9a8-f134f6047bae |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1623840867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.1623840867 |
| Directory | /workspace/10.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/10.usbdev_iso_retraction.3913330907 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 9543795905 ps |
| CPU time | 121.81 seconds |
| Started | Aug 12 06:31:14 PM PDT 24 |
| Finished | Aug 12 06:33:16 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-1961574a-357a-4328-9dc4-1c00b9e619ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3913330907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.3913330907 |
| Directory | /workspace/10.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_in_err.3306408422 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 262317528 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:31:13 PM PDT 24 |
| Finished | Aug 12 06:31:15 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-2e72241f-d8f3-44d8-a9b4-765088396ea2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33064 08422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_in_err.3306408422 |
| Directory | /workspace/10.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_resume.3274366636 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 31917693712 ps |
| CPU time | 50.21 seconds |
| Started | Aug 12 06:31:16 PM PDT 24 |
| Finished | Aug 12 06:32:06 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-d102d3d4-16cf-47dd-bcbc-94f1f44b9dd7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32743 66636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_resume.3274366636 |
| Directory | /workspace/10.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_suspend.2491145326 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 11322613318 ps |
| CPU time | 14.9 seconds |
| Started | Aug 12 06:31:20 PM PDT 24 |
| Finished | Aug 12 06:31:35 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-35615779-b366-4457-a1a9-aa87ed44fada |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24911 45326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_suspend.2491145326 |
| Directory | /workspace/10.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/10.usbdev_low_speed_traffic.980464600 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 3246548610 ps |
| CPU time | 26.43 seconds |
| Started | Aug 12 06:31:14 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 218052 kb |
| Host | smart-f72cc0d2-c6bc-428c-bffa-53708b337b81 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=980464600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.980464600 |
| Directory | /workspace/10.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_inter_pkt_delay.4140450264 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 2521489648 ps |
| CPU time | 18.49 seconds |
| Started | Aug 12 06:31:15 PM PDT 24 |
| Finished | Aug 12 06:31:34 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-f7f137fe-d9f8-4821-91d1-f9428003bd86 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4140450264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.4140450264 |
| Directory | /workspace/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_length_in_transaction.463123161 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 287563324 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:31:14 PM PDT 24 |
| Finished | Aug 12 06:31:15 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-288521e0-7126-4be7-a1e2-123d13057743 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=463123161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.463123161 |
| Directory | /workspace/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_length_out_transaction.570064445 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 193499071 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:14 PM PDT 24 |
| Finished | Aug 12 06:31:15 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-3f464077-cd42-46a6-abb3-9c97ec7ac1ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57006 4445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.570064445 |
| Directory | /workspace/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_non_iso_usb_traffic.3617083657 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 1926238647 ps |
| CPU time | 14.64 seconds |
| Started | Aug 12 06:31:11 PM PDT 24 |
| Finished | Aug 12 06:31:26 PM PDT 24 |
| Peak memory | 217588 kb |
| Host | smart-838c67cb-29c0-40f8-88dd-98aef5dd9386 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36170 83657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.3617083657 |
| Directory | /workspace/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_usb_traffic.3477425007 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 2179825592 ps |
| CPU time | 22.86 seconds |
| Started | Aug 12 06:31:18 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 218504 kb |
| Host | smart-5042e60b-22f0-4f54-bac1-ff5b864e0332 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3477425007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.3477425007 |
| Directory | /workspace/10.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_inter_pkt_delay.1918428916 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 3908164103 ps |
| CPU time | 37.67 seconds |
| Started | Aug 12 06:31:16 PM PDT 24 |
| Finished | Aug 12 06:31:54 PM PDT 24 |
| Peak memory | 217444 kb |
| Host | smart-e1e379f7-5637-4bf2-92ed-9851708df70c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1918428916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.1918428916 |
| Directory | /workspace/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_length_in_transaction.2261589639 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 164548262 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:13 PM PDT 24 |
| Finished | Aug 12 06:31:14 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-607cd3cb-773f-4548-aeaf-52bcd37181ed |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2261589639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.2261589639 |
| Directory | /workspace/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_length_out_transaction.1953011131 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 151793724 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-022b5265-5ba4-4e56-acbb-223d0fb17170 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19530 11131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.1953011131 |
| Directory | /workspace/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_iso.555223407 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 205569423 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:23 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-79b0f339-56c8-4f54-a209-653f4f5c54db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55522 3407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_iso.555223407 |
| Directory | /workspace/10.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_stall.1401698377 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 188666467 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:25 PM PDT 24 |
| Finished | Aug 12 06:31:26 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4a8b278b-5b1d-492e-98ac-e43b79ee9959 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14016 98377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_stall.1401698377 |
| Directory | /workspace/10.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_trans_nak.3495218053 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 193430896 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:31:24 PM PDT 24 |
| Finished | Aug 12 06:31:25 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-0d32df3b-59cc-42d9-aa4f-85dab20743d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34952 18053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_trans_nak.3495218053 |
| Directory | /workspace/10.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/10.usbdev_pending_in_trans.3984673022 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 179429954 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c70e891b-31b2-40c5-abe8-c548da10b15d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39846 73022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pending_in_trans.3984673022 |
| Directory | /workspace/10.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_config_pinflip.3632485798 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 201920823 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-8e0c2b28-9696-450d-948f-0046388c31e0 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3632485798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.3632485798 |
| Directory | /workspace/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_config_usb_ref_disable.24270343 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 176103637 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:31:24 PM PDT 24 |
| Finished | Aug 12 06:31:25 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-d92d1b65-97d4-449c-82d2-854eeeb01458 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24270 343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.24270343 |
| Directory | /workspace/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_pins_sense.3186053846 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 75457673 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5cd6a6ce-9603-433a-85b0-132d39451b62 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31860 53846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.3186053846 |
| Directory | /workspace/10.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_buffer.1437084732 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 10080281758 ps |
| CPU time | 24.44 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:46 PM PDT 24 |
| Peak memory | 220824 kb |
| Host | smart-ad99417f-fdbc-4a67-b8a0-c7019bc75fa1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14370 84732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_buffer.1437084732 |
| Directory | /workspace/10.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_received.3888751157 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 185059211 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:31:21 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-23f541bf-6d38-4285-b645-6515c0c2211f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38887 51157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_received.3888751157 |
| Directory | /workspace/10.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_sent.2034238959 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 262193518 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:31:25 PM PDT 24 |
| Finished | Aug 12 06:31:26 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-33d459e5-5385-4ad5-aa46-7d0e808baae4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20342 38959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_sent.2034238959 |
| Directory | /workspace/10.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/10.usbdev_random_length_in_transaction.3975510785 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 169114471 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:23 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d344cce1-6555-4ebd-ac10-ed49f3026a66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39755 10785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_in_transaction.3975510785 |
| Directory | /workspace/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_random_length_out_transaction.1857001173 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 197032402 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:31:25 PM PDT 24 |
| Finished | Aug 12 06:31:26 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-ea8f13f2-1cb7-45ec-8caa-e58aeb3d6b05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18570 01173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.1857001173 |
| Directory | /workspace/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_resume_link_active.3362486758 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 20224860291 ps |
| CPU time | 28.12 seconds |
| Started | Aug 12 06:31:21 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-1d112c7f-dcca-4c76-89e5-a48503a2ee2d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33624 86758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_resume_link_active.3362486758 |
| Directory | /workspace/10.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/10.usbdev_rx_crc_err.966804525 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 140870527 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:31:21 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-7697e758-5b2d-4837-a4c5-e8b60149f4ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96680 4525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_rx_crc_err.966804525 |
| Directory | /workspace/10.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_rx_full.202183125 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 400325457 ps |
| CPU time | 1.33 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f87ced47-2492-4921-ad7f-b28ec50a2f42 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20218 3125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_rx_full.202183125 |
| Directory | /workspace/10.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/10.usbdev_setup_stage.2180683724 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 183438547 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:23 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-ac315b51-56fb-4a8b-af1e-809a81685cb4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21806 83724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_setup_stage.2180683724 |
| Directory | /workspace/10.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/10.usbdev_setup_trans_ignored.3220633029 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 215328732 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d4f36bb6-4e6b-457f-8e20-6c5ef115f7e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32206 33029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_setup_trans_ignored.3220633029 |
| Directory | /workspace/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/10.usbdev_smoke.613290345 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 243572326 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:31:21 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-a307506b-5e8f-4ecd-9c4e-46915f20923d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61329 0345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.613290345 |
| Directory | /workspace/10.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/10.usbdev_spurious_pids_ignored.4291662314 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 3026687933 ps |
| CPU time | 88.87 seconds |
| Started | Aug 12 06:31:20 PM PDT 24 |
| Finished | Aug 12 06:32:49 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-80b55566-c315-48f8-8a86-d17b511857bc |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4291662314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.4291662314 |
| Directory | /workspace/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/10.usbdev_stall_priority_over_nak.3859539787 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 157671297 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-5ec4b4c3-ef5c-4a63-8b34-05f1ef65b2bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38595 39787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.3859539787 |
| Directory | /workspace/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/10.usbdev_stall_trans.1790652870 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 169228166 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:23 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-458f0606-58f2-4e0b-8463-e26ffafbc281 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17906 52870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_trans.1790652870 |
| Directory | /workspace/10.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_stream_len_max.3611046577 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 689782373 ps |
| CPU time | 1.89 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-71627c07-7bae-4b8f-b240-82e16fa1c1d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36110 46577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.3611046577 |
| Directory | /workspace/10.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/10.usbdev_streaming_out.2253512674 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 3516962359 ps |
| CPU time | 26.35 seconds |
| Started | Aug 12 06:31:25 PM PDT 24 |
| Finished | Aug 12 06:31:52 PM PDT 24 |
| Peak memory | 217624 kb |
| Host | smart-00816dfa-a43a-4f28-89dc-232fe2562ff0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22535 12674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_streaming_out.2253512674 |
| Directory | /workspace/10.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/10.usbdev_timeout_missing_host_handshake.1913376143 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 2218546357 ps |
| CPU time | 14.29 seconds |
| Started | Aug 12 06:31:20 PM PDT 24 |
| Finished | Aug 12 06:31:34 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-3dc216e8-2089-49ce-954a-5a5714d9ee60 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1913376143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_hos t_handshake.1913376143 |
| Directory | /workspace/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/10.usbdev_tx_rx_disruption.2023432076 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 508340454 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-8c8276a9-033d-4239-b141-3180a0281865 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2023432076 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_tx_rx_disruption.2023432076 |
| Directory | /workspace/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/100.usbdev_endpoint_types.1515035282 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 493890779 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:37:25 PM PDT 24 |
| Finished | Aug 12 06:37:27 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-d7d705d3-2d8f-41df-912d-d16493855fe2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1515035282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.1515035282 |
| Directory | /workspace/100.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/100.usbdev_tx_rx_disruption.1178735005 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 428384220 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:10 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-9d202671-80d6-4dd9-898c-39f544cdfd3d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1178735005 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 100.usbdev_tx_rx_disruption.1178735005 |
| Directory | /workspace/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/101.usbdev_endpoint_types.1534040291 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 331601404 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:37:11 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-307b2c98-86a3-49ee-8183-dcbbac73e3ff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1534040291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1534040291 |
| Directory | /workspace/101.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/102.usbdev_tx_rx_disruption.526913468 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 590420906 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:36:49 PM PDT 24 |
| Finished | Aug 12 06:36:50 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-22ccfb56-dd1d-44c1-bfd8-10245506d170 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=526913468 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 102.usbdev_tx_rx_disruption.526913468 |
| Directory | /workspace/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/103.usbdev_endpoint_types.1269698036 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 769683122 ps |
| CPU time | 1.81 seconds |
| Started | Aug 12 06:37:27 PM PDT 24 |
| Finished | Aug 12 06:37:29 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d64b3ed6-fa16-4cca-9092-6eacb797c2c6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1269698036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.1269698036 |
| Directory | /workspace/103.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/103.usbdev_tx_rx_disruption.2830493314 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 621738040 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:37:30 PM PDT 24 |
| Finished | Aug 12 06:37:31 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b7b236ef-0d15-4f8a-a208-1856b410d506 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2830493314 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 103.usbdev_tx_rx_disruption.2830493314 |
| Directory | /workspace/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/104.usbdev_endpoint_types.2095558685 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 403366382 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a67b88a4-bab8-4ac4-85bd-5b813541aef4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2095558685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.2095558685 |
| Directory | /workspace/104.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/104.usbdev_tx_rx_disruption.3839121055 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 487458488 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-33e96f49-2a8c-48df-a501-046e7d332bed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3839121055 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 104.usbdev_tx_rx_disruption.3839121055 |
| Directory | /workspace/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/105.usbdev_endpoint_types.852511932 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 209697813 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:37:11 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-89630bd0-d3fd-44d5-9cab-27805714b3fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=852511932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.852511932 |
| Directory | /workspace/105.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/105.usbdev_tx_rx_disruption.2260577604 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 646590376 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:37:13 PM PDT 24 |
| Finished | Aug 12 06:37:20 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-380ba16c-fb9c-448e-a01e-63f9bf8b5416 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2260577604 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 105.usbdev_tx_rx_disruption.2260577604 |
| Directory | /workspace/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/106.usbdev_endpoint_types.196104551 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 871319684 ps |
| CPU time | 2.09 seconds |
| Started | Aug 12 06:37:12 PM PDT 24 |
| Finished | Aug 12 06:37:14 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f83c6516-e8a7-4b93-9b25-58fcabc72bdc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=196104551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.196104551 |
| Directory | /workspace/106.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/106.usbdev_tx_rx_disruption.133534516 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 515261968 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c58030f7-a7a0-4a16-be1b-37885396bcd0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=133534516 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 106.usbdev_tx_rx_disruption.133534516 |
| Directory | /workspace/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/107.usbdev_endpoint_types.2019476397 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 192022420 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-997625b8-13e6-4a43-9dc3-3d18f8213c03 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2019476397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.2019476397 |
| Directory | /workspace/107.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/107.usbdev_tx_rx_disruption.217707782 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 560026094 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f10365ca-e125-453a-a4e7-f194d9f72370 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=217707782 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 107.usbdev_tx_rx_disruption.217707782 |
| Directory | /workspace/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/108.usbdev_tx_rx_disruption.3677459644 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 514235118 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:05 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4a0b3adc-5712-483a-981b-74c58759fa73 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3677459644 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 108.usbdev_tx_rx_disruption.3677459644 |
| Directory | /workspace/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/109.usbdev_endpoint_types.3930946327 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 702760344 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-d8bdb191-2db4-4e88-b66c-857fce022a5f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3930946327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.3930946327 |
| Directory | /workspace/109.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/11.usbdev_alert_test.4206828263 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 130656549 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:31:32 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6cda0e60-0b9a-44c0-b70b-590ec6a5c34d |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4206828263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.4206828263 |
| Directory | /workspace/11.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_reset.1958179616 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 18586512488 ps |
| CPU time | 22.29 seconds |
| Started | Aug 12 06:31:21 PM PDT 24 |
| Finished | Aug 12 06:31:43 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-83bc724c-1773-40fe-b8b6-a19a0bbf75d8 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1958179616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.1958179616 |
| Directory | /workspace/11.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_resume.824044581 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 31210494114 ps |
| CPU time | 35.87 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:59 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-ce2b0d8f-6a6f-4595-bed6-220d3fbfca1a |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=824044581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_ao n_wake_resume.824044581 |
| Directory | /workspace/11.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/11.usbdev_av_buffer.2849596596 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 156079431 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:31:21 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-78d4e996-3b18-4e78-844a-447b5690556a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28495 96596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_av_buffer.2849596596 |
| Directory | /workspace/11.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/11.usbdev_bitstuff_err.261412448 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 162283778 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-f9fabfc9-42c1-4cfa-88a1-311e2faf074e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26141 2448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_bitstuff_err.261412448 |
| Directory | /workspace/11.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_data_toggle_clear.288859507 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 443411356 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-8d4c3390-d8cc-4a16-9aa6-e6a7d74307ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28885 9507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_clear.288859507 |
| Directory | /workspace/11.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/11.usbdev_data_toggle_restore.1064424259 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 1336408019 ps |
| CPU time | 3.29 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:26 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-4b55ba54-d58d-47b9-9b71-4f36334b451f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1064424259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.1064424259 |
| Directory | /workspace/11.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/11.usbdev_device_address.2384794332 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 51378174472 ps |
| CPU time | 86.37 seconds |
| Started | Aug 12 06:31:24 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-ba709212-9917-43af-833a-043187f69475 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23847 94332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.2384794332 |
| Directory | /workspace/11.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/11.usbdev_device_timeout.1989258393 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 913465084 ps |
| CPU time | 19.76 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:43 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-c68080c9-17e3-4153-bef0-7037ea81f18e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1989258393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.1989258393 |
| Directory | /workspace/11.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/11.usbdev_disable_endpoint.3902925425 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 701870146 ps |
| CPU time | 1.84 seconds |
| Started | Aug 12 06:31:24 PM PDT 24 |
| Finished | Aug 12 06:31:26 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-3b920992-72d4-4fa5-b75d-8ab8aa018c20 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39029 25425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_disable_endpoint.3902925425 |
| Directory | /workspace/11.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/11.usbdev_disconnected.872313661 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 167597777 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:23 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-21f9aa33-9a6a-45d5-acfd-ca1c9498655f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87231 3661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_disconnected.872313661 |
| Directory | /workspace/11.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/11.usbdev_enable.2571883999 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 81199874 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:31:21 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-bd2d0783-7c38-48a3-8e68-56a0d008171d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25718 83999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_enable.2571883999 |
| Directory | /workspace/11.usbdev_enable/latest |
| Test location | /workspace/coverage/default/11.usbdev_endpoint_access.943559104 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 979372954 ps |
| CPU time | 2.62 seconds |
| Started | Aug 12 06:31:24 PM PDT 24 |
| Finished | Aug 12 06:31:27 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-e1e5dc4f-96c7-48b4-a0c0-b0eb3f28a60a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94355 9104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.943559104 |
| Directory | /workspace/11.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/11.usbdev_endpoint_types.1113772954 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 785869910 ps |
| CPU time | 2.03 seconds |
| Started | Aug 12 06:31:30 PM PDT 24 |
| Finished | Aug 12 06:31:32 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-813d8976-d8cb-4531-b3ce-8c5ed6caa6b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1113772954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.1113772954 |
| Directory | /workspace/11.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/11.usbdev_fifo_rst.3663360842 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 183117914 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:25 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-f30fbc3a-3a76-4cb0-88f5-89099a532525 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36633 60842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_fifo_rst.3663360842 |
| Directory | /workspace/11.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_iso.538428416 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 201599231 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:25 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-1860882a-3199-4955-a324-908a685fb5f6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=538428416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.538428416 |
| Directory | /workspace/11.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_stall.612026243 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 153270552 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:31:25 PM PDT 24 |
| Finished | Aug 12 06:31:26 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-75197629-2563-449f-80df-ba76cb4045a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61202 6243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_stall.612026243 |
| Directory | /workspace/11.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_trans.2429432549 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 220207092 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-bd6bbb9a-eea4-4d0c-832f-13439077431c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24294 32549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_trans.2429432549 |
| Directory | /workspace/11.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_iso_retraction.3287690613 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 12097814084 ps |
| CPU time | 82.08 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:32:44 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-186a64c1-3966-499a-b283-1f1c720c1d50 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3287690613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.3287690613 |
| Directory | /workspace/11.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_in_err.2916987155 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 165804884 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:31:23 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-11a2bca7-5e43-4450-9739-c5cbf52cc317 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29169 87155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_in_err.2916987155 |
| Directory | /workspace/11.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_resume.3895785803 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 8750805068 ps |
| CPU time | 13.9 seconds |
| Started | Aug 12 06:31:24 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 216052 kb |
| Host | smart-71fb7f90-3170-4499-b120-90f78dc4e9cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38957 85803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_resume.3895785803 |
| Directory | /workspace/11.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_suspend.3798112266 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 9390817372 ps |
| CPU time | 13.16 seconds |
| Started | Aug 12 06:31:22 PM PDT 24 |
| Finished | Aug 12 06:31:35 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-937caa4c-e442-480a-b1ea-858145aaa535 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37981 12266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_suspend.3798112266 |
| Directory | /workspace/11.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/11.usbdev_low_speed_traffic.3500974454 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 3848271756 ps |
| CPU time | 40.15 seconds |
| Started | Aug 12 06:31:33 PM PDT 24 |
| Finished | Aug 12 06:32:13 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-671ca22d-dbc2-4ec2-b763-4ece3ff0d6fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3500974454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.3500974454 |
| Directory | /workspace/11.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_inter_pkt_delay.1288552461 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 3008616614 ps |
| CPU time | 23.31 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-5e69de3d-322b-4ba5-a471-b0a3d8cccfb3 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1288552461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.1288552461 |
| Directory | /workspace/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_length_in_transaction.1433835917 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 264096060 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:31:30 PM PDT 24 |
| Finished | Aug 12 06:31:31 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-e0b0b624-0720-4d74-a135-3a031eefb84b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1433835917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.1433835917 |
| Directory | /workspace/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_length_out_transaction.4148079999 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 188783170 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9fcbf295-f4a1-419c-8f82-7b0fdfabaabb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41480 79999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.4148079999 |
| Directory | /workspace/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_non_iso_usb_traffic.2430158036 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 2795806156 ps |
| CPU time | 28.57 seconds |
| Started | Aug 12 06:31:33 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 216856 kb |
| Host | smart-3de72674-cf68-4cf4-aac2-f4fecc899523 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24301 58036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.2430158036 |
| Directory | /workspace/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_usb_traffic.2388849931 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 3372865924 ps |
| CPU time | 39.86 seconds |
| Started | Aug 12 06:31:30 PM PDT 24 |
| Finished | Aug 12 06:32:10 PM PDT 24 |
| Peak memory | 218492 kb |
| Host | smart-10b267d2-afd4-4e81-95a4-6ac0a1b1691a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2388849931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.2388849931 |
| Directory | /workspace/11.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_inter_pkt_delay.2988423629 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 2364030692 ps |
| CPU time | 68.89 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 217380 kb |
| Host | smart-20bb0c1b-ed47-4c4d-8480-d42a18b7565b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2988423629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.2988423629 |
| Directory | /workspace/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_length_in_transaction.898688263 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 148796144 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-ec0fbe57-fa0c-4f61-9d6f-d68cf80b60ff |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=898688263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.898688263 |
| Directory | /workspace/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_length_out_transaction.2354200810 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 227111441 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:31:32 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-4b29a5a7-e7b0-4b92-a99a-821d01118e5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23542 00810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.2354200810 |
| Directory | /workspace/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_iso.881854686 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 184224239 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:31:30 PM PDT 24 |
| Finished | Aug 12 06:31:31 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-16ea1347-268b-47aa-9cbc-b08694132d87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88185 4686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_iso.881854686 |
| Directory | /workspace/11.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_stall.2185123917 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 181963003 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:31:34 PM PDT 24 |
| Finished | Aug 12 06:31:35 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-2c116217-7901-4989-9524-0bd547579c4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21851 23917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_stall.2185123917 |
| Directory | /workspace/11.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_trans_nak.4224010229 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 208774829 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-b868e19f-8d7e-4970-a228-a163375cb974 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42240 10229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_trans_nak.4224010229 |
| Directory | /workspace/11.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/11.usbdev_pending_in_trans.2112369061 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 150286317 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:31:32 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-160c83d7-8daf-44ec-a2d6-903711e3530d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21123 69061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pending_in_trans.2112369061 |
| Directory | /workspace/11.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_config_pinflip.3491083721 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 259125630 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:31:30 PM PDT 24 |
| Finished | Aug 12 06:31:31 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ea52370a-b7ac-47bd-b7ff-323ec0af154e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3491083721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.3491083721 |
| Directory | /workspace/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_config_usb_ref_disable.2905855424 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 142196430 ps |
| CPU time | 0.79 seconds |
| Started | Aug 12 06:31:28 PM PDT 24 |
| Finished | Aug 12 06:31:29 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-59ae3087-e062-47eb-bd77-2ee81e4c73d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29058 55424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.2905855424 |
| Directory | /workspace/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_pins_sense.3682959877 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 49759652 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:37 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-fa9f2d26-8b38-43cd-8750-16c9b4d5d033 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36829 59877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.3682959877 |
| Directory | /workspace/11.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_buffer.178994764 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 10149875236 ps |
| CPU time | 27.35 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:31:58 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-3702bb01-db2a-4542-b554-cca76d75b3b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17899 4764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_buffer.178994764 |
| Directory | /workspace/11.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_received.381432417 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 210928373 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:31:33 PM PDT 24 |
| Finished | Aug 12 06:31:34 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f8a0b679-8a4a-4c24-a665-50b01a9ae9e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38143 2417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_received.381432417 |
| Directory | /workspace/11.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_sent.2167422007 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 253796303 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d1fb55da-5acd-43af-a109-69e06e5848b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21674 22007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_sent.2167422007 |
| Directory | /workspace/11.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/11.usbdev_random_length_in_transaction.2302026658 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 176134684 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:31:30 PM PDT 24 |
| Finished | Aug 12 06:31:31 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e42768d6-2057-409b-9425-86fdb6f22185 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23020 26658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_in_transaction.2302026658 |
| Directory | /workspace/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_random_length_out_transaction.3197334227 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 192621741 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:31:30 PM PDT 24 |
| Finished | Aug 12 06:31:31 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-94c0c604-49af-478b-80d4-430e9785e9f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31973 34227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.3197334227 |
| Directory | /workspace/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_resume_link_active.642263361 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 20171148963 ps |
| CPU time | 28.25 seconds |
| Started | Aug 12 06:31:32 PM PDT 24 |
| Finished | Aug 12 06:32:00 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-e86bce3c-8242-4544-a0dc-e26269bcca8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64226 3361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_resume_link_active.642263361 |
| Directory | /workspace/11.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/11.usbdev_rx_crc_err.1109205848 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 174688593 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:31:32 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-eb23c408-cbba-4cdb-ae91-5578af363c21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11092 05848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_rx_crc_err.1109205848 |
| Directory | /workspace/11.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_rx_full.1538091309 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 299385112 ps |
| CPU time | 1.13 seconds |
| Started | Aug 12 06:31:32 PM PDT 24 |
| Finished | Aug 12 06:31:33 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-c7c417cf-74bb-44bb-b1bf-c56854c3b1b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15380 91309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_rx_full.1538091309 |
| Directory | /workspace/11.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/11.usbdev_setup_stage.3657171473 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 148795451 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:31:32 PM PDT 24 |
| Finished | Aug 12 06:31:33 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-58b490be-c8b0-4dc8-9c87-4cc7647941ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36571 71473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_setup_stage.3657171473 |
| Directory | /workspace/11.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/11.usbdev_setup_trans_ignored.1479363580 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 150316366 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:31:36 PM PDT 24 |
| Finished | Aug 12 06:31:37 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a86afbed-9cfa-4b7e-a340-3942910b2fac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14793 63580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_setup_trans_ignored.1479363580 |
| Directory | /workspace/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/11.usbdev_smoke.2180897350 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 192905571 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:31:32 PM PDT 24 |
| Finished | Aug 12 06:31:33 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5222966c-b44e-450e-bbda-9310ca5f6962 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21808 97350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.2180897350 |
| Directory | /workspace/11.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/11.usbdev_spurious_pids_ignored.1231938968 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 3904675860 ps |
| CPU time | 108.96 seconds |
| Started | Aug 12 06:31:36 PM PDT 24 |
| Finished | Aug 12 06:33:25 PM PDT 24 |
| Peak memory | 224084 kb |
| Host | smart-9581eae2-2c6e-4d58-8dd4-e08af3ac6dec |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1231938968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.1231938968 |
| Directory | /workspace/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/11.usbdev_stall_priority_over_nak.1830755261 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 150557812 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:31:29 PM PDT 24 |
| Finished | Aug 12 06:31:30 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f0dbe1f2-88de-4767-863e-15ad7faaf023 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18307 55261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.1830755261 |
| Directory | /workspace/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/11.usbdev_stall_trans.4284839961 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 158871526 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:31:35 PM PDT 24 |
| Finished | Aug 12 06:31:36 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-7b561dd6-6191-488b-b5da-8aad9c18d217 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42848 39961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_trans.4284839961 |
| Directory | /workspace/11.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_stream_len_max.1553885885 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 698207657 ps |
| CPU time | 2.1 seconds |
| Started | Aug 12 06:31:30 PM PDT 24 |
| Finished | Aug 12 06:31:33 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-53b90e80-aaec-436d-ab22-1ebbffa4cc66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15538 85885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.1553885885 |
| Directory | /workspace/11.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/11.usbdev_streaming_out.417235780 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 1787744045 ps |
| CPU time | 17.55 seconds |
| Started | Aug 12 06:31:36 PM PDT 24 |
| Finished | Aug 12 06:31:54 PM PDT 24 |
| Peak memory | 217596 kb |
| Host | smart-71fd06ec-2f71-4652-8a0b-6e8688fcc6c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41723 5780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_streaming_out.417235780 |
| Directory | /workspace/11.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/11.usbdev_timeout_missing_host_handshake.3536055046 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 4250157497 ps |
| CPU time | 41.24 seconds |
| Started | Aug 12 06:31:24 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-f0860fce-ed21-4459-ae3c-fe7643744ca9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3536055046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_hos t_handshake.3536055046 |
| Directory | /workspace/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/11.usbdev_tx_rx_disruption.2211975375 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 625638894 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:31:33 PM PDT 24 |
| Finished | Aug 12 06:31:35 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-922db5bc-bf7b-4771-ab04-9cb4a6519792 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2211975375 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_tx_rx_disruption.2211975375 |
| Directory | /workspace/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/110.usbdev_tx_rx_disruption.3873941305 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 524203519 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:17 PM PDT 24 |
| Finished | Aug 12 06:37:19 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ccdc0258-50eb-484c-a902-08c3d0ae5c5f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3873941305 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 110.usbdev_tx_rx_disruption.3873941305 |
| Directory | /workspace/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/111.usbdev_endpoint_types.3799258438 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 678644855 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:37:23 PM PDT 24 |
| Finished | Aug 12 06:37:25 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-c285f9eb-ff21-46b3-bf77-28496a1f8bb2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3799258438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.3799258438 |
| Directory | /workspace/111.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/111.usbdev_tx_rx_disruption.2742673359 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 497782580 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:32 PM PDT 24 |
| Finished | Aug 12 06:37:33 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f0327dc0-f50b-4e27-b6f3-48ca7206c4f4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2742673359 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 111.usbdev_tx_rx_disruption.2742673359 |
| Directory | /workspace/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/112.usbdev_tx_rx_disruption.3945258660 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 633516637 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 06:37:13 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-07310633-50f2-41b7-a35b-405fc714693c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3945258660 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 112.usbdev_tx_rx_disruption.3945258660 |
| Directory | /workspace/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/113.usbdev_tx_rx_disruption.3498839250 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 449760055 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:37:13 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-07c455bb-ccda-448e-9ad8-e273ff300adf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3498839250 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 113.usbdev_tx_rx_disruption.3498839250 |
| Directory | /workspace/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/114.usbdev_endpoint_types.2132192680 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 237889220 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:37:17 PM PDT 24 |
| Finished | Aug 12 06:37:19 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-32ba577e-2797-4b83-ae79-90c108776a7c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2132192680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.2132192680 |
| Directory | /workspace/114.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/114.usbdev_tx_rx_disruption.2321624958 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 488595371 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:07 PM PDT 24 |
| Finished | Aug 12 06:37:09 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-6bdcd985-5688-4613-969a-b064c7c069c7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2321624958 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 114.usbdev_tx_rx_disruption.2321624958 |
| Directory | /workspace/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/115.usbdev_endpoint_types.960370562 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 267076529 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:37:21 PM PDT 24 |
| Finished | Aug 12 06:37:22 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-9e9d3cbc-4f81-4865-98e9-a8243cf52b9e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=960370562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.960370562 |
| Directory | /workspace/115.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/115.usbdev_tx_rx_disruption.488786025 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 559197637 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-bfd7aa2f-9ca5-4e36-a752-c563149de90e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=488786025 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 115.usbdev_tx_rx_disruption.488786025 |
| Directory | /workspace/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/116.usbdev_tx_rx_disruption.826719238 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 593974818 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:05 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-94aa02ff-e33a-45de-acb2-d1c46cde7dec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=826719238 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 116.usbdev_tx_rx_disruption.826719238 |
| Directory | /workspace/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/117.usbdev_endpoint_types.3972223188 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 321566905 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:37:10 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-c488cffc-3180-4de6-b600-274ce414b205 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3972223188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.3972223188 |
| Directory | /workspace/117.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/117.usbdev_tx_rx_disruption.4243928209 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 494096228 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-320f4346-42bb-4c91-9772-a95314ae8e8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4243928209 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 117.usbdev_tx_rx_disruption.4243928209 |
| Directory | /workspace/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/118.usbdev_tx_rx_disruption.2280097081 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 610051265 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:37:17 PM PDT 24 |
| Finished | Aug 12 06:37:19 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-556b1ee2-6d0a-4238-9ec5-9ba99e7bd87e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2280097081 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 118.usbdev_tx_rx_disruption.2280097081 |
| Directory | /workspace/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/119.usbdev_endpoint_types.375901707 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 276807801 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:05 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-cae86109-04c6-4f3f-9c66-2441f11fa17f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=375901707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.375901707 |
| Directory | /workspace/119.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/119.usbdev_tx_rx_disruption.1570984213 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 466545916 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:37:11 PM PDT 24 |
| Finished | Aug 12 06:37:13 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-ceb0d27f-4a0a-4073-88b4-2679580e3144 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1570984213 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 119.usbdev_tx_rx_disruption.1570984213 |
| Directory | /workspace/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/12.usbdev_alert_test.3428498269 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 47730785 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:41 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-1cb17332-8955-49ef-84a7-fe10f5178821 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3428498269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.3428498269 |
| Directory | /workspace/12.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_disconnect.2651768732 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 11819492205 ps |
| CPU time | 14.4 seconds |
| Started | Aug 12 06:31:36 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-b602e2de-dc6c-4c29-a295-1fccc9fa5067 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2651768732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_a on_wake_disconnect.2651768732 |
| Directory | /workspace/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_reset.4072975565 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 19030755601 ps |
| CPU time | 21.57 seconds |
| Started | Aug 12 06:31:32 PM PDT 24 |
| Finished | Aug 12 06:31:54 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-b6df3faa-7741-49ae-a933-437b3475fd42 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4072975565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.4072975565 |
| Directory | /workspace/12.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_resume.2702707001 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 25342422152 ps |
| CPU time | 38.47 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:32:10 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-d439f1ca-9bbb-4ff1-bc00-7facd1439bf5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2702707001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_a on_wake_resume.2702707001 |
| Directory | /workspace/12.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/12.usbdev_av_buffer.103512041 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 178891804 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:31:32 PM PDT 24 |
| Finished | Aug 12 06:31:33 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-514bd2a6-9a90-4ac9-97df-ec964aa3c278 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10351 2041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_av_buffer.103512041 |
| Directory | /workspace/12.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/12.usbdev_bitstuff_err.3347145602 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 157650367 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:34 PM PDT 24 |
| Finished | Aug 12 06:31:35 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-bd83d122-caa1-4b86-957e-c55e326cdc75 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33471 45602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_bitstuff_err.3347145602 |
| Directory | /workspace/12.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_data_toggle_clear.1767440062 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 438707094 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:31:32 PM PDT 24 |
| Finished | Aug 12 06:31:34 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-54b5bd8e-8135-4cd5-9280-f2be09190d10 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17674 40062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_clear.1767440062 |
| Directory | /workspace/12.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/12.usbdev_data_toggle_restore.1237059310 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 430430419 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-1e21221c-b078-4293-a280-826dc0f2834b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1237059310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.1237059310 |
| Directory | /workspace/12.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/12.usbdev_device_address.1248594926 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 22396318308 ps |
| CPU time | 37.11 seconds |
| Started | Aug 12 06:31:32 PM PDT 24 |
| Finished | Aug 12 06:32:09 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-84d00494-d7c8-45f6-b660-b0ec632c5df0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12485 94926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.1248594926 |
| Directory | /workspace/12.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/12.usbdev_device_timeout.2981968204 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 422698733 ps |
| CPU time | 7.73 seconds |
| Started | Aug 12 06:31:33 PM PDT 24 |
| Finished | Aug 12 06:31:41 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-2b10746b-c83c-434f-ad70-cb96adf41a89 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2981968204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.2981968204 |
| Directory | /workspace/12.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/12.usbdev_disable_endpoint.2121078931 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 742722151 ps |
| CPU time | 2.11 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-217f01e9-36d6-4ea8-be06-33e13ad522bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21210 78931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disable_endpoint.2121078931 |
| Directory | /workspace/12.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/12.usbdev_disconnected.2531300704 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 149329403 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-3786a755-9610-4934-8083-3ba49077c44c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25313 00704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disconnected.2531300704 |
| Directory | /workspace/12.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/12.usbdev_enable.2660697724 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 32593624 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2c1539db-9422-4dab-ae4b-cc0b2fbe97c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26606 97724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_enable.2660697724 |
| Directory | /workspace/12.usbdev_enable/latest |
| Test location | /workspace/coverage/default/12.usbdev_endpoint_access.2801100933 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 1007472945 ps |
| CPU time | 2.56 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-02a6c918-3d13-42cc-b5b7-5112fe83d0c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28011 00933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.2801100933 |
| Directory | /workspace/12.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/12.usbdev_endpoint_types.3047055432 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 647227130 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ade25945-bafb-45ac-9cc2-62c2d2b8c291 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3047055432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.3047055432 |
| Directory | /workspace/12.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/12.usbdev_fifo_rst.3011737191 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 272972405 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-b7223680-af76-458b-9427-f2e9c037fe77 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30117 37191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_fifo_rst.3011737191 |
| Directory | /workspace/12.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_iso.3405822089 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 194166400 ps |
| CPU time | 1.15 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-e5a12816-0b74-4ad3-a690-3ec4087fff09 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3405822089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.3405822089 |
| Directory | /workspace/12.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_stall.1883133543 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 151687278 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-fb1e4cfb-d2bd-4df0-9120-db6590a36fa0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18831 33543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_stall.1883133543 |
| Directory | /workspace/12.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_trans.948934223 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 160030409 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-27e1d078-84b3-467e-ada4-52ffabe14c5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94893 4223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_trans.948934223 |
| Directory | /workspace/12.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_invalid_sync.2660119048 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 3027210484 ps |
| CPU time | 87.79 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-b6007c82-b039-45da-9ce5-8a7cafebcf7f |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2660119048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.2660119048 |
| Directory | /workspace/12.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/12.usbdev_iso_retraction.3161491038 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 12971279130 ps |
| CPU time | 157.85 seconds |
| Started | Aug 12 06:31:44 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-5a44ae8b-f651-4c81-a411-d2868c3660b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3161491038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.3161491038 |
| Directory | /workspace/12.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_in_err.3594324248 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 268675403 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-125bd68a-2b9e-4d5d-8090-a7176bc16390 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35943 24248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_in_err.3594324248 |
| Directory | /workspace/12.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_resume.1423042507 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 26269219629 ps |
| CPU time | 49.58 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:32:28 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-5f74226c-27bb-48c4-8623-23f763c1338e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14230 42507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_resume.1423042507 |
| Directory | /workspace/12.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_suspend.2071298601 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 10129036398 ps |
| CPU time | 13.33 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:51 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-f1ed1f8e-5bbf-499f-9675-8e20eb1c1157 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20712 98601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_suspend.2071298601 |
| Directory | /workspace/12.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/12.usbdev_low_speed_traffic.2932088290 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 2925747632 ps |
| CPU time | 23.59 seconds |
| Started | Aug 12 06:31:46 PM PDT 24 |
| Finished | Aug 12 06:32:09 PM PDT 24 |
| Peak memory | 219112 kb |
| Host | smart-af9e77c4-d622-41bf-b3c2-70ea22a72531 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2932088290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.2932088290 |
| Directory | /workspace/12.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_inter_pkt_delay.3309536102 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 2156368066 ps |
| CPU time | 18.63 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 223968 kb |
| Host | smart-39f44244-278a-4920-a7f2-01968d9351f7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3309536102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.3309536102 |
| Directory | /workspace/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_length_in_transaction.1342616991 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 279096186 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-670aae17-7587-4d43-be44-5d0f44305519 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1342616991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.1342616991 |
| Directory | /workspace/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_length_out_transaction.3720403269 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 196194246 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b6ac5f98-f399-412e-bb33-d6f4fda684ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37204 03269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.3720403269 |
| Directory | /workspace/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_non_iso_usb_traffic.4136147523 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 2387269257 ps |
| CPU time | 17.79 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:56 PM PDT 24 |
| Peak memory | 218072 kb |
| Host | smart-8993b98f-57c8-4a97-938d-b30a8b59a030 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41361 47523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.4136147523 |
| Directory | /workspace/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_usb_traffic.2115053277 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 2486829358 ps |
| CPU time | 74.48 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:32:54 PM PDT 24 |
| Peak memory | 218732 kb |
| Host | smart-4256e7dc-e98e-4da1-ab4d-50e9deebeab3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2115053277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.2115053277 |
| Directory | /workspace/12.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_inter_pkt_delay.905050164 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 3537985090 ps |
| CPU time | 36.18 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:32:17 PM PDT 24 |
| Peak memory | 217540 kb |
| Host | smart-74a0eeb9-de1a-4f47-80a2-76a4a5c62e98 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=905050164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.905050164 |
| Directory | /workspace/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_length_in_transaction.1709140393 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 159500164 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-42377578-416b-454a-887e-6e3aa48109f2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1709140393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.1709140393 |
| Directory | /workspace/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_length_out_transaction.1699220925 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 204588651 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-22396840-edde-41f1-a540-159b04567f34 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16992 20925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.1699220925 |
| Directory | /workspace/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_iso.2641282946 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 164285276 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:44 PM PDT 24 |
| Finished | Aug 12 06:31:45 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-76484a01-1099-4cc9-ac57-4b5f6ac40691 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26412 82946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_iso.2641282946 |
| Directory | /workspace/12.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_stall.2300295298 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 200310380 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-dc1d01d8-da47-4ba3-99f9-05e2b23979c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23002 95298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_stall.2300295298 |
| Directory | /workspace/12.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_trans_nak.696485747 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 136549668 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-1cd05377-ba1a-4c84-9587-aac0f37faf5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69648 5747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_trans_nak.696485747 |
| Directory | /workspace/12.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/12.usbdev_pending_in_trans.974418311 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 153162458 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d96bd6a2-bf63-4da3-a87e-883efe699929 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97441 8311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pending_in_trans.974418311 |
| Directory | /workspace/12.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_config_pinflip.2709662710 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 227345789 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e1a752f9-a1c1-4a82-87d4-3f5435fc508a |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2709662710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.2709662710 |
| Directory | /workspace/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_config_usb_ref_disable.1274934902 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 175712237 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:41 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5086ab92-1064-41f8-b43b-6d5c1c7b542a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12749 34902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.1274934902 |
| Directory | /workspace/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_pins_sense.4291986616 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 28864290 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:31:36 PM PDT 24 |
| Finished | Aug 12 06:31:37 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d664b8cb-5078-41cb-b1df-536b81ba7e95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42919 86616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.4291986616 |
| Directory | /workspace/12.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_buffer.2591838295 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 16296700831 ps |
| CPU time | 41.22 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-a6f51fad-6269-439f-b506-f2f9a7d630fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25918 38295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_buffer.2591838295 |
| Directory | /workspace/12.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_sent.2265048858 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 201126217 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:41 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-9ac907e5-2f04-495a-ba5b-92e3ef468140 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22650 48858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_sent.2265048858 |
| Directory | /workspace/12.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/12.usbdev_random_length_in_transaction.2410276896 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 206209034 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-9f24ab14-abaa-4122-a652-9201c16436ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24102 76896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_in_transaction.2410276896 |
| Directory | /workspace/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_random_length_out_transaction.4021289685 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 171971698 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-62bd14c1-560f-43f0-8bd1-dc38ec2bcddc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40212 89685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.4021289685 |
| Directory | /workspace/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_resume_link_active.4194171103 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 20157956351 ps |
| CPU time | 26.28 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:32:04 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-cd7a52d1-0454-49b0-94bb-74fe87d53fe9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41941 71103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_resume_link_active.4194171103 |
| Directory | /workspace/12.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/12.usbdev_rx_crc_err.3542869360 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 226444866 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-a5e9d20b-0de3-4b68-b222-d0a7dd84cc5e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35428 69360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_rx_crc_err.3542869360 |
| Directory | /workspace/12.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_rx_full.1075183859 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 328145157 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-520aff27-5b51-4dba-b426-4c9f51e331e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10751 83859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_rx_full.1075183859 |
| Directory | /workspace/12.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/12.usbdev_setup_stage.4155902322 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 151475735 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-524e1428-9c0b-4acd-bb62-05fa92f8e099 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41559 02322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_setup_stage.4155902322 |
| Directory | /workspace/12.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/12.usbdev_setup_trans_ignored.3846911724 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 164170848 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-fc779b8a-06bb-4878-bf3d-1bdec7fa9c45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38469 11724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_setup_trans_ignored.3846911724 |
| Directory | /workspace/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/12.usbdev_smoke.4089433091 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 231053356 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:42 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c611120f-f306-4b10-b362-4ccc95e7f32f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40894 33091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.4089433091 |
| Directory | /workspace/12.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/12.usbdev_spurious_pids_ignored.1296043687 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 1818083683 ps |
| CPU time | 19.29 seconds |
| Started | Aug 12 06:31:37 PM PDT 24 |
| Finished | Aug 12 06:31:57 PM PDT 24 |
| Peak memory | 216748 kb |
| Host | smart-230a09b0-cb71-48d6-990d-c99eb269e40a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1296043687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.1296043687 |
| Directory | /workspace/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/12.usbdev_stall_priority_over_nak.2556602414 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 194088328 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-71003328-e98e-4035-ae82-a2435dc71e25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25566 02414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.2556602414 |
| Directory | /workspace/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/12.usbdev_stall_trans.1373284111 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 200586078 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-f315eaa3-3465-4559-97fd-fb0daac159a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13732 84111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_trans.1373284111 |
| Directory | /workspace/12.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_stream_len_max.2427917432 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 190934317 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-bac163bc-398b-4792-b852-cf3f947bc88a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24279 17432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.2427917432 |
| Directory | /workspace/12.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/12.usbdev_streaming_out.531270821 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 3151568988 ps |
| CPU time | 27.23 seconds |
| Started | Aug 12 06:31:39 PM PDT 24 |
| Finished | Aug 12 06:32:06 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-7c5d883f-d887-46be-87a7-a79ffd27c061 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53127 0821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_streaming_out.531270821 |
| Directory | /workspace/12.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/12.usbdev_timeout_missing_host_handshake.3715262492 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 1538541721 ps |
| CPU time | 38.32 seconds |
| Started | Aug 12 06:31:31 PM PDT 24 |
| Finished | Aug 12 06:32:09 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-6f3703dc-86d8-46e9-9c44-89c359920e08 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3715262492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_hos t_handshake.3715262492 |
| Directory | /workspace/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/12.usbdev_tx_rx_disruption.3434185342 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 571350077 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:31:38 PM PDT 24 |
| Finished | Aug 12 06:31:40 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-9b1b2417-1320-4c54-8677-accf70d536c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3434185342 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_tx_rx_disruption.3434185342 |
| Directory | /workspace/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/120.usbdev_endpoint_types.922919837 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 640293724 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:37:21 PM PDT 24 |
| Finished | Aug 12 06:37:22 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-dc626edb-c7ad-4ccf-9a9c-52a102353316 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=922919837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.922919837 |
| Directory | /workspace/120.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/120.usbdev_tx_rx_disruption.3643565925 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 614445985 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-fcb38ffd-8144-40e6-ac48-87d9d498b26d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3643565925 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 120.usbdev_tx_rx_disruption.3643565925 |
| Directory | /workspace/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/121.usbdev_endpoint_types.4032754606 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 177605504 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d4db3dfc-b383-4621-bcf9-6c31a1949564 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4032754606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.4032754606 |
| Directory | /workspace/121.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/121.usbdev_tx_rx_disruption.957123808 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 556632824 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-5d5998ac-9f07-4c70-a370-ed58c25543e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=957123808 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 121.usbdev_tx_rx_disruption.957123808 |
| Directory | /workspace/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/122.usbdev_endpoint_types.3538205576 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 160019411 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-eefea681-b402-47f4-907f-d845e896acec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3538205576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.3538205576 |
| Directory | /workspace/122.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/122.usbdev_tx_rx_disruption.2337714357 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 557783751 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:37:19 PM PDT 24 |
| Finished | Aug 12 06:37:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-dbf6819e-51eb-4a65-b37b-4d4a3b3c695d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2337714357 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 122.usbdev_tx_rx_disruption.2337714357 |
| Directory | /workspace/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/123.usbdev_tx_rx_disruption.1220005716 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 628995008 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:37:43 PM PDT 24 |
| Finished | Aug 12 06:37:46 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-d55dc278-7716-46bd-8a5d-03e5593aaf11 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1220005716 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 123.usbdev_tx_rx_disruption.1220005716 |
| Directory | /workspace/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/124.usbdev_endpoint_types.1242203614 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 422882367 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:37:29 PM PDT 24 |
| Finished | Aug 12 06:37:30 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-0481a5b5-1adb-440a-8daa-41468729e799 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1242203614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.1242203614 |
| Directory | /workspace/124.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/124.usbdev_tx_rx_disruption.1124396621 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 525684469 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:34 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-08ea8ce6-9c75-436a-abb3-36a6bc0ed256 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1124396621 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 124.usbdev_tx_rx_disruption.1124396621 |
| Directory | /workspace/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/126.usbdev_endpoint_types.3701875666 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 153380482 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:37:20 PM PDT 24 |
| Finished | Aug 12 06:37:21 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-552800fe-fcfd-4ff1-af5b-1dd32985b000 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3701875666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.3701875666 |
| Directory | /workspace/126.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/126.usbdev_tx_rx_disruption.1237991202 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 533849699 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:37:21 PM PDT 24 |
| Finished | Aug 12 06:37:23 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-2861c312-d878-4e85-9f80-ad96e7bda8b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1237991202 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 126.usbdev_tx_rx_disruption.1237991202 |
| Directory | /workspace/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/127.usbdev_endpoint_types.2759442501 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 750449131 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 06:37:19 PM PDT 24 |
| Finished | Aug 12 06:37:21 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-619abffc-d41d-44cc-a34a-25f9f491500c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2759442501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.2759442501 |
| Directory | /workspace/127.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/127.usbdev_tx_rx_disruption.2943191324 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 488954362 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:37:28 PM PDT 24 |
| Finished | Aug 12 06:37:30 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-38f2de5f-0541-4b6f-8131-8bfda0e64058 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2943191324 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 127.usbdev_tx_rx_disruption.2943191324 |
| Directory | /workspace/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/128.usbdev_endpoint_types.542541885 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 205409097 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:37:26 PM PDT 24 |
| Finished | Aug 12 06:37:27 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-23d3d8b2-f684-41cc-ad7d-4c7e178b2e8f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=542541885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.542541885 |
| Directory | /workspace/128.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/128.usbdev_tx_rx_disruption.1864998027 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 588536932 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:37:26 PM PDT 24 |
| Finished | Aug 12 06:37:28 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d4572953-d114-486e-a907-d4632760566a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1864998027 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 128.usbdev_tx_rx_disruption.1864998027 |
| Directory | /workspace/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/129.usbdev_endpoint_types.14356374 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 326715315 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:37:31 PM PDT 24 |
| Finished | Aug 12 06:37:32 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-efc96ee3-5fd8-4089-91e3-4631bab7d60a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=14356374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.14356374 |
| Directory | /workspace/129.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/129.usbdev_tx_rx_disruption.723303682 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 529656695 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:18 PM PDT 24 |
| Finished | Aug 12 06:37:20 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-838be482-566e-41ae-bd4f-9d5c92ae1bab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=723303682 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 129.usbdev_tx_rx_disruption.723303682 |
| Directory | /workspace/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_disconnect.517256279 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 6384220035 ps |
| CPU time | 8.6 seconds |
| Started | Aug 12 06:31:40 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-1564db63-f8db-4208-a292-d2638008a157 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=517256279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_ao n_wake_disconnect.517256279 |
| Directory | /workspace/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_reset.4147580829 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 13861228501 ps |
| CPU time | 17.22 seconds |
| Started | Aug 12 06:31:41 PM PDT 24 |
| Finished | Aug 12 06:31:58 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-f0851e4d-a987-4425-881f-bec77d3aaf80 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4147580829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.4147580829 |
| Directory | /workspace/13.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_resume.1964626481 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 29264774934 ps |
| CPU time | 36.42 seconds |
| Started | Aug 12 06:31:42 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-d7082cf2-52d0-4779-9458-969f2bcc603e |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1964626481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_a on_wake_resume.1964626481 |
| Directory | /workspace/13.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/13.usbdev_av_buffer.1920690376 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 168277166 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:31:45 PM PDT 24 |
| Finished | Aug 12 06:31:46 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-d717e856-d226-49c9-b208-c842cd274dba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19206 90376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_av_buffer.1920690376 |
| Directory | /workspace/13.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/13.usbdev_bitstuff_err.3150628131 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 152604081 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:31:45 PM PDT 24 |
| Finished | Aug 12 06:31:46 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-beca0189-b75a-4b66-bdda-64db6e7d471b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31506 28131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_bitstuff_err.3150628131 |
| Directory | /workspace/13.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_data_toggle_clear.3234815250 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 222055643 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:31:48 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-07c16699-387a-4a80-ba15-6a4eb9385d33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32348 15250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_clear.3234815250 |
| Directory | /workspace/13.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/13.usbdev_data_toggle_restore.4070898572 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 279422084 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-dc4579a4-168c-492f-8218-62cc02a5a865 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4070898572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.4070898572 |
| Directory | /workspace/13.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/13.usbdev_device_address.3368570708 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 16660900652 ps |
| CPU time | 27.43 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:32:16 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-3a034fc5-ffa0-4b8c-8ff1-366bff3205bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33685 70708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.3368570708 |
| Directory | /workspace/13.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/13.usbdev_device_timeout.4137560587 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 1550173865 ps |
| CPU time | 14.07 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:32:03 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-28792f68-2c1b-444d-b906-bf1207b7582d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4137560587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.4137560587 |
| Directory | /workspace/13.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/13.usbdev_disable_endpoint.3291279345 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 397128141 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4fe2e6d4-d43b-46a6-90ff-af7846336102 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32912 79345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_disable_endpoint.3291279345 |
| Directory | /workspace/13.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/13.usbdev_disconnected.447063598 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 200541591 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:46 PM PDT 24 |
| Finished | Aug 12 06:31:47 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-cef5043c-1bdb-4394-82db-53034e876d5d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44706 3598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_disconnected.447063598 |
| Directory | /workspace/13.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/13.usbdev_enable.476599953 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 38584712 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f8ee9e9c-336c-422e-888a-ed25722b71c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47659 9953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_enable.476599953 |
| Directory | /workspace/13.usbdev_enable/latest |
| Test location | /workspace/coverage/default/13.usbdev_endpoint_access.2304997901 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 795006810 ps |
| CPU time | 2.29 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-23fa359e-29c4-4eae-bd00-74f78d452fcf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23049 97901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.2304997901 |
| Directory | /workspace/13.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/13.usbdev_endpoint_types.1324372954 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 240619111 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:31:51 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-bb8cf145-6c79-4e49-9183-309f47ac720e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1324372954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.1324372954 |
| Directory | /workspace/13.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/13.usbdev_fifo_rst.3933496156 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 218555003 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:31:50 PM PDT 24 |
| Finished | Aug 12 06:31:52 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-1fac0807-f2af-484e-8e00-5776f62920d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39334 96156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_fifo_rst.3933496156 |
| Directory | /workspace/13.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_iso.300827241 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 256370371 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:31:55 PM PDT 24 |
| Finished | Aug 12 06:31:56 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-5486494a-9ce6-403d-af18-8c87d8aee52a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=300827241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.300827241 |
| Directory | /workspace/13.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_stall.1227118943 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 142386857 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:50 PM PDT 24 |
| Finished | Aug 12 06:31:51 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e488a15b-532c-4e66-b835-ff1846be30a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12271 18943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_stall.1227118943 |
| Directory | /workspace/13.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_trans.96353988 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 160351311 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7a00bdd7-4636-4d3b-aef7-7cf9e29c80ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96353 988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_trans.96353988 |
| Directory | /workspace/13.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_invalid_sync.1369148258 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 4054388063 ps |
| CPU time | 118.5 seconds |
| Started | Aug 12 06:31:45 PM PDT 24 |
| Finished | Aug 12 06:33:43 PM PDT 24 |
| Peak memory | 218548 kb |
| Host | smart-c502ad37-85da-46fc-bda6-ecfffa989641 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1369148258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.1369148258 |
| Directory | /workspace/13.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/13.usbdev_iso_retraction.2342855664 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 4100593996 ps |
| CPU time | 49.94 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:32:38 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-3a9eb48c-7ad7-44af-98e3-c84bfd8d75b3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2342855664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.2342855664 |
| Directory | /workspace/13.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_in_err.630106663 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 188881297 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-530de93b-c804-4da7-97b6-cea6c5b85183 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63010 6663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_in_err.630106663 |
| Directory | /workspace/13.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_resume.2012901825 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 32275046774 ps |
| CPU time | 55.23 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-9f8125f7-e2aa-4d92-8d95-af8d6bfa5709 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20129 01825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_resume.2012901825 |
| Directory | /workspace/13.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_suspend.2766453915 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 8920668352 ps |
| CPU time | 13.01 seconds |
| Started | Aug 12 06:31:46 PM PDT 24 |
| Finished | Aug 12 06:32:00 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-36b19b41-4c56-438a-a799-817b9e36f4cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27664 53915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_suspend.2766453915 |
| Directory | /workspace/13.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/13.usbdev_low_speed_traffic.2754068893 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 2689324073 ps |
| CPU time | 28.02 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:32:16 PM PDT 24 |
| Peak memory | 219300 kb |
| Host | smart-636287d2-5f13-44f3-b3ab-2acd3a27e18d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2754068893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.2754068893 |
| Directory | /workspace/13.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_inter_pkt_delay.1234664146 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 2659363925 ps |
| CPU time | 76.11 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:33:04 PM PDT 24 |
| Peak memory | 217252 kb |
| Host | smart-f8771253-f4a7-48f1-bc42-f73f8a1d8758 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1234664146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.1234664146 |
| Directory | /workspace/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_length_in_transaction.3104233103 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 235440723 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:31:48 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-20cf8868-e54a-40a8-8dbf-610ae6a4e7f5 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3104233103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.3104233103 |
| Directory | /workspace/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_length_out_transaction.2830585760 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 214570314 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-1f018176-83af-46de-ac94-1825d22cfc3b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28305 85760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.2830585760 |
| Directory | /workspace/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_non_iso_usb_traffic.1635848160 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 1897632284 ps |
| CPU time | 53.55 seconds |
| Started | Aug 12 06:31:50 PM PDT 24 |
| Finished | Aug 12 06:32:44 PM PDT 24 |
| Peak memory | 224028 kb |
| Host | smart-16f5000d-1c73-4998-9e12-047105b520be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16358 48160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.1635848160 |
| Directory | /workspace/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_usb_traffic.1721934693 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 2275176442 ps |
| CPU time | 19.76 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:32:07 PM PDT 24 |
| Peak memory | 224084 kb |
| Host | smart-8b8cd1b7-a58e-40c6-8e6a-ded605e23ab9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1721934693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.1721934693 |
| Directory | /workspace/13.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_inter_pkt_delay.145489752 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 3195029388 ps |
| CPU time | 24.41 seconds |
| Started | Aug 12 06:31:46 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 217536 kb |
| Host | smart-0b5b4267-43a3-4559-954f-4f17a95fbb8a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=145489752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.145489752 |
| Directory | /workspace/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_length_in_transaction.2155233964 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 167022881 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:50 PM PDT 24 |
| Finished | Aug 12 06:31:51 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-082e859a-3728-40cc-b01f-62ac6fb5e5f3 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2155233964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.2155233964 |
| Directory | /workspace/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_length_out_transaction.187450157 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 149701247 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:31:48 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-70b8270c-cc68-472e-87e0-416805b6ece5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18745 0157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.187450157 |
| Directory | /workspace/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_nak_trans.1447015306 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 234209867 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d97c482e-4a7b-4ea5-9ed7-dee93f94e41e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14470 15306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_nak_trans.1447015306 |
| Directory | /workspace/13.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_iso.599694580 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 205325071 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-db215f5a-cbc5-4d45-8fef-8891990a266a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59969 4580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_iso.599694580 |
| Directory | /workspace/13.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_stall.123911636 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 176783685 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-19c8d520-5559-4397-995d-6de7fda0ec1f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12391 1636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_stall.123911636 |
| Directory | /workspace/13.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_trans_nak.2743965335 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 167367808 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-74776c17-a66e-4c1a-bb50-205a2f48409d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27439 65335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_trans_nak.2743965335 |
| Directory | /workspace/13.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/13.usbdev_pending_in_trans.3652209647 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 159245622 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-df9648f7-432c-4739-8fe2-101e03da7465 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36522 09647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pending_in_trans.3652209647 |
| Directory | /workspace/13.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_config_pinflip.961486959 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 273944404 ps |
| CPU time | 1.13 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-bd3e20c9-361d-4390-a321-67e555dbaa4c |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=961486959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.961486959 |
| Directory | /workspace/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_config_usb_ref_disable.1203998203 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 140836813 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:31:50 PM PDT 24 |
| Finished | Aug 12 06:31:52 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-59328a85-7f83-4e98-9935-7ccb22629d9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12039 98203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.1203998203 |
| Directory | /workspace/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_pins_sense.2575164072 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 41754540 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-a6b3af94-2c48-4490-b1b0-23e80abf7f85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25751 64072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.2575164072 |
| Directory | /workspace/13.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_buffer.338485000 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 18253391350 ps |
| CPU time | 44.97 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:32:33 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-ec8ed170-8999-4aa1-881c-e04fa810a92a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33848 5000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_buffer.338485000 |
| Directory | /workspace/13.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_received.923478258 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 242865154 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-4d8d38a9-fe2c-4a6a-9a7b-ffef1ad0e8c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92347 8258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_received.923478258 |
| Directory | /workspace/13.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_sent.3523713035 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 198562125 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:31:48 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-a139502c-093c-4888-bf68-78b6867db471 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35237 13035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_sent.3523713035 |
| Directory | /workspace/13.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/13.usbdev_random_length_in_transaction.2160706866 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 262053996 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8de1145f-6cc7-4b1d-b6fe-344e44185866 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21607 06866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_in_transaction.2160706866 |
| Directory | /workspace/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_random_length_out_transaction.1366809413 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 164302063 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-0f218be7-7798-46f8-8b62-682d7f9d6d6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13668 09413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.1366809413 |
| Directory | /workspace/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_resume_link_active.2419480447 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 20178749710 ps |
| CPU time | 24.79 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:32:13 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-c06f7dcc-daec-41be-a310-a8cbe7987227 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24194 80447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_resume_link_active.2419480447 |
| Directory | /workspace/13.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/13.usbdev_rx_crc_err.3834442147 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 180499440 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-772b8a90-36ea-4f20-afb8-725ae2d153f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38344 42147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_rx_crc_err.3834442147 |
| Directory | /workspace/13.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_rx_full.1496855055 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 397537531 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-20d1e0b2-3dd5-465a-b1ac-82e85c36cafa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14968 55055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_rx_full.1496855055 |
| Directory | /workspace/13.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/13.usbdev_setup_stage.1530946976 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 194393258 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-76a26a76-99cb-4919-ab39-a61160e9d9a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15309 46976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_setup_stage.1530946976 |
| Directory | /workspace/13.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/13.usbdev_setup_trans_ignored.2472410118 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 197107591 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:31:51 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-5d34ab3a-27e4-412e-81c5-b69c51941668 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24724 10118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_setup_trans_ignored.2472410118 |
| Directory | /workspace/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/13.usbdev_smoke.400846646 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 193149452 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:50 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-15d256be-a19f-4dc1-8c72-840b0a372bd6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40084 6646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.400846646 |
| Directory | /workspace/13.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/13.usbdev_spurious_pids_ignored.2493863382 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 2670940215 ps |
| CPU time | 19.63 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 224076 kb |
| Host | smart-999163cd-a999-4e0f-8ad3-cf2a665cd68c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2493863382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.2493863382 |
| Directory | /workspace/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/13.usbdev_stall_priority_over_nak.2132759404 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 181487541 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:31:50 PM PDT 24 |
| Finished | Aug 12 06:31:51 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-aee18e1a-9bd3-4cc8-8c43-60dce9f5136c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21327 59404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.2132759404 |
| Directory | /workspace/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/13.usbdev_stall_trans.490060670 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 178578736 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ec63c1fe-611a-48d2-876b-92dc5f1a96b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49006 0670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_trans.490060670 |
| Directory | /workspace/13.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_stream_len_max.1392687252 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 1276758666 ps |
| CPU time | 3.03 seconds |
| Started | Aug 12 06:31:48 PM PDT 24 |
| Finished | Aug 12 06:31:51 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-1e8251e6-225a-4da7-a1de-b7d9cd63729a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13926 87252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.1392687252 |
| Directory | /workspace/13.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/13.usbdev_streaming_out.1449539222 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 2986769253 ps |
| CPU time | 21.91 seconds |
| Started | Aug 12 06:31:49 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-abf4ec6b-edb2-490b-905d-bba2e192b974 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14495 39222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_streaming_out.1449539222 |
| Directory | /workspace/13.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/13.usbdev_timeout_missing_host_handshake.4123746816 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 1982195288 ps |
| CPU time | 17.81 seconds |
| Started | Aug 12 06:31:47 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-6064a23c-defa-4401-9c3c-0b8328577b01 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4123746816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_hos t_handshake.4123746816 |
| Directory | /workspace/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/13.usbdev_tx_rx_disruption.524378095 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 469293990 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:31:56 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-507328e6-33e6-4a1c-84fe-eb80769e4731 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=524378095 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_tx_rx_disruption.524378095 |
| Directory | /workspace/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/130.usbdev_endpoint_types.1192036453 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 311300198 ps |
| CPU time | 1.19 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-8844c687-17b5-4966-8a94-131c887da78d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1192036453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.1192036453 |
| Directory | /workspace/130.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/130.usbdev_tx_rx_disruption.1178183217 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 474682739 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:37:12 PM PDT 24 |
| Finished | Aug 12 06:37:13 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d57e7ad4-43b4-46ae-9392-46d09ff870e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1178183217 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 130.usbdev_tx_rx_disruption.1178183217 |
| Directory | /workspace/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/131.usbdev_endpoint_types.2013589481 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 257824530 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:37:19 PM PDT 24 |
| Finished | Aug 12 06:37:20 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-458b7f9c-f6dc-4412-85a0-271facc31f85 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2013589481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.2013589481 |
| Directory | /workspace/131.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/131.usbdev_tx_rx_disruption.2506646134 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 614280141 ps |
| CPU time | 1.87 seconds |
| Started | Aug 12 06:37:48 PM PDT 24 |
| Finished | Aug 12 06:37:50 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-7700c97e-233d-4447-a35f-04ea7f5fdd10 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2506646134 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 131.usbdev_tx_rx_disruption.2506646134 |
| Directory | /workspace/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/132.usbdev_endpoint_types.568652156 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 374270743 ps |
| CPU time | 1.3 seconds |
| Started | Aug 12 06:37:25 PM PDT 24 |
| Finished | Aug 12 06:37:27 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-993d66bd-1f97-4044-aaeb-f68f75e22510 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=568652156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.568652156 |
| Directory | /workspace/132.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/132.usbdev_tx_rx_disruption.996173596 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 566099441 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:18 PM PDT 24 |
| Finished | Aug 12 06:37:20 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-6a39ea75-7dff-4cce-8b1a-0a36a197cf12 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=996173596 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 132.usbdev_tx_rx_disruption.996173596 |
| Directory | /workspace/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/133.usbdev_endpoint_types.603208930 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 213050307 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:37:16 PM PDT 24 |
| Finished | Aug 12 06:37:17 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b011d60a-8cca-4ebb-b229-7cf9888752a4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=603208930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.603208930 |
| Directory | /workspace/133.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/133.usbdev_tx_rx_disruption.2538638703 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 498333511 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:10 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-4586a3b6-6e6b-43e0-9a5a-8b3adf3eb1db |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2538638703 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 133.usbdev_tx_rx_disruption.2538638703 |
| Directory | /workspace/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/134.usbdev_endpoint_types.2791266496 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 396872738 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:37:32 PM PDT 24 |
| Finished | Aug 12 06:37:33 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-9336a385-ee91-4fb3-bb8b-add2cc787916 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2791266496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.2791266496 |
| Directory | /workspace/134.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/134.usbdev_tx_rx_disruption.1891289346 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 614057695 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:16 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-57075425-bcbc-4fcb-ba28-395ee171bee0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1891289346 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 134.usbdev_tx_rx_disruption.1891289346 |
| Directory | /workspace/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/135.usbdev_endpoint_types.4106014073 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 357098237 ps |
| CPU time | 1.22 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-64f86e5a-13b0-4065-b83a-95311282cd45 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4106014073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.4106014073 |
| Directory | /workspace/135.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/135.usbdev_tx_rx_disruption.3601623539 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 502637416 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:37:41 PM PDT 24 |
| Finished | Aug 12 06:37:43 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-a6aaafde-9a78-472e-bfa1-1b02413fd033 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3601623539 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 135.usbdev_tx_rx_disruption.3601623539 |
| Directory | /workspace/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/136.usbdev_endpoint_types.4111272862 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 339582062 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:37:26 PM PDT 24 |
| Finished | Aug 12 06:37:27 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-463d38c7-475a-4fc4-9674-659f49ec37fb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4111272862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.4111272862 |
| Directory | /workspace/136.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/136.usbdev_tx_rx_disruption.1432817273 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 612174167 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:37:16 PM PDT 24 |
| Finished | Aug 12 06:37:18 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-9d895ffc-76da-4fe7-9a80-6cfa6a435ac2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1432817273 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 136.usbdev_tx_rx_disruption.1432817273 |
| Directory | /workspace/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/137.usbdev_endpoint_types.2376024345 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 371590977 ps |
| CPU time | 1.27 seconds |
| Started | Aug 12 06:37:12 PM PDT 24 |
| Finished | Aug 12 06:37:13 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-5e8f022a-99d7-4d45-adff-ed9c1a2a5c2e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2376024345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.2376024345 |
| Directory | /workspace/137.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/137.usbdev_tx_rx_disruption.4032337703 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 604198650 ps |
| CPU time | 1.91 seconds |
| Started | Aug 12 06:37:26 PM PDT 24 |
| Finished | Aug 12 06:37:28 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b060bba1-e564-4af0-8e29-6716214a92f0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4032337703 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 137.usbdev_tx_rx_disruption.4032337703 |
| Directory | /workspace/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/138.usbdev_endpoint_types.3600562353 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 298632972 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:37:19 PM PDT 24 |
| Finished | Aug 12 06:37:20 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-2c96ea68-3e96-47a0-badd-1c29d95ab8b8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3600562353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.3600562353 |
| Directory | /workspace/138.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/138.usbdev_tx_rx_disruption.397938449 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 604122193 ps |
| CPU time | 1.88 seconds |
| Started | Aug 12 06:37:17 PM PDT 24 |
| Finished | Aug 12 06:37:19 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-e56418e8-647a-4260-92c1-441ffb4a8218 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=397938449 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 138.usbdev_tx_rx_disruption.397938449 |
| Directory | /workspace/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/139.usbdev_endpoint_types.396742423 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 183792305 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:37:19 PM PDT 24 |
| Finished | Aug 12 06:37:20 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-019e55e0-ce5e-4a62-b1ba-4d4af62995b0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=396742423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.396742423 |
| Directory | /workspace/139.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/139.usbdev_tx_rx_disruption.2122162004 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 500365894 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:37:41 PM PDT 24 |
| Finished | Aug 12 06:37:43 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-dd86d493-d190-4129-a2fa-9ffc717cfb8b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2122162004 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 139.usbdev_tx_rx_disruption.2122162004 |
| Directory | /workspace/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/14.usbdev_alert_test.3850897941 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 52036746 ps |
| CPU time | 0.77 seconds |
| Started | Aug 12 06:32:02 PM PDT 24 |
| Finished | Aug 12 06:32:02 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c7fa38f2-2c7f-42dd-a60c-d1f37af15260 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3850897941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.3850897941 |
| Directory | /workspace/14.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_disconnect.2510936393 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 9352919751 ps |
| CPU time | 14.67 seconds |
| Started | Aug 12 06:31:55 PM PDT 24 |
| Finished | Aug 12 06:32:10 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-ff53bca5-0a16-4f7f-8db0-2e919e45924a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2510936393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_a on_wake_disconnect.2510936393 |
| Directory | /workspace/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_resume.116186282 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 24122819586 ps |
| CPU time | 33.08 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:33 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-5ba5a0e5-0165-4612-8164-ee6d7d9ff4c2 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=116186282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_ao n_wake_resume.116186282 |
| Directory | /workspace/14.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/14.usbdev_av_buffer.3780519047 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 216813829 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:31:55 PM PDT 24 |
| Finished | Aug 12 06:31:56 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-b7004473-b3eb-4cbd-acd5-ac4c8389c633 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37805 19047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_av_buffer.3780519047 |
| Directory | /workspace/14.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/14.usbdev_bitstuff_err.3802826732 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 164804757 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:57 PM PDT 24 |
| Finished | Aug 12 06:31:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-8da3675b-aa17-406f-815b-893e9dc5cbaf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38028 26732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_bitstuff_err.3802826732 |
| Directory | /workspace/14.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_data_toggle_clear.353727208 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 198133068 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-31087bbd-ff37-42f0-8706-b443919e0d3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35372 7208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_clear.353727208 |
| Directory | /workspace/14.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/14.usbdev_data_toggle_restore.1513818748 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 395297871 ps |
| CPU time | 1.29 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f61dadfa-790c-4779-bc07-ab4dfecc23c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1513818748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.1513818748 |
| Directory | /workspace/14.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/14.usbdev_device_address.3110323960 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 28425795649 ps |
| CPU time | 46.25 seconds |
| Started | Aug 12 06:31:53 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-6b992ed5-ed24-40b6-afa0-fac652d3087e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31103 23960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.3110323960 |
| Directory | /workspace/14.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/14.usbdev_device_timeout.1361172533 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 1534925648 ps |
| CPU time | 12.65 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:32:06 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-46db4e47-f203-44cb-88b3-d80304d1b12d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1361172533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.1361172533 |
| Directory | /workspace/14.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/14.usbdev_disable_endpoint.284091361 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 863574003 ps |
| CPU time | 2.05 seconds |
| Started | Aug 12 06:31:53 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a69d169a-793f-4c66-bc88-f16d80d6c2dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28409 1361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disable_endpoint.284091361 |
| Directory | /workspace/14.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/14.usbdev_disconnected.2288804587 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 162179638 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:00 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-511ccbc2-3843-4035-9d30-b90d5c367ab7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22888 04587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disconnected.2288804587 |
| Directory | /workspace/14.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/14.usbdev_enable.1993125709 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 45195743 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-1f68124e-bf5b-4d6c-9546-ce44ad8b63df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19931 25709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_enable.1993125709 |
| Directory | /workspace/14.usbdev_enable/latest |
| Test location | /workspace/coverage/default/14.usbdev_endpoint_access.828156337 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 975884632 ps |
| CPU time | 2.65 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:02 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-da29ab69-3d9a-4ac9-8d73-3026d3ab3548 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82815 6337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.828156337 |
| Directory | /workspace/14.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/14.usbdev_endpoint_types.2869129064 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 177322072 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:31:57 PM PDT 24 |
| Finished | Aug 12 06:31:58 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-7fc392bd-ae47-434b-ad1b-81c50704e9e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2869129064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.2869129064 |
| Directory | /workspace/14.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/14.usbdev_fifo_rst.573084503 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 159957718 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:32:06 PM PDT 24 |
| Finished | Aug 12 06:32:08 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-44324ca4-695b-4ee3-b231-cd1d3d907926 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57308 4503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_fifo_rst.573084503 |
| Directory | /workspace/14.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_iso.780157458 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 187054258 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:31:55 PM PDT 24 |
| Finished | Aug 12 06:31:56 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-f17daab0-aad8-4486-b9e2-2245f9f3d49a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=780157458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.780157458 |
| Directory | /workspace/14.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_stall.2534968069 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 139511355 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:58 PM PDT 24 |
| Finished | Aug 12 06:31:59 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-241a6e30-3f63-4f56-b778-aea164a16456 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25349 68069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_stall.2534968069 |
| Directory | /workspace/14.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_trans.138792863 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 166207568 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:55 PM PDT 24 |
| Finished | Aug 12 06:31:56 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-f80280b5-954e-4a92-a72a-2f8a71bcdfac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13879 2863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_trans.138792863 |
| Directory | /workspace/14.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_invalid_sync.1935229957 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 3761145970 ps |
| CPU time | 33.24 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:32:28 PM PDT 24 |
| Peak memory | 218336 kb |
| Host | smart-d724278b-c22a-444f-8900-20b5e04b266a |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1935229957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1935229957 |
| Directory | /workspace/14.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/14.usbdev_iso_retraction.3025048117 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 15499818468 ps |
| CPU time | 104.36 seconds |
| Started | Aug 12 06:31:53 PM PDT 24 |
| Finished | Aug 12 06:33:38 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-c254242c-fe22-4d97-8e01-3de0c7fb458c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3025048117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.3025048117 |
| Directory | /workspace/14.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_in_err.332514006 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 197274277 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d68dde9c-9ead-4c81-8ab2-9e6facaea71d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33251 4006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_in_err.332514006 |
| Directory | /workspace/14.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_resume.259172625 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 12495230752 ps |
| CPU time | 17.56 seconds |
| Started | Aug 12 06:31:55 PM PDT 24 |
| Finished | Aug 12 06:32:12 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-7c5ac3ed-d7d6-4022-8c17-72fd1d8068fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25917 2625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_resume.259172625 |
| Directory | /workspace/14.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_suspend.2222834 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 11119999401 ps |
| CPU time | 13.54 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:32:08 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-9a8ac194-b056-454b-a45f-f5d648aa5f9d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22228 34 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_suspend.2222834 |
| Directory | /workspace/14.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/14.usbdev_low_speed_traffic.181924523 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 3475267174 ps |
| CPU time | 27.78 seconds |
| Started | Aug 12 06:32:06 PM PDT 24 |
| Finished | Aug 12 06:32:34 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-379c3542-6c8a-4e83-a86e-8da9662c9262 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=181924523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.181924523 |
| Directory | /workspace/14.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_inter_pkt_delay.524185623 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 3820726708 ps |
| CPU time | 106.93 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:33:41 PM PDT 24 |
| Peak memory | 217636 kb |
| Host | smart-b045481e-6de2-47e1-9884-64b782c18ea1 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=524185623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.524185623 |
| Directory | /workspace/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_length_in_transaction.3600710527 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 270923702 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:31:55 PM PDT 24 |
| Finished | Aug 12 06:31:57 PM PDT 24 |
| Peak memory | 206424 kb |
| Host | smart-fe619144-3745-4afd-9596-4e24201b7a21 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3600710527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.3600710527 |
| Directory | /workspace/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_length_out_transaction.1950551977 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 300127278 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:31:56 PM PDT 24 |
| Finished | Aug 12 06:31:57 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-b15001c5-7175-4781-ae89-d4668910be52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19505 51977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.1950551977 |
| Directory | /workspace/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_non_iso_usb_traffic.234980769 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 3138016269 ps |
| CPU time | 92.8 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:33:26 PM PDT 24 |
| Peak memory | 217912 kb |
| Host | smart-aea41650-723e-476e-acab-8e380d12bdfc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23498 0769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.234980769 |
| Directory | /workspace/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_usb_traffic.2967269852 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 2820795927 ps |
| CPU time | 85.14 seconds |
| Started | Aug 12 06:31:58 PM PDT 24 |
| Finished | Aug 12 06:33:24 PM PDT 24 |
| Peak memory | 217784 kb |
| Host | smart-fe09db88-48fb-414c-8932-bf49ef89b81c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2967269852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.2967269852 |
| Directory | /workspace/14.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_inter_pkt_delay.3390925070 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 2155156973 ps |
| CPU time | 22.22 seconds |
| Started | Aug 12 06:31:58 PM PDT 24 |
| Finished | Aug 12 06:32:21 PM PDT 24 |
| Peak memory | 216788 kb |
| Host | smart-ae420f10-6818-40ff-8d1b-1991b4cb89f0 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3390925070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.3390925070 |
| Directory | /workspace/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_length_in_transaction.956905627 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 147566571 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:57 PM PDT 24 |
| Finished | Aug 12 06:31:58 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ebfa0428-46a7-4b23-b683-b15089e3099b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=956905627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.956905627 |
| Directory | /workspace/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_length_out_transaction.2402863415 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 149170553 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:31:55 PM PDT 24 |
| Finished | Aug 12 06:31:56 PM PDT 24 |
| Peak memory | 206424 kb |
| Host | smart-7f27d118-09ec-4716-9ee3-e316b9532fbd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24028 63415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.2402863415 |
| Directory | /workspace/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_nak_trans.1169130959 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 251527472 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-dd70c872-cf4c-43c0-8d29-12b050123a87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11691 30959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_nak_trans.1169130959 |
| Directory | /workspace/14.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_iso.659030281 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 188950298 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:32:06 PM PDT 24 |
| Finished | Aug 12 06:32:07 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-54859881-e372-4ddc-bca2-8b60d3591c1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65903 0281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_iso.659030281 |
| Directory | /workspace/14.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_stall.2642272834 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 185298455 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:31:53 PM PDT 24 |
| Finished | Aug 12 06:31:54 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-487bd6cf-9bf3-4271-8d3b-255479e76ac0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26422 72834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_stall.2642272834 |
| Directory | /workspace/14.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_trans_nak.2305713188 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 248714348 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:31:58 PM PDT 24 |
| Finished | Aug 12 06:31:59 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8abd4580-971f-435d-b562-1f262157b120 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23057 13188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_trans_nak.2305713188 |
| Directory | /workspace/14.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/14.usbdev_pending_in_trans.2238479022 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 166248206 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:31:58 PM PDT 24 |
| Finished | Aug 12 06:31:59 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a049838a-1c26-407a-be76-4a009b3f8570 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22384 79022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pending_in_trans.2238479022 |
| Directory | /workspace/14.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_config_pinflip.1975622475 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 296109653 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-1fddc3e8-7524-4757-9cbf-e852e12273f8 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1975622475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.1975622475 |
| Directory | /workspace/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_config_usb_ref_disable.3467980912 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 164250167 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:54 PM PDT 24 |
| Finished | Aug 12 06:31:55 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6e2136e8-fb1c-490b-9c30-addd69b18916 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34679 80912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.3467980912 |
| Directory | /workspace/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_pins_sense.3117130857 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 47471801 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:31:56 PM PDT 24 |
| Finished | Aug 12 06:31:57 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6beb9946-2c51-43bc-abac-094144688e47 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31171 30857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.3117130857 |
| Directory | /workspace/14.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_buffer.1085286123 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 6845883500 ps |
| CPU time | 16.8 seconds |
| Started | Aug 12 06:32:04 PM PDT 24 |
| Finished | Aug 12 06:32:21 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-8645b593-1d8d-49b3-bf03-6fc1e9986ce1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10852 86123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_buffer.1085286123 |
| Directory | /workspace/14.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_received.20551378 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 180481516 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:04 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-ece1d523-e076-41ac-8d07-211024e8a9d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20551 378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_received.20551378 |
| Directory | /workspace/14.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_sent.2330391897 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 183026793 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:32:01 PM PDT 24 |
| Finished | Aug 12 06:32:02 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-619ae369-8cd2-45b7-bceb-ace2ca0440c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23303 91897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_sent.2330391897 |
| Directory | /workspace/14.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/14.usbdev_random_length_in_transaction.1933369929 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 204357084 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:00 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-1854010b-ce0d-4162-ab09-abd74975c624 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19333 69929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_in_transaction.1933369929 |
| Directory | /workspace/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_random_length_out_transaction.47877261 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 174230256 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:32:02 PM PDT 24 |
| Finished | Aug 12 06:32:03 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c0a83a11-abb4-4ccb-a8df-9aa023ac0a8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47877 261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.47877261 |
| Directory | /workspace/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_resume_link_active.3054505620 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 20155887706 ps |
| CPU time | 24.2 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:34 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-e217015f-83de-4cc4-a355-390c5b112977 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30545 05620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_resume_link_active.3054505620 |
| Directory | /workspace/14.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/14.usbdev_rx_crc_err.466339955 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 171398627 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:32:01 PM PDT 24 |
| Finished | Aug 12 06:32:02 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-79ae9ff3-4bec-4f2a-b6d1-91b3d24dc509 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46633 9955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_rx_crc_err.466339955 |
| Directory | /workspace/14.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_rx_full.1731165291 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 376021447 ps |
| CPU time | 1.37 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:04 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-32bd2f1c-c37a-44c6-a101-896b97549215 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17311 65291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_rx_full.1731165291 |
| Directory | /workspace/14.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/14.usbdev_setup_stage.2419750047 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 147067477 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:01 PM PDT 24 |
| Finished | Aug 12 06:32:02 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-43732efe-871b-49cc-a73d-c942912eb622 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24197 50047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_setup_stage.2419750047 |
| Directory | /workspace/14.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/14.usbdev_setup_trans_ignored.2783607121 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 146849618 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:05 PM PDT 24 |
| Finished | Aug 12 06:32:06 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-98dd7b46-fed1-4b05-8ae8-ecd83b7871d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27836 07121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_setup_trans_ignored.2783607121 |
| Directory | /workspace/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/14.usbdev_smoke.375934675 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 219817878 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:00 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-417677d4-af61-4bda-8ea4-7d0f6aaa2c0c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37593 4675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.375934675 |
| Directory | /workspace/14.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/14.usbdev_spurious_pids_ignored.3320237802 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 2484928114 ps |
| CPU time | 18.97 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 217880 kb |
| Host | smart-af7d30c1-28e9-462c-b88a-703639edb2e4 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3320237802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.3320237802 |
| Directory | /workspace/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/14.usbdev_stall_priority_over_nak.336757040 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 209411988 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:00 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-acf047f9-cd80-494c-813c-79695ab4de22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33675 7040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.336757040 |
| Directory | /workspace/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/14.usbdev_stall_trans.425200828 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 169266530 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:08 PM PDT 24 |
| Finished | Aug 12 06:32:09 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-defdc56f-637c-4ac9-8f66-02498db5d6c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42520 0828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_trans.425200828 |
| Directory | /workspace/14.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_stream_len_max.1174469203 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 579499862 ps |
| CPU time | 1.91 seconds |
| Started | Aug 12 06:32:02 PM PDT 24 |
| Finished | Aug 12 06:32:04 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e1543cd8-e3c2-46d3-9ce9-da7f48401fab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11744 69203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.1174469203 |
| Directory | /workspace/14.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/14.usbdev_streaming_out.3299831537 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 2101008339 ps |
| CPU time | 15.74 seconds |
| Started | Aug 12 06:32:07 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-d20390db-39d1-46e7-8e40-f322a418e447 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32998 31537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_streaming_out.3299831537 |
| Directory | /workspace/14.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/14.usbdev_timeout_missing_host_handshake.1590773124 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 1982251557 ps |
| CPU time | 17.58 seconds |
| Started | Aug 12 06:31:56 PM PDT 24 |
| Finished | Aug 12 06:32:14 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-9eb20077-121b-4344-8130-87001cc20f75 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1590773124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_hos t_handshake.1590773124 |
| Directory | /workspace/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/14.usbdev_tx_rx_disruption.1190675420 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 381180753 ps |
| CPU time | 1.34 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-75ba04b4-061c-4dd9-ae1c-77e4b634bd30 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1190675420 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_tx_rx_disruption.1190675420 |
| Directory | /workspace/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/140.usbdev_endpoint_types.903399377 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 242412045 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:37:40 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-67fd3a06-b1cb-4b06-8d5d-ceaba7f6068f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=903399377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.903399377 |
| Directory | /workspace/140.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/140.usbdev_tx_rx_disruption.1092670424 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 682685416 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:37:34 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-62ba9d9a-3d62-43d4-84d1-5cb2dba57475 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1092670424 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 140.usbdev_tx_rx_disruption.1092670424 |
| Directory | /workspace/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/141.usbdev_endpoint_types.1005157702 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 512942049 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:37:30 PM PDT 24 |
| Finished | Aug 12 06:37:32 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-344ce86a-7b27-4b7c-ba23-7cbc36e0a878 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1005157702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.1005157702 |
| Directory | /workspace/141.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/141.usbdev_tx_rx_disruption.924939579 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 555198202 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:44 PM PDT 24 |
| Finished | Aug 12 06:37:46 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e7c981f4-8162-46d8-9157-4fbc6ca8a5c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=924939579 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 141.usbdev_tx_rx_disruption.924939579 |
| Directory | /workspace/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/142.usbdev_tx_rx_disruption.3830583027 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 646494179 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-47d58b81-d52f-437c-a294-a28fdf735a3c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3830583027 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 142.usbdev_tx_rx_disruption.3830583027 |
| Directory | /workspace/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/143.usbdev_endpoint_types.1985247678 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 157086710 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:37:20 PM PDT 24 |
| Finished | Aug 12 06:37:21 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-7886a9c5-c79f-4ec0-8283-bd8c3565460b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1985247678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.1985247678 |
| Directory | /workspace/143.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/143.usbdev_tx_rx_disruption.1712528648 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 600257085 ps |
| CPU time | 1.88 seconds |
| Started | Aug 12 06:37:48 PM PDT 24 |
| Finished | Aug 12 06:37:50 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-e8f1ba51-53b0-462a-820c-eac31617a20e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1712528648 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 143.usbdev_tx_rx_disruption.1712528648 |
| Directory | /workspace/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/144.usbdev_endpoint_types.2130922830 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 718088941 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 06:37:30 PM PDT 24 |
| Finished | Aug 12 06:37:32 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9847bcd8-3704-4ce7-a1ad-44e559c09234 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2130922830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.2130922830 |
| Directory | /workspace/144.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/144.usbdev_tx_rx_disruption.1057129701 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 494920488 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:37:25 PM PDT 24 |
| Finished | Aug 12 06:37:27 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-7ac481ad-cfc5-43ca-ab9e-cbdaecefa836 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1057129701 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 144.usbdev_tx_rx_disruption.1057129701 |
| Directory | /workspace/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/145.usbdev_endpoint_types.3966057578 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 239991247 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:37:32 PM PDT 24 |
| Finished | Aug 12 06:37:33 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b9b25d38-8bf4-4f46-8bc0-64fb7be55d26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3966057578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.3966057578 |
| Directory | /workspace/145.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/145.usbdev_tx_rx_disruption.2634511553 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 545610922 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:28 PM PDT 24 |
| Finished | Aug 12 06:37:30 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-660bc15c-d624-44b0-a4bb-1b1a6ac3fa0d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2634511553 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 145.usbdev_tx_rx_disruption.2634511553 |
| Directory | /workspace/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/146.usbdev_tx_rx_disruption.3312546652 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 623052884 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-fa2540d3-4376-4c11-89f7-d77c953e67f0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3312546652 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 146.usbdev_tx_rx_disruption.3312546652 |
| Directory | /workspace/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/147.usbdev_tx_rx_disruption.1013712401 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 587447803 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:29 PM PDT 24 |
| Finished | Aug 12 06:37:31 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-ca49388d-03bd-46e4-a139-bc5b62c0c99f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1013712401 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 147.usbdev_tx_rx_disruption.1013712401 |
| Directory | /workspace/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/148.usbdev_endpoint_types.405259673 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 235410981 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:37:40 PM PDT 24 |
| Finished | Aug 12 06:37:42 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-b24d5438-2533-4651-bfc8-17757f245c65 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=405259673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.405259673 |
| Directory | /workspace/148.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/148.usbdev_tx_rx_disruption.1656618902 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 416051201 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:37:43 PM PDT 24 |
| Finished | Aug 12 06:37:45 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-0d4c56c9-6cc3-42c2-9c91-70c935add6ac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1656618902 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 148.usbdev_tx_rx_disruption.1656618902 |
| Directory | /workspace/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/149.usbdev_endpoint_types.1734752107 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 304296949 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:37:26 PM PDT 24 |
| Finished | Aug 12 06:37:27 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-da6c919d-7469-4e35-b52c-53b0301ab53a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1734752107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.1734752107 |
| Directory | /workspace/149.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/149.usbdev_tx_rx_disruption.2925903576 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 492246845 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d30b80f3-2d42-4e92-a7c4-a8086e024de4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2925903576 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 149.usbdev_tx_rx_disruption.2925903576 |
| Directory | /workspace/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/15.usbdev_alert_test.2349117851 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 107222745 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:32:12 PM PDT 24 |
| Finished | Aug 12 06:32:13 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-d0861128-8927-4021-8c70-90630eceecc3 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2349117851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.2349117851 |
| Directory | /workspace/15.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_disconnect.914265892 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 5809490596 ps |
| CPU time | 8.03 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:18 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-49214706-2ba6-4a76-9a37-9b34198db374 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=914265892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_ao n_wake_disconnect.914265892 |
| Directory | /workspace/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_reset.4199559391 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 15186256695 ps |
| CPU time | 17.51 seconds |
| Started | Aug 12 06:32:06 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-2d460a18-ca14-4d8c-ac1a-27e9155fd50a |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4199559391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.4199559391 |
| Directory | /workspace/15.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_resume.2802221566 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 31050668183 ps |
| CPU time | 40.78 seconds |
| Started | Aug 12 06:32:02 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-831c1f2a-3e7c-41d7-86fb-0e213538421c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2802221566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_a on_wake_resume.2802221566 |
| Directory | /workspace/15.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/15.usbdev_av_buffer.2936785542 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 219515845 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:32:02 PM PDT 24 |
| Finished | Aug 12 06:32:03 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d84f5f93-bd05-4f45-a224-c69a231c0989 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29367 85542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_av_buffer.2936785542 |
| Directory | /workspace/15.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/15.usbdev_bitstuff_err.4087487601 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 156720541 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:10 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-619384cd-42c7-4b43-b9bb-da88de0cb7d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40874 87601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_bitstuff_err.4087487601 |
| Directory | /workspace/15.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_data_toggle_clear.1125925764 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 358629288 ps |
| CPU time | 1.36 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-9681b2a1-2305-44a1-95b9-ee045f0b6444 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11259 25764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_clear.1125925764 |
| Directory | /workspace/15.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/15.usbdev_data_toggle_restore.1413687427 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 560982696 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:32:04 PM PDT 24 |
| Finished | Aug 12 06:32:06 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7c7a0a4d-daa0-4baf-ba6e-06809b30b996 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1413687427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.1413687427 |
| Directory | /workspace/15.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/15.usbdev_device_address.1241597229 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 17947427831 ps |
| CPU time | 28.1 seconds |
| Started | Aug 12 06:32:05 PM PDT 24 |
| Finished | Aug 12 06:32:34 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-e9c0796d-fd56-4a98-8625-1f925120bb22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12415 97229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1241597229 |
| Directory | /workspace/15.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/15.usbdev_device_timeout.3787607486 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 364325363 ps |
| CPU time | 4.6 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:08 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-f618d7e0-b125-4b5f-9615-f33f0b66a886 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3787607486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.3787607486 |
| Directory | /workspace/15.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/15.usbdev_disable_endpoint.2256168492 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 448244189 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:32:04 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-162b49ac-0649-4cd1-994d-8cf5357f9be8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22561 68492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_disable_endpoint.2256168492 |
| Directory | /workspace/15.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/15.usbdev_disconnected.1265612739 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 165324404 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:32:04 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-605c260d-1462-4310-a939-e4e2fc140e16 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12656 12739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_disconnected.1265612739 |
| Directory | /workspace/15.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/15.usbdev_enable.2783166029 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 39525919 ps |
| CPU time | 0.77 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:04 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6e4ddd6e-4109-483f-a050-89da013d74ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27831 66029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_enable.2783166029 |
| Directory | /workspace/15.usbdev_enable/latest |
| Test location | /workspace/coverage/default/15.usbdev_endpoint_access.367727231 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 849011002 ps |
| CPU time | 2.19 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-a31cb8a7-baf7-4b86-af67-b4afb7685c68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36772 7231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.367727231 |
| Directory | /workspace/15.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/15.usbdev_endpoint_types.1161653717 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 335120209 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:10 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-862203fb-a3e3-4985-b8e8-aef8aad03f2a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1161653717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.1161653717 |
| Directory | /workspace/15.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/15.usbdev_fifo_rst.3558605784 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 258725923 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-d97d349a-7710-4018-b5a5-56f77d185f91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35586 05784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_fifo_rst.3558605784 |
| Directory | /workspace/15.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_iso.2905265171 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 192363173 ps |
| CPU time | 1.13 seconds |
| Started | Aug 12 06:32:00 PM PDT 24 |
| Finished | Aug 12 06:32:02 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-02f9973f-efa4-4737-a074-2b19e445a064 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2905265171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.2905265171 |
| Directory | /workspace/15.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_stall.1116435727 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 140944106 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:07 PM PDT 24 |
| Finished | Aug 12 06:32:08 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-2bdb1cb0-a04b-4535-bbbb-92db18e6c74f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11164 35727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_stall.1116435727 |
| Directory | /workspace/15.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_trans.2356568997 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 257986421 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-969bc017-edec-4935-bc58-4dce316f93b7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23565 68997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_trans.2356568997 |
| Directory | /workspace/15.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_invalid_sync.975209779 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 4793600922 ps |
| CPU time | 38.15 seconds |
| Started | Aug 12 06:32:01 PM PDT 24 |
| Finished | Aug 12 06:32:39 PM PDT 24 |
| Peak memory | 217920 kb |
| Host | smart-79f1d80e-54ba-4672-adf0-10fe1c2b0e0c |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=975209779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.975209779 |
| Directory | /workspace/15.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/15.usbdev_iso_retraction.2880767704 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 8467653664 ps |
| CPU time | 59.67 seconds |
| Started | Aug 12 06:32:04 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-913d88e5-4ec1-457a-9876-d523aa372126 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2880767704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.2880767704 |
| Directory | /workspace/15.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_in_err.1609837610 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 205956159 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:00 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-661e122b-d5a6-4517-b3ef-fe919bbc1045 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16098 37610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_in_err.1609837610 |
| Directory | /workspace/15.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_resume.1446358370 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 29389545413 ps |
| CPU time | 52.03 seconds |
| Started | Aug 12 06:32:01 PM PDT 24 |
| Finished | Aug 12 06:32:53 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-ecc8a854-9b0a-4ea0-bbcd-53ce63b543aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14463 58370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_resume.1446358370 |
| Directory | /workspace/15.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_suspend.1605803294 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 9990770017 ps |
| CPU time | 15.41 seconds |
| Started | Aug 12 06:32:07 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207848 kb |
| Host | smart-147a9387-ee29-427e-87a3-f6358650ac8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16058 03294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_suspend.1605803294 |
| Directory | /workspace/15.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/15.usbdev_low_speed_traffic.3787633253 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 4759305176 ps |
| CPU time | 51.79 seconds |
| Started | Aug 12 06:32:00 PM PDT 24 |
| Finished | Aug 12 06:32:52 PM PDT 24 |
| Peak memory | 219220 kb |
| Host | smart-e2f83061-2c9c-424c-84ee-381016a51537 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3787633253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.3787633253 |
| Directory | /workspace/15.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_inter_pkt_delay.3348122179 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 2947042074 ps |
| CPU time | 31.65 seconds |
| Started | Aug 12 06:32:06 PM PDT 24 |
| Finished | Aug 12 06:32:38 PM PDT 24 |
| Peak memory | 217556 kb |
| Host | smart-00e111c7-f2b8-4782-b0b1-aa9508616432 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3348122179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.3348122179 |
| Directory | /workspace/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_length_in_transaction.955306055 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 245818972 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-2a4c3856-f646-4534-b9e6-9fb9861f32ad |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=955306055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.955306055 |
| Directory | /workspace/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_length_out_transaction.167563559 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 203239699 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:06 PM PDT 24 |
| Finished | Aug 12 06:32:08 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-14706114-2bf0-456f-a71b-14e515d49551 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16756 3559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.167563559 |
| Directory | /workspace/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_non_iso_usb_traffic.537444832 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 1977758828 ps |
| CPU time | 19.63 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:29 PM PDT 24 |
| Peak memory | 216740 kb |
| Host | smart-7f1d05e1-2d53-42a4-8716-9fa188164479 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53744 4832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.537444832 |
| Directory | /workspace/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_inter_pkt_delay.735951966 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 4108966315 ps |
| CPU time | 30.67 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:34 PM PDT 24 |
| Peak memory | 217564 kb |
| Host | smart-cc37edaf-96d4-457e-9c9d-41129523eb7d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=735951966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.735951966 |
| Directory | /workspace/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_length_in_transaction.1439313371 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 155479829 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:32:05 PM PDT 24 |
| Finished | Aug 12 06:32:07 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-0cee2bb3-68db-4b06-831a-e240443c9401 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1439313371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.1439313371 |
| Directory | /workspace/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_length_out_transaction.2866098739 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 205630931 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:32:05 PM PDT 24 |
| Finished | Aug 12 06:32:06 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-baed8dfb-5ecd-4b47-a418-c435a64b6ac7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28660 98739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.2866098739 |
| Directory | /workspace/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_iso.1980039663 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 232686702 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:04 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-1d2800c5-bca3-4007-bbd5-9062dae601a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19800 39663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_iso.1980039663 |
| Directory | /workspace/15.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_stall.3801528881 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 172119316 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:03 PM PDT 24 |
| Finished | Aug 12 06:32:04 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e8480eb7-e19a-4429-8578-3719f2c52408 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38015 28881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_stall.3801528881 |
| Directory | /workspace/15.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_trans_nak.170456668 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 223352894 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:32:04 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-f7e63d38-c7f3-4d9a-9b3e-33a065b50015 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17045 6668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_trans_nak.170456668 |
| Directory | /workspace/15.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/15.usbdev_pending_in_trans.485755454 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 166664859 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:32:08 PM PDT 24 |
| Finished | Aug 12 06:32:09 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e42835cc-88ff-4a67-8a26-e2192a54dbfd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48575 5454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pending_in_trans.485755454 |
| Directory | /workspace/15.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_config_pinflip.3789320093 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 227228131 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:32:15 PM PDT 24 |
| Finished | Aug 12 06:32:16 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ec59b1cb-60f1-4367-807d-c5ffd3eee34d |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3789320093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.3789320093 |
| Directory | /workspace/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_config_usb_ref_disable.2014680954 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 154753226 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:32:17 PM PDT 24 |
| Finished | Aug 12 06:32:18 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-1d990744-7275-409f-8bb3-24e9490b8b94 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20146 80954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.2014680954 |
| Directory | /workspace/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_pins_sense.2215045075 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 58119529 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:32:11 PM PDT 24 |
| Finished | Aug 12 06:32:12 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-204a96b8-a168-4ab8-a5e7-942f09973066 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22150 45075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.2215045075 |
| Directory | /workspace/15.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_buffer.2860997570 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 17634336589 ps |
| CPU time | 41.55 seconds |
| Started | Aug 12 06:32:11 PM PDT 24 |
| Finished | Aug 12 06:32:52 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-85d91325-f486-4fde-9c18-9f95c1e90ef6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28609 97570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_buffer.2860997570 |
| Directory | /workspace/15.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_received.1160357048 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 177138839 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:16 PM PDT 24 |
| Finished | Aug 12 06:32:17 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-538f5e47-0f57-4eaf-8072-5d363bc360ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11603 57048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_received.1160357048 |
| Directory | /workspace/15.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_sent.560954356 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 216134489 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:32:12 PM PDT 24 |
| Finished | Aug 12 06:32:13 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-b463d7c9-33f2-4e96-b08b-b49647a23c08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56095 4356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_sent.560954356 |
| Directory | /workspace/15.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/15.usbdev_random_length_in_transaction.2658297822 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 199507581 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:32:13 PM PDT 24 |
| Finished | Aug 12 06:32:14 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-df8d6f77-9afc-41c0-83f5-eb5d7cc9a1ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26582 97822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_in_transaction.2658297822 |
| Directory | /workspace/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_random_length_out_transaction.794978666 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 143948843 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ed39c134-58d8-450e-858d-9d16b462ae0f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79497 8666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.794978666 |
| Directory | /workspace/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_resume_link_active.3817707532 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 20169479723 ps |
| CPU time | 25.53 seconds |
| Started | Aug 12 06:32:11 PM PDT 24 |
| Finished | Aug 12 06:32:37 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-8897ec48-04b6-4433-9e68-4aae8b498179 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38177 07532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_resume_link_active.3817707532 |
| Directory | /workspace/15.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/15.usbdev_rx_crc_err.936695633 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 137567521 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:32:18 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-d2cd01a5-89dc-44cb-a09e-4b1f7fc80f83 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93669 5633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_rx_crc_err.936695633 |
| Directory | /workspace/15.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_rx_full.4256551651 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 305498348 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:32:11 PM PDT 24 |
| Finished | Aug 12 06:32:12 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-2dd36ffe-ead2-4ab7-ab12-a8afe07d15e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42565 51651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_rx_full.4256551651 |
| Directory | /workspace/15.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/15.usbdev_setup_stage.2773626645 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 147486422 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:09 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-cbab0b6d-85ba-4be5-895e-dc64bab80388 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27736 26645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_setup_stage.2773626645 |
| Directory | /workspace/15.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/15.usbdev_setup_trans_ignored.676767581 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 143913642 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-501d1751-b992-430f-9d34-152690750980 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67676 7581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_setup_trans_ignored.676767581 |
| Directory | /workspace/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/15.usbdev_smoke.3605927040 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 209966881 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-2057b1d6-46b3-453b-928d-ba95c0f5dafe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36059 27040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.3605927040 |
| Directory | /workspace/15.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/15.usbdev_spurious_pids_ignored.3464705889 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 2114525142 ps |
| CPU time | 16.86 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:27 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-6f61bec2-7fea-44e0-b1fc-53296d411a3d |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3464705889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.3464705889 |
| Directory | /workspace/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/15.usbdev_stall_priority_over_nak.3339818378 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 239645744 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:32:12 PM PDT 24 |
| Finished | Aug 12 06:32:13 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-186e3cc0-9bc8-4684-8448-ebb06966266d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33398 18378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.3339818378 |
| Directory | /workspace/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/15.usbdev_stall_trans.2124873582 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 162662743 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-72b0cf00-7f9f-48e9-99fe-3b9bccf7ec87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21248 73582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_trans.2124873582 |
| Directory | /workspace/15.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_stream_len_max.3066397488 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 876557137 ps |
| CPU time | 2.26 seconds |
| Started | Aug 12 06:32:18 PM PDT 24 |
| Finished | Aug 12 06:32:21 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-19b266de-1549-437e-926b-9c99f61fbd2a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30663 97488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.3066397488 |
| Directory | /workspace/15.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/15.usbdev_streaming_out.3718741883 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 1977344465 ps |
| CPU time | 53.83 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:33:04 PM PDT 24 |
| Peak memory | 217144 kb |
| Host | smart-ff853219-e55d-480d-a194-cbb5c93d1595 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37187 41883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_streaming_out.3718741883 |
| Directory | /workspace/15.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/15.usbdev_timeout_missing_host_handshake.2299462001 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 156291484 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:31:59 PM PDT 24 |
| Finished | Aug 12 06:32:01 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a22a30b0-133d-4fd7-93b3-9767d98483b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2299462001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_hos t_handshake.2299462001 |
| Directory | /workspace/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/15.usbdev_tx_rx_disruption.1970090535 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 466790136 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-40fc98a6-659f-4446-9b7d-04ee2978f810 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1970090535 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_tx_rx_disruption.1970090535 |
| Directory | /workspace/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/150.usbdev_tx_rx_disruption.3118804140 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 568553402 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:37:34 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-e14f2f6d-a742-4071-90ce-3a2b8c30a370 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3118804140 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 150.usbdev_tx_rx_disruption.3118804140 |
| Directory | /workspace/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/151.usbdev_endpoint_types.498004322 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 321171449 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 06:37:34 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-45bd564a-eac8-4643-bb60-a9a3c3757450 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=498004322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.498004322 |
| Directory | /workspace/151.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/151.usbdev_tx_rx_disruption.1442318004 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 480482336 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-ebd3f7a6-be43-4a20-aa09-3f089e4e26b3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1442318004 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 151.usbdev_tx_rx_disruption.1442318004 |
| Directory | /workspace/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/152.usbdev_endpoint_types.3618967458 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 573241248 ps |
| CPU time | 1.37 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-634625f5-32d7-4744-b2f3-61662afc7c0c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3618967458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.3618967458 |
| Directory | /workspace/152.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/152.usbdev_tx_rx_disruption.2271799851 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 593348503 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:37:21 PM PDT 24 |
| Finished | Aug 12 06:37:23 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-3d517aa6-c766-4292-8e6d-4136ac2d1a7c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2271799851 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 152.usbdev_tx_rx_disruption.2271799851 |
| Directory | /workspace/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/153.usbdev_tx_rx_disruption.2926422996 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 617751828 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:31 PM PDT 24 |
| Finished | Aug 12 06:37:33 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-6e1a08d8-ff05-440b-be42-fdaa76b7b79f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2926422996 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 153.usbdev_tx_rx_disruption.2926422996 |
| Directory | /workspace/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/154.usbdev_endpoint_types.3269600273 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 609015475 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:37:45 PM PDT 24 |
| Finished | Aug 12 06:37:47 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8fec1183-9395-42bb-8fe8-044bf4f87813 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3269600273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.3269600273 |
| Directory | /workspace/154.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/154.usbdev_tx_rx_disruption.8265593 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 587329425 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4597ab30-7a0b-45e0-a61c-0acf34e8cc15 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=8265593 -assert nopostproc +UVM_TESTN AME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default. vdb -cm_log /dev/null -cm_name 154.usbdev_tx_rx_disruption.8265593 |
| Directory | /workspace/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/155.usbdev_endpoint_types.4206517571 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 442174270 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-b7727bc9-3a11-4bf9-9f3e-853348cb4a34 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4206517571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.4206517571 |
| Directory | /workspace/155.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/155.usbdev_tx_rx_disruption.31323440 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 680352710 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:44 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-c9305f2b-3d36-4009-bc62-14e630983785 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31323440 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 155.usbdev_tx_rx_disruption.31323440 |
| Directory | /workspace/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/156.usbdev_endpoint_types.588722645 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 549032092 ps |
| CPU time | 1.36 seconds |
| Started | Aug 12 06:37:44 PM PDT 24 |
| Finished | Aug 12 06:37:46 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-97b9d90a-520c-4190-8812-1e737eb16b95 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=588722645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.588722645 |
| Directory | /workspace/156.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/156.usbdev_tx_rx_disruption.2798261420 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 613699777 ps |
| CPU time | 1.82 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-865ed513-d8bd-4b59-9442-f709e566c2f3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2798261420 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 156.usbdev_tx_rx_disruption.2798261420 |
| Directory | /workspace/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/157.usbdev_endpoint_types.1774687997 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 270428868 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:37:40 PM PDT 24 |
| Finished | Aug 12 06:37:42 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1a96e3c3-4a8b-4a6e-9455-f3518730b151 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1774687997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.1774687997 |
| Directory | /workspace/157.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/157.usbdev_tx_rx_disruption.420088176 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 593300158 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:31 PM PDT 24 |
| Finished | Aug 12 06:37:33 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-e0524291-5400-4b6f-aac0-619dad538d31 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=420088176 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 157.usbdev_tx_rx_disruption.420088176 |
| Directory | /workspace/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/158.usbdev_endpoint_types.1969991672 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 656337607 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-69ea234a-d200-4fdc-900e-e730d76f28aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1969991672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.1969991672 |
| Directory | /workspace/158.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/159.usbdev_tx_rx_disruption.2559897923 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 491523333 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:37:53 PM PDT 24 |
| Finished | Aug 12 06:37:54 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-b4a73d65-cccb-413c-b057-4cd69441648b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2559897923 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 159.usbdev_tx_rx_disruption.2559897923 |
| Directory | /workspace/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/16.usbdev_alert_test.496815804 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 34414589 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-cbe92c06-fba8-48fa-bbd1-26f9a3e60bd7 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=496815804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.496815804 |
| Directory | /workspace/16.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_disconnect.376165289 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 3888927415 ps |
| CPU time | 6 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:15 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-1c8a0314-5862-4a61-a652-951c3bbf4201 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=376165289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_ao n_wake_disconnect.376165289 |
| Directory | /workspace/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_reset.2925774437 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 20893284840 ps |
| CPU time | 26.52 seconds |
| Started | Aug 12 06:32:15 PM PDT 24 |
| Finished | Aug 12 06:32:42 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-9ea1661a-ffce-43bf-84d1-e788158bea33 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2925774437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.2925774437 |
| Directory | /workspace/16.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_resume.2420602185 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 24441774211 ps |
| CPU time | 37.18 seconds |
| Started | Aug 12 06:32:17 PM PDT 24 |
| Finished | Aug 12 06:32:55 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-5f91d163-7e98-47fb-a837-afa4fef1c194 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2420602185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_a on_wake_resume.2420602185 |
| Directory | /workspace/16.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/16.usbdev_av_buffer.3132737229 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 209565456 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:32:12 PM PDT 24 |
| Finished | Aug 12 06:32:13 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-034d7760-66f8-4a1c-b984-5f9e32a2db09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31327 37229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_av_buffer.3132737229 |
| Directory | /workspace/16.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/16.usbdev_bitstuff_err.1505130446 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 150884060 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:10 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-31592ff7-e876-43cd-8fb9-2cac82ffc7fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15051 30446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_bitstuff_err.1505130446 |
| Directory | /workspace/16.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/16.usbdev_data_toggle_clear.761931030 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 256190007 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-e65620a0-1646-488d-a66e-e3cb66a229fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76193 1030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_clear.761931030 |
| Directory | /workspace/16.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/16.usbdev_data_toggle_restore.2356760819 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 707671703 ps |
| CPU time | 1.91 seconds |
| Started | Aug 12 06:32:17 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-6fdd5de3-eac2-4948-9ac6-fd01aa5c9a38 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2356760819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.2356760819 |
| Directory | /workspace/16.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/16.usbdev_device_address.2181952239 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 45593314194 ps |
| CPU time | 77.32 seconds |
| Started | Aug 12 06:32:11 PM PDT 24 |
| Finished | Aug 12 06:33:29 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-ad7d9279-34cf-4fd6-b045-898ad102af31 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21819 52239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.2181952239 |
| Directory | /workspace/16.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/16.usbdev_device_timeout.4138360492 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 6289726844 ps |
| CPU time | 40.94 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-8d786f8f-9701-4841-aeb4-e0154695336b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4138360492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.4138360492 |
| Directory | /workspace/16.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/16.usbdev_disable_endpoint.2291056191 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 837943271 ps |
| CPU time | 2 seconds |
| Started | Aug 12 06:32:14 PM PDT 24 |
| Finished | Aug 12 06:32:16 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-b1d93d9f-47ff-4bd6-8022-7bf4a054be60 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22910 56191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disable_endpoint.2291056191 |
| Directory | /workspace/16.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/16.usbdev_disconnected.51612422 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 160026512 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:11 PM PDT 24 |
| Finished | Aug 12 06:32:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-4d845ba8-d3b0-403a-99dd-7c96cf10936b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51612 422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disconnected.51612422 |
| Directory | /workspace/16.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/16.usbdev_enable.1688427359 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 33105583 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:32:11 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-daa8951f-ae5b-44c2-a45e-68aa21abfe9e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16884 27359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_enable.1688427359 |
| Directory | /workspace/16.usbdev_enable/latest |
| Test location | /workspace/coverage/default/16.usbdev_endpoint_access.4280541904 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 901619416 ps |
| CPU time | 2.59 seconds |
| Started | Aug 12 06:32:17 PM PDT 24 |
| Finished | Aug 12 06:32:20 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-020b4d8c-4d89-4b11-b616-cb9353c82a56 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42805 41904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.4280541904 |
| Directory | /workspace/16.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/16.usbdev_endpoint_types.2251415288 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 251955595 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:32:10 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-177e4ecf-9a92-4637-8551-709432da6575 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2251415288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.2251415288 |
| Directory | /workspace/16.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/16.usbdev_fifo_rst.1492527504 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 216594099 ps |
| CPU time | 2.41 seconds |
| Started | Aug 12 06:32:13 PM PDT 24 |
| Finished | Aug 12 06:32:15 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-9b35f6cc-7d05-45b4-bdc9-a1e612f66245 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14925 27504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_fifo_rst.1492527504 |
| Directory | /workspace/16.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_iso.3974127395 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 258745680 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 06:32:20 PM PDT 24 |
| Finished | Aug 12 06:32:21 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-423710ec-8d4c-4865-a1b8-c323e74590c2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3974127395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.3974127395 |
| Directory | /workspace/16.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_stall.2116937357 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 157299429 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:32:19 PM PDT 24 |
| Finished | Aug 12 06:32:20 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-b3c386fd-d8ce-4c5e-94cb-8e980f63033d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21169 37357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_stall.2116937357 |
| Directory | /workspace/16.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_trans.2529153155 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 229218986 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:19 PM PDT 24 |
| Finished | Aug 12 06:32:20 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-c0e3b22b-de6f-49b7-8c7c-f65a33b232df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25291 53155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_trans.2529153155 |
| Directory | /workspace/16.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_invalid_sync.2424091034 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 2902945987 ps |
| CPU time | 21.79 seconds |
| Started | Aug 12 06:32:09 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 218076 kb |
| Host | smart-6885e744-43ca-4c48-a3db-65a561a9ef7a |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2424091034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.2424091034 |
| Directory | /workspace/16.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/16.usbdev_iso_retraction.1456416962 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 4563306425 ps |
| CPU time | 52.67 seconds |
| Started | Aug 12 06:32:19 PM PDT 24 |
| Finished | Aug 12 06:33:12 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-7f2a1fc8-d616-4c9c-884a-09db035ef232 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1456416962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.1456416962 |
| Directory | /workspace/16.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_in_err.679955974 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 189378581 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:32:19 PM PDT 24 |
| Finished | Aug 12 06:32:20 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-19c94be3-6add-4c2c-ba75-2f2f324e8d32 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67995 5974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_in_err.679955974 |
| Directory | /workspace/16.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_resume.3331668363 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 9043574774 ps |
| CPU time | 14.31 seconds |
| Started | Aug 12 06:32:20 PM PDT 24 |
| Finished | Aug 12 06:32:35 PM PDT 24 |
| Peak memory | 216032 kb |
| Host | smart-b01604fb-b580-454d-b97d-947602de4675 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33316 68363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_resume.3331668363 |
| Directory | /workspace/16.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_suspend.2319686865 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 10308408202 ps |
| CPU time | 14.34 seconds |
| Started | Aug 12 06:32:19 PM PDT 24 |
| Finished | Aug 12 06:32:33 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-59bb1e06-425d-4409-b0f5-20beed8c0d90 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23196 86865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_suspend.2319686865 |
| Directory | /workspace/16.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/16.usbdev_low_speed_traffic.4197033038 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 4070361268 ps |
| CPU time | 121.65 seconds |
| Started | Aug 12 06:32:18 PM PDT 24 |
| Finished | Aug 12 06:34:20 PM PDT 24 |
| Peak memory | 218256 kb |
| Host | smart-e6cb3ee0-d5c6-43db-8649-ce1a2812daba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4197033038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.4197033038 |
| Directory | /workspace/16.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_inter_pkt_delay.1261982414 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 1628268812 ps |
| CPU time | 13.14 seconds |
| Started | Aug 12 06:32:18 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 217388 kb |
| Host | smart-1e39c4d5-ce98-439f-a1af-3d0838ba9592 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1261982414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.1261982414 |
| Directory | /workspace/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_length_in_transaction.2532795420 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 239559139 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:18 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-19ae8995-0648-4350-9ee2-0b7151e6310b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2532795420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.2532795420 |
| Directory | /workspace/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_length_out_transaction.3075719989 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 212955815 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-59a498a9-5e6e-4cb9-a163-0e8af1f1354a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30757 19989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.3075719989 |
| Directory | /workspace/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_non_iso_usb_traffic.864404693 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 2991957190 ps |
| CPU time | 85.3 seconds |
| Started | Aug 12 06:32:33 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 224100 kb |
| Host | smart-5dececb2-4255-42bc-867b-3059614b65ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86440 4693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.864404693 |
| Directory | /workspace/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_inter_pkt_delay.1339220960 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 3160527892 ps |
| CPU time | 30.32 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:52 PM PDT 24 |
| Peak memory | 217568 kb |
| Host | smart-c9b7feb4-934c-4c7b-9a5c-200741611d8f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1339220960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.1339220960 |
| Directory | /workspace/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_length_in_transaction.3317321896 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 180101492 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:19 PM PDT 24 |
| Finished | Aug 12 06:32:20 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d0766978-994a-4773-be49-099ca9268085 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3317321896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.3317321896 |
| Directory | /workspace/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_length_out_transaction.3022710615 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 151018761 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:18 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-62628a7e-0986-4aa5-8a9d-394cf3a04f0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30227 10615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.3022710615 |
| Directory | /workspace/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_iso.4102082777 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 204392544 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-82ad56ed-e75d-41a7-90b5-f752a1588379 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41020 82777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_iso.4102082777 |
| Directory | /workspace/16.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_stall.2964379779 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 232711712 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-02646de5-8064-4d98-bf01-08364868f3f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29643 79779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_stall.2964379779 |
| Directory | /workspace/16.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_trans_nak.3216596349 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 178095203 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:32:25 PM PDT 24 |
| Finished | Aug 12 06:32:26 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-bdee1850-ba64-409b-aaa3-749f7a985566 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32165 96349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_trans_nak.3216596349 |
| Directory | /workspace/16.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/16.usbdev_pending_in_trans.2198268541 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 145103971 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:32:24 PM PDT 24 |
| Finished | Aug 12 06:32:25 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b43978e1-3f10-4dae-b7bd-51a9cd802dd3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21982 68541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pending_in_trans.2198268541 |
| Directory | /workspace/16.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_config_pinflip.1927770695 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 294842611 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-624856c9-80a4-4ab5-aae1-62b1895243ce |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1927770695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.1927770695 |
| Directory | /workspace/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_config_usb_ref_disable.3479306914 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 154754047 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-f2a94db8-ee62-4c58-a62f-bdb39e180127 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34793 06914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.3479306914 |
| Directory | /workspace/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_pins_sense.2550470361 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 38404266 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-e9a86a9f-f77d-426a-8d66-c4d40c6effe8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25504 70361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.2550470361 |
| Directory | /workspace/16.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_buffer.3821685724 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 14591940168 ps |
| CPU time | 41.08 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-45944b6d-e90e-442f-bf7b-4cca3e2d9043 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38216 85724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_buffer.3821685724 |
| Directory | /workspace/16.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_received.214195341 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 170548443 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-7e0bb88b-1877-4c3c-8f90-c653d6c9ed44 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21419 5341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_received.214195341 |
| Directory | /workspace/16.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_sent.638502590 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 175176687 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-76c91ba0-4c76-4541-9dc4-bcdb7a7ca462 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63850 2590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_sent.638502590 |
| Directory | /workspace/16.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/16.usbdev_random_length_in_transaction.2289925695 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 242962930 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:32:27 PM PDT 24 |
| Finished | Aug 12 06:32:28 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-427115da-560c-48a4-a0e6-65775ecc32a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22899 25695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_in_transaction.2289925695 |
| Directory | /workspace/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_random_length_out_transaction.4007077862 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 149652486 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-3800d206-de34-452f-9dc5-d4058cbf11c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40070 77862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.4007077862 |
| Directory | /workspace/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_resume_link_active.1972109556 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 20158342187 ps |
| CPU time | 24.68 seconds |
| Started | Aug 12 06:32:24 PM PDT 24 |
| Finished | Aug 12 06:32:49 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-4dc9721f-bc39-47d4-b1c2-7c8af5dafc59 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19721 09556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_resume_link_active.1972109556 |
| Directory | /workspace/16.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/16.usbdev_rx_crc_err.2807009390 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 151896922 ps |
| CPU time | 0.79 seconds |
| Started | Aug 12 06:32:36 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-16b4452a-57a6-4cec-b19f-c1e2e84eece0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28070 09390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_rx_crc_err.2807009390 |
| Directory | /workspace/16.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/16.usbdev_rx_full.858943223 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 411978333 ps |
| CPU time | 1.34 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-4c60abd9-2119-4650-a85c-369f279dfe67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85894 3223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_rx_full.858943223 |
| Directory | /workspace/16.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/16.usbdev_setup_stage.4143852649 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 156145158 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b0f0c0ec-92a5-4834-8c92-619dafe30cee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41438 52649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_setup_stage.4143852649 |
| Directory | /workspace/16.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/16.usbdev_setup_trans_ignored.847664994 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 152927859 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:27 PM PDT 24 |
| Finished | Aug 12 06:32:28 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9e4dbe36-056d-4364-aec0-da8f279a1ab2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84766 4994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_setup_trans_ignored.847664994 |
| Directory | /workspace/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/16.usbdev_smoke.3144133885 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 263750000 ps |
| CPU time | 1.19 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-c447b6f3-c48b-4638-9282-854c856aa102 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31441 33885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.3144133885 |
| Directory | /workspace/16.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/16.usbdev_spurious_pids_ignored.2972672716 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 2651891880 ps |
| CPU time | 19.73 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:48 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-2269edac-ab0e-49d4-bea0-64f280283e1c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2972672716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.2972672716 |
| Directory | /workspace/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/16.usbdev_stall_priority_over_nak.280397436 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 162122184 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:25 PM PDT 24 |
| Finished | Aug 12 06:32:26 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-76c9caa0-5de4-4f8a-ac5d-199e34d98960 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28039 7436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.280397436 |
| Directory | /workspace/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/16.usbdev_stall_trans.740707739 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 208477332 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6a322598-3432-4590-9a5c-1e08fc1623d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74070 7739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_trans.740707739 |
| Directory | /workspace/16.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_stream_len_max.3823468280 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 870217712 ps |
| CPU time | 2.18 seconds |
| Started | Aug 12 06:32:25 PM PDT 24 |
| Finished | Aug 12 06:32:27 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-f001ebda-02a4-47f9-8f8c-5bf024003ad4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38234 68280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.3823468280 |
| Directory | /workspace/16.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/16.usbdev_streaming_out.878234468 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 2322307476 ps |
| CPU time | 24.17 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:54 PM PDT 24 |
| Peak memory | 216016 kb |
| Host | smart-16eb5ef2-b017-4d5a-b22e-e4e565e74a06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87823 4468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_streaming_out.878234468 |
| Directory | /workspace/16.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/16.usbdev_timeout_missing_host_handshake.2522926139 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 425858808 ps |
| CPU time | 8.48 seconds |
| Started | Aug 12 06:32:11 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-8b7a7dc2-8f21-4c8e-bed7-93b92a7c4af0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2522926139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_hos t_handshake.2522926139 |
| Directory | /workspace/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/16.usbdev_tx_rx_disruption.1996100811 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 545435611 ps |
| CPU time | 1.75 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:32 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-878c76a0-fc62-41cc-a719-369f219c3fea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1996100811 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_tx_rx_disruption.1996100811 |
| Directory | /workspace/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/160.usbdev_endpoint_types.572114395 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 191782720 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-3d038f51-9037-475c-950c-683fa717d3b0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=572114395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.572114395 |
| Directory | /workspace/160.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/160.usbdev_tx_rx_disruption.4011800709 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 522591058 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:37:30 PM PDT 24 |
| Finished | Aug 12 06:37:31 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-f065b3b9-de1c-4494-8327-d87db15244da |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4011800709 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 160.usbdev_tx_rx_disruption.4011800709 |
| Directory | /workspace/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/161.usbdev_endpoint_types.2556028763 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 237740049 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:37:33 PM PDT 24 |
| Finished | Aug 12 06:37:34 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-ebbda03c-685e-49fa-9574-1fdb83255155 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2556028763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.2556028763 |
| Directory | /workspace/161.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/161.usbdev_tx_rx_disruption.3501372973 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 447100606 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:37:34 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-7823462f-7d6b-4538-87d2-7a0df8ebc51d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3501372973 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 161.usbdev_tx_rx_disruption.3501372973 |
| Directory | /workspace/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/162.usbdev_endpoint_types.1550484226 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 176554259 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-85b438e0-2cab-4807-afa0-f7557f0633b0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1550484226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.1550484226 |
| Directory | /workspace/162.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/162.usbdev_tx_rx_disruption.3074475440 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 545980728 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:49 PM PDT 24 |
| Finished | Aug 12 06:37:51 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f1de732a-7919-48f2-9d4b-724fe62e0f05 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3074475440 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 162.usbdev_tx_rx_disruption.3074475440 |
| Directory | /workspace/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/163.usbdev_endpoint_types.3338759105 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 362442356 ps |
| CPU time | 1.22 seconds |
| Started | Aug 12 06:37:43 PM PDT 24 |
| Finished | Aug 12 06:37:45 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-9a6e5578-f778-446d-9459-7f5be388dda7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3338759105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.3338759105 |
| Directory | /workspace/163.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/163.usbdev_tx_rx_disruption.2548380193 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 595864892 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:37:48 PM PDT 24 |
| Finished | Aug 12 06:37:50 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-639e1809-5bda-44c8-83e9-2956efe40f0d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2548380193 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 163.usbdev_tx_rx_disruption.2548380193 |
| Directory | /workspace/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/164.usbdev_endpoint_types.1676896134 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 325411496 ps |
| CPU time | 1.19 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-73de98ad-babf-45b4-9825-f8dbcb11d490 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1676896134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.1676896134 |
| Directory | /workspace/164.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/164.usbdev_tx_rx_disruption.2212607902 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 515101327 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:46 PM PDT 24 |
| Finished | Aug 12 06:37:47 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-1b1ffb5d-d334-45f8-b54f-daf8c9a485a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2212607902 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 164.usbdev_tx_rx_disruption.2212607902 |
| Directory | /workspace/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/165.usbdev_endpoint_types.1650019708 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 362811452 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:44 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-aafe996c-891c-4ff1-b944-f43d1609586f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1650019708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.1650019708 |
| Directory | /workspace/165.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/165.usbdev_tx_rx_disruption.3558579500 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 502979518 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-66d4bf0a-b1c7-4b4d-90e1-a114edbc6a0e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3558579500 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 165.usbdev_tx_rx_disruption.3558579500 |
| Directory | /workspace/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/166.usbdev_tx_rx_disruption.854476352 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 573171212 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b307493a-2432-4312-98a1-4862d8096c8e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=854476352 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 166.usbdev_tx_rx_disruption.854476352 |
| Directory | /workspace/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/167.usbdev_endpoint_types.1959469235 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 903459186 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:37:46 PM PDT 24 |
| Finished | Aug 12 06:37:48 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-d1ef17f2-0b50-4a5b-b9b3-954030bf569b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1959469235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.1959469235 |
| Directory | /workspace/167.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/167.usbdev_tx_rx_disruption.1848828708 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 593416281 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:37:31 PM PDT 24 |
| Finished | Aug 12 06:37:33 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-3fd6c75f-c003-4011-a61d-d533bf84aa4c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1848828708 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 167.usbdev_tx_rx_disruption.1848828708 |
| Directory | /workspace/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/168.usbdev_tx_rx_disruption.480965 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 511871594 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:33 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f07499f1-fedb-422e-9365-5b81d45ee33c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=480965 -assert nopostproc +UVM_TESTNA ME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.v db -cm_log /dev/null -cm_name 168.usbdev_tx_rx_disruption.480965 |
| Directory | /workspace/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/169.usbdev_endpoint_types.1474058092 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 478669198 ps |
| CPU time | 1.33 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-67bb2758-eb62-44da-8953-faf36bb87315 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1474058092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.1474058092 |
| Directory | /workspace/169.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/169.usbdev_tx_rx_disruption.498989515 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 465354590 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:37:40 PM PDT 24 |
| Finished | Aug 12 06:37:42 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-2955ee8e-7533-41b9-9ae9-e9fea512b093 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=498989515 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 169.usbdev_tx_rx_disruption.498989515 |
| Directory | /workspace/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/17.usbdev_alert_test.2058104347 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 69424430 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e0f58485-7426-4216-9bfc-c8d25235e359 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2058104347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.2058104347 |
| Directory | /workspace/17.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_disconnect.2809762462 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 3542486327 ps |
| CPU time | 5.28 seconds |
| Started | Aug 12 06:32:31 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-ba1bb761-be9d-41d8-b75a-771444ede081 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2809762462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_a on_wake_disconnect.2809762462 |
| Directory | /workspace/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_reset.3690675417 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 19295495754 ps |
| CPU time | 23.79 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:53 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-81f4f873-75db-4185-a4b3-811a80d506bf |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3690675417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.3690675417 |
| Directory | /workspace/17.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_resume.4140703985 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 26343922528 ps |
| CPU time | 34.33 seconds |
| Started | Aug 12 06:32:36 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-38750e07-950e-4645-8487-286e9d10edcd |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4140703985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_a on_wake_resume.4140703985 |
| Directory | /workspace/17.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/17.usbdev_av_buffer.2224654872 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 185211674 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:30 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-82eec1aa-b842-4e06-b4c7-b4edf2a5669c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22246 54872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_av_buffer.2224654872 |
| Directory | /workspace/17.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/17.usbdev_bitstuff_err.2260982740 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 151278234 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-454a4c02-6e07-4ac6-814e-d7fd81bb8cca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22609 82740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_bitstuff_err.2260982740 |
| Directory | /workspace/17.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_data_toggle_clear.2711793158 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 572277157 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 06:32:36 PM PDT 24 |
| Finished | Aug 12 06:32:38 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-784698c5-3f1a-4989-b4b7-3688ca2f6630 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27117 93158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_clear.2711793158 |
| Directory | /workspace/17.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/17.usbdev_data_toggle_restore.168411314 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 1026353778 ps |
| CPU time | 2.87 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:32 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-e655d33a-10bc-43eb-b383-cff8dd0aae8a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=168411314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.168411314 |
| Directory | /workspace/17.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/17.usbdev_device_address.782215460 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 40178174589 ps |
| CPU time | 68.43 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:33:38 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-80649808-7e28-41a3-ab75-8fecd7bcbc97 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78221 5460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.782215460 |
| Directory | /workspace/17.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/17.usbdev_device_timeout.3864658577 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 4299237082 ps |
| CPU time | 28.26 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-a4db195f-5b2d-4352-a781-47a34c8d7452 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3864658577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.3864658577 |
| Directory | /workspace/17.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/17.usbdev_disable_endpoint.3354197804 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 671886853 ps |
| CPU time | 1.75 seconds |
| Started | Aug 12 06:32:26 PM PDT 24 |
| Finished | Aug 12 06:32:28 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-e71b6628-c538-45a9-a841-fcb66a59da20 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33541 97804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_disable_endpoint.3354197804 |
| Directory | /workspace/17.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/17.usbdev_disconnected.1250139417 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 217556635 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-11747b06-e392-4878-952d-41132ad4cf49 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12501 39417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_disconnected.1250139417 |
| Directory | /workspace/17.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/17.usbdev_enable.53278986 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 45178766 ps |
| CPU time | 0.76 seconds |
| Started | Aug 12 06:32:18 PM PDT 24 |
| Finished | Aug 12 06:32:19 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-bad23fce-a3ac-4b9d-bf74-c0e167140575 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53278 986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_enable.53278986 |
| Directory | /workspace/17.usbdev_enable/latest |
| Test location | /workspace/coverage/default/17.usbdev_endpoint_access.3649858903 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 1015922572 ps |
| CPU time | 2.87 seconds |
| Started | Aug 12 06:32:19 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-40fba026-4dde-4aac-b1ee-7b46a89e4f09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36498 58903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.3649858903 |
| Directory | /workspace/17.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/17.usbdev_fifo_rst.4203679166 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 190796938 ps |
| CPU time | 2.26 seconds |
| Started | Aug 12 06:32:24 PM PDT 24 |
| Finished | Aug 12 06:32:26 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-9312693f-26fe-4d51-9314-b4a4c3417fc7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42036 79166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_fifo_rst.4203679166 |
| Directory | /workspace/17.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_iso.2512221550 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 168152683 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:20 PM PDT 24 |
| Finished | Aug 12 06:32:21 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-b50f9494-4278-4ac0-b4c5-1adcf62f9211 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2512221550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.2512221550 |
| Directory | /workspace/17.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_stall.3048114759 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 152317744 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-451e342d-0d52-4b2a-8f6f-25906094693e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30481 14759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_stall.3048114759 |
| Directory | /workspace/17.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_trans.3797819823 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 174998303 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:20 PM PDT 24 |
| Finished | Aug 12 06:32:21 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-ff4b644e-b598-4149-b927-3e54eefe55f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37978 19823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_trans.3797819823 |
| Directory | /workspace/17.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_invalid_sync.3150840211 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 4295198330 ps |
| CPU time | 42.49 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:33:05 PM PDT 24 |
| Peak memory | 224124 kb |
| Host | smart-5758f6cf-bdfa-4974-abaf-723e406d7c14 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3150840211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.3150840211 |
| Directory | /workspace/17.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/17.usbdev_iso_retraction.2314428291 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 10378273287 ps |
| CPU time | 73.53 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-2757a12f-77e5-4946-a2c1-a6862b21d814 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2314428291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.2314428291 |
| Directory | /workspace/17.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_in_err.2441300558 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 236692677 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:32:26 PM PDT 24 |
| Finished | Aug 12 06:32:27 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-d98e20cf-58c3-417c-a914-112401de7bd9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24413 00558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_in_err.2441300558 |
| Directory | /workspace/17.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_resume.756794517 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 6218551328 ps |
| CPU time | 10.07 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-b81bf031-2669-4bce-b1b9-66c3fd5413fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75679 4517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_resume.756794517 |
| Directory | /workspace/17.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_suspend.1366410016 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 11403080451 ps |
| CPU time | 14.07 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-6e0169c4-8245-4718-b453-cec3217402d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13664 10016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_suspend.1366410016 |
| Directory | /workspace/17.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/17.usbdev_low_speed_traffic.1411667599 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 4365933393 ps |
| CPU time | 127.1 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:34:29 PM PDT 24 |
| Peak memory | 223944 kb |
| Host | smart-37143886-b94b-41ad-aa46-e2b81ed3715b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1411667599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.1411667599 |
| Directory | /workspace/17.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_inter_pkt_delay.3948375190 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 3629914876 ps |
| CPU time | 107.46 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:34:09 PM PDT 24 |
| Peak memory | 217368 kb |
| Host | smart-1620ac09-4c27-4b0b-9ddc-79b7297c15a9 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3948375190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.3948375190 |
| Directory | /workspace/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_length_in_transaction.2253136946 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 276099626 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:32:24 PM PDT 24 |
| Finished | Aug 12 06:32:26 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-91989a96-f4eb-49a1-845f-58dd44ce09fb |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2253136946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.2253136946 |
| Directory | /workspace/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_length_out_transaction.2729750160 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 204931393 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:32:22 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-65dbf820-8525-4bdd-a7b1-a28ed56313ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27297 50160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.2729750160 |
| Directory | /workspace/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_non_iso_usb_traffic.4259160526 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 2392036108 ps |
| CPU time | 19.86 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:42 PM PDT 24 |
| Peak memory | 217912 kb |
| Host | smart-c33988d1-f870-4c6c-a5f3-3e5e3c87aeda |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42591 60526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.4259160526 |
| Directory | /workspace/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_inter_pkt_delay.2263677682 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 4293582723 ps |
| CPU time | 121.99 seconds |
| Started | Aug 12 06:32:26 PM PDT 24 |
| Finished | Aug 12 06:34:28 PM PDT 24 |
| Peak memory | 217308 kb |
| Host | smart-a5650eff-43c0-439c-a613-7a4fd5110aa8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2263677682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.2263677682 |
| Directory | /workspace/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_length_in_transaction.1286987103 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 173294118 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:32:20 PM PDT 24 |
| Finished | Aug 12 06:32:21 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6ad259e8-45ac-486e-93d7-4ddf72ae6ad3 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1286987103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.1286987103 |
| Directory | /workspace/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_length_out_transaction.83571986 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 173009363 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-8372991e-7cda-40f3-87b0-562b5811b528 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83571 986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.83571986 |
| Directory | /workspace/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_nak_trans.1716414191 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 223632767 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9cbb5b0c-b5d4-421d-bb7a-294e3d20c6ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17164 14191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_nak_trans.1716414191 |
| Directory | /workspace/17.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_iso.1566793135 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 153987929 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9ae688ff-bcbd-4ff5-82fb-5d8ae50e9aa4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15667 93135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_iso.1566793135 |
| Directory | /workspace/17.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_stall.433668236 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 231660815 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:32:22 PM PDT 24 |
| Finished | Aug 12 06:32:23 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-faf8e14b-e35c-4cb8-a2a1-845035f37f80 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43366 8236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_stall.433668236 |
| Directory | /workspace/17.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_trans_nak.880498712 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 191135655 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:30 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-754c5b79-87d7-4467-b823-7329a68d5fce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88049 8712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_trans_nak.880498712 |
| Directory | /workspace/17.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/17.usbdev_pending_in_trans.1643478700 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 181825757 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:33 PM PDT 24 |
| Finished | Aug 12 06:32:34 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-a9839266-7ecf-4f5b-a0ce-53ea8638c9d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16434 78700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pending_in_trans.1643478700 |
| Directory | /workspace/17.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_config_pinflip.865561527 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 245755838 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:32:32 PM PDT 24 |
| Finished | Aug 12 06:32:33 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-58f56476-5c5d-49d5-8662-ab85f115e03b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=865561527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.865561527 |
| Directory | /workspace/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_config_usb_ref_disable.2913744 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 151409407 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:32:36 PM PDT 24 |
| Finished | Aug 12 06:32:37 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7be31220-1755-4bac-80d0-57b45b8e0086 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29137 44 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.2913744 |
| Directory | /workspace/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_pins_sense.3441353666 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 56555235 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:32:35 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-f874d722-b3fa-4245-8b74-8bd0a3dee3f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34413 53666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.3441353666 |
| Directory | /workspace/17.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_buffer.3012095119 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 8405673730 ps |
| CPU time | 20.79 seconds |
| Started | Aug 12 06:32:32 PM PDT 24 |
| Finished | Aug 12 06:32:53 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-af04d20b-d0d5-4478-9ef0-f2971924314b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30120 95119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_buffer.3012095119 |
| Directory | /workspace/17.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_received.1952412666 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 181275107 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e1008dba-2f45-4f09-8b7b-5871bbeea692 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19524 12666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_received.1952412666 |
| Directory | /workspace/17.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_sent.3257181235 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 169202754 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f45eb358-d1ad-4656-989c-cfbe4198f399 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32571 81235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_sent.3257181235 |
| Directory | /workspace/17.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/17.usbdev_random_length_in_transaction.25316303 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 225421092 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-63b97598-c21d-4ed2-81b3-8156ffb03a89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25316 303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_in_transaction.25316303 |
| Directory | /workspace/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_random_length_out_transaction.2080647496 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 216222195 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-7b904231-f5a4-42b0-8e29-bcdff14d5f1c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20806 47496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.2080647496 |
| Directory | /workspace/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_resume_link_active.2602204902 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 20168618525 ps |
| CPU time | 24.72 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:54 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-96e70237-9494-420d-b02c-ea5c56b721ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26022 04902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_resume_link_active.2602204902 |
| Directory | /workspace/17.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/17.usbdev_rx_crc_err.2235050240 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 136015251 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-789f4ee9-fd84-41a0-9708-8c39f491d039 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22350 50240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_rx_crc_err.2235050240 |
| Directory | /workspace/17.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_rx_full.3060875811 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 282319769 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:32:31 PM PDT 24 |
| Finished | Aug 12 06:32:32 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cab45023-e257-4fa0-a904-0fb4c13beacb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30608 75811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_rx_full.3060875811 |
| Directory | /workspace/17.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/17.usbdev_setup_stage.4169838600 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 147485431 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:32:28 PM PDT 24 |
| Finished | Aug 12 06:32:29 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-fc79a99a-2e1b-4a03-a638-8d75ec892fd8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41698 38600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_setup_stage.4169838600 |
| Directory | /workspace/17.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/17.usbdev_setup_trans_ignored.3359058469 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 207115748 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:37 PM PDT 24 |
| Finished | Aug 12 06:32:38 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-5bca2c6b-255b-4858-a33f-789215190c14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33590 58469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_setup_trans_ignored.3359058469 |
| Directory | /workspace/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/17.usbdev_smoke.163480216 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 230795824 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:30 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-94beea7a-216a-41ec-9e12-da81bb9f6917 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16348 0216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.163480216 |
| Directory | /workspace/17.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/17.usbdev_spurious_pids_ignored.552466509 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 3217401375 ps |
| CPU time | 31.67 seconds |
| Started | Aug 12 06:32:31 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 217212 kb |
| Host | smart-6f2cae39-e93d-4f32-83dd-443664795515 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=552466509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.552466509 |
| Directory | /workspace/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/17.usbdev_stall_priority_over_nak.2837359615 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 195109771 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c7159496-535b-4228-ac9b-e3329d12a47a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28373 59615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.2837359615 |
| Directory | /workspace/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/17.usbdev_stall_trans.3300743141 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 170807098 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:28 PM PDT 24 |
| Finished | Aug 12 06:32:29 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-f27862e3-6853-4c66-b195-7326fcaea48a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33007 43141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_trans.3300743141 |
| Directory | /workspace/17.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_stream_len_max.2906616562 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 908135322 ps |
| CPU time | 2.21 seconds |
| Started | Aug 12 06:32:28 PM PDT 24 |
| Finished | Aug 12 06:32:30 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-c6f7d540-7868-4cf2-b2fe-9a46fed2c98e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29066 16562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.2906616562 |
| Directory | /workspace/17.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/17.usbdev_streaming_out.1491139905 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 4222811329 ps |
| CPU time | 34.1 seconds |
| Started | Aug 12 06:32:32 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-33d62a53-1150-4759-9ef6-3a8a99506442 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14911 39905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_streaming_out.1491139905 |
| Directory | /workspace/17.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/17.usbdev_timeout_missing_host_handshake.3819029656 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 5542463462 ps |
| CPU time | 40.25 seconds |
| Started | Aug 12 06:32:21 PM PDT 24 |
| Finished | Aug 12 06:33:01 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-cf528e45-7f34-42ad-81bb-eec3af916ca7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3819029656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_hos t_handshake.3819029656 |
| Directory | /workspace/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/17.usbdev_tx_rx_disruption.2256315822 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 451377070 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:32:27 PM PDT 24 |
| Finished | Aug 12 06:32:28 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-c78eb2a8-a8b6-4b2d-9e21-e278443074c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2256315822 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_tx_rx_disruption.2256315822 |
| Directory | /workspace/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/170.usbdev_endpoint_types.2967963146 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 317366290 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 06:37:28 PM PDT 24 |
| Finished | Aug 12 06:37:29 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-06ebf04f-c8da-4a81-abef-3c13c96dce5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2967963146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.2967963146 |
| Directory | /workspace/170.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/170.usbdev_tx_rx_disruption.2129198502 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 508289720 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f0d85be5-5a98-4b1a-bc81-0a50f0e85942 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2129198502 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 170.usbdev_tx_rx_disruption.2129198502 |
| Directory | /workspace/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/171.usbdev_endpoint_types.3134832201 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 703655725 ps |
| CPU time | 1.96 seconds |
| Started | Aug 12 06:37:40 PM PDT 24 |
| Finished | Aug 12 06:37:42 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-43a89508-eb96-4f50-94fa-b94df24c1b46 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3134832201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.3134832201 |
| Directory | /workspace/171.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/171.usbdev_tx_rx_disruption.1386568681 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 541543448 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:43 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-4a223528-810f-4847-a29e-9b8993809df5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1386568681 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 171.usbdev_tx_rx_disruption.1386568681 |
| Directory | /workspace/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/172.usbdev_endpoint_types.2596825604 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 237760853 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b11a7ce6-e079-4210-9f0e-365088fcd5a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2596825604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.2596825604 |
| Directory | /workspace/172.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/172.usbdev_tx_rx_disruption.1082853564 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 585719875 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d7187d51-98cb-4e12-8e6f-c105c1d66c36 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1082853564 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 172.usbdev_tx_rx_disruption.1082853564 |
| Directory | /workspace/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/173.usbdev_endpoint_types.1896692111 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 465283464 ps |
| CPU time | 1.31 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-d6579167-2ca4-45f7-9f65-93779acb8c63 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1896692111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.1896692111 |
| Directory | /workspace/173.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/173.usbdev_tx_rx_disruption.3207452777 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 609098919 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0d38fdad-b262-45d2-a89a-17edf6923b8f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3207452777 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 173.usbdev_tx_rx_disruption.3207452777 |
| Directory | /workspace/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/174.usbdev_tx_rx_disruption.3990905930 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 468828023 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-75feec4e-5724-450c-a1dc-8cc8af22db4d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3990905930 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 174.usbdev_tx_rx_disruption.3990905930 |
| Directory | /workspace/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/175.usbdev_endpoint_types.2489660023 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 172496157 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:37:27 PM PDT 24 |
| Finished | Aug 12 06:37:28 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5f3977f3-3f09-4b70-af92-fe62f0c9304c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2489660023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.2489660023 |
| Directory | /workspace/175.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/175.usbdev_tx_rx_disruption.3219269 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 575876907 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-ff725fdc-e7f9-4e0e-b56b-b6a790e185de |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3219269 -assert nopostproc +UVM_TESTN AME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default. vdb -cm_log /dev/null -cm_name 175.usbdev_tx_rx_disruption.3219269 |
| Directory | /workspace/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/176.usbdev_endpoint_types.1449093649 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 239340287 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:37:48 PM PDT 24 |
| Finished | Aug 12 06:37:49 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-acefb8a1-a438-48dc-af8e-b23f08742d70 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1449093649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.1449093649 |
| Directory | /workspace/176.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/176.usbdev_tx_rx_disruption.2510250390 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 494686684 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-139bd722-b79b-467d-b49c-eb8811e70328 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2510250390 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 176.usbdev_tx_rx_disruption.2510250390 |
| Directory | /workspace/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/177.usbdev_endpoint_types.154374073 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 157184912 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f8c1b3d0-3e30-467c-b266-885098c93fc0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=154374073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.154374073 |
| Directory | /workspace/177.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/177.usbdev_tx_rx_disruption.2371253894 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 639266296 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bbcbf53a-69c3-43bd-b97b-52be1bb4fa87 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2371253894 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 177.usbdev_tx_rx_disruption.2371253894 |
| Directory | /workspace/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/178.usbdev_endpoint_types.649695678 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 269787192 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:37:49 PM PDT 24 |
| Finished | Aug 12 06:37:51 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-1f3b37cd-48b2-4336-a364-bd95af67889d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=649695678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.649695678 |
| Directory | /workspace/178.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/178.usbdev_tx_rx_disruption.758483468 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 560453638 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-20d2947c-e6b3-4748-b530-f2952d315b19 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=758483468 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 178.usbdev_tx_rx_disruption.758483468 |
| Directory | /workspace/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/179.usbdev_endpoint_types.2006362194 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 388716758 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-84462133-e0b4-4d63-8753-a5fa9e47d16f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2006362194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.2006362194 |
| Directory | /workspace/179.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/179.usbdev_tx_rx_disruption.1022376269 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 460471696 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:44 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-05080c1b-d5fc-4b2a-a3b3-bf1485ace855 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1022376269 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 179.usbdev_tx_rx_disruption.1022376269 |
| Directory | /workspace/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/18.usbdev_alert_test.1021425975 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 42464777 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:32:35 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a18cd99e-e210-4b3c-ac8b-2c3f5657030f |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1021425975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.1021425975 |
| Directory | /workspace/18.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_disconnect.2998188304 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 6622638387 ps |
| CPU time | 11.66 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-7d54e5ec-34ae-4f4f-8c6b-f623f0947b35 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2998188304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_a on_wake_disconnect.2998188304 |
| Directory | /workspace/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_reset.3087767970 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 15588724567 ps |
| CPU time | 21.3 seconds |
| Started | Aug 12 06:32:31 PM PDT 24 |
| Finished | Aug 12 06:32:52 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-485dd81c-c066-42fd-bca1-4e4f82bf1e32 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3087767970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.3087767970 |
| Directory | /workspace/18.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_resume.4142009173 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 29376552878 ps |
| CPU time | 39.71 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-2dc5fe29-65b3-4336-ab0c-0de23e6ee148 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4142009173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_a on_wake_resume.4142009173 |
| Directory | /workspace/18.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/18.usbdev_av_buffer.1813189769 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 157385566 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-9ea7acd4-0acb-4c9b-a9dc-3c2f24f8681e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18131 89769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_av_buffer.1813189769 |
| Directory | /workspace/18.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/18.usbdev_bitstuff_err.1182539680 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 167953549 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:32:30 PM PDT 24 |
| Finished | Aug 12 06:32:31 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-3f0a3bab-bb21-49d4-8122-4b0c1edf89f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11825 39680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_bitstuff_err.1182539680 |
| Directory | /workspace/18.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_data_toggle_clear.4252490479 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 418272762 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:32:31 PM PDT 24 |
| Finished | Aug 12 06:32:33 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d39a2bf3-f50d-4f5a-9b7a-c3c561fa53aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42524 90479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_clear.4252490479 |
| Directory | /workspace/18.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/18.usbdev_device_address.1335159220 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 18208917794 ps |
| CPU time | 29.95 seconds |
| Started | Aug 12 06:32:41 PM PDT 24 |
| Finished | Aug 12 06:33:11 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-742e876b-1cd8-4ea6-b8d8-8984501a41d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13351 59220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.1335159220 |
| Directory | /workspace/18.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/18.usbdev_device_timeout.4128612913 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 314784022 ps |
| CPU time | 4.69 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:44 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-aed045c3-4246-44b4-bd91-98d01e129bfd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4128612913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.4128612913 |
| Directory | /workspace/18.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/18.usbdev_disable_endpoint.690818254 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 303175640 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:41 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-5d8c7fea-7644-4f52-b5b9-59700458ef05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69081 8254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_disable_endpoint.690818254 |
| Directory | /workspace/18.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/18.usbdev_disconnected.2543674450 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 165957608 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:37 PM PDT 24 |
| Finished | Aug 12 06:32:38 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-e4c2a079-787c-4366-bb12-3091a849f0ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25436 74450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_disconnected.2543674450 |
| Directory | /workspace/18.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/18.usbdev_enable.768178038 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 69119114 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-b923159f-9ade-4ab0-a9c1-8900c9f576e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76817 8038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_enable.768178038 |
| Directory | /workspace/18.usbdev_enable/latest |
| Test location | /workspace/coverage/default/18.usbdev_endpoint_access.3456822620 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 718652082 ps |
| CPU time | 2.15 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:41 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-758aff71-9bf8-4605-a282-a1a6b6877f75 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34568 22620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.3456822620 |
| Directory | /workspace/18.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/18.usbdev_endpoint_types.3706896537 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 691940605 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:41 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-c2570487-a224-4a6b-86fc-71ec5baafac0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3706896537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.3706896537 |
| Directory | /workspace/18.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/18.usbdev_fifo_rst.540491516 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 171702378 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:32:32 PM PDT 24 |
| Finished | Aug 12 06:32:33 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-4381a20b-617a-4ba1-a0b0-c380bde8e5ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54049 1516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_fifo_rst.540491516 |
| Directory | /workspace/18.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_iso.380862145 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 209961297 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:32:35 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-47276cb6-e38b-4350-9604-9788475393b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=380862145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.380862145 |
| Directory | /workspace/18.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_stall.1345361460 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 139089176 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:32:35 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-fe842a9d-1ec8-4b42-a197-098b69ab319b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13453 61460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_stall.1345361460 |
| Directory | /workspace/18.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_trans.4249924610 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 204395579 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:31 PM PDT 24 |
| Finished | Aug 12 06:32:32 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5ebada07-6fbc-472a-9e52-c41747929926 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42499 24610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_trans.4249924610 |
| Directory | /workspace/18.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_invalid_sync.185474872 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 3246132413 ps |
| CPU time | 91.99 seconds |
| Started | Aug 12 06:32:36 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-a80204ca-d8d9-4db4-a290-d9be9282d2db |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=185474872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.185474872 |
| Directory | /workspace/18.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/18.usbdev_iso_retraction.3995531722 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 12915323456 ps |
| CPU time | 156.18 seconds |
| Started | Aug 12 06:32:32 PM PDT 24 |
| Finished | Aug 12 06:35:08 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-f6009429-65fc-4dd2-8c87-066522274d77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3995531722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.3995531722 |
| Directory | /workspace/18.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_in_err.309289972 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 218122938 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:29 PM PDT 24 |
| Finished | Aug 12 06:32:30 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-56ed4f8a-b568-4740-98b4-28d62551f190 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30928 9972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_in_err.309289972 |
| Directory | /workspace/18.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_resume.1987337512 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 11594535718 ps |
| CPU time | 15.72 seconds |
| Started | Aug 12 06:32:33 PM PDT 24 |
| Finished | Aug 12 06:32:49 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-bfcb475a-d362-4225-aff6-0ba6fb099600 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19873 37512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_resume.1987337512 |
| Directory | /workspace/18.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_suspend.4291988880 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 9770201558 ps |
| CPU time | 12 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:32:47 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-a63f8770-6336-44d6-86e3-053942bdde1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42919 88880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_suspend.4291988880 |
| Directory | /workspace/18.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/18.usbdev_low_speed_traffic.1725117672 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 4199728596 ps |
| CPU time | 43.49 seconds |
| Started | Aug 12 06:32:32 PM PDT 24 |
| Finished | Aug 12 06:33:15 PM PDT 24 |
| Peak memory | 223744 kb |
| Host | smart-7ec6932f-11a9-4270-b3c9-fe83823b584d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1725117672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.1725117672 |
| Directory | /workspace/18.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_inter_pkt_delay.362934820 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 2403136393 ps |
| CPU time | 18.39 seconds |
| Started | Aug 12 06:32:37 PM PDT 24 |
| Finished | Aug 12 06:32:56 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-12d60694-bd76-4184-bfaa-8483307f7287 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=362934820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.362934820 |
| Directory | /workspace/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_length_in_transaction.291858805 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 305893310 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:32:33 PM PDT 24 |
| Finished | Aug 12 06:32:34 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-81683c46-fe5b-429d-bd7b-ebe37ddcf450 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=291858805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.291858805 |
| Directory | /workspace/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_length_out_transaction.3958204010 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 200195331 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-60ad9007-a8bc-43da-81f1-86ecaf82a9a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39582 04010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.3958204010 |
| Directory | /workspace/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_non_iso_usb_traffic.581714756 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 3026751577 ps |
| CPU time | 90.56 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 217416 kb |
| Host | smart-098c5ca0-f92b-4fa8-89da-5cd32caf1691 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58171 4756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.581714756 |
| Directory | /workspace/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_inter_pkt_delay.1479141790 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 4480191671 ps |
| CPU time | 132.46 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 217344 kb |
| Host | smart-5e700f3f-a507-4c9f-aeeb-d3f6748b0c0a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1479141790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.1479141790 |
| Directory | /workspace/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_length_in_transaction.3293464440 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 153802076 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:40 PM PDT 24 |
| Finished | Aug 12 06:32:41 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-025a9dc9-aeed-4b36-987b-c9ad11b14bde |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3293464440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.3293464440 |
| Directory | /workspace/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_length_out_transaction.4268526812 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 144421642 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-b91812fc-0bfe-4a6e-a97a-b916ca5e9f03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42685 26812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.4268526812 |
| Directory | /workspace/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_nak_trans.4016812009 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 169638439 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:40 PM PDT 24 |
| Finished | Aug 12 06:32:41 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-f521d49d-8184-4af6-af78-3e0b8043c5dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40168 12009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_nak_trans.4016812009 |
| Directory | /workspace/18.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_iso.538872057 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 151446376 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-cd48a6f6-96b2-4e3e-8d11-670c1d640e7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53887 2057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_iso.538872057 |
| Directory | /workspace/18.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_stall.925645556 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 159972396 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-8e2d9c44-b745-4c80-ad6e-8f6b1cf72050 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92564 5556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_stall.925645556 |
| Directory | /workspace/18.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_trans_nak.2430140515 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 180235133 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:32:35 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6efb04c2-3ddf-4d25-90ad-0e7d0203a0a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24301 40515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_trans_nak.2430140515 |
| Directory | /workspace/18.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/18.usbdev_pending_in_trans.3520876616 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 151848164 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-86e406d6-7fbb-4a67-8faa-71ebb918e955 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35208 76616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pending_in_trans.3520876616 |
| Directory | /workspace/18.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_config_pinflip.1891265610 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 247450339 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:33 PM PDT 24 |
| Finished | Aug 12 06:32:34 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8a25e5f7-4715-4d71-8ed3-b3324a240124 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1891265610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.1891265610 |
| Directory | /workspace/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_config_usb_ref_disable.2397354361 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 159079354 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:32:31 PM PDT 24 |
| Finished | Aug 12 06:32:32 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-13693746-2859-4dba-a188-f6d12274225e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23973 54361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.2397354361 |
| Directory | /workspace/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_pins_sense.1596307181 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 43250284 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:32:52 PM PDT 24 |
| Finished | Aug 12 06:32:53 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-5d55c7f6-9e9f-47de-b5d2-cbfea576c651 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15963 07181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.1596307181 |
| Directory | /workspace/18.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_buffer.2293290411 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 14207454424 ps |
| CPU time | 35.56 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:33:15 PM PDT 24 |
| Peak memory | 215908 kb |
| Host | smart-70a4b54c-4e8a-45eb-957c-6a83123fd712 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22932 90411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_buffer.2293290411 |
| Directory | /workspace/18.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_received.1403770502 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 268494566 ps |
| CPU time | 1.13 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:32:48 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-de112b9f-7d20-4de3-9064-06d99b09a290 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14037 70502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_received.1403770502 |
| Directory | /workspace/18.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_sent.2611221211 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 250694215 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:32:35 PM PDT 24 |
| Finished | Aug 12 06:32:36 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8e1bc0ca-9211-4763-b1a0-24165b7e02f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26112 21211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_sent.2611221211 |
| Directory | /workspace/18.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/18.usbdev_random_length_in_transaction.2273853749 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 180775488 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-f1ce036a-e8aa-46a9-8058-cecdd53e5e45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22738 53749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_in_transaction.2273853749 |
| Directory | /workspace/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_random_length_out_transaction.1106400859 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 163285599 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:32:51 PM PDT 24 |
| Finished | Aug 12 06:32:52 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-718c6cf6-5f6f-40cf-8882-308395a8329e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11064 00859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.1106400859 |
| Directory | /workspace/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_resume_link_active.2318098118 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 20173537584 ps |
| CPU time | 27.8 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:33:24 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-5883d1c7-6518-4171-bea1-6515db628ed1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23180 98118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_resume_link_active.2318098118 |
| Directory | /workspace/18.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/18.usbdev_rx_crc_err.3485874459 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 166056421 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:04 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-058f0226-8c69-48ef-94a6-b74f3a40b7e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34858 74459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_rx_crc_err.3485874459 |
| Directory | /workspace/18.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_rx_full.1151961889 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 293575435 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:32:41 PM PDT 24 |
| Finished | Aug 12 06:32:42 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-ca3c56de-e43d-49fe-97f2-10d5ab4dfcf7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11519 61889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_rx_full.1151961889 |
| Directory | /workspace/18.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/18.usbdev_setup_stage.3820701827 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 191161229 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:44 PM PDT 24 |
| Finished | Aug 12 06:32:45 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9d9dcad6-6b02-41d0-b2c8-e90b33391d3d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38207 01827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_setup_stage.3820701827 |
| Directory | /workspace/18.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/18.usbdev_setup_trans_ignored.3309726005 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 155240962 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:32:47 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-74b00a25-a90c-4ba9-ba6b-0720943c1b72 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33097 26005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_setup_trans_ignored.3309726005 |
| Directory | /workspace/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/18.usbdev_smoke.1615471926 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 222982646 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:38 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e3f98b43-ac3b-45f0-83f5-e4aa2dd5b4b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16154 71926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.1615471926 |
| Directory | /workspace/18.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/18.usbdev_stall_priority_over_nak.3596312801 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 158054213 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:32:47 PM PDT 24 |
| Finished | Aug 12 06:32:47 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-3f5dc843-d6bd-4490-b07c-ac15a643d659 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35963 12801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.3596312801 |
| Directory | /workspace/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/18.usbdev_stall_trans.147227644 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 219867570 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:41 PM PDT 24 |
| Finished | Aug 12 06:32:42 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-693fd9ea-c47f-41b1-9f30-39608e43b321 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14722 7644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_trans.147227644 |
| Directory | /workspace/18.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_stream_len_max.188783987 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 641927614 ps |
| CPU time | 1.78 seconds |
| Started | Aug 12 06:32:44 PM PDT 24 |
| Finished | Aug 12 06:32:46 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-a09144ad-3cd9-4223-b11c-a7a585fb2495 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18878 3987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.188783987 |
| Directory | /workspace/18.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/18.usbdev_streaming_out.1198805845 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 3325906177 ps |
| CPU time | 27.47 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:33:23 PM PDT 24 |
| Peak memory | 217608 kb |
| Host | smart-f53381cd-55c2-4f23-8e5d-920d1527ec27 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11988 05845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_streaming_out.1198805845 |
| Directory | /workspace/18.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/18.usbdev_timeout_missing_host_handshake.4086968824 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 1809359135 ps |
| CPU time | 46.27 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:33:20 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-9e8fa6ba-36dd-4783-b79d-8c2d22ad3d42 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4086968824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_hos t_handshake.4086968824 |
| Directory | /workspace/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/18.usbdev_tx_rx_disruption.1659387975 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 520455222 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 206968 kb |
| Host | smart-d1185a6b-410e-4c70-abe2-4f658c0e7382 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1659387975 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_tx_rx_disruption.1659387975 |
| Directory | /workspace/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/180.usbdev_endpoint_types.211716118 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 182549076 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:51 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-d42f5548-3a47-4427-a103-a126ccd7790d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=211716118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.211716118 |
| Directory | /workspace/180.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/180.usbdev_tx_rx_disruption.731222586 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 502706932 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-63809cba-4693-4a94-99f0-ad7992a7438c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=731222586 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 180.usbdev_tx_rx_disruption.731222586 |
| Directory | /workspace/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/181.usbdev_endpoint_types.3049490975 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 519828001 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-a3776ee4-e0a5-45bd-adf0-43a3967851b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3049490975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.3049490975 |
| Directory | /workspace/181.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/181.usbdev_tx_rx_disruption.281930282 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 524251910 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:54 PM PDT 24 |
| Finished | Aug 12 06:37:56 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e7ea027e-e029-4555-92b6-ddd112d8d33f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=281930282 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 181.usbdev_tx_rx_disruption.281930282 |
| Directory | /workspace/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/182.usbdev_endpoint_types.907360913 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 356847141 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:37:45 PM PDT 24 |
| Finished | Aug 12 06:37:46 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e85ecb74-7e6b-4115-8ffe-e8c8983161ce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=907360913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.907360913 |
| Directory | /workspace/182.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/182.usbdev_tx_rx_disruption.2748419252 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 474233948 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-36b0c2b6-ef64-48cb-acea-3716fda90b3a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2748419252 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 182.usbdev_tx_rx_disruption.2748419252 |
| Directory | /workspace/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/183.usbdev_endpoint_types.4010928011 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 199349792 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-048affc4-722c-46c2-a82c-22afcc6aae11 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4010928011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.4010928011 |
| Directory | /workspace/183.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/183.usbdev_tx_rx_disruption.3281292804 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 446523702 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-9545e2bb-f52f-4e57-bd5a-7d793fd68423 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3281292804 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 183.usbdev_tx_rx_disruption.3281292804 |
| Directory | /workspace/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/184.usbdev_endpoint_types.1963660383 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 482746422 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:37:40 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-defdf9b2-cb82-4f6d-a558-e14612903fd4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1963660383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.1963660383 |
| Directory | /workspace/184.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/184.usbdev_tx_rx_disruption.405621742 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 630904104 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-6027e3d8-77c2-4ff8-a18b-3e2bd259f83e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=405621742 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 184.usbdev_tx_rx_disruption.405621742 |
| Directory | /workspace/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/185.usbdev_tx_rx_disruption.4066858164 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 541002873 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:55 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-968ec882-c958-4224-88d8-ed4be395065a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4066858164 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 185.usbdev_tx_rx_disruption.4066858164 |
| Directory | /workspace/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/186.usbdev_endpoint_types.2959833725 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 740445882 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:37:58 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-5ce93a28-6573-43f4-bc9a-700707c63b43 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2959833725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.2959833725 |
| Directory | /workspace/186.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/186.usbdev_tx_rx_disruption.2346937638 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 490433507 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6721a455-bea4-4c85-8621-8b228d760573 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2346937638 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 186.usbdev_tx_rx_disruption.2346937638 |
| Directory | /workspace/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/187.usbdev_endpoint_types.1164623311 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 444510917 ps |
| CPU time | 1.33 seconds |
| Started | Aug 12 06:37:52 PM PDT 24 |
| Finished | Aug 12 06:37:54 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-19c08c0f-40ee-419d-a311-97a94dfbe30d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1164623311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.1164623311 |
| Directory | /workspace/187.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/187.usbdev_tx_rx_disruption.2584638862 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 539472619 ps |
| CPU time | 1.75 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-2bb43ff8-c7dd-4709-8364-ce1d64363eb4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2584638862 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 187.usbdev_tx_rx_disruption.2584638862 |
| Directory | /workspace/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/188.usbdev_endpoint_types.1395957310 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 190708373 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:51 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b61b9485-3632-45e2-89ed-89346b692075 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1395957310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.1395957310 |
| Directory | /workspace/188.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/188.usbdev_tx_rx_disruption.518343756 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 610290440 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-437ada48-b657-4552-8b28-60d4f6378f43 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=518343756 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 188.usbdev_tx_rx_disruption.518343756 |
| Directory | /workspace/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/189.usbdev_endpoint_types.4039723422 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 521389745 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:46 PM PDT 24 |
| Finished | Aug 12 06:37:48 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-fcb01043-4e2c-4ad1-bce6-0bd766d29d60 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4039723422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.4039723422 |
| Directory | /workspace/189.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/189.usbdev_tx_rx_disruption.3164962557 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 558079961 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:45 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-9386a26b-aeca-4eb4-95fc-bf7d63d82d9f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3164962557 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 189.usbdev_tx_rx_disruption.3164962557 |
| Directory | /workspace/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/19.usbdev_alert_test.351320204 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 75127971 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:33:00 PM PDT 24 |
| Finished | Aug 12 06:33:01 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8ff0df0f-656f-433f-9c5e-fd2820ff075a |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=351320204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.351320204 |
| Directory | /workspace/19.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_disconnect.3572466736 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 3760001937 ps |
| CPU time | 5.45 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-6a3e3718-0624-4b22-bcd7-ca67b49de442 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3572466736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_a on_wake_disconnect.3572466736 |
| Directory | /workspace/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_reset.822956308 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 21408733000 ps |
| CPU time | 26.34 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:33:22 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-ba54e128-3316-4fb8-9fbb-84f3b8fa7de4 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=822956308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.822956308 |
| Directory | /workspace/19.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_resume.1553003448 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 29985904413 ps |
| CPU time | 34.08 seconds |
| Started | Aug 12 06:32:45 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-b481e084-3c08-416b-8e9f-eb875d06d269 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1553003448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_a on_wake_resume.1553003448 |
| Directory | /workspace/19.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/19.usbdev_av_buffer.195712339 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 183848372 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-0f3c1bc7-da96-493d-97a4-269834f58349 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19571 2339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_av_buffer.195712339 |
| Directory | /workspace/19.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/19.usbdev_bitstuff_err.2859697428 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 156943093 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:32:47 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-bc71316c-1195-44cf-83a9-57817548e263 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28596 97428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_bitstuff_err.2859697428 |
| Directory | /workspace/19.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_data_toggle_clear.1050766046 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 482035652 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:32:57 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-815d9a11-bd57-407c-aec5-adfcd5c823f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10507 66046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_clear.1050766046 |
| Directory | /workspace/19.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/19.usbdev_device_address.644447100 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 22617824955 ps |
| CPU time | 35.28 seconds |
| Started | Aug 12 06:32:37 PM PDT 24 |
| Finished | Aug 12 06:33:12 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-a177ff1f-550d-4e33-a8bb-a47ae94646e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64444 7100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.644447100 |
| Directory | /workspace/19.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/19.usbdev_device_timeout.4189169989 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 1321741620 ps |
| CPU time | 30.65 seconds |
| Started | Aug 12 06:32:44 PM PDT 24 |
| Finished | Aug 12 06:33:15 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-1139b495-cc45-43c7-b160-698625694025 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4189169989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.4189169989 |
| Directory | /workspace/19.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/19.usbdev_disable_endpoint.1544814141 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 880965099 ps |
| CPU time | 2.15 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:32:49 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-5febb54b-cbcf-42ef-81de-d22009468ae5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15448 14141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disable_endpoint.1544814141 |
| Directory | /workspace/19.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/19.usbdev_disconnected.2375600419 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 155747141 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:53 PM PDT 24 |
| Finished | Aug 12 06:32:54 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-61ca1cb1-3f25-4929-acf0-2088b8b62475 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23756 00419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disconnected.2375600419 |
| Directory | /workspace/19.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/19.usbdev_enable.3548554366 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 43716349 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:32:40 PM PDT 24 |
| Finished | Aug 12 06:32:40 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-b43adfa7-67ed-4771-9b80-4ceb476b9268 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35485 54366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_enable.3548554366 |
| Directory | /workspace/19.usbdev_enable/latest |
| Test location | /workspace/coverage/default/19.usbdev_endpoint_access.3525698501 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 934326507 ps |
| CPU time | 2.43 seconds |
| Started | Aug 12 06:32:47 PM PDT 24 |
| Finished | Aug 12 06:32:49 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-ee030aba-73e5-4b21-b30f-d76d3753f295 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35256 98501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.3525698501 |
| Directory | /workspace/19.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/19.usbdev_endpoint_types.1072287740 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 187675673 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:40 PM PDT 24 |
| Finished | Aug 12 06:32:41 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-af334003-1f57-4eba-a35b-164f12960933 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1072287740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.1072287740 |
| Directory | /workspace/19.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/19.usbdev_fifo_rst.992806820 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 351343379 ps |
| CPU time | 2.59 seconds |
| Started | Aug 12 06:32:39 PM PDT 24 |
| Finished | Aug 12 06:32:42 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-6fda5807-9805-4882-b58b-bd9f5116c44e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99280 6820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_fifo_rst.992806820 |
| Directory | /workspace/19.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_iso.592241852 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 234191516 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:32:59 PM PDT 24 |
| Finished | Aug 12 06:33:01 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-a8e2f71e-5910-42e6-96e3-f07443971d7d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=592241852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.592241852 |
| Directory | /workspace/19.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_stall.743812579 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 143736110 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:32:45 PM PDT 24 |
| Finished | Aug 12 06:32:46 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-021672cd-69f0-41f3-9925-b8cdf494750c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74381 2579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_stall.743812579 |
| Directory | /workspace/19.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_trans.3027975200 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 219821749 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:32:44 PM PDT 24 |
| Finished | Aug 12 06:32:45 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-6403c1b0-d8e9-4da5-9481-c4493bacf043 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30279 75200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_trans.3027975200 |
| Directory | /workspace/19.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_invalid_sync.1433995719 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 3850516953 ps |
| CPU time | 113.91 seconds |
| Started | Aug 12 06:32:34 PM PDT 24 |
| Finished | Aug 12 06:34:28 PM PDT 24 |
| Peak memory | 218324 kb |
| Host | smart-b749fa7e-a098-4069-b16b-052e3506ef63 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1433995719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.1433995719 |
| Directory | /workspace/19.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/19.usbdev_iso_retraction.1411772266 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 5287641384 ps |
| CPU time | 60.78 seconds |
| Started | Aug 12 06:32:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-1c8ab54c-a02e-45b3-85d3-22117f57a815 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1411772266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.1411772266 |
| Directory | /workspace/19.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_in_err.665537335 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 200292865 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:32:45 PM PDT 24 |
| Finished | Aug 12 06:32:46 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-f5261c07-2916-4367-bbe9-3ea3875f4c01 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66553 7335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_in_err.665537335 |
| Directory | /workspace/19.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_suspend.4192766333 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 11264856713 ps |
| CPU time | 14.77 seconds |
| Started | Aug 12 06:32:44 PM PDT 24 |
| Finished | Aug 12 06:32:59 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-5c4b71cd-9b05-480d-87ea-d47405c0a22c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41927 66333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_suspend.4192766333 |
| Directory | /workspace/19.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/19.usbdev_low_speed_traffic.2679054582 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 5200347012 ps |
| CPU time | 153.23 seconds |
| Started | Aug 12 06:32:58 PM PDT 24 |
| Finished | Aug 12 06:35:31 PM PDT 24 |
| Peak memory | 218484 kb |
| Host | smart-0d85704f-b5f4-403a-b277-6082949bc285 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2679054582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.2679054582 |
| Directory | /workspace/19.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_inter_pkt_delay.811618782 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 3415959093 ps |
| CPU time | 33.96 seconds |
| Started | Aug 12 06:32:43 PM PDT 24 |
| Finished | Aug 12 06:33:17 PM PDT 24 |
| Peak memory | 217804 kb |
| Host | smart-f2bdbb3f-540a-4f85-9750-5052a0594716 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=811618782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.811618782 |
| Directory | /workspace/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_length_in_transaction.3962960479 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 241317169 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:32:54 PM PDT 24 |
| Finished | Aug 12 06:32:55 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c2d0c184-5c2e-42b0-a21f-54ac5c56e80f |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3962960479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.3962960479 |
| Directory | /workspace/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_length_out_transaction.830574561 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 247864300 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:32:40 PM PDT 24 |
| Finished | Aug 12 06:32:41 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-0ea7aa64-0fdd-43fb-9496-e4cf7d4cb79e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83057 4561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.830574561 |
| Directory | /workspace/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_non_iso_usb_traffic.1661385071 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 2044737661 ps |
| CPU time | 16.19 seconds |
| Started | Aug 12 06:32:43 PM PDT 24 |
| Finished | Aug 12 06:32:59 PM PDT 24 |
| Peak memory | 217388 kb |
| Host | smart-5959c21b-6b55-4b92-b7e3-7d3691c89add |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16613 85071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1661385071 |
| Directory | /workspace/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_inter_pkt_delay.2957411487 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 3459399325 ps |
| CPU time | 100.43 seconds |
| Started | Aug 12 06:32:51 PM PDT 24 |
| Finished | Aug 12 06:34:31 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-72db12bd-5f4e-4d36-a0e1-942127887763 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2957411487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.2957411487 |
| Directory | /workspace/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_length_in_transaction.3749875362 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 176494793 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:32:47 PM PDT 24 |
| Finished | Aug 12 06:32:48 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-daf355ba-d8c7-4beb-a866-3388d6f6b7d1 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3749875362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.3749875362 |
| Directory | /workspace/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_length_out_transaction.3259808239 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 238261727 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-0c95ab67-57ca-4fc0-abaa-b1d7d94be9e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32598 08239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.3259808239 |
| Directory | /workspace/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_iso.866064395 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 181397414 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:32:41 PM PDT 24 |
| Finished | Aug 12 06:32:42 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-9971329e-9a32-42a9-9899-7442fc3c6aa2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86606 4395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_iso.866064395 |
| Directory | /workspace/19.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_stall.1597401798 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 158141433 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-980fbc07-0512-4d93-ba30-4214cd8b4530 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15974 01798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_stall.1597401798 |
| Directory | /workspace/19.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_trans_nak.2189586528 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 226961637 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3e921c3d-a6a7-425e-ab65-b35fc879a62e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21895 86528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_trans_nak.2189586528 |
| Directory | /workspace/19.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/19.usbdev_pending_in_trans.2985201852 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 176505271 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-fa05953f-dc2d-4a1c-b295-bd59a76cd815 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29852 01852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pending_in_trans.2985201852 |
| Directory | /workspace/19.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_config_pinflip.1252364303 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 223626476 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:32:53 PM PDT 24 |
| Finished | Aug 12 06:32:54 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-7624e978-e420-40cc-a857-c6fec6bb1a29 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1252364303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.1252364303 |
| Directory | /workspace/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_config_usb_ref_disable.2493100363 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 154441039 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-67edea2c-4eeb-477d-aeea-9849aa00bcd0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24931 00363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.2493100363 |
| Directory | /workspace/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_pins_sense.2180206118 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 33588020 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9e5e7a93-92b9-4d48-99b8-758c014b210a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21802 06118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2180206118 |
| Directory | /workspace/19.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_buffer.1329778258 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 23145279605 ps |
| CPU time | 59.74 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:33:46 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-85f160c5-c67f-4234-9c28-9a01f704db97 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13297 78258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_buffer.1329778258 |
| Directory | /workspace/19.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_received.1168623193 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 194365082 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:32:44 PM PDT 24 |
| Finished | Aug 12 06:32:45 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7148c2f6-11da-4251-a83b-ec07d1524497 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11686 23193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_received.1168623193 |
| Directory | /workspace/19.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_sent.1293181809 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 280673027 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:32:48 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-99386b45-b7d6-4fc4-8cb0-1aab2ce14404 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12931 81809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_sent.1293181809 |
| Directory | /workspace/19.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/19.usbdev_random_length_in_transaction.3339149090 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 191678114 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:32:47 PM PDT 24 |
| Finished | Aug 12 06:32:48 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-a8a9ec6e-afd1-4148-a666-b647dbc477c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33391 49090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_in_transaction.3339149090 |
| Directory | /workspace/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_random_length_out_transaction.2749827931 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 156834636 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:32:57 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-0465acfc-6928-4658-87d7-7f46de6c50ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27498 27931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.2749827931 |
| Directory | /workspace/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_resume_link_active.3611851672 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 20202940385 ps |
| CPU time | 23.61 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-ef95e5e2-a1a4-4768-85a2-eb9aad167b2c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36118 51672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_resume_link_active.3611851672 |
| Directory | /workspace/19.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/19.usbdev_rx_crc_err.125962655 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 140631396 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:32:50 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-8f8bc839-228b-4103-b21e-002a4863a5f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12596 2655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_rx_crc_err.125962655 |
| Directory | /workspace/19.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_rx_full.3815197648 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 264045319 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:32:43 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d596cf62-d552-4129-ba53-b1536b59c920 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38151 97648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_rx_full.3815197648 |
| Directory | /workspace/19.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/19.usbdev_setup_stage.1699141573 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 218536007 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:32:56 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-ad8c9ea1-d9cb-429c-8990-96a834bc25c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16991 41573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_setup_stage.1699141573 |
| Directory | /workspace/19.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/19.usbdev_setup_trans_ignored.698898579 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 150897318 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:32:45 PM PDT 24 |
| Finished | Aug 12 06:32:46 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d32a8628-9540-4f7e-902f-c442fff61823 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69889 8579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_setup_trans_ignored.698898579 |
| Directory | /workspace/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/19.usbdev_smoke.82715138 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 233664406 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:32:43 PM PDT 24 |
| Finished | Aug 12 06:32:45 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-cf32fa4c-a307-4b7d-876d-dc9fb8a05d61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82715 138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /works pace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.82715138 |
| Directory | /workspace/19.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/19.usbdev_spurious_pids_ignored.2288872214 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 2850097806 ps |
| CPU time | 88.55 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:34:11 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-bbf75868-fd39-4196-860e-64da05b02214 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2288872214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.2288872214 |
| Directory | /workspace/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/19.usbdev_stall_priority_over_nak.615827966 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 175147430 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:32:59 PM PDT 24 |
| Finished | Aug 12 06:33:01 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-857b0222-c6fd-49f4-913d-5b043e33c642 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61582 7966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.615827966 |
| Directory | /workspace/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/19.usbdev_stall_trans.1951660532 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 193085035 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-69dc5764-2047-4e80-bb6e-d9556e7f2cf3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19516 60532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_trans.1951660532 |
| Directory | /workspace/19.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_stream_len_max.3941003300 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 1134189304 ps |
| CPU time | 2.92 seconds |
| Started | Aug 12 06:32:51 PM PDT 24 |
| Finished | Aug 12 06:32:54 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-1c0f3b85-7caf-404d-913a-4c1c2a4439f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39410 03300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.3941003300 |
| Directory | /workspace/19.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/19.usbdev_streaming_out.1123291210 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 3734238699 ps |
| CPU time | 35.67 seconds |
| Started | Aug 12 06:32:59 PM PDT 24 |
| Finished | Aug 12 06:33:40 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-8c03bc9b-6c36-4796-9e05-23dba40c5e2d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11232 91210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_streaming_out.1123291210 |
| Directory | /workspace/19.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/19.usbdev_timeout_missing_host_handshake.3903798088 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 1477807732 ps |
| CPU time | 32.96 seconds |
| Started | Aug 12 06:32:42 PM PDT 24 |
| Finished | Aug 12 06:33:15 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-a9804b28-6c7e-484d-b891-80fe577f81ce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3903798088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_hos t_handshake.3903798088 |
| Directory | /workspace/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/19.usbdev_tx_rx_disruption.316197649 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 458132309 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:32:47 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-a5ddda56-bdf7-4b92-891a-19467755ef42 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=316197649 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 19.usbdev_tx_rx_disruption.316197649 |
| Directory | /workspace/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/190.usbdev_endpoint_types.2479206667 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 372515039 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:37:55 PM PDT 24 |
| Finished | Aug 12 06:37:56 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-5dc4c133-8eb7-4783-bf3c-4fc121890db4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2479206667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.2479206667 |
| Directory | /workspace/190.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/190.usbdev_tx_rx_disruption.2739191826 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 562892784 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5ebfe481-2078-42d4-b75b-51c338fbd74e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2739191826 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 190.usbdev_tx_rx_disruption.2739191826 |
| Directory | /workspace/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/191.usbdev_endpoint_types.1471440443 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 292124909 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-748b5c89-9f33-4fb0-aae8-7e1848b68596 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1471440443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.1471440443 |
| Directory | /workspace/191.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/191.usbdev_tx_rx_disruption.2408380312 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 615484572 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-79bd2a31-4c24-48f6-bd77-b91a03e0f73b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2408380312 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 191.usbdev_tx_rx_disruption.2408380312 |
| Directory | /workspace/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/192.usbdev_endpoint_types.372445718 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 354940185 ps |
| CPU time | 1.23 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-ff3c4b36-c194-4324-be67-bef339fc56e9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=372445718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.372445718 |
| Directory | /workspace/192.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/192.usbdev_tx_rx_disruption.4195840402 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 584866680 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e31a5ba2-c156-4161-b0db-daa87e489015 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4195840402 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 192.usbdev_tx_rx_disruption.4195840402 |
| Directory | /workspace/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/193.usbdev_tx_rx_disruption.3433331762 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 476384227 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:34 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4e28c39f-abfa-4a5e-9346-f922c239f5cd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3433331762 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 193.usbdev_tx_rx_disruption.3433331762 |
| Directory | /workspace/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/194.usbdev_tx_rx_disruption.3554512490 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 444734299 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-59ab542b-d69a-4afe-aa55-6379806954c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3554512490 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 194.usbdev_tx_rx_disruption.3554512490 |
| Directory | /workspace/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/195.usbdev_tx_rx_disruption.3583704289 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 482333200 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:37:45 PM PDT 24 |
| Finished | Aug 12 06:37:47 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-3ba121f8-b684-4ead-81bb-fd0420210386 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3583704289 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 195.usbdev_tx_rx_disruption.3583704289 |
| Directory | /workspace/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/196.usbdev_endpoint_types.3428787315 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 619338174 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:29 PM PDT 24 |
| Finished | Aug 12 06:37:30 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-da406ce2-e332-4808-87df-fa769a6f43f9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3428787315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.3428787315 |
| Directory | /workspace/196.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/196.usbdev_tx_rx_disruption.1380368962 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 539943189 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-a8b1e0ab-c1bc-43ed-97e8-f57c7eed9879 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1380368962 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 196.usbdev_tx_rx_disruption.1380368962 |
| Directory | /workspace/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/197.usbdev_tx_rx_disruption.3714787661 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 568991155 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-f71acbb1-9ffe-4326-90a3-620dfa66205f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3714787661 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 197.usbdev_tx_rx_disruption.3714787661 |
| Directory | /workspace/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/198.usbdev_endpoint_types.488694630 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 270703548 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:37:58 PM PDT 24 |
| Finished | Aug 12 06:37:59 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-16c33cbb-e816-45d9-b8ef-a9142cd0fc5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=488694630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.488694630 |
| Directory | /workspace/198.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/198.usbdev_tx_rx_disruption.1624586265 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 645269061 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:44 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0895daf4-26c9-443c-92c9-f91d77538cd5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1624586265 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 198.usbdev_tx_rx_disruption.1624586265 |
| Directory | /workspace/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/199.usbdev_tx_rx_disruption.495091002 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 599334998 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-296e3050-c1d3-48e2-9ffb-40d2ff5decc8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=495091002 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 199.usbdev_tx_rx_disruption.495091002 |
| Directory | /workspace/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/2.usbdev_alert_test.1113957535 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 47612777 ps |
| CPU time | 0.65 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:28 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-22440541-b053-4077-adca-05175732cd33 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1113957535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.1113957535 |
| Directory | /workspace/2.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_disconnect.1444686707 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 9630932622 ps |
| CPU time | 14.85 seconds |
| Started | Aug 12 06:29:10 PM PDT 24 |
| Finished | Aug 12 06:29:25 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-95d9e950-a652-49af-adf9-7226f45074c1 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1444686707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_ao n_wake_disconnect.1444686707 |
| Directory | /workspace/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_reset.2951324465 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 20918610296 ps |
| CPU time | 25.91 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:37 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-8c317a64-6d4a-4dd4-afb9-e7deb031ce42 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2951324465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.2951324465 |
| Directory | /workspace/2.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_resume.1131389870 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 24013087275 ps |
| CPU time | 30.02 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:41 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-6957b2ee-a51c-4c20-87ae-38afdacb8c6f |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1131389870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_ao n_wake_resume.1131389870 |
| Directory | /workspace/2.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_buffer.2475032429 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 204224829 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:29:12 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-caf33276-9c9b-4a78-9beb-868fd1a7957a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24750 32429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_buffer.2475032429 |
| Directory | /workspace/2.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_overflow.2306374582 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 153681736 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:29:10 PM PDT 24 |
| Finished | Aug 12 06:29:11 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-8816b06a-90a5-4123-aeb3-6fcd26e12676 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23063 74582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_overflow.2306374582 |
| Directory | /workspace/2.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/2.usbdev_bitstuff_err.3769306964 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 203430235 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:29:14 PM PDT 24 |
| Finished | Aug 12 06:29:15 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-e281c2db-38be-420f-b8c4-28be1ceffd33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37693 06964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_bitstuff_err.3769306964 |
| Directory | /workspace/2.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_data_toggle_clear.655596662 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 416336450 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:29:10 PM PDT 24 |
| Finished | Aug 12 06:29:11 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-0bbfd45e-412f-40ff-8657-6ef5c2e9932d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65559 6662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_clear.655596662 |
| Directory | /workspace/2.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/2.usbdev_data_toggle_restore.3385815393 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 983601837 ps |
| CPU time | 2.86 seconds |
| Started | Aug 12 06:29:10 PM PDT 24 |
| Finished | Aug 12 06:29:13 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-d299405f-b78c-4308-acfe-ad8091c64e3e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3385815393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.3385815393 |
| Directory | /workspace/2.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/2.usbdev_device_address.1632138801 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 28816321943 ps |
| CPU time | 51.48 seconds |
| Started | Aug 12 06:29:13 PM PDT 24 |
| Finished | Aug 12 06:30:05 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-d909a817-d8c9-45f4-8b07-0048799e2edc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16321 38801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.1632138801 |
| Directory | /workspace/2.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/2.usbdev_device_timeout.1315056590 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 137337894 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:14 PM PDT 24 |
| Finished | Aug 12 06:29:15 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-57bfae24-bc90-4dfc-9cba-cfe2e485d8e9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1315056590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.1315056590 |
| Directory | /workspace/2.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/2.usbdev_disable_endpoint.4239834335 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 1097714785 ps |
| CPU time | 2.47 seconds |
| Started | Aug 12 06:29:10 PM PDT 24 |
| Finished | Aug 12 06:29:13 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-a4a6a20c-981a-4219-8a3c-ed0b7e51fcb2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42398 34335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disable_endpoint.4239834335 |
| Directory | /workspace/2.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/2.usbdev_disconnected.1895142136 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 162189212 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:29:13 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-36ee22c6-cf1c-435e-9636-a47024bf0529 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18951 42136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disconnected.1895142136 |
| Directory | /workspace/2.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/2.usbdev_enable.2257052600 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 36054619 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:12 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-59f41d07-d19b-4497-8375-755a5167d312 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22570 52600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_enable.2257052600 |
| Directory | /workspace/2.usbdev_enable/latest |
| Test location | /workspace/coverage/default/2.usbdev_endpoint_access.794353234 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 913105763 ps |
| CPU time | 2.54 seconds |
| Started | Aug 12 06:29:12 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-d1cb930d-d00e-4e81-ad23-47fa85005bd2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79435 3234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.794353234 |
| Directory | /workspace/2.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/2.usbdev_endpoint_types.4141918671 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 379696690 ps |
| CPU time | 1.3 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:12 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-410f0630-875e-442c-a934-181e30b7acb4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4141918671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.4141918671 |
| Directory | /workspace/2.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/2.usbdev_fifo_rst.1016154869 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 326752947 ps |
| CPU time | 2.44 seconds |
| Started | Aug 12 06:29:12 PM PDT 24 |
| Finished | Aug 12 06:29:15 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-34aa939b-e461-41d0-890b-f6b187e56812 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10161 54869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_fifo_rst.1016154869 |
| Directory | /workspace/2.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_hiclk_max.2218778467 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 93255718386 ps |
| CPU time | 157.36 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:31:48 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-d8e6946a-559f-4fab-84ac-f124d8878ff4 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2218778467 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk_max.2218778467 |
| Directory | /workspace/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_loclk.2211490995 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 93102010533 ps |
| CPU time | 145.85 seconds |
| Started | Aug 12 06:29:10 PM PDT 24 |
| Finished | Aug 12 06:31:36 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-f3252559-0ffa-40bd-9d0d-2df54ccb6d5a |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2211490995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.2211490995 |
| Directory | /workspace/2.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_loclk_max.413066299 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 82991487661 ps |
| CPU time | 139.05 seconds |
| Started | Aug 12 06:29:10 PM PDT 24 |
| Finished | Aug 12 06:31:29 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-671d4840-e84e-43bf-9f38-50ea310bc130 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=413066299 -assert no postproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspac e/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk_max.413066299 |
| Directory | /workspace/2.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_phase.3453262997 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 118195690566 ps |
| CPU time | 179.92 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:32:11 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-f30f95b3-8801-4bf5-ab0f-59f8a0c0882f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34532 62997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_phase.3453262997 |
| Directory | /workspace/2.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_iso.3265969122 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 233297575 ps |
| CPU time | 1.2 seconds |
| Started | Aug 12 06:29:13 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-94c0aa37-0c8f-4be5-9ee3-5bbf657bde3e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3265969122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.3265969122 |
| Directory | /workspace/2.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_stall.3663074422 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 142284690 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:29:13 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-e3a6d5e3-3991-4479-a172-e674e2a25f26 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36630 74422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_stall.3663074422 |
| Directory | /workspace/2.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_trans.4286388331 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 285689914 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:13 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-42482606-c962-40bd-b151-22ab8d97484d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42863 88331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_trans.4286388331 |
| Directory | /workspace/2.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_invalid_sync.1834277876 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 4474987874 ps |
| CPU time | 135.27 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:31:27 PM PDT 24 |
| Peak memory | 217052 kb |
| Host | smart-d666f1ee-c84c-408a-9775-438eefea110a |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1834277876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.1834277876 |
| Directory | /workspace/2.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/2.usbdev_iso_retraction.1293606455 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 10216529181 ps |
| CPU time | 75.06 seconds |
| Started | Aug 12 06:29:13 PM PDT 24 |
| Finished | Aug 12 06:30:28 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-1500dfd2-af68-4573-86e8-7ec3eb7bf6a5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1293606455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.1293606455 |
| Directory | /workspace/2.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_in_err.4075569474 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 245935130 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:12 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-a75a7d95-7085-48ab-8d35-b6159c6a7fe6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40755 69474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_in_err.4075569474 |
| Directory | /workspace/2.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_resume.577275105 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 8697688131 ps |
| CPU time | 11.54 seconds |
| Started | Aug 12 06:29:12 PM PDT 24 |
| Finished | Aug 12 06:29:24 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-71396d6e-b415-4abb-9973-893cc5e1d5b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57727 5105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_resume.577275105 |
| Directory | /workspace/2.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_suspend.1968757343 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 10083378862 ps |
| CPU time | 16.1 seconds |
| Started | Aug 12 06:29:10 PM PDT 24 |
| Finished | Aug 12 06:29:26 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-fc2312c3-8d58-49d9-b436-a814bfb0286b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19687 57343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_suspend.1968757343 |
| Directory | /workspace/2.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/2.usbdev_low_speed_traffic.1867707250 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 3612569134 ps |
| CPU time | 111.09 seconds |
| Started | Aug 12 06:29:13 PM PDT 24 |
| Finished | Aug 12 06:31:04 PM PDT 24 |
| Peak memory | 218300 kb |
| Host | smart-692b22ce-75da-4f73-8584-8f8bcd4001a4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1867707250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.1867707250 |
| Directory | /workspace/2.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_inter_pkt_delay.3905178101 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 3315156884 ps |
| CPU time | 100.11 seconds |
| Started | Aug 12 06:29:18 PM PDT 24 |
| Finished | Aug 12 06:30:58 PM PDT 24 |
| Peak memory | 217268 kb |
| Host | smart-6766075e-52f6-43ad-9eee-d739b669a2eb |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3905178101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.3905178101 |
| Directory | /workspace/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_length_in_transaction.1113773272 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 243302692 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:29:12 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ff4c566f-c86f-4528-95e4-a6542142cf50 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1113773272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.1113773272 |
| Directory | /workspace/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_length_out_transaction.3234163375 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 232216909 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:29:12 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-816f922b-65a8-4262-909d-c0b45b4bfbe8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32341 63375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.3234163375 |
| Directory | /workspace/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_non_iso_usb_traffic.1953070232 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 2669154904 ps |
| CPU time | 25.48 seconds |
| Started | Aug 12 06:29:11 PM PDT 24 |
| Finished | Aug 12 06:29:36 PM PDT 24 |
| Peak memory | 217936 kb |
| Host | smart-a03910cc-601c-4c93-92e0-ff3a2809c244 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19530 70232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.1953070232 |
| Directory | /workspace/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_usb_traffic.4048847378 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 3222841544 ps |
| CPU time | 101.47 seconds |
| Started | Aug 12 06:29:13 PM PDT 24 |
| Finished | Aug 12 06:30:55 PM PDT 24 |
| Peak memory | 217564 kb |
| Host | smart-572a1502-65c8-4718-9453-d383ac6fa5b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4048847378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.4048847378 |
| Directory | /workspace/2.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_inter_pkt_delay.3864049212 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 3751031255 ps |
| CPU time | 29.23 seconds |
| Started | Aug 12 06:29:12 PM PDT 24 |
| Finished | Aug 12 06:29:41 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-bac1edc3-ae8f-4fb9-9c5b-a8669b64591d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3864049212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.3864049212 |
| Directory | /workspace/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_length_in_transaction.3491522048 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 163274057 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:13 PM PDT 24 |
| Finished | Aug 12 06:29:14 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-b3170690-5e3f-4f75-9690-59710fe8e478 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3491522048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.3491522048 |
| Directory | /workspace/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_length_out_transaction.2386243132 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 148984453 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:29:18 PM PDT 24 |
| Finished | Aug 12 06:29:19 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-08020b62-a98c-4522-ac4d-85cbded5065e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23862 43132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.2386243132 |
| Directory | /workspace/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_nak_trans.79239224 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 190417578 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-b50c2119-67fa-4a41-b753-9f36b82260f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79239 224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_nak_trans.79239224 |
| Directory | /workspace/2.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_iso.4168001029 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 185778584 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:29:18 PM PDT 24 |
| Finished | Aug 12 06:29:19 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-e491cffa-2720-497d-8574-992295730e81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41680 01029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_iso.4168001029 |
| Directory | /workspace/2.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_stall.89936861 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 165915542 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:29:20 PM PDT 24 |
| Finished | Aug 12 06:29:21 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-775a6fad-a6a0-40b8-85e3-bc798efb0201 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89936 861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_stall.89936861 |
| Directory | /workspace/2.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_trans_nak.2301834430 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 179818757 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-58fc1770-3e5b-41b8-a8e8-b47c06f3a36a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23018 34430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_trans_nak.2301834430 |
| Directory | /workspace/2.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/2.usbdev_pending_in_trans.1183188077 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 149289364 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:29:21 PM PDT 24 |
| Finished | Aug 12 06:29:22 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-2a758b5b-b704-4ce3-8ae5-f05a79872dec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11831 88077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pending_in_trans.1183188077 |
| Directory | /workspace/2.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_pinflip.998039719 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 252447872 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-81395ffb-dc87-4a10-80a5-1cb99086f180 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=998039719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.998039719 |
| Directory | /workspace/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_rand_bus_type.2013619313 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 184755095 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:29:20 PM PDT 24 |
| Finished | Aug 12 06:29:21 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d61f0394-60e1-4db9-9a07-745e048eb7ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20136 19313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.2013619313 |
| Directory | /workspace/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_usb_ref_disable.3860920325 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 149802718 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-18334493-2763-4901-9fea-8019e396fc7f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38609 20325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.3860920325 |
| Directory | /workspace/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_buffer.3430983852 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 16266141866 ps |
| CPU time | 42.72 seconds |
| Started | Aug 12 06:29:18 PM PDT 24 |
| Finished | Aug 12 06:30:01 PM PDT 24 |
| Peak memory | 220344 kb |
| Host | smart-840231ad-24aa-4106-b997-56dd2234aedc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34309 83852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_buffer.3430983852 |
| Directory | /workspace/2.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_received.1263175501 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 154574258 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:29:21 PM PDT 24 |
| Finished | Aug 12 06:29:22 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-2938e758-7a35-4aeb-9c45-f7f127abe291 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12631 75501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_received.1263175501 |
| Directory | /workspace/2.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_sent.2106432436 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 237646330 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:29:21 PM PDT 24 |
| Finished | Aug 12 06:29:22 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-b68645d5-e9ee-49e5-a51e-93b2cd987513 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21064 32436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_sent.2106432436 |
| Directory | /workspace/2.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_bus_disconnects.1154863904 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 12860461654 ps |
| CPU time | 81.15 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 218748 kb |
| Host | smart-d901bf23-9bf8-4604-a9e8-a4060cd2ffc0 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1154863904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.1154863904 |
| Directory | /workspace/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_bus_resets.271038967 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 5751892957 ps |
| CPU time | 18.75 seconds |
| Started | Aug 12 06:29:20 PM PDT 24 |
| Finished | Aug 12 06:29:39 PM PDT 24 |
| Peak memory | 218920 kb |
| Host | smart-5e785ccf-2772-452b-a1e5-4aae9b6aa2b9 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=271038967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.271038967 |
| Directory | /workspace/2.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_suspends.174834358 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 12438548995 ps |
| CPU time | 70.25 seconds |
| Started | Aug 12 06:29:18 PM PDT 24 |
| Finished | Aug 12 06:30:29 PM PDT 24 |
| Peak memory | 224144 kb |
| Host | smart-219b06ab-0c69-4570-83ae-35b253b4d444 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=174834358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.174834358 |
| Directory | /workspace/2.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/2.usbdev_random_length_in_transaction.404131310 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 177058041 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-e08c9125-1f02-4d90-829a-87e1dc577e78 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40413 1310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_in_transaction.404131310 |
| Directory | /workspace/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_random_length_out_transaction.2198593274 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 156075764 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:29:25 PM PDT 24 |
| Finished | Aug 12 06:29:26 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-73a387d7-6684-4e38-9267-45e5d5c6d6c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21985 93274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.2198593274 |
| Directory | /workspace/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_resume_link_active.1380971471 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 20162597525 ps |
| CPU time | 24.34 seconds |
| Started | Aug 12 06:29:20 PM PDT 24 |
| Finished | Aug 12 06:29:44 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-07bf8636-8025-405d-90d6-e41903d20b0c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13809 71471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_resume_link_active.1380971471 |
| Directory | /workspace/2.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_crc_err.4218065836 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 141983657 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:29:17 PM PDT 24 |
| Finished | Aug 12 06:29:18 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-4527e378-6446-4163-857f-f8b637ba9926 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42180 65836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_crc_err.4218065836 |
| Directory | /workspace/2.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_full.622172197 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 398772952 ps |
| CPU time | 1.33 seconds |
| Started | Aug 12 06:29:20 PM PDT 24 |
| Finished | Aug 12 06:29:21 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-cea9fe90-a94f-4c16-9efb-f023d267798c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62217 2197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_full.622172197 |
| Directory | /workspace/2.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_pid_err.3102952844 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 196085957 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:29:20 PM PDT 24 |
| Finished | Aug 12 06:29:21 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-1947489d-d3ba-4d22-a610-b2350c055d2c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31029 52844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_pid_err.3102952844 |
| Directory | /workspace/2.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_sec_cm.2134922664 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 1920450823 ps |
| CPU time | 2.7 seconds |
| Started | Aug 12 06:29:26 PM PDT 24 |
| Finished | Aug 12 06:29:29 PM PDT 24 |
| Peak memory | 224380 kb |
| Host | smart-3ae092c5-5ff9-4ed4-8563-c8eb0db238e9 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2134922664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.2134922664 |
| Directory | /workspace/2.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_priority.2956628411 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 381182562 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:29:25 PM PDT 24 |
| Finished | Aug 12 06:29:26 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-b55b4f49-041e-42c3-b7d6-696993ad4e4f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29566 28411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.2956628411 |
| Directory | /workspace/2.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_priority_over_stall_response.4254396714 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 177458455 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:29:20 PM PDT 24 |
| Finished | Aug 12 06:29:21 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6538a780-d68c-49ef-969b-6372461cdd51 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42543 96714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.4254396714 |
| Directory | /workspace/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_stage.3805315311 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 203881495 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:21 PM PDT 24 |
| Finished | Aug 12 06:29:22 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-f5cd4fc1-805f-4576-a063-2c0f0e1309fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38053 15311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_stage.3805315311 |
| Directory | /workspace/2.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_trans_ignored.4084421641 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 154515452 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:29:18 PM PDT 24 |
| Finished | Aug 12 06:29:19 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-94862af9-debb-4484-85a2-95b16f3d7cec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40844 21641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_trans_ignored.4084421641 |
| Directory | /workspace/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/2.usbdev_smoke.3826495514 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 249117297 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-b61180aa-a9a7-4cc7-ac39-ee337c5948f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38264 95514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.3826495514 |
| Directory | /workspace/2.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/2.usbdev_spurious_pids_ignored.2642696112 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 2465988188 ps |
| CPU time | 71.45 seconds |
| Started | Aug 12 06:29:25 PM PDT 24 |
| Finished | Aug 12 06:30:36 PM PDT 24 |
| Peak memory | 217808 kb |
| Host | smart-e7a40855-711e-4324-866d-167dbee5b725 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2642696112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.2642696112 |
| Directory | /workspace/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/2.usbdev_stall_priority_over_nak.6810774 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 167018291 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:18 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c80b82fa-ceba-497b-aadd-48fa6e05c3af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68107 74 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asse rt -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.6810774 |
| Directory | /workspace/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/2.usbdev_stall_trans.977151115 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 188470882 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:29:20 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ea5f99e2-7f5a-400f-bb97-6976379e4a2a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97715 1115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_trans.977151115 |
| Directory | /workspace/2.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_stream_len_max.1443360401 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 518477280 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:29:17 PM PDT 24 |
| Finished | Aug 12 06:29:19 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d7013396-6d8d-4d6b-9403-acee5a196bbe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14433 60401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.1443360401 |
| Directory | /workspace/2.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/2.usbdev_streaming_out.1371184758 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 3579848565 ps |
| CPU time | 104.55 seconds |
| Started | Aug 12 06:29:19 PM PDT 24 |
| Finished | Aug 12 06:31:04 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-c8ab5e4b-9655-4110-8b2f-561cf517f50d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13711 84758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_streaming_out.1371184758 |
| Directory | /workspace/2.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/2.usbdev_timeout_missing_host_handshake.1697974573 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 301800864 ps |
| CPU time | 4.48 seconds |
| Started | Aug 12 06:29:12 PM PDT 24 |
| Finished | Aug 12 06:29:16 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-2a8ffbd0-1261-4303-9d27-46c3b3778613 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1697974573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host _handshake.1697974573 |
| Directory | /workspace/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/2.usbdev_tx_rx_disruption.4049502876 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 587631184 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:29 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-720efc3d-1923-4150-9945-2eeb299f47ce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4049502876 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_tx_rx_disruption.4049502876 |
| Directory | /workspace/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/20.usbdev_alert_test.3802087962 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 95762527 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-aba6e781-e2a9-407d-a641-da1f8722956a |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3802087962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.3802087962 |
| Directory | /workspace/20.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_disconnect.3912235076 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 11779805914 ps |
| CPU time | 15.43 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:33:01 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-1e49b417-2f05-412a-9b29-d41c8fa3d59a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3912235076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_a on_wake_disconnect.3912235076 |
| Directory | /workspace/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_reset.2190637972 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 15412036135 ps |
| CPU time | 19.59 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:22 PM PDT 24 |
| Peak memory | 215832 kb |
| Host | smart-3514ec81-1e7d-445f-8b18-9c3100bac485 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2190637972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.2190637972 |
| Directory | /workspace/20.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_resume.1794766465 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 31096143141 ps |
| CPU time | 39.89 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:33:35 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-b044f692-51d6-402b-b1de-f98e87cc0a51 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1794766465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_a on_wake_resume.1794766465 |
| Directory | /workspace/20.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/20.usbdev_av_buffer.4107104338 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 150391416 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:32:54 PM PDT 24 |
| Finished | Aug 12 06:32:55 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9b8a6b44-8b4f-47cc-96ce-25c3b9a30f84 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41071 04338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_av_buffer.4107104338 |
| Directory | /workspace/20.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/20.usbdev_bitstuff_err.2496856605 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 147919342 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-51fab308-67c7-48b1-a9e7-ba33ecd6859b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24968 56605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_bitstuff_err.2496856605 |
| Directory | /workspace/20.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_data_toggle_clear.549825234 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 472573176 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-61e4b04f-52c5-47d6-994c-b532dac596f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54982 5234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_clear.549825234 |
| Directory | /workspace/20.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/20.usbdev_data_toggle_restore.594055689 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 522103447 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:33:01 PM PDT 24 |
| Finished | Aug 12 06:33:02 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-88ee5a41-3f3d-4a94-9101-c4c7885f4eef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=594055689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.594055689 |
| Directory | /workspace/20.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/20.usbdev_device_address.2911830279 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 21719111962 ps |
| CPU time | 32.88 seconds |
| Started | Aug 12 06:32:46 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-08828dc8-ecac-4b14-a5bb-a9ee8babd807 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29118 30279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.2911830279 |
| Directory | /workspace/20.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/20.usbdev_device_timeout.2558657511 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 1413928946 ps |
| CPU time | 33.63 seconds |
| Started | Aug 12 06:32:52 PM PDT 24 |
| Finished | Aug 12 06:33:25 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-40abf1b9-25dd-43da-b997-a8bdb0a3f457 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2558657511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.2558657511 |
| Directory | /workspace/20.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/20.usbdev_disable_endpoint.2335733807 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 725470390 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:32:47 PM PDT 24 |
| Finished | Aug 12 06:32:49 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-8816a926-03cb-4b71-811f-e0cb287d3e36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23357 33807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disable_endpoint.2335733807 |
| Directory | /workspace/20.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/20.usbdev_disconnected.693241628 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 155667985 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:33:01 PM PDT 24 |
| Finished | Aug 12 06:33:02 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d579ced8-d280-4f48-a207-932437c40829 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69324 1628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disconnected.693241628 |
| Directory | /workspace/20.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/20.usbdev_enable.4169968827 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 91958828 ps |
| CPU time | 0.77 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:49 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e9595c1f-55bd-46cb-bfa5-7eef47eeee30 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41699 68827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_enable.4169968827 |
| Directory | /workspace/20.usbdev_enable/latest |
| Test location | /workspace/coverage/default/20.usbdev_endpoint_access.4246207840 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 728357355 ps |
| CPU time | 1.97 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-e079a2bb-54a1-439f-bb97-1b1ca7a8d9dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42462 07840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.4246207840 |
| Directory | /workspace/20.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/20.usbdev_endpoint_types.3156935855 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 560251054 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:32:57 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-15e7601f-25af-4944-88dc-47587027a106 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3156935855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.3156935855 |
| Directory | /workspace/20.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/20.usbdev_fifo_rst.1245522059 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 332286594 ps |
| CPU time | 2.29 seconds |
| Started | Aug 12 06:32:48 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-442a1755-a11a-4746-b85c-bd1aff9a1a33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12455 22059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_fifo_rst.1245522059 |
| Directory | /workspace/20.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_iso.1840454863 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 151557466 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:32:50 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4f585fd3-3d2d-44ef-b53c-7bc761815eb2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1840454863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.1840454863 |
| Directory | /workspace/20.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_stall.3125213178 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 168442885 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-e3dcbe0a-3086-4c41-a2c2-96fba4f3868e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31252 13178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_stall.3125213178 |
| Directory | /workspace/20.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_trans.3156575611 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 240336205 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-323e04f3-e053-4031-9156-2ca2dcf7a347 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31565 75611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_trans.3156575611 |
| Directory | /workspace/20.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_invalid_sync.1574585731 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 3883262893 ps |
| CPU time | 109.87 seconds |
| Started | Aug 12 06:32:44 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 218384 kb |
| Host | smart-17d8d2d8-24f8-4f5e-8620-e688e4e67864 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1574585731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.1574585731 |
| Directory | /workspace/20.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/20.usbdev_iso_retraction.3193387098 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 9210330470 ps |
| CPU time | 68.85 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:34:11 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-7eb059af-013c-4bba-9572-bbd25107c497 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3193387098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.3193387098 |
| Directory | /workspace/20.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_in_err.2951339071 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 171481585 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:32:57 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-cd46c582-425b-4f2d-88f1-ac2708d2423d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29513 39071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_in_err.2951339071 |
| Directory | /workspace/20.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_resume.2915002107 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 7441695772 ps |
| CPU time | 11.62 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-4c5cec1c-4582-4a1f-a030-532181ea80ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29150 02107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_resume.2915002107 |
| Directory | /workspace/20.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_suspend.1133926995 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 10536200301 ps |
| CPU time | 15.43 seconds |
| Started | Aug 12 06:32:54 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-77e0b520-717b-4de5-b9e1-7f1b9ea6fdc8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11339 26995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_suspend.1133926995 |
| Directory | /workspace/20.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/20.usbdev_low_speed_traffic.2795850418 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 2705469310 ps |
| CPU time | 79.92 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:34:25 PM PDT 24 |
| Peak memory | 218284 kb |
| Host | smart-e7981acd-46bb-40fe-8900-b885f8155ad1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2795850418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.2795850418 |
| Directory | /workspace/20.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_inter_pkt_delay.123863839 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 2127740879 ps |
| CPU time | 22.72 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 224028 kb |
| Host | smart-a566d6c5-a34b-4155-bab3-278549e0c243 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=123863839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.123863839 |
| Directory | /workspace/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_length_in_transaction.1564654891 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 256075009 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:32:57 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a206fc29-8a20-43e7-bb29-1c16e169dfcf |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1564654891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.1564654891 |
| Directory | /workspace/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_length_out_transaction.1034116291 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 193042450 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-a7a0b785-556d-421f-9c2c-3d88ef7f8543 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10341 16291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.1034116291 |
| Directory | /workspace/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_non_iso_usb_traffic.4201913411 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 2024569246 ps |
| CPU time | 56.76 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 215748 kb |
| Host | smart-fbdc4e24-07d0-450b-891b-afdc5bf695f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42019 13411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.4201913411 |
| Directory | /workspace/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_inter_pkt_delay.3464854753 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 2746919478 ps |
| CPU time | 21.61 seconds |
| Started | Aug 12 06:32:51 PM PDT 24 |
| Finished | Aug 12 06:33:13 PM PDT 24 |
| Peak memory | 215828 kb |
| Host | smart-33051537-554e-428a-b615-62544695241e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3464854753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.3464854753 |
| Directory | /workspace/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_length_in_transaction.4063723204 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 171787366 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:32:56 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-afddd074-f7ec-445b-af09-c983b2d7398a |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4063723204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.4063723204 |
| Directory | /workspace/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_length_out_transaction.1440715026 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 161227315 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-666536b3-79a8-46a1-9371-d23f3a1a719b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14407 15026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.1440715026 |
| Directory | /workspace/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_iso.3305627336 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 206248979 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:47 PM PDT 24 |
| Finished | Aug 12 06:32:48 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-59de7558-5d4e-4d0b-b699-9a47c96d21c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33056 27336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_iso.3305627336 |
| Directory | /workspace/20.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_stall.3177108526 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 195867655 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:33:06 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-5f14d90f-1adc-4667-8536-d5f2e2fe064c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31771 08526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_stall.3177108526 |
| Directory | /workspace/20.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_trans_nak.3200645696 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 161768106 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:45 PM PDT 24 |
| Finished | Aug 12 06:32:46 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6ab880a7-ea12-47ca-aa62-55bf72dfd66b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32006 45696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_trans_nak.3200645696 |
| Directory | /workspace/20.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/20.usbdev_pending_in_trans.2934923098 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 156556745 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:09 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-79364744-9437-4972-9d67-f20d5a21ce4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29349 23098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pending_in_trans.2934923098 |
| Directory | /workspace/20.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_config_pinflip.4011418576 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 218339728 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:04 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d8d5e936-3300-4585-814c-212ce41a787b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4011418576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.4011418576 |
| Directory | /workspace/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_config_usb_ref_disable.3731282428 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 191677736 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-61ba8b72-d69a-4323-a3c9-bad110ca697c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37312 82428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.3731282428 |
| Directory | /workspace/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_pins_sense.2667477392 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 42963527 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9dab139c-4f88-4d7c-ba82-7cabb77595b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26674 77392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.2667477392 |
| Directory | /workspace/20.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_received.2151533520 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 181912491 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:32:53 PM PDT 24 |
| Finished | Aug 12 06:32:54 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f27ee4e3-999a-4055-91f6-2e0712665830 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21515 33520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_received.2151533520 |
| Directory | /workspace/20.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_sent.4193352608 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 272001457 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-3e0c6968-5f8e-4bfd-9478-4e77ca7ef873 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41933 52608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_sent.4193352608 |
| Directory | /workspace/20.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/20.usbdev_random_length_in_transaction.689294069 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 184385878 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:32:57 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-fcc8ede3-34bc-4f71-bf1e-06ff9f30ae4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68929 4069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_in_transaction.689294069 |
| Directory | /workspace/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_random_length_out_transaction.1351281286 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 182656870 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:32:48 PM PDT 24 |
| Finished | Aug 12 06:32:49 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-4e3ad9de-20e8-461f-ad96-eaad36e8e4cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13512 81286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.1351281286 |
| Directory | /workspace/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_rx_crc_err.1167461290 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 188468834 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:32:57 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-0f93541e-2132-4d14-99ed-ea2c8a077da0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11674 61290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_rx_crc_err.1167461290 |
| Directory | /workspace/20.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_rx_full.218820774 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 266662718 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-2e3f39c3-7a68-482b-b442-55c1adcb7383 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21882 0774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_rx_full.218820774 |
| Directory | /workspace/20.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/20.usbdev_setup_stage.1409943753 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 150400269 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:33:01 PM PDT 24 |
| Finished | Aug 12 06:33:02 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-9888626f-5a8f-4031-b42e-21d83ff74e1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14099 43753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_setup_stage.1409943753 |
| Directory | /workspace/20.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/20.usbdev_setup_trans_ignored.2316529470 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 152675722 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:33:00 PM PDT 24 |
| Finished | Aug 12 06:33:01 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4ef41ddb-0e7c-4ea4-8e13-b9234824a71f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23165 29470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_setup_trans_ignored.2316529470 |
| Directory | /workspace/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/20.usbdev_smoke.3319093999 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 214479379 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:04 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-922dbbad-948b-4ee0-8575-3e4d37f769a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33190 93999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.3319093999 |
| Directory | /workspace/20.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/20.usbdev_spurious_pids_ignored.3248733828 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 3621658718 ps |
| CPU time | 105.87 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:34:42 PM PDT 24 |
| Peak memory | 217636 kb |
| Host | smart-54f50303-721c-4bf0-8524-d399286cb694 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3248733828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.3248733828 |
| Directory | /workspace/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/20.usbdev_stall_priority_over_nak.471463735 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 181775690 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:33:06 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-5eb52e7b-89ea-42b4-8aa1-1501627a47b7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47146 3735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.471463735 |
| Directory | /workspace/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/20.usbdev_stall_trans.2386846279 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 151234905 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:33:14 PM PDT 24 |
| Finished | Aug 12 06:33:15 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-a1e28088-62c2-427c-a957-ddd71b00ec25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23868 46279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_trans.2386846279 |
| Directory | /workspace/20.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_stream_len_max.1838410013 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 1069664071 ps |
| CPU time | 2.62 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:59 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-9c66926b-2ff1-4a39-9138-0cbfbf0a1c57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18384 10013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.1838410013 |
| Directory | /workspace/20.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/20.usbdev_streaming_out.2854683134 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 3287273968 ps |
| CPU time | 25.15 seconds |
| Started | Aug 12 06:33:06 PM PDT 24 |
| Finished | Aug 12 06:33:32 PM PDT 24 |
| Peak memory | 217728 kb |
| Host | smart-7e9fe5fe-10d9-4743-8e8a-61284e575e16 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28546 83134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_streaming_out.2854683134 |
| Directory | /workspace/20.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/20.usbdev_timeout_missing_host_handshake.1722294926 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 1831477836 ps |
| CPU time | 45.41 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:33:42 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-eaede1b2-9699-4434-8577-878f66257e38 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1722294926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_hos t_handshake.1722294926 |
| Directory | /workspace/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/20.usbdev_tx_rx_disruption.3410138925 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 588153052 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:04 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-98c109dc-1917-4085-be3b-71451187cef1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3410138925 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_tx_rx_disruption.3410138925 |
| Directory | /workspace/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/200.usbdev_tx_rx_disruption.189671501 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 635209073 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 06:37:34 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-c916d1db-86d2-4c1d-8156-d31fd4b3dbc5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=189671501 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 200.usbdev_tx_rx_disruption.189671501 |
| Directory | /workspace/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/201.usbdev_tx_rx_disruption.58515319 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 537445057 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:38:04 PM PDT 24 |
| Finished | Aug 12 06:38:06 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-f55abb61-ce8f-4055-bd9b-040ca985b4bf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58515319 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 201.usbdev_tx_rx_disruption.58515319 |
| Directory | /workspace/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/202.usbdev_tx_rx_disruption.2948128882 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 600568638 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:54 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-db5a449b-022a-4cfc-af50-92deeb9891eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2948128882 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 202.usbdev_tx_rx_disruption.2948128882 |
| Directory | /workspace/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/203.usbdev_tx_rx_disruption.4292613933 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 590686225 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:37:58 PM PDT 24 |
| Finished | Aug 12 06:37:59 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-fce1a333-3cf2-4d1b-bd1b-f70bc7d3974f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4292613933 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 203.usbdev_tx_rx_disruption.4292613933 |
| Directory | /workspace/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/204.usbdev_tx_rx_disruption.2751098141 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 550863060 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-cc7a5441-84bf-495d-87b6-c70b435ada8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2751098141 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 204.usbdev_tx_rx_disruption.2751098141 |
| Directory | /workspace/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/205.usbdev_tx_rx_disruption.375171871 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 507929040 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-ebab23a4-389c-4feb-a014-4e4da6d0c6f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=375171871 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 205.usbdev_tx_rx_disruption.375171871 |
| Directory | /workspace/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/206.usbdev_tx_rx_disruption.1305431480 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 486608898 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-ee90ef30-96bf-4237-8c94-a0b0381e90c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1305431480 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 206.usbdev_tx_rx_disruption.1305431480 |
| Directory | /workspace/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/207.usbdev_tx_rx_disruption.4244230649 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 533734532 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e3a53289-8ad6-44f6-b100-3854a8e13511 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4244230649 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 207.usbdev_tx_rx_disruption.4244230649 |
| Directory | /workspace/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/208.usbdev_tx_rx_disruption.3000374240 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 596024947 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:37:57 PM PDT 24 |
| Finished | Aug 12 06:37:59 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-0cf76e53-9cb5-43c4-b7a4-50b668722676 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3000374240 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 208.usbdev_tx_rx_disruption.3000374240 |
| Directory | /workspace/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/209.usbdev_tx_rx_disruption.2454499711 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 636001578 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:37:55 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-e6cb5e11-6d96-466c-ba09-c9d12c7857f2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2454499711 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 209.usbdev_tx_rx_disruption.2454499711 |
| Directory | /workspace/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/21.usbdev_alert_test.4253600689 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 65659857 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:04 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-929dbe9c-3bc8-4548-b011-635303a3beff |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4253600689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.4253600689 |
| Directory | /workspace/21.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_disconnect.4041125744 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 5683565333 ps |
| CPU time | 8.35 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:12 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-037bbdbb-223d-4273-b7f9-a46c17f7e8af |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4041125744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_a on_wake_disconnect.4041125744 |
| Directory | /workspace/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_reset.1059638770 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 14895625745 ps |
| CPU time | 16.88 seconds |
| Started | Aug 12 06:33:04 PM PDT 24 |
| Finished | Aug 12 06:33:22 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-6fd6d24d-5ee8-4b3a-bc58-d19cff7de712 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1059638770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1059638770 |
| Directory | /workspace/21.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_resume.3327262653 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 23509735673 ps |
| CPU time | 34.34 seconds |
| Started | Aug 12 06:33:00 PM PDT 24 |
| Finished | Aug 12 06:33:35 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-63399a8e-2f65-48ee-9fe4-379f486b4d29 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3327262653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_a on_wake_resume.3327262653 |
| Directory | /workspace/21.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/21.usbdev_av_buffer.2995185759 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 231669165 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:33:06 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-07e24f52-e42d-4073-9a3c-634dffb99fb3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29951 85759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_av_buffer.2995185759 |
| Directory | /workspace/21.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/21.usbdev_bitstuff_err.1105088738 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 151971844 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:05 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-3a79b71f-8864-4f75-aab4-1d4ea9b3d09c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11050 88738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_bitstuff_err.1105088738 |
| Directory | /workspace/21.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_data_toggle_clear.1983941060 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 295609529 ps |
| CPU time | 1.25 seconds |
| Started | Aug 12 06:32:58 PM PDT 24 |
| Finished | Aug 12 06:32:59 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-43c351c8-2116-4a96-911d-fd78aa05ed80 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19839 41060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_clear.1983941060 |
| Directory | /workspace/21.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/21.usbdev_data_toggle_restore.985497290 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 739224556 ps |
| CPU time | 2.01 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-10b8244e-ae08-4157-8cad-efd0b26d55ee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=985497290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.985497290 |
| Directory | /workspace/21.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/21.usbdev_device_address.3666792860 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 22119898161 ps |
| CPU time | 38.26 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:46 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-363b0e07-381f-4d4f-a219-f38d163703ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36667 92860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.3666792860 |
| Directory | /workspace/21.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/21.usbdev_device_timeout.1881714928 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 278311620 ps |
| CPU time | 4.5 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-7bfb6e8a-817e-439c-8e72-566a24c8a66c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1881714928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.1881714928 |
| Directory | /workspace/21.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/21.usbdev_disable_endpoint.2003788951 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 554233195 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:13 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-db817128-e447-4aa0-97be-895a2c927d94 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20037 88951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_disable_endpoint.2003788951 |
| Directory | /workspace/21.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/21.usbdev_disconnected.72667975 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 146147498 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:32:49 PM PDT 24 |
| Finished | Aug 12 06:32:50 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-70c1db94-9fb5-4bcc-9821-27d00087945c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72667 975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_disconnected.72667975 |
| Directory | /workspace/21.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/21.usbdev_enable.1134772776 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 33305183 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-8646c5e0-4e3a-4f0d-afe3-5917f6734609 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11347 72776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_enable.1134772776 |
| Directory | /workspace/21.usbdev_enable/latest |
| Test location | /workspace/coverage/default/21.usbdev_endpoint_access.1499158591 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 987344969 ps |
| CPU time | 2.82 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-66429bce-0e5e-46c3-adc3-e8964c877c8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14991 58591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.1499158591 |
| Directory | /workspace/21.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/21.usbdev_fifo_rst.3536024116 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 215779729 ps |
| CPU time | 1.33 seconds |
| Started | Aug 12 06:33:00 PM PDT 24 |
| Finished | Aug 12 06:33:02 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-a12b389c-95a8-4710-84b5-15a852ec6f1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35360 24116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_fifo_rst.3536024116 |
| Directory | /workspace/21.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_iso.3611174846 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 218071257 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 215868 kb |
| Host | smart-54426036-0794-4f16-89e2-db446549eca8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3611174846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.3611174846 |
| Directory | /workspace/21.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_stall.425995419 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 146922740 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:33:04 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-a2dbbb54-930c-4776-aff2-54b5797bcd09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42599 5419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_stall.425995419 |
| Directory | /workspace/21.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_trans.3036913697 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 211924992 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-fb7d0f57-cd48-4d16-901f-d68b46d6e14c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30369 13697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_trans.3036913697 |
| Directory | /workspace/21.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_invalid_sync.1012202480 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 3635811080 ps |
| CPU time | 36.46 seconds |
| Started | Aug 12 06:33:14 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 218392 kb |
| Host | smart-5c638acd-6d14-4798-9eb1-74e812995288 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1012202480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.1012202480 |
| Directory | /workspace/21.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/21.usbdev_iso_retraction.377838541 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 9609855468 ps |
| CPU time | 61.73 seconds |
| Started | Aug 12 06:32:55 PM PDT 24 |
| Finished | Aug 12 06:33:57 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-dfbad92d-317b-41f5-82cf-78c3eecdaba3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=377838541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.377838541 |
| Directory | /workspace/21.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_in_err.1315934830 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 221841100 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:32:50 PM PDT 24 |
| Finished | Aug 12 06:32:52 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-8c2af374-35fb-4b00-bfe7-7d52ebce4222 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13159 34830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_in_err.1315934830 |
| Directory | /workspace/21.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_resume.1568578368 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 8233535010 ps |
| CPU time | 14.93 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-ee708cf3-7fbd-4d0a-b8c3-c2845d2c9477 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15685 78368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_resume.1568578368 |
| Directory | /workspace/21.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_suspend.2232684724 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 6000954644 ps |
| CPU time | 7.46 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 216096 kb |
| Host | smart-6fd7649a-7fca-4078-a403-6bb051991aa5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22326 84724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_suspend.2232684724 |
| Directory | /workspace/21.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/21.usbdev_low_speed_traffic.3416285154 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 2447397709 ps |
| CPU time | 18.32 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-164be590-8d32-4f2b-a5e0-5adb23027ef0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3416285154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.3416285154 |
| Directory | /workspace/21.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_inter_pkt_delay.1597239378 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 3205412359 ps |
| CPU time | 86.8 seconds |
| Started | Aug 12 06:32:58 PM PDT 24 |
| Finished | Aug 12 06:34:25 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-9cbc1e5e-0df8-419f-b0df-45206c8e9bf8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1597239378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.1597239378 |
| Directory | /workspace/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_length_in_transaction.1192655172 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 273589609 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:59 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c46a7b19-5a47-4bfd-91da-b3751f6637ca |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1192655172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.1192655172 |
| Directory | /workspace/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_length_out_transaction.2488077412 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 201535426 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-7d7a7aaf-8b27-4f1b-ab6f-7c770d7a96fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24880 77412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.2488077412 |
| Directory | /workspace/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_non_iso_usb_traffic.3858541967 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 2627070167 ps |
| CPU time | 24.1 seconds |
| Started | Aug 12 06:32:54 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 215908 kb |
| Host | smart-17d90ad7-e1cd-4151-95e3-d06b005d4ce0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38585 41967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.3858541967 |
| Directory | /workspace/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_inter_pkt_delay.2678627045 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 3071174232 ps |
| CPU time | 85.6 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:34:31 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-1251455e-e7b6-4ee4-8416-4380fc859788 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2678627045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.2678627045 |
| Directory | /workspace/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_length_in_transaction.1485068652 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 176780639 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:00 PM PDT 24 |
| Finished | Aug 12 06:33:01 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d12d35b0-2f3c-4af2-bf91-dd88bdc85a9d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1485068652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.1485068652 |
| Directory | /workspace/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_length_out_transaction.3216949023 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 167627396 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-142ca2a2-c82a-4478-9514-b9a1c0e7a8ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32169 49023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.3216949023 |
| Directory | /workspace/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_nak_trans.3281729925 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 229815738 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:33:10 PM PDT 24 |
| Finished | Aug 12 06:33:11 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-ae68fb71-4dab-42ee-beb6-788f4d004eb0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32817 29925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_nak_trans.3281729925 |
| Directory | /workspace/21.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_iso.2040111853 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 194046029 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:12 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-414bc429-150d-4b64-820f-33eb1c391cb2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20401 11853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_iso.2040111853 |
| Directory | /workspace/21.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_stall.1150630166 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 173764420 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-49a4f2a3-1dba-488b-88f9-279be3ee4e07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11506 30166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_stall.1150630166 |
| Directory | /workspace/21.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_trans_nak.2756998861 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 164920816 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-5a172d60-8c3e-4983-ae30-32199757b97d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27569 98861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_trans_nak.2756998861 |
| Directory | /workspace/21.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/21.usbdev_pending_in_trans.2453373226 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 149537955 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:05 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-9fd1dc66-d2e8-4dee-a40d-d632c0e54bb8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24533 73226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pending_in_trans.2453373226 |
| Directory | /workspace/21.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_config_pinflip.3657532136 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 245291339 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:33:06 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-0a4d0773-dbe5-442a-9eaa-dc915296bfef |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3657532136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.3657532136 |
| Directory | /workspace/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_config_usb_ref_disable.4113316699 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 221574546 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:06 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-7ad21d79-7319-4235-a85d-23c47c58ad5b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41133 16699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.4113316699 |
| Directory | /workspace/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_pins_sense.2905786485 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 40754779 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:04 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f23f2d46-d0fd-4e82-b64c-d77be3def020 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29057 86485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.2905786485 |
| Directory | /workspace/21.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_buffer.796738765 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 17180623670 ps |
| CPU time | 48.35 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-c8e85546-bc18-46d9-8d21-852b50561f64 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79673 8765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_buffer.796738765 |
| Directory | /workspace/21.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_received.714982174 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 176671117 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-21ba910f-a93d-498e-9b2e-638568e6980c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71498 2174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_received.714982174 |
| Directory | /workspace/21.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_sent.752649659 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 203276870 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:33:04 PM PDT 24 |
| Finished | Aug 12 06:33:05 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-df0452ea-c793-43f6-9592-0d07a240e392 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75264 9659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_sent.752649659 |
| Directory | /workspace/21.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/21.usbdev_random_length_in_transaction.419556228 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 247309099 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:12 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-6ee7962d-42d5-4f7f-8b3d-3d628bb00129 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41955 6228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_in_transaction.419556228 |
| Directory | /workspace/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_random_length_out_transaction.269909582 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 192375977 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:32:56 PM PDT 24 |
| Finished | Aug 12 06:32:57 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-3654eb8a-97e7-4dbc-9613-72a2a0826f5b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26990 9582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.269909582 |
| Directory | /workspace/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_rx_crc_err.3922684346 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 144194378 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:01 PM PDT 24 |
| Finished | Aug 12 06:33:02 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-3e3f0d93-d863-41a8-adc1-1c4449db33d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39226 84346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_rx_crc_err.3922684346 |
| Directory | /workspace/21.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_setup_stage.1213836207 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 150625728 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:09 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-df28ad91-f1a6-4243-b2cc-ab1f75246a92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12138 36207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_setup_stage.1213836207 |
| Directory | /workspace/21.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/21.usbdev_setup_trans_ignored.2008002612 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 150859321 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-9770301a-0bd5-429c-9c1f-d04b50615728 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20080 02612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_setup_trans_ignored.2008002612 |
| Directory | /workspace/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/21.usbdev_smoke.2520467717 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 224496228 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-90552781-2b46-438e-a3ae-ea7b6dabaf23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25204 67717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.2520467717 |
| Directory | /workspace/21.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/21.usbdev_spurious_pids_ignored.2901930948 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 2289308459 ps |
| CPU time | 63.75 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-b16f3135-88f0-453c-8d36-072b564dea41 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2901930948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.2901930948 |
| Directory | /workspace/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/21.usbdev_stall_priority_over_nak.225071903 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 235337033 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-934fcc7b-9d33-4fc3-a1e1-75a2b260f3b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22507 1903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.225071903 |
| Directory | /workspace/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/21.usbdev_stall_trans.754887946 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 196426172 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:04 PM PDT 24 |
| Finished | Aug 12 06:33:05 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-3a7920c1-beae-4296-83a6-bdd91617796e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75488 7946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_trans.754887946 |
| Directory | /workspace/21.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_stream_len_max.425215619 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 961968453 ps |
| CPU time | 2.22 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:09 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-ae41b07d-9b5b-4597-ae35-8c85eb735bef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42521 5619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.425215619 |
| Directory | /workspace/21.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/21.usbdev_streaming_out.2783846344 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 3985338862 ps |
| CPU time | 42.06 seconds |
| Started | Aug 12 06:33:01 PM PDT 24 |
| Finished | Aug 12 06:33:43 PM PDT 24 |
| Peak memory | 217520 kb |
| Host | smart-3c6b8847-384c-4a94-a3c5-d47953016edf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27838 46344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_streaming_out.2783846344 |
| Directory | /workspace/21.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/21.usbdev_timeout_missing_host_handshake.523731899 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 2272745200 ps |
| CPU time | 14.4 seconds |
| Started | Aug 12 06:33:06 PM PDT 24 |
| Finished | Aug 12 06:33:21 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-87f4848e-8f18-45be-b066-9c9a19caf1de |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=523731899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host _handshake.523731899 |
| Directory | /workspace/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/21.usbdev_tx_rx_disruption.2276782647 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 479092084 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:13 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-220a1889-b517-4a8e-82f7-522a0a76d04d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2276782647 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_tx_rx_disruption.2276782647 |
| Directory | /workspace/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/210.usbdev_tx_rx_disruption.3577888801 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 566015065 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-c7424a00-882a-4388-9ad1-25d7059b8493 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3577888801 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 210.usbdev_tx_rx_disruption.3577888801 |
| Directory | /workspace/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/211.usbdev_tx_rx_disruption.2750288340 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 497000817 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:37:52 PM PDT 24 |
| Finished | Aug 12 06:37:54 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-4c19eea6-5c54-4987-80c1-6e9fc712250b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2750288340 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 211.usbdev_tx_rx_disruption.2750288340 |
| Directory | /workspace/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/212.usbdev_tx_rx_disruption.1276327762 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 581489824 ps |
| CPU time | 1.86 seconds |
| Started | Aug 12 06:37:33 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-78f33e94-eb61-4549-811d-e91ea52e0d4c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1276327762 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 212.usbdev_tx_rx_disruption.1276327762 |
| Directory | /workspace/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/213.usbdev_tx_rx_disruption.4070046094 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 681011824 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:37:40 PM PDT 24 |
| Finished | Aug 12 06:37:42 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-bcb0fd5a-9cd0-43b9-8177-7c7492c3febd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4070046094 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 213.usbdev_tx_rx_disruption.4070046094 |
| Directory | /workspace/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/214.usbdev_tx_rx_disruption.3669799803 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 521799857 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-50da89df-61f4-486d-ba35-e913d8bd9b4f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3669799803 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 214.usbdev_tx_rx_disruption.3669799803 |
| Directory | /workspace/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/215.usbdev_tx_rx_disruption.502254317 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 588127011 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-1b030f81-9c1b-416c-b744-b89d088640f1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=502254317 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 215.usbdev_tx_rx_disruption.502254317 |
| Directory | /workspace/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/216.usbdev_tx_rx_disruption.1284285755 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 470338039 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5ce72208-9694-463d-81d8-622ff88f25b5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1284285755 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 216.usbdev_tx_rx_disruption.1284285755 |
| Directory | /workspace/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/217.usbdev_tx_rx_disruption.1713379475 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 628697827 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-0ac1b922-37ac-4ce7-9c58-7cd4c053ccba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1713379475 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 217.usbdev_tx_rx_disruption.1713379475 |
| Directory | /workspace/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/218.usbdev_tx_rx_disruption.330229821 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 531695750 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:37:53 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-e9b0d599-1328-46e4-9f10-8a872df88ad4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=330229821 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 218.usbdev_tx_rx_disruption.330229821 |
| Directory | /workspace/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/219.usbdev_tx_rx_disruption.1090959604 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 475600144 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:36 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-705d8f32-0c58-4087-a2b9-1aa90c78c123 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1090959604 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 219.usbdev_tx_rx_disruption.1090959604 |
| Directory | /workspace/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/22.usbdev_alert_test.2287170019 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 69909207 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:33:12 PM PDT 24 |
| Finished | Aug 12 06:33:13 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-59848a0c-0a37-4560-b645-152bfd193e9c |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2287170019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.2287170019 |
| Directory | /workspace/22.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_disconnect.3669101173 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 9323922788 ps |
| CPU time | 12.61 seconds |
| Started | Aug 12 06:33:00 PM PDT 24 |
| Finished | Aug 12 06:33:12 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-b8b7cc4c-6e0c-45b1-8060-9c56cc126da1 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3669101173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_a on_wake_disconnect.3669101173 |
| Directory | /workspace/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_reset.387424254 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 16241770012 ps |
| CPU time | 21.94 seconds |
| Started | Aug 12 06:33:01 PM PDT 24 |
| Finished | Aug 12 06:33:23 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-728b9145-bb49-43a7-b795-a7e04ad23e09 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=387424254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.387424254 |
| Directory | /workspace/22.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_resume.3533785190 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 25208904865 ps |
| CPU time | 33.79 seconds |
| Started | Aug 12 06:33:01 PM PDT 24 |
| Finished | Aug 12 06:33:35 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-e6ca803f-7631-456d-9cdf-2e18b61064c5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3533785190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_a on_wake_resume.3533785190 |
| Directory | /workspace/22.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/22.usbdev_av_buffer.2629247558 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 151465300 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:32:57 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-42cfea48-add1-493b-852b-c6ac386391d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26292 47558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_av_buffer.2629247558 |
| Directory | /workspace/22.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/22.usbdev_data_toggle_clear.611299836 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 221860012 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-749c808d-520b-48c3-9a0f-d1f728acac4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61129 9836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_clear.611299836 |
| Directory | /workspace/22.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/22.usbdev_data_toggle_restore.2634033021 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 753814297 ps |
| CPU time | 2.09 seconds |
| Started | Aug 12 06:33:12 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-92840d09-4875-48be-8564-68ff425e57c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2634033021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.2634033021 |
| Directory | /workspace/22.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/22.usbdev_device_address.3141612071 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 43715674884 ps |
| CPU time | 83.39 seconds |
| Started | Aug 12 06:33:12 PM PDT 24 |
| Finished | Aug 12 06:34:36 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-fea523bc-a638-41be-b6b7-8577b1b9497a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31416 12071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.3141612071 |
| Directory | /workspace/22.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/22.usbdev_device_timeout.3995415241 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 3396236750 ps |
| CPU time | 29.12 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:40 PM PDT 24 |
| Peak memory | 207848 kb |
| Host | smart-427af37d-43ee-41ab-a21a-5c61c41619eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3995415241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.3995415241 |
| Directory | /workspace/22.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/22.usbdev_disable_endpoint.2513313305 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 412528388 ps |
| CPU time | 1.34 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-9c20459a-2057-4d68-806f-724f3ebd1daf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25133 13305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disable_endpoint.2513313305 |
| Directory | /workspace/22.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/22.usbdev_disconnected.1166885063 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 145204500 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:33:19 PM PDT 24 |
| Finished | Aug 12 06:33:20 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d2364c04-5313-41e7-ae50-bc0f1dedb8fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11668 85063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disconnected.1166885063 |
| Directory | /workspace/22.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/22.usbdev_enable.3240211972 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 37559459 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 06:33:13 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-e7b595c3-1d2f-4726-9ffb-1da2821d3383 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32402 11972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_enable.3240211972 |
| Directory | /workspace/22.usbdev_enable/latest |
| Test location | /workspace/coverage/default/22.usbdev_endpoint_access.3551218480 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 956286751 ps |
| CPU time | 2.38 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-5dc05aaa-a0d2-4486-b008-f1e2ae8581bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35512 18480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.3551218480 |
| Directory | /workspace/22.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/22.usbdev_endpoint_types.3611872116 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 333416340 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:08 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-da4f83fa-a429-401b-9155-970201459c26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3611872116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.3611872116 |
| Directory | /workspace/22.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/22.usbdev_fifo_rst.1922686714 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 200016249 ps |
| CPU time | 1.34 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-647e249d-55dc-4044-af8e-3d1aa073e6da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19226 86714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_fifo_rst.1922686714 |
| Directory | /workspace/22.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_iso.484917688 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 210187857 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c6f3efd6-05d0-40df-9da8-74d4620cdefe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=484917688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.484917688 |
| Directory | /workspace/22.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_stall.351190467 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 175707260 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:33:22 PM PDT 24 |
| Finished | Aug 12 06:33:23 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-936a3051-dd92-4328-86d7-99c4943606c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35119 0467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_stall.351190467 |
| Directory | /workspace/22.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_trans.3573946687 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 232742150 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:33:05 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-156ee372-2778-4a18-9fae-9eee231c500e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35739 46687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_trans.3573946687 |
| Directory | /workspace/22.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_invalid_sync.2426581197 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 4611639894 ps |
| CPU time | 47.36 seconds |
| Started | Aug 12 06:33:04 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-6c2a9c03-3fe7-4e1a-9cef-259bbaf308d5 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2426581197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.2426581197 |
| Directory | /workspace/22.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/22.usbdev_iso_retraction.2111998034 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 8155621996 ps |
| CPU time | 109.06 seconds |
| Started | Aug 12 06:33:13 PM PDT 24 |
| Finished | Aug 12 06:35:02 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-a10f08ce-229f-4ef2-ba9d-19741a70cd8e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2111998034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.2111998034 |
| Directory | /workspace/22.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_in_err.1715781694 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 192064657 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-bb1f6c06-a7dd-4a6c-af42-eeb518c4c153 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17157 81694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_in_err.1715781694 |
| Directory | /workspace/22.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_resume.407697233 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 29833625894 ps |
| CPU time | 42.97 seconds |
| Started | Aug 12 06:33:20 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-eb54703e-3a53-4484-9398-6b911d41b056 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40769 7233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_resume.407697233 |
| Directory | /workspace/22.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_suspend.4217876439 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 3461315842 ps |
| CPU time | 5.11 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-45dcf258-76b5-42fc-99f7-98bd1001369a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42178 76439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_suspend.4217876439 |
| Directory | /workspace/22.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/22.usbdev_low_speed_traffic.1562293702 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 2591566670 ps |
| CPU time | 72.22 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-4f5d4c9f-b635-43be-a142-6617bd82d1b9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1562293702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.1562293702 |
| Directory | /workspace/22.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_inter_pkt_delay.3717727745 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 2499930065 ps |
| CPU time | 18.66 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:33:22 PM PDT 24 |
| Peak memory | 217628 kb |
| Host | smart-6c2ce52b-0e2b-4ad2-a18a-1456c81aee2e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3717727745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.3717727745 |
| Directory | /workspace/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_length_in_transaction.3891000653 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 253221051 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:33:10 PM PDT 24 |
| Finished | Aug 12 06:33:11 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-1e4f5af4-d3d4-415d-863f-d3d9ebdcf348 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3891000653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.3891000653 |
| Directory | /workspace/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_length_out_transaction.1106444861 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 195256552 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:12 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-30b22914-1c4b-4f40-b79f-31534992b5b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11064 44861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.1106444861 |
| Directory | /workspace/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_non_iso_usb_traffic.1588687270 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 2828069012 ps |
| CPU time | 85.9 seconds |
| Started | Aug 12 06:33:03 PM PDT 24 |
| Finished | Aug 12 06:34:29 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-a3248109-f9fd-4e51-b24a-ac0ab735e035 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15886 87270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.1588687270 |
| Directory | /workspace/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_inter_pkt_delay.750605717 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 1832935697 ps |
| CPU time | 13.94 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:21 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-6bc84e93-e286-4cc3-ada5-927a88a5a6c8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=750605717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.750605717 |
| Directory | /workspace/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_length_in_transaction.3811733970 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 155731909 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:08 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e267dbd8-ae26-48d8-9395-c43343abbb09 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3811733970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.3811733970 |
| Directory | /workspace/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_length_out_transaction.1522203183 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 168486809 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:12 PM PDT 24 |
| Finished | Aug 12 06:33:13 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-f48cc5c8-4484-4994-85fb-05c19789858c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15222 03183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.1522203183 |
| Directory | /workspace/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_nak_trans.3173244555 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 175398434 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:09 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-992e427a-1a84-44c9-8b18-dd9642ee1c97 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31732 44555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_nak_trans.3173244555 |
| Directory | /workspace/22.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_iso.1946603383 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 157348664 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:13 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-126cd489-9608-409b-b970-859f372fc849 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19466 03383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_iso.1946603383 |
| Directory | /workspace/22.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_stall.3023799868 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 209936880 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:08 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-18d46323-c7e0-4f30-b568-dce7ebf46a0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30237 99868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_stall.3023799868 |
| Directory | /workspace/22.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_trans_nak.3507217877 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 189748858 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f5dd71be-0735-4e14-9d0f-af3772765a86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35072 17877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_trans_nak.3507217877 |
| Directory | /workspace/22.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/22.usbdev_pending_in_trans.3672438068 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 183877541 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:06 PM PDT 24 |
| Finished | Aug 12 06:33:07 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-4dfbc665-37c1-4783-8377-a4507dbb35be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36724 38068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pending_in_trans.3672438068 |
| Directory | /workspace/22.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_config_pinflip.2470567718 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 250909562 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:33:04 PM PDT 24 |
| Finished | Aug 12 06:33:05 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d610e0ed-3795-4ba7-bc09-3837a0e90807 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2470567718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.2470567718 |
| Directory | /workspace/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_config_usb_ref_disable.926665650 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 155128371 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:08 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-fe7103bb-1f1f-48eb-a23c-824e0e685b21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92666 5650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.926665650 |
| Directory | /workspace/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_pins_sense.1286167148 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 40851016 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:08 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-d6adea17-3d80-40e5-87ba-fe4f92b60546 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12861 67148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.1286167148 |
| Directory | /workspace/22.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_buffer.2243487505 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 18162323062 ps |
| CPU time | 46.7 seconds |
| Started | Aug 12 06:33:07 PM PDT 24 |
| Finished | Aug 12 06:33:54 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-66d3f40d-5972-4e6f-9b44-b338adf3fadd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22434 87505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_buffer.2243487505 |
| Directory | /workspace/22.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_received.1716935586 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 153600179 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:12 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-0057eb8a-13d3-48e4-8b00-3400689792b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17169 35586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_received.1716935586 |
| Directory | /workspace/22.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_sent.1183113020 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 151590324 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:19 PM PDT 24 |
| Finished | Aug 12 06:33:20 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e327e117-c18a-40bc-8c3d-6f8bc193bd8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11831 13020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_sent.1183113020 |
| Directory | /workspace/22.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/22.usbdev_random_length_in_transaction.1140457702 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 261684316 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:33:12 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-7f62af29-0b88-48ec-8ca1-20bc35346d45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11404 57702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_in_transaction.1140457702 |
| Directory | /workspace/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_random_length_out_transaction.3662341136 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 204607325 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:33:15 PM PDT 24 |
| Finished | Aug 12 06:33:16 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-15377e6f-64f3-491d-9ddc-20eb741a36e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36623 41136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.3662341136 |
| Directory | /workspace/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_rx_crc_err.3873140430 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 143939573 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-2aa87fc7-dad2-4cb4-b9d1-83e3c173c290 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38731 40430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_rx_crc_err.3873140430 |
| Directory | /workspace/22.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/22.usbdev_rx_full.986384147 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 258026434 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c14b6351-60f6-4863-8de6-a52c5bcdaeab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98638 4147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_rx_full.986384147 |
| Directory | /workspace/22.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/22.usbdev_setup_stage.547531773 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 151308111 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:09 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f84ae822-c386-4dd6-bfed-e195d69f5523 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54753 1773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_setup_stage.547531773 |
| Directory | /workspace/22.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/22.usbdev_setup_trans_ignored.587194578 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 164182759 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:33:09 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-e677a6ac-e48a-4863-9e4b-45c3688ecefa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58719 4578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_setup_trans_ignored.587194578 |
| Directory | /workspace/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/22.usbdev_smoke.3705387103 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 240791362 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:33:02 PM PDT 24 |
| Finished | Aug 12 06:33:03 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-887849d5-5c75-4ce5-aa17-ce15fbe27e98 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37053 87103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.3705387103 |
| Directory | /workspace/22.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/22.usbdev_spurious_pids_ignored.206673843 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 2469355259 ps |
| CPU time | 18.4 seconds |
| Started | Aug 12 06:33:08 PM PDT 24 |
| Finished | Aug 12 06:33:27 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-75dbe748-dd0a-46fb-b730-a79cca97269b |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=206673843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.206673843 |
| Directory | /workspace/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/22.usbdev_stall_priority_over_nak.359387120 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 156479943 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:32 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-18905824-2b88-4f91-81bb-d6087038b868 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35938 7120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.359387120 |
| Directory | /workspace/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/22.usbdev_stall_trans.2045120663 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 187267115 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:14 PM PDT 24 |
| Finished | Aug 12 06:33:15 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-fc7fd4ed-429d-4464-8344-90fc7c8d20a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20451 20663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_trans.2045120663 |
| Directory | /workspace/22.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_stream_len_max.2147120494 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 918792640 ps |
| CPU time | 2.38 seconds |
| Started | Aug 12 06:33:25 PM PDT 24 |
| Finished | Aug 12 06:33:27 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-4377229a-8ecd-4a1f-ae72-cdac3296609e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21471 20494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.2147120494 |
| Directory | /workspace/22.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/22.usbdev_streaming_out.2659066442 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 3138076585 ps |
| CPU time | 89.68 seconds |
| Started | Aug 12 06:33:14 PM PDT 24 |
| Finished | Aug 12 06:34:44 PM PDT 24 |
| Peak memory | 217324 kb |
| Host | smart-da165ec4-a8d7-4577-bb4b-e89a0e92e02e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26590 66442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_streaming_out.2659066442 |
| Directory | /workspace/22.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/22.usbdev_timeout_missing_host_handshake.1201268156 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 693293292 ps |
| CPU time | 14.67 seconds |
| Started | Aug 12 06:33:10 PM PDT 24 |
| Finished | Aug 12 06:33:24 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-2a398717-41e0-469d-b344-01f470e7b101 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1201268156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_hos t_handshake.1201268156 |
| Directory | /workspace/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/22.usbdev_tx_rx_disruption.1296968286 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 520014619 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:33:23 PM PDT 24 |
| Finished | Aug 12 06:33:24 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-646db13c-98e6-4851-a50e-577f0566cbf3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1296968286 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_tx_rx_disruption.1296968286 |
| Directory | /workspace/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/220.usbdev_tx_rx_disruption.3938554176 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 638819800 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-382efb0c-195a-4696-81df-cbeaee0247ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3938554176 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 220.usbdev_tx_rx_disruption.3938554176 |
| Directory | /workspace/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/221.usbdev_tx_rx_disruption.3514764835 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 733348741 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 06:37:47 PM PDT 24 |
| Finished | Aug 12 06:37:49 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-bac2af34-f66c-46ee-a0d3-561edf420db6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3514764835 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 221.usbdev_tx_rx_disruption.3514764835 |
| Directory | /workspace/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/222.usbdev_tx_rx_disruption.565244911 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 497630310 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:54 PM PDT 24 |
| Finished | Aug 12 06:37:56 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-55a52978-02b9-40ef-8304-18f25aa0ba6f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=565244911 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 222.usbdev_tx_rx_disruption.565244911 |
| Directory | /workspace/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/223.usbdev_tx_rx_disruption.1347377618 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 537094530 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:38:01 PM PDT 24 |
| Finished | Aug 12 06:38:03 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-e2a2d839-5b88-4593-a75a-8bd1e0a6b880 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1347377618 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 223.usbdev_tx_rx_disruption.1347377618 |
| Directory | /workspace/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/224.usbdev_tx_rx_disruption.1306484328 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 479534849 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:47 PM PDT 24 |
| Finished | Aug 12 06:37:49 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-a7c1cb78-c70f-474b-95b3-ba8119c60015 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1306484328 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 224.usbdev_tx_rx_disruption.1306484328 |
| Directory | /workspace/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/225.usbdev_tx_rx_disruption.2813994571 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 494951791 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:37:55 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-454e8da3-de39-42e0-9773-bca50104ef44 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2813994571 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 225.usbdev_tx_rx_disruption.2813994571 |
| Directory | /workspace/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/226.usbdev_tx_rx_disruption.2380329851 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 644461576 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f1741369-511c-4c16-8fbd-01bdaf0a8174 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2380329851 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 226.usbdev_tx_rx_disruption.2380329851 |
| Directory | /workspace/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/227.usbdev_tx_rx_disruption.2685663205 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 479037211 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4ee9d7d9-7f18-41e6-a1b1-4812a27f7cbd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2685663205 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 227.usbdev_tx_rx_disruption.2685663205 |
| Directory | /workspace/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/228.usbdev_tx_rx_disruption.3608781337 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 547738587 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:37:57 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-8cd6225a-9fad-46fe-9fb5-96cb031c426b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3608781337 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 228.usbdev_tx_rx_disruption.3608781337 |
| Directory | /workspace/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/229.usbdev_tx_rx_disruption.3574560004 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 634327730 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-7986443a-6231-4a1c-a56b-b4dc9c034b26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3574560004 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 229.usbdev_tx_rx_disruption.3574560004 |
| Directory | /workspace/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/23.usbdev_alert_test.1376903063 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 130087528 ps |
| CPU time | 0.76 seconds |
| Started | Aug 12 06:33:26 PM PDT 24 |
| Finished | Aug 12 06:33:27 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4a0659f3-b9c0-42c8-96d8-7fdf25084dae |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1376903063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.1376903063 |
| Directory | /workspace/23.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_disconnect.2814565894 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 9190338135 ps |
| CPU time | 14.47 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:31 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-602ba609-10f8-4a6d-b388-300ee889effa |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2814565894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_a on_wake_disconnect.2814565894 |
| Directory | /workspace/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_reset.3351939712 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 19751091315 ps |
| CPU time | 27.16 seconds |
| Started | Aug 12 06:33:23 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-4a300624-ab99-47e5-ba96-516316eebdc3 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3351939712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.3351939712 |
| Directory | /workspace/23.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_resume.1889931834 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 23892704433 ps |
| CPU time | 29.34 seconds |
| Started | Aug 12 06:33:15 PM PDT 24 |
| Finished | Aug 12 06:33:44 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-fa5ea029-6c58-40b8-8482-64e4f797bb73 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1889931834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_a on_wake_resume.1889931834 |
| Directory | /workspace/23.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/23.usbdev_av_buffer.3194159991 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 162162446 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-4025fb5b-3da4-4456-af4b-d5d86b03661d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31941 59991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_av_buffer.3194159991 |
| Directory | /workspace/23.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/23.usbdev_bitstuff_err.3984758797 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 146337816 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:33:14 PM PDT 24 |
| Finished | Aug 12 06:33:15 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-4818e25b-2826-4b72-9972-1ff2cc1fa3fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39847 58797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_bitstuff_err.3984758797 |
| Directory | /workspace/23.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_data_toggle_clear.4129366499 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 428643028 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:33:19 PM PDT 24 |
| Finished | Aug 12 06:33:21 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-a00bb971-7a0a-406f-a2a8-020549347e28 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41293 66499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_clear.4129366499 |
| Directory | /workspace/23.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/23.usbdev_data_toggle_restore.3095323950 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 695880212 ps |
| CPU time | 1.99 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-93b28673-3095-43b7-9fa6-30d70915c2b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3095323950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.3095323950 |
| Directory | /workspace/23.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/23.usbdev_device_address.1613792151 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 18541310664 ps |
| CPU time | 36.15 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-c5333b83-1c5f-400c-9c08-4898603ea230 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16137 92151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.1613792151 |
| Directory | /workspace/23.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/23.usbdev_device_timeout.1608795840 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 934170591 ps |
| CPU time | 19.9 seconds |
| Started | Aug 12 06:33:24 PM PDT 24 |
| Finished | Aug 12 06:33:44 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-1b7a714d-72bf-44d2-9c67-4ac382955456 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1608795840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.1608795840 |
| Directory | /workspace/23.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/23.usbdev_disable_endpoint.760847144 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 681057175 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 06:33:19 PM PDT 24 |
| Finished | Aug 12 06:33:21 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3e45ce1c-9532-4bd5-bce3-144f183ccb40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76084 7144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.760847144 |
| Directory | /workspace/23.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/23.usbdev_disconnected.213708805 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 140609379 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:24 PM PDT 24 |
| Finished | Aug 12 06:33:25 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-578af3e2-724e-49a2-af2c-9e72b688f787 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21370 8805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disconnected.213708805 |
| Directory | /workspace/23.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/23.usbdev_enable.706389748 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 35862266 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-f4fadfd1-fe75-44e7-af7a-e99bb5309c6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70638 9748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_enable.706389748 |
| Directory | /workspace/23.usbdev_enable/latest |
| Test location | /workspace/coverage/default/23.usbdev_endpoint_access.348516865 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 989851251 ps |
| CPU time | 2.43 seconds |
| Started | Aug 12 06:33:14 PM PDT 24 |
| Finished | Aug 12 06:33:16 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-d16a0f4d-acc3-4aa0-8f2f-2baddd2e90af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34851 6865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.348516865 |
| Directory | /workspace/23.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/23.usbdev_endpoint_types.73555457 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 439276238 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-8785a85d-4cef-4370-b8d6-09e00edaf7c8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=73555457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.73555457 |
| Directory | /workspace/23.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/23.usbdev_fifo_rst.2113336070 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 173855903 ps |
| CPU time | 1.96 seconds |
| Started | Aug 12 06:33:22 PM PDT 24 |
| Finished | Aug 12 06:33:24 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-4431eaf1-0482-4a48-a094-0a7a9f99724a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21133 36070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_fifo_rst.2113336070 |
| Directory | /workspace/23.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_iso.132507084 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 174909870 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:30 PM PDT 24 |
| Finished | Aug 12 06:33:31 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-b7ae7e4d-82a0-4938-bb89-7c3ddbb91d6e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=132507084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.132507084 |
| Directory | /workspace/23.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_stall.1255899477 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 144269653 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:33:19 PM PDT 24 |
| Finished | Aug 12 06:33:20 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-5ad0d1da-8210-4954-9cbc-95a7d24a8899 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12558 99477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_stall.1255899477 |
| Directory | /workspace/23.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_trans.2902231240 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 182586273 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:18 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ecd1f61e-2d8a-4beb-ac83-f0cc70c4bee4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29022 31240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_trans.2902231240 |
| Directory | /workspace/23.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_invalid_sync.1719770081 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 2402036937 ps |
| CPU time | 23.07 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:40 PM PDT 24 |
| Peak memory | 224132 kb |
| Host | smart-8ec2d3fd-68e2-4707-a855-62722e668645 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1719770081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.1719770081 |
| Directory | /workspace/23.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/23.usbdev_iso_retraction.2634780315 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 8843846219 ps |
| CPU time | 105.28 seconds |
| Started | Aug 12 06:33:24 PM PDT 24 |
| Finished | Aug 12 06:35:10 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-c229e751-077d-45f2-8e06-98ffc2e8bcab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2634780315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.2634780315 |
| Directory | /workspace/23.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_in_err.636427961 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 181124305 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:27 PM PDT 24 |
| Finished | Aug 12 06:33:28 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-40ebf797-9bed-419d-9a30-dde39864a132 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63642 7961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_in_err.636427961 |
| Directory | /workspace/23.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_resume.2069819134 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 11245287909 ps |
| CPU time | 15.93 seconds |
| Started | Aug 12 06:33:14 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-9f8161f0-1a2c-42a2-ae7d-beb900a694ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20698 19134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_resume.2069819134 |
| Directory | /workspace/23.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_suspend.507124703 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 4764696863 ps |
| CPU time | 7.17 seconds |
| Started | Aug 12 06:33:13 PM PDT 24 |
| Finished | Aug 12 06:33:20 PM PDT 24 |
| Peak memory | 216052 kb |
| Host | smart-7e4fb778-9e29-48ba-b7f1-8acf038260eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50712 4703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_suspend.507124703 |
| Directory | /workspace/23.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/23.usbdev_low_speed_traffic.4131219144 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 2352321293 ps |
| CPU time | 65.63 seconds |
| Started | Aug 12 06:33:19 PM PDT 24 |
| Finished | Aug 12 06:34:25 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-7aae97ad-5e09-4a1b-ace6-47b516f024eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4131219144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.4131219144 |
| Directory | /workspace/23.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_inter_pkt_delay.458251717 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 2610309759 ps |
| CPU time | 26.62 seconds |
| Started | Aug 12 06:33:18 PM PDT 24 |
| Finished | Aug 12 06:33:45 PM PDT 24 |
| Peak memory | 217620 kb |
| Host | smart-433ef6a9-c7a0-4135-b099-9ac0453e6e84 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=458251717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.458251717 |
| Directory | /workspace/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_length_in_transaction.476809177 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 255090813 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-bf355e86-e757-4fa7-be71-905da36546f2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=476809177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.476809177 |
| Directory | /workspace/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_length_out_transaction.2575505268 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 199571041 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:13 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-56d5395c-8ed8-4d02-8b6d-9dce517f6919 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25755 05268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.2575505268 |
| Directory | /workspace/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_non_iso_usb_traffic.551833468 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 2014082529 ps |
| CPU time | 15.82 seconds |
| Started | Aug 12 06:33:11 PM PDT 24 |
| Finished | Aug 12 06:33:27 PM PDT 24 |
| Peak memory | 217932 kb |
| Host | smart-952be3a0-7bb4-4d24-9351-fa1de9496813 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55183 3468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.551833468 |
| Directory | /workspace/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_inter_pkt_delay.3446570436 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 4112394864 ps |
| CPU time | 30.61 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:47 PM PDT 24 |
| Peak memory | 217584 kb |
| Host | smart-2f278545-1efa-4d92-b52c-9531b3a0f212 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3446570436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.3446570436 |
| Directory | /workspace/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_length_in_transaction.927230825 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 204756349 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:33:18 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-340373b4-4e4d-4083-956a-f5335e097258 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=927230825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.927230825 |
| Directory | /workspace/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_length_out_transaction.369021196 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 142567352 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:33:15 PM PDT 24 |
| Finished | Aug 12 06:33:16 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-441a226f-538e-493a-b6d8-88d76dfdf0af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36902 1196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.369021196 |
| Directory | /workspace/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_nak_trans.1600752018 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 213226871 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:29 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-47a2331c-0b31-4758-9301-45cb7cb968bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16007 52018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_nak_trans.1600752018 |
| Directory | /workspace/23.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_iso.2920953122 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 203623528 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-35cd694c-3d9d-4c3c-813f-9053677d30fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29209 53122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_iso.2920953122 |
| Directory | /workspace/23.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_stall.2213655857 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 179643432 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:33:26 PM PDT 24 |
| Finished | Aug 12 06:33:27 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-61b60072-6012-4110-a0e8-d984d40880e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22136 55857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_stall.2213655857 |
| Directory | /workspace/23.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_trans_nak.1189311155 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 177917900 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:33:16 PM PDT 24 |
| Finished | Aug 12 06:33:17 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-a8a04f61-12c7-4576-86cd-28a1884aa754 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11893 11155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_trans_nak.1189311155 |
| Directory | /workspace/23.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/23.usbdev_pending_in_trans.2971297644 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 148073453 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:18 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-bdf75d82-1e45-4175-ac09-d85f4f6d0683 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29712 97644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pending_in_trans.2971297644 |
| Directory | /workspace/23.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_config_pinflip.2448076477 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 207138047 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:33:24 PM PDT 24 |
| Finished | Aug 12 06:33:25 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-125122a2-8a97-495f-a550-3e949e05be12 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2448076477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.2448076477 |
| Directory | /workspace/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_config_usb_ref_disable.3775946347 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 145840203 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:13 PM PDT 24 |
| Finished | Aug 12 06:33:14 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-dda7b914-164a-4199-8983-b20cc23f3bba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37759 46347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.3775946347 |
| Directory | /workspace/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_pins_sense.2012771425 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 111259801 ps |
| CPU time | 0.77 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-7ea1f158-f7e4-4bdb-b146-49e5eef80a08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20127 71425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.2012771425 |
| Directory | /workspace/23.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_buffer.516682915 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 7423334919 ps |
| CPU time | 19.27 seconds |
| Started | Aug 12 06:33:25 PM PDT 24 |
| Finished | Aug 12 06:33:44 PM PDT 24 |
| Peak memory | 224076 kb |
| Host | smart-8cdad395-43a5-4af5-b136-177a8018af4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51668 2915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_buffer.516682915 |
| Directory | /workspace/23.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_received.1451185928 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 165144574 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:17 PM PDT 24 |
| Finished | Aug 12 06:33:18 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-2a523ad4-d0a3-4016-aab5-7dee29062aac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14511 85928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_received.1451185928 |
| Directory | /workspace/23.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_sent.1786825360 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 151173805 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:33:25 PM PDT 24 |
| Finished | Aug 12 06:33:26 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-49380bc9-4b91-488a-9d50-825915a17f36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17868 25360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_sent.1786825360 |
| Directory | /workspace/23.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/23.usbdev_random_length_in_transaction.1184907921 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 236789270 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:33:31 PM PDT 24 |
| Finished | Aug 12 06:33:32 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-da27b247-9673-4f28-8173-f93110d1e08d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11849 07921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_in_transaction.1184907921 |
| Directory | /workspace/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_random_length_out_transaction.352346123 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 238027193 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:33:30 PM PDT 24 |
| Finished | Aug 12 06:33:31 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-a43e155b-aa52-4da7-8f52-9e5cf735b829 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35234 6123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.352346123 |
| Directory | /workspace/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_rx_crc_err.107467957 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 173999980 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:18 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-180cfc36-4616-4a78-8119-867531e785d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10746 7957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_rx_crc_err.107467957 |
| Directory | /workspace/23.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_rx_full.3507264597 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 343663089 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:29 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-4a427c7d-bd03-4abd-80dd-2b7033d08314 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35072 64597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_rx_full.3507264597 |
| Directory | /workspace/23.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/23.usbdev_setup_stage.3300254790 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 172763820 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:32 PM PDT 24 |
| Finished | Aug 12 06:33:33 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b259c9bf-6ce2-4065-a1b1-d9c99dad5790 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33002 54790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_setup_stage.3300254790 |
| Directory | /workspace/23.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/23.usbdev_setup_trans_ignored.147958308 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 154404984 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:31 PM PDT 24 |
| Finished | Aug 12 06:33:32 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-686c6d14-c555-4d80-bccd-e4e9759c8337 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14795 8308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_setup_trans_ignored.147958308 |
| Directory | /workspace/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/23.usbdev_smoke.3616913708 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 241140946 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:33:43 PM PDT 24 |
| Finished | Aug 12 06:33:45 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-09de500b-11e9-4d02-a7ea-ac3098b95d5d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36169 13708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.3616913708 |
| Directory | /workspace/23.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/23.usbdev_spurious_pids_ignored.2210428695 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 2208657216 ps |
| CPU time | 17.01 seconds |
| Started | Aug 12 06:33:36 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 217936 kb |
| Host | smart-15532068-6277-4c84-a7c6-8d008a9794ed |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2210428695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2210428695 |
| Directory | /workspace/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/23.usbdev_stall_priority_over_nak.611373000 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 159578178 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:29 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-ba02e046-8b55-4f58-9709-6973398f4e35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61137 3000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.611373000 |
| Directory | /workspace/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/23.usbdev_stall_trans.2306826888 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 174954927 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:23 PM PDT 24 |
| Finished | Aug 12 06:33:24 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-b03a4591-1389-4c2f-aa8e-b2be448f93ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23068 26888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_trans.2306826888 |
| Directory | /workspace/23.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_stream_len_max.93997646 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 451152508 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:33:37 PM PDT 24 |
| Finished | Aug 12 06:33:38 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ae7c829c-4a75-47c8-9691-db6e1a43d1c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93997 646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.93997646 |
| Directory | /workspace/23.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/23.usbdev_streaming_out.2675259497 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 3628821560 ps |
| CPU time | 26.35 seconds |
| Started | Aug 12 06:33:32 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-96148c1c-731a-45f9-b267-8bc6d76c9fd9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26752 59497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_streaming_out.2675259497 |
| Directory | /workspace/23.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/23.usbdev_timeout_missing_host_handshake.1002060735 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 2492561280 ps |
| CPU time | 21.22 seconds |
| Started | Aug 12 06:33:40 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-1bbde8e2-d7f5-488e-b7e8-c8a3be277458 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1002060735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_hos t_handshake.1002060735 |
| Directory | /workspace/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/23.usbdev_tx_rx_disruption.3182628762 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 540898183 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:33:18 PM PDT 24 |
| Finished | Aug 12 06:33:19 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4a6129a8-839f-459d-af05-2a8d4702d829 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3182628762 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_tx_rx_disruption.3182628762 |
| Directory | /workspace/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/230.usbdev_tx_rx_disruption.3357545963 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 514253257 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:37:45 PM PDT 24 |
| Finished | Aug 12 06:37:46 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-51f5eb14-8296-4b4e-8dcf-9fb8732cf517 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3357545963 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 230.usbdev_tx_rx_disruption.3357545963 |
| Directory | /workspace/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/231.usbdev_tx_rx_disruption.41146500 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 597256579 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:43 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-0ac592ec-615b-4994-8661-dca3b731875a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41146500 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 231.usbdev_tx_rx_disruption.41146500 |
| Directory | /workspace/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/232.usbdev_tx_rx_disruption.1037860562 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 533648092 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:44 PM PDT 24 |
| Finished | Aug 12 06:37:45 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ea62317f-cb7e-428f-95c3-5c7b20baa051 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1037860562 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 232.usbdev_tx_rx_disruption.1037860562 |
| Directory | /workspace/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/233.usbdev_tx_rx_disruption.662095721 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 487178297 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:37:52 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-910f1822-a9ab-4e94-b349-ab5cf8b832e5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=662095721 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 233.usbdev_tx_rx_disruption.662095721 |
| Directory | /workspace/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/234.usbdev_tx_rx_disruption.337020576 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 472034333 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-20ee9b5e-ab80-43af-a0cc-65b06c7eb370 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=337020576 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 234.usbdev_tx_rx_disruption.337020576 |
| Directory | /workspace/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/235.usbdev_tx_rx_disruption.4140172705 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 615004382 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f016ebd5-7b5e-4203-aebc-11b4d9c8772b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4140172705 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 235.usbdev_tx_rx_disruption.4140172705 |
| Directory | /workspace/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/236.usbdev_tx_rx_disruption.394628016 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 507779574 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:55 PM PDT 24 |
| Finished | Aug 12 06:37:56 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d827fe7a-8a08-4c7a-bcbc-ff29c5ed5b0a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=394628016 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 236.usbdev_tx_rx_disruption.394628016 |
| Directory | /workspace/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/237.usbdev_tx_rx_disruption.491818744 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 626327103 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:45 PM PDT 24 |
| Finished | Aug 12 06:37:47 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-dd70b508-a5e1-4605-a684-a69529fa5125 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=491818744 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 237.usbdev_tx_rx_disruption.491818744 |
| Directory | /workspace/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/238.usbdev_tx_rx_disruption.2517778726 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 631294602 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d71427c9-4fb0-460e-a753-a8003cc7cfdd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2517778726 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 238.usbdev_tx_rx_disruption.2517778726 |
| Directory | /workspace/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/239.usbdev_tx_rx_disruption.1605868846 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 471422841 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7d2aac8a-a5bb-4139-bee5-d128a1f5a045 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1605868846 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 239.usbdev_tx_rx_disruption.1605868846 |
| Directory | /workspace/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/24.usbdev_alert_test.459886122 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 43328612 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:33:44 PM PDT 24 |
| Finished | Aug 12 06:33:45 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-00a830a2-9d67-440d-8855-cfbed0361b70 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=459886122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.459886122 |
| Directory | /workspace/24.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_disconnect.207644932 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 6105384497 ps |
| CPU time | 8.6 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:37 PM PDT 24 |
| Peak memory | 215832 kb |
| Host | smart-4844f08d-63d2-496f-8d18-d1f81356d70d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=207644932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_ao n_wake_disconnect.207644932 |
| Directory | /workspace/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_reset.3387935639 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 14492613051 ps |
| CPU time | 19.87 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:48 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-8c1e444d-baae-4595-b7d4-2713eba547ac |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3387935639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.3387935639 |
| Directory | /workspace/24.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_resume.3924147610 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 26057103814 ps |
| CPU time | 35.09 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:34:04 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-c9e66d66-5a73-4308-89b2-c5ff8b3f6ded |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3924147610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_a on_wake_resume.3924147610 |
| Directory | /workspace/24.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/24.usbdev_av_buffer.4057165713 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 147315797 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:33:26 PM PDT 24 |
| Finished | Aug 12 06:33:27 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-130e220d-7007-4bfb-a07e-e10c08a32d42 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40571 65713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_av_buffer.4057165713 |
| Directory | /workspace/24.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/24.usbdev_bitstuff_err.379856458 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 148019100 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:26 PM PDT 24 |
| Finished | Aug 12 06:33:27 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-376ce6d0-6187-437b-88eb-9a4bf11f607c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37985 6458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_bitstuff_err.379856458 |
| Directory | /workspace/24.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_data_toggle_clear.2194962099 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 254256914 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:29 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d355abdc-500a-4c62-be11-16f7dbc07687 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21949 62099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_clear.2194962099 |
| Directory | /workspace/24.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/24.usbdev_data_toggle_restore.3118974759 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 853946499 ps |
| CPU time | 2.25 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:31 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-4c1cd8db-292b-4ef8-b75c-fe199cc7dd5a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3118974759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.3118974759 |
| Directory | /workspace/24.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/24.usbdev_device_address.812792597 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 33356627116 ps |
| CPU time | 53.37 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-1507b199-587a-40f8-ba4d-f61c828120be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81279 2597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.812792597 |
| Directory | /workspace/24.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/24.usbdev_device_timeout.1535226214 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 1600735350 ps |
| CPU time | 10.06 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:39 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-c3884b92-1ba9-4e58-886a-25b5024b134d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1535226214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.1535226214 |
| Directory | /workspace/24.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/24.usbdev_disable_endpoint.4141985258 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 648248419 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:33:27 PM PDT 24 |
| Finished | Aug 12 06:33:28 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-6c6f38f0-d5d3-4347-a08e-6663242fedf6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41419 85258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disable_endpoint.4141985258 |
| Directory | /workspace/24.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/24.usbdev_disconnected.2293392911 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 136120817 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:22 PM PDT 24 |
| Finished | Aug 12 06:33:23 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-55cbb79b-463a-4723-869f-71121de3d09a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22933 92911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disconnected.2293392911 |
| Directory | /workspace/24.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/24.usbdev_enable.468253484 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 69975373 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4b0b66d4-7caf-4e1d-94fd-71d7b8d6999b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46825 3484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_enable.468253484 |
| Directory | /workspace/24.usbdev_enable/latest |
| Test location | /workspace/coverage/default/24.usbdev_endpoint_access.2841735025 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 966165483 ps |
| CPU time | 2.4 seconds |
| Started | Aug 12 06:33:30 PM PDT 24 |
| Finished | Aug 12 06:33:33 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-1601e920-a887-4167-8da7-970567e152f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28417 35025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.2841735025 |
| Directory | /workspace/24.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/24.usbdev_endpoint_types.2960426547 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 296725951 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:33:25 PM PDT 24 |
| Finished | Aug 12 06:33:26 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-ec392c4a-f109-4721-b9e6-5d130401d39a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2960426547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.2960426547 |
| Directory | /workspace/24.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/24.usbdev_fifo_rst.2185128901 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 318835971 ps |
| CPU time | 2.27 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:31 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-fb7035bc-ced6-4f2f-83da-199921ac05c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21851 28901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_fifo_rst.2185128901 |
| Directory | /workspace/24.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_iso.2544231158 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 216843998 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:33:31 PM PDT 24 |
| Finished | Aug 12 06:33:32 PM PDT 24 |
| Peak memory | 215868 kb |
| Host | smart-2af31a37-e783-4478-94ed-9b697f41f555 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2544231158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.2544231158 |
| Directory | /workspace/24.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_stall.38009956 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 153716857 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-44c00af0-2a21-4de9-8220-72840e6dbf81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38009 956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_stall.38009956 |
| Directory | /workspace/24.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_trans.2908839696 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 187326598 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:30 PM PDT 24 |
| Finished | Aug 12 06:33:31 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4fbea316-853f-4e60-9c8c-91e76a81a6d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29088 39696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_trans.2908839696 |
| Directory | /workspace/24.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_invalid_sync.49575708 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 3483223130 ps |
| CPU time | 34.4 seconds |
| Started | Aug 12 06:33:31 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 217332 kb |
| Host | smart-52b408ae-8852-438d-bcce-cec80ff33d8e |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=49575708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.49575708 |
| Directory | /workspace/24.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/24.usbdev_iso_retraction.833195452 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 9472098635 ps |
| CPU time | 70.43 seconds |
| Started | Aug 12 06:33:25 PM PDT 24 |
| Finished | Aug 12 06:34:41 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-8d237ed1-2878-4068-9c2d-7d46da17e671 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=833195452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.833195452 |
| Directory | /workspace/24.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_in_err.442664816 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 163511127 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:33:26 PM PDT 24 |
| Finished | Aug 12 06:33:27 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-42af54ac-d4ce-461a-bd86-28627850ccc9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44266 4816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_in_err.442664816 |
| Directory | /workspace/24.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_resume.2196372329 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 32319134387 ps |
| CPU time | 51.89 seconds |
| Started | Aug 12 06:33:31 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-3b926133-1020-4cc0-b47b-00e381fdcda0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21963 72329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_resume.2196372329 |
| Directory | /workspace/24.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_suspend.1526014530 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 5411004503 ps |
| CPU time | 8.31 seconds |
| Started | Aug 12 06:33:37 PM PDT 24 |
| Finished | Aug 12 06:33:45 PM PDT 24 |
| Peak memory | 216040 kb |
| Host | smart-971a7a1c-e630-49e1-bd6e-158cfa47847f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15260 14530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_suspend.1526014530 |
| Directory | /workspace/24.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/24.usbdev_low_speed_traffic.2728699832 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 4001541461 ps |
| CPU time | 40.15 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-5eeb78ef-58de-401a-bb76-0a3cd1089f35 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2728699832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.2728699832 |
| Directory | /workspace/24.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_inter_pkt_delay.1914473855 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 3452942020 ps |
| CPU time | 94.19 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:35:03 PM PDT 24 |
| Peak memory | 217580 kb |
| Host | smart-3f4dd9f2-de93-4f53-965b-459118ca957b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1914473855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.1914473855 |
| Directory | /workspace/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_length_in_transaction.3392384604 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 248223790 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:33:40 PM PDT 24 |
| Finished | Aug 12 06:33:41 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-2e9ca8a2-14fb-42b3-b5c3-f6ad30faccc1 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3392384604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.3392384604 |
| Directory | /workspace/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_length_out_transaction.412581560 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 187079181 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:33:41 PM PDT 24 |
| Finished | Aug 12 06:33:42 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-0a2ec6e3-5581-4d8f-b40f-84df58044bd7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41258 1560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.412581560 |
| Directory | /workspace/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_non_iso_usb_traffic.3947626774 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 4292496650 ps |
| CPU time | 43.09 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 217824 kb |
| Host | smart-d14fd375-92f4-4334-a409-be7845d01047 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39476 26774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.3947626774 |
| Directory | /workspace/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_inter_pkt_delay.1437860735 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 2185227120 ps |
| CPU time | 62.02 seconds |
| Started | Aug 12 06:33:30 PM PDT 24 |
| Finished | Aug 12 06:34:32 PM PDT 24 |
| Peak memory | 217400 kb |
| Host | smart-9a4d472f-457c-4fe5-8772-c2785380ab70 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1437860735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.1437860735 |
| Directory | /workspace/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_length_in_transaction.763971154 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 182419199 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:33:31 PM PDT 24 |
| Finished | Aug 12 06:33:33 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-bdb75f79-13da-487f-8b8c-52451dc1ed39 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=763971154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.763971154 |
| Directory | /workspace/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_length_out_transaction.344399001 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 139453756 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:22 PM PDT 24 |
| Finished | Aug 12 06:33:24 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-029c82f0-cfcd-4138-9693-358e8e3fe9e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34439 9001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.344399001 |
| Directory | /workspace/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_nak_trans.3872147421 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 235408562 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-19106a91-0b46-446b-a131-9f7130d417f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38721 47421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_nak_trans.3872147421 |
| Directory | /workspace/24.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_iso.3644599247 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 190592636 ps |
| CPU time | 1.17 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a52d317c-f16b-46da-abb2-8d2185e75293 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36445 99247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_iso.3644599247 |
| Directory | /workspace/24.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_stall.4184373831 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 168438222 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3efd841a-5d68-478b-bca5-40afd8e39645 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41843 73831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_stall.4184373831 |
| Directory | /workspace/24.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_trans_nak.44634661 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 148419589 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:31 PM PDT 24 |
| Finished | Aug 12 06:33:32 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-29b71c50-9bd6-48aa-99f3-464fe7038bc8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44634 661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_trans_nak.44634661 |
| Directory | /workspace/24.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/24.usbdev_pending_in_trans.2071152578 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 194983568 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:33:40 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-596d9add-f9dc-4c9b-b9a6-df053e3000f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20711 52578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pending_in_trans.2071152578 |
| Directory | /workspace/24.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_config_pinflip.2841225670 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 254280419 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-cc14e962-c218-438b-8266-0d372e6ccb6a |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2841225670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.2841225670 |
| Directory | /workspace/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_config_usb_ref_disable.2409801458 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 166339796 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:32 PM PDT 24 |
| Finished | Aug 12 06:33:33 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7cebc131-8487-43c0-b5a0-251a11fddf91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24098 01458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.2409801458 |
| Directory | /workspace/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_pins_sense.1407584279 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 45999986 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:33:23 PM PDT 24 |
| Finished | Aug 12 06:33:24 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-32cbde90-75d6-4571-a26d-03d506676b05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14075 84279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.1407584279 |
| Directory | /workspace/24.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_buffer.851783515 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 12760095159 ps |
| CPU time | 33.2 seconds |
| Started | Aug 12 06:33:25 PM PDT 24 |
| Finished | Aug 12 06:33:59 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-2316cf1f-0d4e-4780-a5bc-533be78e8734 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85178 3515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_buffer.851783515 |
| Directory | /workspace/24.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_received.2453964669 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 194930349 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:33:33 PM PDT 24 |
| Finished | Aug 12 06:33:34 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-cc6b5246-eddc-434b-bb23-2b5a15e42f70 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24539 64669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_received.2453964669 |
| Directory | /workspace/24.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_sent.486824265 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 206847635 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:30 PM PDT 24 |
| Finished | Aug 12 06:33:31 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b83f7985-20b6-481f-aadb-fd29e4b338fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48682 4265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_sent.486824265 |
| Directory | /workspace/24.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/24.usbdev_random_length_in_transaction.536971564 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 205772995 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-8e09ba57-9125-4de1-b274-da62f45536ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53697 1564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_in_transaction.536971564 |
| Directory | /workspace/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_random_length_out_transaction.445745595 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 153975377 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:30 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-e1aec32b-fa8b-424f-96a6-1afec35eec74 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44574 5595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.445745595 |
| Directory | /workspace/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_rx_crc_err.156660914 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 191240617 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-e5401c70-5d16-4acc-b5f2-50a8561c60e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15666 0914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_rx_crc_err.156660914 |
| Directory | /workspace/24.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_rx_full.329680264 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 320306740 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-73b3b963-0f38-40f1-a91f-5248ca5c9c63 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32968 0264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_rx_full.329680264 |
| Directory | /workspace/24.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/24.usbdev_setup_stage.2314243136 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 204562197 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:33 PM PDT 24 |
| Finished | Aug 12 06:33:34 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-49a78dbb-e780-4622-aabd-dd35d9a89e91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23142 43136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_setup_stage.2314243136 |
| Directory | /workspace/24.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/24.usbdev_setup_trans_ignored.2808251440 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 154181773 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:30 PM PDT 24 |
| Finished | Aug 12 06:33:31 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-db12b2eb-633d-4591-ad58-09f9a30ad6e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28082 51440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_setup_trans_ignored.2808251440 |
| Directory | /workspace/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/24.usbdev_smoke.2572329771 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 211114088 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:33:40 PM PDT 24 |
| Finished | Aug 12 06:33:41 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-47653b01-35c2-4666-8878-8234a8876587 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25723 29771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2572329771 |
| Directory | /workspace/24.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/24.usbdev_spurious_pids_ignored.3639086808 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 1927154194 ps |
| CPU time | 56.35 seconds |
| Started | Aug 12 06:33:37 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-150a81ad-f6da-4874-ba29-7139f4f72692 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3639086808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.3639086808 |
| Directory | /workspace/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/24.usbdev_stall_priority_over_nak.1276162212 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 199765919 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-3f727573-5de1-42e7-8685-acf040751a38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12761 62212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.1276162212 |
| Directory | /workspace/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/24.usbdev_stall_trans.1323019794 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 173766401 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:29 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-150cabab-822f-472b-b06a-d16f7d360a65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13230 19794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_trans.1323019794 |
| Directory | /workspace/24.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_stream_len_max.1240250048 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 368581904 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:33:30 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-165d9af3-915f-40e1-b5a9-e0a6f022c6d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12402 50048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.1240250048 |
| Directory | /workspace/24.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/24.usbdev_streaming_out.211159582 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 3048159224 ps |
| CPU time | 22.62 seconds |
| Started | Aug 12 06:33:45 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-ca8cf8a3-9b03-418c-b6c2-9182165bc204 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21115 9582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_streaming_out.211159582 |
| Directory | /workspace/24.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/24.usbdev_timeout_missing_host_handshake.2437279088 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 7027525123 ps |
| CPU time | 43.6 seconds |
| Started | Aug 12 06:33:38 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-0ddeffde-f72d-4960-adc7-891a51d4188c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2437279088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_hos t_handshake.2437279088 |
| Directory | /workspace/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/24.usbdev_tx_rx_disruption.1124092638 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 518514205 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:33:32 PM PDT 24 |
| Finished | Aug 12 06:33:34 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-2a323366-6ccf-41df-a4e7-359b2d650129 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1124092638 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_tx_rx_disruption.1124092638 |
| Directory | /workspace/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/240.usbdev_tx_rx_disruption.3344106214 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 486499664 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:44 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-16284280-a29b-4d1f-9aa2-fa928990f543 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3344106214 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 240.usbdev_tx_rx_disruption.3344106214 |
| Directory | /workspace/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/241.usbdev_tx_rx_disruption.1723878822 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 529480101 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:43 PM PDT 24 |
| Finished | Aug 12 06:37:45 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-081984be-9cda-43f1-a6ac-b985ea971f5c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1723878822 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 241.usbdev_tx_rx_disruption.1723878822 |
| Directory | /workspace/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/242.usbdev_tx_rx_disruption.837091933 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 547959530 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-6cdbc86e-148e-4551-95f0-193040854983 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=837091933 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 242.usbdev_tx_rx_disruption.837091933 |
| Directory | /workspace/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/243.usbdev_tx_rx_disruption.2411092096 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 452423040 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-9548e374-5ad8-4bb7-aa57-fe7386716a6e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2411092096 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 243.usbdev_tx_rx_disruption.2411092096 |
| Directory | /workspace/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/244.usbdev_tx_rx_disruption.2433114663 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 498836204 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-07934942-b03f-4bd7-b193-a298b0949d7d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2433114663 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 244.usbdev_tx_rx_disruption.2433114663 |
| Directory | /workspace/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/245.usbdev_tx_rx_disruption.1143647094 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 590758588 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4f7b73db-cea1-4a8b-8033-e81df76f5b29 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1143647094 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 245.usbdev_tx_rx_disruption.1143647094 |
| Directory | /workspace/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/246.usbdev_tx_rx_disruption.1346073546 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 575778600 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-d7dddf77-68e8-45f7-acf0-e8e16c1855e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1346073546 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 246.usbdev_tx_rx_disruption.1346073546 |
| Directory | /workspace/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/247.usbdev_tx_rx_disruption.3528561041 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 556120130 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:37:41 PM PDT 24 |
| Finished | Aug 12 06:37:43 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-ae1d8e62-7b26-4343-882b-c562517e6a22 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3528561041 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 247.usbdev_tx_rx_disruption.3528561041 |
| Directory | /workspace/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/248.usbdev_tx_rx_disruption.743404689 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 557782208 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:37:46 PM PDT 24 |
| Finished | Aug 12 06:37:48 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-03750626-ee93-4337-89e8-1599ddca4f24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=743404689 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 248.usbdev_tx_rx_disruption.743404689 |
| Directory | /workspace/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/249.usbdev_tx_rx_disruption.681832123 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 632233858 ps |
| CPU time | 1.8 seconds |
| Started | Aug 12 06:37:43 PM PDT 24 |
| Finished | Aug 12 06:37:45 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-9094577b-b71a-471a-9833-e4dda9c71f77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=681832123 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 249.usbdev_tx_rx_disruption.681832123 |
| Directory | /workspace/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/25.usbdev_alert_test.1112127990 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 37028807 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-3719547e-63a8-4fe2-9bf2-5a841e54ad21 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1112127990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.1112127990 |
| Directory | /workspace/25.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_disconnect.1993243675 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 8794424873 ps |
| CPU time | 12.54 seconds |
| Started | Aug 12 06:33:33 PM PDT 24 |
| Finished | Aug 12 06:33:46 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-c37d8bde-edcf-44d7-8b07-896646e184d3 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1993243675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_a on_wake_disconnect.1993243675 |
| Directory | /workspace/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_reset.2451220972 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 13709848499 ps |
| CPU time | 16.52 seconds |
| Started | Aug 12 06:33:32 PM PDT 24 |
| Finished | Aug 12 06:33:48 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-b5d67f3f-d5cc-4d0f-a83a-26b4622872b8 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2451220972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.2451220972 |
| Directory | /workspace/25.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_resume.952344482 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 30275742246 ps |
| CPU time | 34.75 seconds |
| Started | Aug 12 06:33:29 PM PDT 24 |
| Finished | Aug 12 06:34:04 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-3c2348cb-e7a6-44c3-ac38-df655f5b0c3c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=952344482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_ao n_wake_resume.952344482 |
| Directory | /workspace/25.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/25.usbdev_av_buffer.3999247707 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 153598021 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:44 PM PDT 24 |
| Finished | Aug 12 06:33:45 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-6d2606a0-0b89-4b42-b2af-ea7ecf237784 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39992 47707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_av_buffer.3999247707 |
| Directory | /workspace/25.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/25.usbdev_bitstuff_err.2676809871 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 140267812 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:32 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-cedbdf99-a97c-4d14-b853-aafd304e1723 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26768 09871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_bitstuff_err.2676809871 |
| Directory | /workspace/25.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_data_toggle_clear.709454994 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 444608493 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:33:42 PM PDT 24 |
| Finished | Aug 12 06:33:43 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-2815b5a4-daea-4924-a1ce-8b86539ea977 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70945 4994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_clear.709454994 |
| Directory | /workspace/25.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/25.usbdev_data_toggle_restore.769277628 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 934797390 ps |
| CPU time | 2.55 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-7e2cdbc8-6d05-403e-a6e3-0be8ec2f7715 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=769277628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.769277628 |
| Directory | /workspace/25.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/25.usbdev_device_timeout.3981111200 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 630430290 ps |
| CPU time | 11.93 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-a188f714-ed44-4602-a2e7-59e3cf34cb97 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3981111200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.3981111200 |
| Directory | /workspace/25.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/25.usbdev_disable_endpoint.2699774016 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 982921484 ps |
| CPU time | 2.06 seconds |
| Started | Aug 12 06:33:28 PM PDT 24 |
| Finished | Aug 12 06:33:33 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-cf9fad03-c8ad-49b7-97ec-8668f8f57d69 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26997 74016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_disable_endpoint.2699774016 |
| Directory | /workspace/25.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/25.usbdev_disconnected.2390707428 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 211062950 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:33:36 PM PDT 24 |
| Finished | Aug 12 06:33:37 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b96346f7-8081-4f88-8eca-4d92bf3306ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23907 07428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_disconnected.2390707428 |
| Directory | /workspace/25.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/25.usbdev_enable.2552865505 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 34188861 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:33:36 PM PDT 24 |
| Finished | Aug 12 06:33:37 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-366a3222-6ddf-4553-977d-1880497fa3ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25528 65505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_enable.2552865505 |
| Directory | /workspace/25.usbdev_enable/latest |
| Test location | /workspace/coverage/default/25.usbdev_endpoint_access.2873871541 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 1104265665 ps |
| CPU time | 2.9 seconds |
| Started | Aug 12 06:33:33 PM PDT 24 |
| Finished | Aug 12 06:33:36 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-a26872f5-2edf-40f1-a82a-9d4de47f13b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28738 71541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.2873871541 |
| Directory | /workspace/25.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/25.usbdev_endpoint_types.3566270754 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 575587924 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:33:40 PM PDT 24 |
| Finished | Aug 12 06:33:42 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-e51c238b-6c36-4449-a740-6c751b273428 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3566270754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.3566270754 |
| Directory | /workspace/25.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/25.usbdev_fifo_rst.962113821 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 176648570 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:33:44 PM PDT 24 |
| Finished | Aug 12 06:33:46 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-dba45d4a-e4b1-4c85-adf6-0ca38a9b8444 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96211 3821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_fifo_rst.962113821 |
| Directory | /workspace/25.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_iso.3699704131 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 226534778 ps |
| CPU time | 1.19 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:33:40 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-f8cc84cb-6352-4e8b-9633-2d973fc385b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3699704131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.3699704131 |
| Directory | /workspace/25.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_stall.2096353777 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 147221775 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:33:34 PM PDT 24 |
| Finished | Aug 12 06:33:35 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4bba4d6b-c219-419e-b5ae-b5b5adb80108 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20963 53777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_stall.2096353777 |
| Directory | /workspace/25.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_trans.965493464 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 214477093 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:33:35 PM PDT 24 |
| Finished | Aug 12 06:33:36 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-2ae1abb0-faa5-4cc2-9601-ec35e7db615d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96549 3464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_trans.965493464 |
| Directory | /workspace/25.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_invalid_sync.884596267 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 5076419170 ps |
| CPU time | 39.55 seconds |
| Started | Aug 12 06:33:25 PM PDT 24 |
| Finished | Aug 12 06:34:05 PM PDT 24 |
| Peak memory | 224104 kb |
| Host | smart-d31c331a-8549-4035-b24f-e4cc66531707 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=884596267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.884596267 |
| Directory | /workspace/25.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/25.usbdev_iso_retraction.2373233036 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 7913094526 ps |
| CPU time | 98.38 seconds |
| Started | Aug 12 06:33:32 PM PDT 24 |
| Finished | Aug 12 06:35:10 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-350e3e2d-f7e2-4f5f-870b-e8471a914715 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2373233036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.2373233036 |
| Directory | /workspace/25.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_in_err.456218452 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 175187039 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-b8553fd1-d93b-4bbb-817c-20a171fd663f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45621 8452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_in_err.456218452 |
| Directory | /workspace/25.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_resume.2707166083 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 26372459048 ps |
| CPU time | 32.92 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:34:12 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-0ae618c2-318b-4f0b-9905-b4c733f0454b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27071 66083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_resume.2707166083 |
| Directory | /workspace/25.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_suspend.1056938628 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 8982819636 ps |
| CPU time | 11.28 seconds |
| Started | Aug 12 06:33:58 PM PDT 24 |
| Finished | Aug 12 06:34:09 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-0c049ea6-2e9b-4c3d-9c15-92b240cde9d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10569 38628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_suspend.1056938628 |
| Directory | /workspace/25.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/25.usbdev_low_speed_traffic.1986120617 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 4737249830 ps |
| CPU time | 44.87 seconds |
| Started | Aug 12 06:33:33 PM PDT 24 |
| Finished | Aug 12 06:34:18 PM PDT 24 |
| Peak memory | 217580 kb |
| Host | smart-2657aff7-7c2e-44d8-97fc-b1e92794e587 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1986120617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.1986120617 |
| Directory | /workspace/25.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_inter_pkt_delay.1858278608 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 2484960240 ps |
| CPU time | 72.02 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:34:51 PM PDT 24 |
| Peak memory | 217616 kb |
| Host | smart-df00670e-e28a-4c7d-ad7b-79ce8ce1df42 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1858278608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1858278608 |
| Directory | /workspace/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_length_in_transaction.2938441471 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 266368030 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:33:40 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-db7df0c5-855e-4d6a-875d-104c0722487c |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2938441471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.2938441471 |
| Directory | /workspace/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_length_out_transaction.3169687226 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 199495265 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:34:00 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-2e45de8f-e59b-46f9-a297-f77b7d0d69a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31696 87226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.3169687226 |
| Directory | /workspace/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_inter_pkt_delay.961516645 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 3402174846 ps |
| CPU time | 25.29 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:34:14 PM PDT 24 |
| Peak memory | 217608 kb |
| Host | smart-d62449b4-18bc-4a5c-85a6-14a2acef2920 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=961516645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.961516645 |
| Directory | /workspace/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_length_in_transaction.1811122857 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 208439912 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:47 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-5f540fc6-029a-4016-91ad-d8a307f900ec |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1811122857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.1811122857 |
| Directory | /workspace/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_length_out_transaction.1563258110 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 137534473 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:33 PM PDT 24 |
| Finished | Aug 12 06:33:34 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-d074e79f-1f54-4184-bada-e8170b0e3009 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15632 58110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.1563258110 |
| Directory | /workspace/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_nak_trans.3432323515 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 200625299 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:33:45 PM PDT 24 |
| Finished | Aug 12 06:33:46 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-8908a082-c97e-4173-b656-511ac307983d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34323 23515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_nak_trans.3432323515 |
| Directory | /workspace/25.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_iso.1472110834 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 185111752 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:33:32 PM PDT 24 |
| Finished | Aug 12 06:33:33 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ce3ca551-1291-4f5b-bb00-fee65f5822b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14721 10834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_iso.1472110834 |
| Directory | /workspace/25.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_stall.740109892 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 148361634 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-160ba43b-3f3a-4240-aab7-963bf1be303d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74010 9892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_stall.740109892 |
| Directory | /workspace/25.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_trans_nak.590776983 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 169112154 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:33:39 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-0607c7b6-3f01-42a4-a288-1a4b8207bf28 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59077 6983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_trans_nak.590776983 |
| Directory | /workspace/25.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/25.usbdev_pending_in_trans.3619902487 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 156493168 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:53 PM PDT 24 |
| Finished | Aug 12 06:33:54 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-04a187f1-9a9f-4c4b-9298-efba271391a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36199 02487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pending_in_trans.3619902487 |
| Directory | /workspace/25.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_config_pinflip.3497208351 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 250178312 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a89062c5-5607-43d3-aba1-c2b2344a4442 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3497208351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.3497208351 |
| Directory | /workspace/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_config_usb_ref_disable.4098631671 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 152939324 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:34:00 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-24de05c5-e227-451a-ba52-d71d7acef74a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40986 31671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.4098631671 |
| Directory | /workspace/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_pins_sense.2408467098 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 72781218 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207256 kb |
| Host | smart-fba34147-b73b-43c2-8244-bf4bbec367ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24084 67098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.2408467098 |
| Directory | /workspace/25.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_buffer.2109156191 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 6177121051 ps |
| CPU time | 16.63 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:34:16 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-6d0a2045-f7e2-4f6f-bca5-afe46b2e9ae2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21091 56191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_buffer.2109156191 |
| Directory | /workspace/25.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_received.2119802634 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 215241065 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-aaabbd03-091c-4625-97bf-818e362da33c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21198 02634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_received.2119802634 |
| Directory | /workspace/25.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_sent.2197646947 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 227879844 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:45 PM PDT 24 |
| Finished | Aug 12 06:33:46 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-987e1a3b-8148-4038-870b-6cddf915d875 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21976 46947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_sent.2197646947 |
| Directory | /workspace/25.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/25.usbdev_random_length_in_transaction.581552217 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 225689773 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-c357d848-cdc8-4f5f-adc3-867e2e56bde6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58155 2217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_in_transaction.581552217 |
| Directory | /workspace/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_random_length_out_transaction.2568932059 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 194081426 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ba1151ce-eec9-469c-be57-03f8fc0f1b72 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25689 32059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.2568932059 |
| Directory | /workspace/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_rx_crc_err.902372980 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 194718191 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-e87221ac-7633-4159-aeb4-21dcd8edc440 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90237 2980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_rx_crc_err.902372980 |
| Directory | /workspace/25.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_rx_full.4045776643 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 320981988 ps |
| CPU time | 1.22 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-b4bb326e-5155-471b-ba40-2d11b73c5b9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40457 76643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_rx_full.4045776643 |
| Directory | /workspace/25.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/25.usbdev_setup_stage.1093011214 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 142591181 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:43 PM PDT 24 |
| Finished | Aug 12 06:33:44 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-5eb1b24f-5d67-490e-8ad9-e0bbe14043e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10930 11214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_setup_stage.1093011214 |
| Directory | /workspace/25.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/25.usbdev_setup_trans_ignored.1331281071 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 150274738 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:53 PM PDT 24 |
| Finished | Aug 12 06:33:54 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-4229e60b-9809-4fbb-bcb2-6477da68bac2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13312 81071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_setup_trans_ignored.1331281071 |
| Directory | /workspace/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/25.usbdev_smoke.1484675040 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 267121196 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-7403fe17-4a8f-4eae-8551-f70f3637a097 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14846 75040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.1484675040 |
| Directory | /workspace/25.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/25.usbdev_spurious_pids_ignored.3537584059 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 3420584085 ps |
| CPU time | 97.1 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:35:25 PM PDT 24 |
| Peak memory | 217796 kb |
| Host | smart-b8eae995-eb98-4025-82c0-f89c19d749d4 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3537584059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.3537584059 |
| Directory | /workspace/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/25.usbdev_stall_priority_over_nak.2906969658 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 201334725 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0ce31eb6-72fc-4df4-9eda-e362f17fc790 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29069 69658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.2906969658 |
| Directory | /workspace/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/25.usbdev_stall_trans.2079731048 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 154828617 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-b41d5b2f-92a1-4132-9b15-4fa1aacaacec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20797 31048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_trans.2079731048 |
| Directory | /workspace/25.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_stream_len_max.4212750873 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 272600355 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-978fbcd8-7461-497e-b333-890d568ad34a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42127 50873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.4212750873 |
| Directory | /workspace/25.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/25.usbdev_streaming_out.1952398948 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 2492993760 ps |
| CPU time | 73.35 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:35:04 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-ad5cdcda-e178-4ba7-9980-ddf6f2c98562 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19523 98948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_streaming_out.1952398948 |
| Directory | /workspace/25.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/25.usbdev_timeout_missing_host_handshake.3643009436 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 860575048 ps |
| CPU time | 5.17 seconds |
| Started | Aug 12 06:33:43 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-ed1cc72c-38f6-40be-b592-a7215c7305de |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3643009436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_hos t_handshake.3643009436 |
| Directory | /workspace/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/25.usbdev_tx_rx_disruption.1670215883 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 455044720 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-30aaf50b-ea18-4f77-a1b0-3b721fe16383 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1670215883 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_tx_rx_disruption.1670215883 |
| Directory | /workspace/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/250.usbdev_tx_rx_disruption.4232046174 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 614017306 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-96765e53-4c62-42f8-b52a-891c61f6039a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4232046174 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 250.usbdev_tx_rx_disruption.4232046174 |
| Directory | /workspace/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/251.usbdev_tx_rx_disruption.1418560919 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 619902252 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:37:53 PM PDT 24 |
| Finished | Aug 12 06:37:54 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-feed522c-1176-4ae0-9c25-b7c0f34423b0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1418560919 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 251.usbdev_tx_rx_disruption.1418560919 |
| Directory | /workspace/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/252.usbdev_tx_rx_disruption.3915817549 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 591843581 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:03 PM PDT 24 |
| Finished | Aug 12 06:38:05 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-6bd0e963-25be-4d59-a357-5ee1c38f6a95 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3915817549 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 252.usbdev_tx_rx_disruption.3915817549 |
| Directory | /workspace/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/253.usbdev_tx_rx_disruption.1391965159 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 676182949 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:38:18 PM PDT 24 |
| Finished | Aug 12 06:38:20 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-1d48c4b1-b66b-4634-93a2-d88b6ff359cc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1391965159 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 253.usbdev_tx_rx_disruption.1391965159 |
| Directory | /workspace/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/254.usbdev_tx_rx_disruption.892695840 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 564686191 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ba131ee4-06f1-46e5-b9d5-3a02143cebf3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=892695840 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 254.usbdev_tx_rx_disruption.892695840 |
| Directory | /workspace/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/255.usbdev_tx_rx_disruption.3448291201 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 524981218 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:38:01 PM PDT 24 |
| Finished | Aug 12 06:38:03 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-f4dd05fb-2c75-46f9-b88a-b138b43f3d08 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3448291201 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 255.usbdev_tx_rx_disruption.3448291201 |
| Directory | /workspace/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/256.usbdev_tx_rx_disruption.4130708863 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 694851338 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:37:48 PM PDT 24 |
| Finished | Aug 12 06:37:50 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-75b83702-ac88-4621-a0a2-d4dd598dc9f9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4130708863 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 256.usbdev_tx_rx_disruption.4130708863 |
| Directory | /workspace/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/257.usbdev_tx_rx_disruption.1374743875 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 454609012 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:38:16 PM PDT 24 |
| Finished | Aug 12 06:38:17 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7c6b68b6-0d4c-4348-a13b-35051ff5e10a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1374743875 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 257.usbdev_tx_rx_disruption.1374743875 |
| Directory | /workspace/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/258.usbdev_tx_rx_disruption.2630546425 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 517799433 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:06 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-6120f568-d9e2-4072-bc23-725c079d17ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2630546425 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 258.usbdev_tx_rx_disruption.2630546425 |
| Directory | /workspace/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/259.usbdev_tx_rx_disruption.3472596656 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 558992208 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:06 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-400a155b-8798-499f-a83e-23fd92b2441d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3472596656 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 259.usbdev_tx_rx_disruption.3472596656 |
| Directory | /workspace/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/26.usbdev_alert_test.2701288851 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 54266054 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:33:46 PM PDT 24 |
| Finished | Aug 12 06:33:47 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-fe0380d3-96d5-4aff-b57c-d18f0f9f1f1d |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2701288851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.2701288851 |
| Directory | /workspace/26.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_disconnect.912563562 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 12333321171 ps |
| CPU time | 18.97 seconds |
| Started | Aug 12 06:33:44 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-4a52548e-d358-4434-9693-cb712e53ea05 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=912563562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_ao n_wake_disconnect.912563562 |
| Directory | /workspace/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_reset.376684402 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 15451159371 ps |
| CPU time | 18.02 seconds |
| Started | Aug 12 06:33:43 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-0d415249-79aa-43ab-9bab-8ab44456cc88 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=376684402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.376684402 |
| Directory | /workspace/26.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_resume.4049740652 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 25879426455 ps |
| CPU time | 34.57 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:34:31 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-573f21fd-806a-42c3-8e91-3eb7451e36a8 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4049740652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_a on_wake_resume.4049740652 |
| Directory | /workspace/26.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/26.usbdev_av_buffer.2415269269 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 188226964 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:33:39 PM PDT 24 |
| Finished | Aug 12 06:33:40 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-fd1e5a25-d68a-4f41-826b-6c4252f8f365 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24152 69269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_av_buffer.2415269269 |
| Directory | /workspace/26.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/26.usbdev_bitstuff_err.3829896563 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 161061400 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-9cc8f7ee-4a88-4837-80e7-49b6f6298d1d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38298 96563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_bitstuff_err.3829896563 |
| Directory | /workspace/26.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_data_toggle_clear.2828306593 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 487334351 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:33:42 PM PDT 24 |
| Finished | Aug 12 06:33:44 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f7d136c9-32a5-46ea-93e4-b95061d89201 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28283 06593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_clear.2828306593 |
| Directory | /workspace/26.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/26.usbdev_data_toggle_restore.406935135 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 311238924 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4f49912b-8b5e-4ea8-9a6e-4570633f2816 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=406935135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.406935135 |
| Directory | /workspace/26.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/26.usbdev_device_address.2316070352 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 15247317376 ps |
| CPU time | 28.02 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:28 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-6c11d7a7-1112-4e04-8616-e0ea54078c5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23160 70352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.2316070352 |
| Directory | /workspace/26.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/26.usbdev_device_timeout.2266718459 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 5687304557 ps |
| CPU time | 37.25 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:34:28 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-fe527d78-dd53-4d09-97ae-a90e2f3730e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2266718459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.2266718459 |
| Directory | /workspace/26.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/26.usbdev_disable_endpoint.186893028 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 813316943 ps |
| CPU time | 1.92 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:57 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-1a524b4f-bff7-41ba-870c-f0cb35023b4f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18689 3028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_disable_endpoint.186893028 |
| Directory | /workspace/26.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/26.usbdev_disconnected.257843592 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 173027490 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:38 PM PDT 24 |
| Finished | Aug 12 06:33:38 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-f1442126-3a71-4cbe-89ae-d6ef55ebcb6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25784 3592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_disconnected.257843592 |
| Directory | /workspace/26.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/26.usbdev_enable.3392692048 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 48177584 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-3f998958-0d52-4bf9-a539-9391a91155e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33926 92048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_enable.3392692048 |
| Directory | /workspace/26.usbdev_enable/latest |
| Test location | /workspace/coverage/default/26.usbdev_endpoint_access.1771427856 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 761580929 ps |
| CPU time | 2.08 seconds |
| Started | Aug 12 06:33:53 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-d26f5a01-c3df-4870-9162-e63b66bdf8d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17714 27856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.1771427856 |
| Directory | /workspace/26.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/26.usbdev_endpoint_types.946873571 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 337182349 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:33:40 PM PDT 24 |
| Finished | Aug 12 06:33:42 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-8acbe50b-b8ff-46a1-b07b-e6d9c6193797 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=946873571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.946873571 |
| Directory | /workspace/26.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/26.usbdev_fifo_rst.1001258634 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 177972279 ps |
| CPU time | 2.25 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-cd2ffbd3-1337-49b6-b005-037c7ab4be8d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10012 58634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_fifo_rst.1001258634 |
| Directory | /workspace/26.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_iso.36794336 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 193924178 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:33:53 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-8dd2abe1-459d-4c51-8cc8-d958334adcd2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=36794336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.36794336 |
| Directory | /workspace/26.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_stall.2481694429 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 146792068 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-7fad9071-ce23-48f6-889b-1305e4e7b05c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24816 94429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_stall.2481694429 |
| Directory | /workspace/26.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_trans.115737767 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 161244405 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d3f995c3-36e4-485c-a6f6-09e883a795e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11573 7767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_trans.115737767 |
| Directory | /workspace/26.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_invalid_sync.2025483065 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 4888368396 ps |
| CPU time | 38.6 seconds |
| Started | Aug 12 06:33:42 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 224076 kb |
| Host | smart-2c54727e-33f5-4a87-9925-9019378ab47a |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2025483065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.2025483065 |
| Directory | /workspace/26.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/26.usbdev_iso_retraction.3795940777 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 3694171161 ps |
| CPU time | 23.65 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:34:18 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-07ddc915-bb8d-48f8-a19d-06387bbe6237 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3795940777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.3795940777 |
| Directory | /workspace/26.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_in_err.3469519642 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 224568151 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e5d6b33e-f360-4b7f-9733-1edbe448f840 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34695 19642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_in_err.3469519642 |
| Directory | /workspace/26.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_resume.4202091905 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 26694861480 ps |
| CPU time | 43.29 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-7dfe0e71-3b06-40be-b317-13d25d065f2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42020 91905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_resume.4202091905 |
| Directory | /workspace/26.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_suspend.4098020784 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 5587767324 ps |
| CPU time | 7.27 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-4244eb51-8a6a-44be-9e7b-7f6a15a44970 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40980 20784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_suspend.4098020784 |
| Directory | /workspace/26.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/26.usbdev_low_speed_traffic.3403347744 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 3799949364 ps |
| CPU time | 106.65 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:35:38 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-35f57192-fa3a-4432-9e45-37f62e852b3c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3403347744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.3403347744 |
| Directory | /workspace/26.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_inter_pkt_delay.1209894037 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 2969194454 ps |
| CPU time | 86.27 seconds |
| Started | Aug 12 06:33:58 PM PDT 24 |
| Finished | Aug 12 06:35:25 PM PDT 24 |
| Peak memory | 217348 kb |
| Host | smart-a09842a6-b8ab-48c0-b759-539bb7d8f006 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1209894037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.1209894037 |
| Directory | /workspace/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_length_in_transaction.865946507 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 249167313 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-77dc4432-bee9-4ee7-b2c0-245e191a83bf |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=865946507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.865946507 |
| Directory | /workspace/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_length_out_transaction.1315055335 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 192958584 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:33:45 PM PDT 24 |
| Finished | Aug 12 06:33:47 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-6f224cc1-0158-46c4-8b69-3d0d3228b2e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13150 55335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.1315055335 |
| Directory | /workspace/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_inter_pkt_delay.3231747274 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 2446651687 ps |
| CPU time | 68.76 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:35:04 PM PDT 24 |
| Peak memory | 224060 kb |
| Host | smart-ab4ba543-f58c-4644-98da-733dad90f46e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3231747274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.3231747274 |
| Directory | /workspace/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_length_in_transaction.3027495350 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 158419543 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-b8364894-149c-44a0-a19c-8a13f6ad50fb |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3027495350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.3027495350 |
| Directory | /workspace/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_length_out_transaction.2872913639 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 148613585 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ae549ba0-bc65-40ff-82c8-78934fe5fcdd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28729 13639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.2872913639 |
| Directory | /workspace/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_nak_trans.2403926743 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 235974111 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:33:44 PM PDT 24 |
| Finished | Aug 12 06:33:45 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-bc708fdf-1b69-4e15-87c3-243891dc4129 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24039 26743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_nak_trans.2403926743 |
| Directory | /workspace/26.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_iso.3639703644 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 174432546 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:47 PM PDT 24 |
| Finished | Aug 12 06:33:48 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-5a7f225f-a834-410c-9b25-b4fc783928c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36397 03644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_iso.3639703644 |
| Directory | /workspace/26.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_stall.3211269783 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 203993288 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:02 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e4abdd12-aff8-4df6-b7b3-85131b555aa4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32112 69783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_stall.3211269783 |
| Directory | /workspace/26.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_trans_nak.1008317254 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 167035355 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-e44ac46c-76a3-4714-b5ce-2edda2ed58a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10083 17254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_trans_nak.1008317254 |
| Directory | /workspace/26.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/26.usbdev_pending_in_trans.3117020053 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 205465171 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-a86373c6-4fc0-4365-9443-cd649bc848e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31170 20053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pending_in_trans.3117020053 |
| Directory | /workspace/26.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_config_pinflip.3127034162 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 237464074 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-c4b32aef-eee8-4e7e-8950-df3a56ca5d4b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3127034162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3127034162 |
| Directory | /workspace/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_config_usb_ref_disable.254128566 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 146386395 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:33:42 PM PDT 24 |
| Finished | Aug 12 06:33:43 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a060d980-5c9a-4b51-9dde-a50c916c1d2a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25412 8566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.254128566 |
| Directory | /workspace/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_pins_sense.2395907877 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 43372837 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:33:46 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7cbf5a21-4976-455e-bac3-dd06eca7125a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23959 07877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.2395907877 |
| Directory | /workspace/26.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_buffer.1444792738 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 10058234423 ps |
| CPU time | 25.65 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:34:15 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-2085c693-258a-4493-97ba-a1413ef60f5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14447 92738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_buffer.1444792738 |
| Directory | /workspace/26.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_received.443275277 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 198339693 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-04fcc236-0f4c-4905-be26-712849d3cee8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44327 5277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_received.443275277 |
| Directory | /workspace/26.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_sent.1571535585 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 206543729 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-9daf507a-c4b2-430b-8906-85bbc2b5236e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15715 35585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_sent.1571535585 |
| Directory | /workspace/26.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/26.usbdev_random_length_in_transaction.1921227083 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 162431163 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-d6f4a0d8-5921-4640-b6de-806f8d17a4eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19212 27083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_in_transaction.1921227083 |
| Directory | /workspace/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_random_length_out_transaction.2589826847 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 205901912 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-b15a6fb7-e444-4b94-9645-0d7c281ccddf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25898 26847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.2589826847 |
| Directory | /workspace/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_rx_crc_err.1451326661 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 148437628 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:33:47 PM PDT 24 |
| Finished | Aug 12 06:33:48 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-b14b1c5e-bc9b-48b3-bc3e-fa56925bf044 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14513 26661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_rx_crc_err.1451326661 |
| Directory | /workspace/26.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_rx_full.670562914 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 360466348 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-a54ea74f-61a0-478f-a1f1-fa9f5b28a89f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67056 2914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_rx_full.670562914 |
| Directory | /workspace/26.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/26.usbdev_setup_stage.3893304156 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 157042757 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:33:42 PM PDT 24 |
| Finished | Aug 12 06:33:43 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-b61291c6-bfb6-4678-95bb-fcbe7a9847cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38933 04156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_setup_stage.3893304156 |
| Directory | /workspace/26.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/26.usbdev_setup_trans_ignored.69990524 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 158394315 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:45 PM PDT 24 |
| Finished | Aug 12 06:33:46 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-81404abf-d809-4250-bfdf-0dd2f960cc3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69990 524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_setup_trans_ignored.69990524 |
| Directory | /workspace/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/26.usbdev_smoke.3515709646 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 269119073 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:33:44 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-cc047c2d-66cc-46f9-b253-6b14707bd499 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35157 09646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.3515709646 |
| Directory | /workspace/26.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/26.usbdev_spurious_pids_ignored.3065354274 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 3540179990 ps |
| CPU time | 105.08 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:35:44 PM PDT 24 |
| Peak memory | 217812 kb |
| Host | smart-a5b8e68d-63b7-4dda-bc1a-757c741966c7 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3065354274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.3065354274 |
| Directory | /workspace/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/26.usbdev_stall_priority_over_nak.55559683 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 164297491 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-5c708b4f-1d23-4178-91fd-e01e869de5d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55559 683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ass ert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.55559683 |
| Directory | /workspace/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/26.usbdev_stall_trans.21987867 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 185869331 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-66c85ae7-2bc1-4a06-9f47-8b67819430af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21987 867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_trans.21987867 |
| Directory | /workspace/26.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_stream_len_max.1460937388 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 434218570 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:33:46 PM PDT 24 |
| Finished | Aug 12 06:33:48 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-74662822-5dbd-4423-b04e-bf1668bb8b40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14609 37388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.1460937388 |
| Directory | /workspace/26.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/26.usbdev_streaming_out.3845146659 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 2919892767 ps |
| CPU time | 29.02 seconds |
| Started | Aug 12 06:33:41 PM PDT 24 |
| Finished | Aug 12 06:34:10 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-d17ca9f7-9792-4304-b873-f1761b5c5857 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38451 46659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_streaming_out.3845146659 |
| Directory | /workspace/26.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/26.usbdev_timeout_missing_host_handshake.2006602139 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 1833911914 ps |
| CPU time | 43.68 seconds |
| Started | Aug 12 06:33:43 PM PDT 24 |
| Finished | Aug 12 06:34:27 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-0802a70e-28e9-4931-88c4-549672446e3d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2006602139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_hos t_handshake.2006602139 |
| Directory | /workspace/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/26.usbdev_tx_rx_disruption.3357521531 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 510875122 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:33:45 PM PDT 24 |
| Finished | Aug 12 06:33:47 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-016c1457-9cee-4003-8dfe-211f20b68369 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3357521531 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_tx_rx_disruption.3357521531 |
| Directory | /workspace/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/260.usbdev_tx_rx_disruption.4277159633 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 463768979 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:38 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-fcd38101-366a-446c-9a2a-6c9247f427d4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4277159633 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 260.usbdev_tx_rx_disruption.4277159633 |
| Directory | /workspace/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/261.usbdev_tx_rx_disruption.169266455 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 515283461 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:38:01 PM PDT 24 |
| Finished | Aug 12 06:38:03 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-28035894-221d-40e8-96c9-6360a600a731 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=169266455 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 261.usbdev_tx_rx_disruption.169266455 |
| Directory | /workspace/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/262.usbdev_tx_rx_disruption.1464769498 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 612174939 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-73ffe7a4-d610-4fb8-a281-528a2ff9abc9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1464769498 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 262.usbdev_tx_rx_disruption.1464769498 |
| Directory | /workspace/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/263.usbdev_tx_rx_disruption.3236992585 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 399269214 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:37:54 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-cca2909a-c94b-4282-803e-bf2852ae192b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3236992585 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 263.usbdev_tx_rx_disruption.3236992585 |
| Directory | /workspace/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/264.usbdev_tx_rx_disruption.2204324678 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 552186206 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6802cc9d-24ad-40eb-b2a2-41158e5d1d24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2204324678 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 264.usbdev_tx_rx_disruption.2204324678 |
| Directory | /workspace/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/265.usbdev_tx_rx_disruption.1557313373 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 536644216 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:37:48 PM PDT 24 |
| Finished | Aug 12 06:37:50 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3d3efffb-06be-4e40-a8a0-2cf76e1bb204 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1557313373 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 265.usbdev_tx_rx_disruption.1557313373 |
| Directory | /workspace/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/266.usbdev_tx_rx_disruption.2432970053 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 442660568 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:37:44 PM PDT 24 |
| Finished | Aug 12 06:37:45 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-41ecf040-dfee-4ed2-91f0-5084d1c92f38 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2432970053 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 266.usbdev_tx_rx_disruption.2432970053 |
| Directory | /workspace/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/267.usbdev_tx_rx_disruption.269507321 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 545912036 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:37:53 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-0e04bafe-5cbc-4f5f-b2bd-966d89267fa4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=269507321 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 267.usbdev_tx_rx_disruption.269507321 |
| Directory | /workspace/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/268.usbdev_tx_rx_disruption.4238270518 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 465167712 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:37:55 PM PDT 24 |
| Finished | Aug 12 06:37:56 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-cde6b305-a5fe-42ac-ba88-f408c849e929 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4238270518 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 268.usbdev_tx_rx_disruption.4238270518 |
| Directory | /workspace/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/269.usbdev_tx_rx_disruption.543566493 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 525478077 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:37:42 PM PDT 24 |
| Finished | Aug 12 06:37:49 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-3bffa65e-4c9a-498b-bd4c-e0605b4119ab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=543566493 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 269.usbdev_tx_rx_disruption.543566493 |
| Directory | /workspace/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/27.usbdev_alert_test.161036813 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 37749689 ps |
| CPU time | 0.64 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:00 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-185e548b-8d0d-4f46-95c2-fb1fe3bb4cbf |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=161036813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.161036813 |
| Directory | /workspace/27.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_disconnect.2102879009 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 4772054617 ps |
| CPU time | 7.19 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:57 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-c3aa0e40-d2d7-4f47-95e1-7fc2dbbb543e |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2102879009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_a on_wake_disconnect.2102879009 |
| Directory | /workspace/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_reset.4078578189 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 18515927869 ps |
| CPU time | 25.21 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-e212bdb9-b6c1-4036-a8ee-c1a7f7df391d |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4078578189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.4078578189 |
| Directory | /workspace/27.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_resume.4102085063 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 30549900029 ps |
| CPU time | 33.78 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-bd681f58-fec7-4ac5-983e-f63636c51cff |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4102085063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_a on_wake_resume.4102085063 |
| Directory | /workspace/27.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/27.usbdev_av_buffer.311287087 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 157429987 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-a5731cbd-db6d-4e18-b34e-36721e67674a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31128 7087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_av_buffer.311287087 |
| Directory | /workspace/27.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/27.usbdev_bitstuff_err.207106582 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 174103311 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:58 PM PDT 24 |
| Finished | Aug 12 06:33:59 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7e2d7cc4-a1ad-4054-86a4-321f347f1baf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20710 6582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_bitstuff_err.207106582 |
| Directory | /workspace/27.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_data_toggle_clear.3192951917 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 324616649 ps |
| CPU time | 1.2 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-4b709235-dacb-4dbc-9b36-11ec4fc09aa4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31929 51917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_clear.3192951917 |
| Directory | /workspace/27.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/27.usbdev_data_toggle_restore.1708813190 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 914175664 ps |
| CPU time | 2.5 seconds |
| Started | Aug 12 06:33:58 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-c7d30e8f-1a2e-4540-831e-ad2da109fee0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1708813190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.1708813190 |
| Directory | /workspace/27.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/27.usbdev_device_address.163244018 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 14387664401 ps |
| CPU time | 23 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:34:18 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-76448525-3d70-493b-a1fd-72faeb7c6573 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16324 4018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.163244018 |
| Directory | /workspace/27.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/27.usbdev_device_timeout.3893906341 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 428607779 ps |
| CPU time | 8.32 seconds |
| Started | Aug 12 06:34:02 PM PDT 24 |
| Finished | Aug 12 06:34:10 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-990be467-bd8b-4de3-ae87-95a77e8dd1bf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3893906341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.3893906341 |
| Directory | /workspace/27.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/27.usbdev_disable_endpoint.3000512307 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 357494034 ps |
| CPU time | 1.27 seconds |
| Started | Aug 12 06:33:44 PM PDT 24 |
| Finished | Aug 12 06:33:45 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0c7209a4-b9ca-4f77-9072-296bebc23860 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30005 12307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_disable_endpoint.3000512307 |
| Directory | /workspace/27.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/27.usbdev_disconnected.3743747003 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 180906131 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:47 PM PDT 24 |
| Finished | Aug 12 06:33:48 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c421e874-0f6c-418d-8f70-59e2af81d6b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37437 47003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_disconnected.3743747003 |
| Directory | /workspace/27.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/27.usbdev_enable.3424181308 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 58139231 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ee296bb2-f11d-41f4-8f84-af502f92aa95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34241 81308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.3424181308 |
| Directory | /workspace/27.usbdev_enable/latest |
| Test location | /workspace/coverage/default/27.usbdev_endpoint_access.1523560408 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 1003474636 ps |
| CPU time | 2.52 seconds |
| Started | Aug 12 06:33:58 PM PDT 24 |
| Finished | Aug 12 06:34:00 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-7f6d9a56-afd5-4e19-9452-2c4d0ad47d6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15235 60408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.1523560408 |
| Directory | /workspace/27.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/27.usbdev_endpoint_types.3027615136 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 194415869 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:34:10 PM PDT 24 |
| Finished | Aug 12 06:34:11 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-7295c6a5-e2bb-44c9-abd0-36fd99878020 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3027615136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.3027615136 |
| Directory | /workspace/27.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/27.usbdev_fifo_rst.3595515477 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 411145408 ps |
| CPU time | 2.93 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:33:54 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-c29f8285-616b-4098-8514-68542a86de54 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35955 15477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_fifo_rst.3595515477 |
| Directory | /workspace/27.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_iso.959978372 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 237529823 ps |
| CPU time | 1.17 seconds |
| Started | Aug 12 06:33:46 PM PDT 24 |
| Finished | Aug 12 06:33:48 PM PDT 24 |
| Peak memory | 215812 kb |
| Host | smart-9106dec7-35d8-4b19-9e1a-0ffcf2bf456b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=959978372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.959978372 |
| Directory | /workspace/27.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_stall.2581015153 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 158905474 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:03 PM PDT 24 |
| Finished | Aug 12 06:34:04 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-3bfbc2a4-29ad-4bd7-8e55-98a6c3430ffb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25810 15153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_stall.2581015153 |
| Directory | /workspace/27.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_trans.2340503547 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 192164309 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-60c788d5-f33c-445f-83c2-d3d5c4855c27 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23405 03547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_trans.2340503547 |
| Directory | /workspace/27.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_invalid_sync.1415127437 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 4745146202 ps |
| CPU time | 130.15 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 217712 kb |
| Host | smart-2271fdd8-c1fa-4206-9fa2-489a000e78b3 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1415127437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.1415127437 |
| Directory | /workspace/27.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/27.usbdev_iso_retraction.2343126344 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 7281686355 ps |
| CPU time | 83.89 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:35:23 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-8598d458-1126-4706-a9e5-955c8ac1f43b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2343126344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.2343126344 |
| Directory | /workspace/27.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_in_err.2633092710 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 242684956 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-dddf9ca3-3cbe-40e2-9124-2313a51714a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26330 92710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_in_err.2633092710 |
| Directory | /workspace/27.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_resume.898821331 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 34313482152 ps |
| CPU time | 56.83 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-bb858bb2-b7e1-427d-92a7-f4af8053da3b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89882 1331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_resume.898821331 |
| Directory | /workspace/27.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_suspend.4145042003 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 11290700764 ps |
| CPU time | 16.14 seconds |
| Started | Aug 12 06:33:58 PM PDT 24 |
| Finished | Aug 12 06:34:14 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-41894055-c6cf-4e4d-90bd-172e82c5161d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41450 42003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_suspend.4145042003 |
| Directory | /workspace/27.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_inter_pkt_delay.2385045676 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 2547923203 ps |
| CPU time | 25.69 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:34:17 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-d4288d6f-6764-413f-b0cb-f136492e22e1 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2385045676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.2385045676 |
| Directory | /workspace/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_length_in_transaction.1425697362 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 255156967 ps |
| CPU time | 1.17 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-2cddeeff-c2b4-47a3-b30c-4b887999a536 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1425697362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.1425697362 |
| Directory | /workspace/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_length_out_transaction.2008725701 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 221389979 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-0a6aea18-2c9e-440b-94ab-398377333b15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20087 25701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.2008725701 |
| Directory | /workspace/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_inter_pkt_delay.870600596 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 1975027554 ps |
| CPU time | 14.89 seconds |
| Started | Aug 12 06:33:46 PM PDT 24 |
| Finished | Aug 12 06:34:02 PM PDT 24 |
| Peak memory | 217340 kb |
| Host | smart-a05dafae-fe19-4d5f-bddd-f4ff404f0a72 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=870600596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.870600596 |
| Directory | /workspace/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_length_in_transaction.4108344617 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 176538646 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:51 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-cdb3f4bb-55dc-49a1-b845-88df04cc2456 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4108344617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.4108344617 |
| Directory | /workspace/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_length_out_transaction.553401879 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 150082440 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-13ce7f66-2909-4976-a686-7ac3aff67e79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55340 1879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.553401879 |
| Directory | /workspace/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_nak_trans.456851810 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 210304751 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-35331555-1c03-434a-be73-e7fc8e821d3c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45685 1810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_nak_trans.456851810 |
| Directory | /workspace/27.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_iso.918308607 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 167523197 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-30aa3f48-1e6d-444a-9f4d-ddcf6618a295 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91830 8607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_iso.918308607 |
| Directory | /workspace/27.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_stall.2774667055 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 202022453 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-466dd7b4-728b-4aff-9f1f-c3644bd96d21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27746 67055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_stall.2774667055 |
| Directory | /workspace/27.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_trans_nak.3119425216 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 201646640 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-509110a5-c0d1-41dd-b984-adfa037d9af3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31194 25216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_trans_nak.3119425216 |
| Directory | /workspace/27.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/27.usbdev_pending_in_trans.2558006562 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 174848933 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:33:48 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-36f71163-f9f9-45c9-b8e3-2ce15565baf5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25580 06562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pending_in_trans.2558006562 |
| Directory | /workspace/27.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_config_pinflip.1697566180 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 225382925 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-92b958bc-e6df-4b3f-a4f5-ce3b7f62cb7f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1697566180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.1697566180 |
| Directory | /workspace/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_config_usb_ref_disable.3749982870 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 166533322 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:03 PM PDT 24 |
| Finished | Aug 12 06:34:04 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-f465694c-895d-4e68-bd2f-fc8ef8148b6d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37499 82870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.3749982870 |
| Directory | /workspace/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_pins_sense.907094888 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 44484046 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:34:00 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-51ada820-7a10-4730-a315-2b8fba4a62ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90709 4888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.907094888 |
| Directory | /workspace/27.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_buffer.3121321412 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 21046588028 ps |
| CPU time | 54.92 seconds |
| Started | Aug 12 06:33:56 PM PDT 24 |
| Finished | Aug 12 06:34:51 PM PDT 24 |
| Peak memory | 220612 kb |
| Host | smart-94497298-6672-462f-bd4d-a4b05aa954c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31213 21412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_buffer.3121321412 |
| Directory | /workspace/27.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_received.2454824303 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 166242586 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-3b998a94-4019-4e39-a3ae-980c246be192 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24548 24303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_received.2454824303 |
| Directory | /workspace/27.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_sent.2006218656 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 244070578 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:34:00 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-0f71f31a-0158-440e-ac5f-574561cac0df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20062 18656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_sent.2006218656 |
| Directory | /workspace/27.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/27.usbdev_random_length_in_transaction.881803032 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 203023006 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-868bf565-f28f-4d3c-a3aa-4d4527b128a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88180 3032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_in_transaction.881803032 |
| Directory | /workspace/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_random_length_out_transaction.3569413356 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 167665678 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b94dd071-5c65-4228-975b-644458767eba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35694 13356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.3569413356 |
| Directory | /workspace/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_rx_crc_err.815299253 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 138669294 ps |
| CPU time | 0.78 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2a418ff4-2d05-4d38-b8e6-3581b88847dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81529 9253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_rx_crc_err.815299253 |
| Directory | /workspace/27.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_rx_full.4267409088 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 397584817 ps |
| CPU time | 1.37 seconds |
| Started | Aug 12 06:34:06 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-918564c7-8317-40d6-8a05-a56eac8620a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42674 09088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_rx_full.4267409088 |
| Directory | /workspace/27.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/27.usbdev_setup_stage.2355127547 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 188804554 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-be6c4bfc-21b8-4189-977d-e1b0d0c4babb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23551 27547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_setup_stage.2355127547 |
| Directory | /workspace/27.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/27.usbdev_setup_trans_ignored.4067395872 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 151775715 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-326f7926-9ca8-4f9d-9634-eec3e25f50ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40673 95872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_setup_trans_ignored.4067395872 |
| Directory | /workspace/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/27.usbdev_smoke.1594235721 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 205128009 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:33:50 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-63c80477-b591-42c5-ad1b-ac61a3224391 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15942 35721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.1594235721 |
| Directory | /workspace/27.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/27.usbdev_spurious_pids_ignored.3472238005 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 2159201919 ps |
| CPU time | 16.33 seconds |
| Started | Aug 12 06:33:49 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-a1a78f31-df00-487c-a381-1750df08feb9 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3472238005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.3472238005 |
| Directory | /workspace/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/27.usbdev_stall_priority_over_nak.358294882 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 183641572 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-50c84dff-42d2-4f67-963b-2246061aa308 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35829 4882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.358294882 |
| Directory | /workspace/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/27.usbdev_stall_trans.1595934727 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 196140970 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:06 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-72f149b2-e83e-4465-ad0b-f5880b59d694 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15959 34727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_trans.1595934727 |
| Directory | /workspace/27.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_stream_len_max.1717584970 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 520566116 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:57 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-765aa2be-afbb-4dfe-9f02-81dc2b881a7f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17175 84970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.1717584970 |
| Directory | /workspace/27.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/27.usbdev_streaming_out.4232960065 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 3018459489 ps |
| CPU time | 31.03 seconds |
| Started | Aug 12 06:33:51 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 217504 kb |
| Host | smart-a90c3269-fed9-4bab-b1e5-ed558ecb718d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42329 60065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_streaming_out.4232960065 |
| Directory | /workspace/27.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/27.usbdev_timeout_missing_host_handshake.650876383 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 3591403871 ps |
| CPU time | 23.58 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:24 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-bae2ec15-ae0d-402d-99ab-429e578fe672 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=650876383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host _handshake.650876383 |
| Directory | /workspace/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/27.usbdev_tx_rx_disruption.1640119444 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 491395359 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:02 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-70aa166e-685c-4eb0-8b3a-507e5c3c01d8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1640119444 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_tx_rx_disruption.1640119444 |
| Directory | /workspace/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/270.usbdev_tx_rx_disruption.122447342 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 570098406 ps |
| CPU time | 1.78 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-149e28bb-5c65-47e6-a6fe-9304a9451765 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=122447342 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 270.usbdev_tx_rx_disruption.122447342 |
| Directory | /workspace/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/271.usbdev_tx_rx_disruption.351961363 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 528155399 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:38:18 PM PDT 24 |
| Finished | Aug 12 06:38:20 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-4b60293e-5700-4c73-8115-498e29b7d52c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=351961363 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 271.usbdev_tx_rx_disruption.351961363 |
| Directory | /workspace/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/272.usbdev_tx_rx_disruption.379243545 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 535993619 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-dfc9df3e-f6a8-4e44-8bd6-1c838d4cd346 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=379243545 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 272.usbdev_tx_rx_disruption.379243545 |
| Directory | /workspace/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/273.usbdev_tx_rx_disruption.1793948460 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 552417304 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:37:44 PM PDT 24 |
| Finished | Aug 12 06:37:46 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-505350a5-8e89-412d-ad48-6ab36cda31c3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1793948460 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 273.usbdev_tx_rx_disruption.1793948460 |
| Directory | /workspace/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/274.usbdev_tx_rx_disruption.1506157515 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 594781535 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:38:03 PM PDT 24 |
| Finished | Aug 12 06:38:04 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-ad8d6ce4-791e-4de8-9dbc-e4b0631548d8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1506157515 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 274.usbdev_tx_rx_disruption.1506157515 |
| Directory | /workspace/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/275.usbdev_tx_rx_disruption.3064263587 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 480555262 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:49 PM PDT 24 |
| Finished | Aug 12 06:37:50 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-664bbace-fc8a-4082-9fa0-03ca3cda19ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3064263587 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 275.usbdev_tx_rx_disruption.3064263587 |
| Directory | /workspace/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/276.usbdev_tx_rx_disruption.1849192349 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 591436375 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-ac3a052d-60c0-4e37-9c49-c02d30c9fb62 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1849192349 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 276.usbdev_tx_rx_disruption.1849192349 |
| Directory | /workspace/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/277.usbdev_tx_rx_disruption.2419797209 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 562847419 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-f09fd843-79aa-468b-824e-c5a5fd9f5364 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2419797209 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 277.usbdev_tx_rx_disruption.2419797209 |
| Directory | /workspace/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/278.usbdev_tx_rx_disruption.4093671386 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 450690575 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-56dc9578-b7cd-4f22-922d-fba05f4b9fb9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4093671386 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 278.usbdev_tx_rx_disruption.4093671386 |
| Directory | /workspace/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/279.usbdev_tx_rx_disruption.3998050961 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 551072674 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:38:13 PM PDT 24 |
| Finished | Aug 12 06:38:14 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d3a893ec-33ce-4467-b596-602a2237da32 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3998050961 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 279.usbdev_tx_rx_disruption.3998050961 |
| Directory | /workspace/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/28.usbdev_alert_test.3652738559 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 53652803 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-508d2f48-85f7-4bdb-bef9-6357f01a7090 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3652738559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.3652738559 |
| Directory | /workspace/28.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_disconnect.1864284687 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 11926724499 ps |
| CPU time | 15.32 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:34:09 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-a06dab43-2849-4de7-a273-3dc4a17adade |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1864284687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_a on_wake_disconnect.1864284687 |
| Directory | /workspace/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_reset.3026153057 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 15460956321 ps |
| CPU time | 17.63 seconds |
| Started | Aug 12 06:33:59 PM PDT 24 |
| Finished | Aug 12 06:34:17 PM PDT 24 |
| Peak memory | 215828 kb |
| Host | smart-bd9fa681-ab8d-47de-8a28-3858ae4f8009 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3026153057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.3026153057 |
| Directory | /workspace/28.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_resume.4101277800 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 24728246365 ps |
| CPU time | 29.96 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-0c0a38bb-5cce-493f-b795-83d6022fb6fa |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4101277800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_a on_wake_resume.4101277800 |
| Directory | /workspace/28.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/28.usbdev_av_buffer.2207421365 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 163102486 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:33:50 PM PDT 24 |
| Finished | Aug 12 06:33:52 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-f2910853-f72b-4fc4-84e0-d038c56fcf92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22074 21365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_av_buffer.2207421365 |
| Directory | /workspace/28.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/28.usbdev_bitstuff_err.1663057955 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 150276666 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:33:58 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-e6ce7ca1-d6a9-44d3-88ab-3dd4a3068d7c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16630 57955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_bitstuff_err.1663057955 |
| Directory | /workspace/28.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_data_toggle_clear.2072179086 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 464552439 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:02 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-64629ccb-03e9-4210-a3ed-4f427520df85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20721 79086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_clear.2072179086 |
| Directory | /workspace/28.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/28.usbdev_data_toggle_restore.619123487 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 661863781 ps |
| CPU time | 1.81 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-12488214-2f77-489a-b957-28116bcde6a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=619123487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.619123487 |
| Directory | /workspace/28.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/28.usbdev_device_address.1155298048 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 41972695094 ps |
| CPU time | 74.85 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:35:09 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-1a2a53aa-bf33-4970-89b4-6f4f7f321c66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11552 98048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.1155298048 |
| Directory | /workspace/28.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/28.usbdev_device_timeout.654390174 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 410404513 ps |
| CPU time | 8.19 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:10 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-b0a1e05d-e1e8-4e5d-8b0c-c3daaf87f9df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=654390174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.654390174 |
| Directory | /workspace/28.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/28.usbdev_disable_endpoint.2877173415 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 720670509 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:33:53 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-2f919af5-202a-4348-9a7c-ce2ffe8d10b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28771 73415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disable_endpoint.2877173415 |
| Directory | /workspace/28.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/28.usbdev_disconnected.707640823 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 146278820 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:34:03 PM PDT 24 |
| Finished | Aug 12 06:34:04 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b91254b3-72d4-4974-a764-154c44e6dc91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70764 0823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disconnected.707640823 |
| Directory | /workspace/28.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/28.usbdev_enable.210424009 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 45993224 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-0b1bfa98-b33c-4048-ba89-787b60fb3cd5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21042 4009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_enable.210424009 |
| Directory | /workspace/28.usbdev_enable/latest |
| Test location | /workspace/coverage/default/28.usbdev_endpoint_access.2802030379 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 751249801 ps |
| CPU time | 2.3 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-9e8e3d9f-8176-4d62-9409-26ed37482722 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28020 30379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.2802030379 |
| Directory | /workspace/28.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/28.usbdev_endpoint_types.1097247525 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 212788752 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-bce0f18c-18fe-4bbe-a717-8fd045a45cf9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1097247525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.1097247525 |
| Directory | /workspace/28.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/28.usbdev_fifo_rst.2639404656 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 227766434 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:34:06 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-1d7a1db6-c5c4-40ab-9f83-593d9732a773 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26394 04656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_fifo_rst.2639404656 |
| Directory | /workspace/28.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_iso.436922127 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 181410654 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:34:03 PM PDT 24 |
| Finished | Aug 12 06:34:04 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-fb75e19b-79f7-4174-ba23-9210f8f9bad4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=436922127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.436922127 |
| Directory | /workspace/28.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_stall.3448311912 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 156449316 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-924f1ddc-4dc3-4f4e-a0ac-1896a5b0345c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34483 11912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_stall.3448311912 |
| Directory | /workspace/28.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_trans.1699848677 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 213448414 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-74f166ea-434c-4700-9505-503614547189 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16998 48677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_trans.1699848677 |
| Directory | /workspace/28.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_invalid_sync.1795897040 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 4530492694 ps |
| CPU time | 34.43 seconds |
| Started | Aug 12 06:34:07 PM PDT 24 |
| Finished | Aug 12 06:34:42 PM PDT 24 |
| Peak memory | 217840 kb |
| Host | smart-10db8285-b400-4527-b8d8-688e2df2fa6d |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1795897040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.1795897040 |
| Directory | /workspace/28.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/28.usbdev_iso_retraction.66150947 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 3566144714 ps |
| CPU time | 46.39 seconds |
| Started | Aug 12 06:33:57 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-20220cb3-4719-4408-aa09-cb33823f8770 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=66150947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.66150947 |
| Directory | /workspace/28.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_in_err.662756408 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 240083430 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ffe17a4a-d29a-4e9b-a1f0-7aa51752149d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66275 6408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_in_err.662756408 |
| Directory | /workspace/28.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_resume.294041177 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 29534332116 ps |
| CPU time | 51.56 seconds |
| Started | Aug 12 06:33:53 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 216064 kb |
| Host | smart-4fedbcfc-9bf6-459d-bc68-2ea2e3773657 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29404 1177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_resume.294041177 |
| Directory | /workspace/28.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_suspend.1316191039 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 9622969152 ps |
| CPU time | 11.5 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:13 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-8b5146e7-f3a0-40bb-8fd5-d14672be58b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13161 91039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_suspend.1316191039 |
| Directory | /workspace/28.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/28.usbdev_low_speed_traffic.3504871011 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 3679335471 ps |
| CPU time | 101.9 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:35:47 PM PDT 24 |
| Peak memory | 218260 kb |
| Host | smart-794f0eb8-fce1-4215-b4fa-7f75ba757b41 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3504871011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.3504871011 |
| Directory | /workspace/28.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_inter_pkt_delay.2045949179 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 3758914789 ps |
| CPU time | 110.8 seconds |
| Started | Aug 12 06:34:09 PM PDT 24 |
| Finished | Aug 12 06:36:00 PM PDT 24 |
| Peak memory | 217288 kb |
| Host | smart-fec55ce8-ac77-487d-b92b-3fd2f53711b8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2045949179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.2045949179 |
| Directory | /workspace/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_length_in_transaction.3103712873 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 243588480 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-71f8c8ba-8061-4879-800c-35ea42a15a9b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3103712873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.3103712873 |
| Directory | /workspace/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_length_out_transaction.3040899549 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 192614974 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:34:14 PM PDT 24 |
| Finished | Aug 12 06:34:15 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-80b91bb2-ccfe-4056-817f-99b4663455bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30408 99549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.3040899549 |
| Directory | /workspace/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_inter_pkt_delay.815312955 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 2391365342 ps |
| CPU time | 70.52 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:35:30 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-82f4af70-e7d8-41f1-9fb4-8fb43f694e03 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=815312955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.815312955 |
| Directory | /workspace/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_length_in_transaction.1005556330 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 221946927 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ff2b9629-822b-464a-b3b2-56437488f283 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1005556330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.1005556330 |
| Directory | /workspace/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_length_out_transaction.4122136638 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 147665959 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-af8c1ca1-27e1-4185-85a5-565e4a441120 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41221 36638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.4122136638 |
| Directory | /workspace/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_nak_trans.1476401845 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 172592985 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:03 PM PDT 24 |
| Finished | Aug 12 06:34:04 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bd00d529-b224-4986-ac71-9fe0769713d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14764 01845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_nak_trans.1476401845 |
| Directory | /workspace/28.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_iso.978297906 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 251876733 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-fa84c9cc-f262-4cb1-9281-8204c0f8951e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97829 7906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_iso.978297906 |
| Directory | /workspace/28.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_stall.1489372308 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 210865554 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:05 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-6b417699-64ba-4443-8b9a-81ee7ec56a8d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14893 72308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_stall.1489372308 |
| Directory | /workspace/28.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_trans_nak.1477543298 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 173070225 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:07 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-f9eb5137-82a6-4495-9cf4-741789fd3359 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14775 43298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_trans_nak.1477543298 |
| Directory | /workspace/28.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/28.usbdev_pending_in_trans.3079457446 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 156047866 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:11 PM PDT 24 |
| Finished | Aug 12 06:34:12 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d05042d7-a51f-477e-8108-a233cf6a0e73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30794 57446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pending_in_trans.3079457446 |
| Directory | /workspace/28.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_config_pinflip.2572213687 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 216095225 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:33:53 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d2460237-520b-40e6-b13f-d1c07b8fc9a8 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2572213687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.2572213687 |
| Directory | /workspace/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_config_usb_ref_disable.2399018271 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 176273675 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-70f08e2d-c310-4b1a-afbe-ab1ec0729b3d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23990 18271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.2399018271 |
| Directory | /workspace/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_pins_sense.1595015599 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 31200702 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:02 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a98a2998-0efa-4849-ad75-4a67160435f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15950 15599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.1595015599 |
| Directory | /workspace/28.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_buffer.180261568 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 9790700507 ps |
| CPU time | 25.9 seconds |
| Started | Aug 12 06:33:52 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 224148 kb |
| Host | smart-4d2a4564-b24b-4ff4-a56a-930e5a7bc1d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18026 1568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_buffer.180261568 |
| Directory | /workspace/28.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_received.253483558 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 205802420 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:34:10 PM PDT 24 |
| Finished | Aug 12 06:34:11 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-c122c6ca-a2de-484f-9461-f15b34956b38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25348 3558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_received.253483558 |
| Directory | /workspace/28.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_sent.2832835325 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 205847996 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:05 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-6d6d1016-95ff-471a-b082-999c9f17488b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28328 35325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_sent.2832835325 |
| Directory | /workspace/28.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/28.usbdev_random_length_in_transaction.2309335644 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 172703846 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:02 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-9b34aa6f-2883-4e35-8c53-d555e2444a31 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23093 35644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_in_transaction.2309335644 |
| Directory | /workspace/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_random_length_out_transaction.3714075153 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 163139379 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:05 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-3e62e544-8649-44f2-b0ee-535f6fd7ba4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37140 75153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.3714075153 |
| Directory | /workspace/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_rx_crc_err.965235560 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 153758053 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-56ffdad9-7193-4de9-b75c-e904374a66bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96523 5560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_rx_crc_err.965235560 |
| Directory | /workspace/28.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_rx_full.1877006379 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 292226956 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:34:02 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5b5d9a91-9d50-49c8-9dcd-76d298aa0b67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18770 06379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_rx_full.1877006379 |
| Directory | /workspace/28.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/28.usbdev_setup_stage.183965465 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 153436728 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:22 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-5d00dae9-508d-4c7d-b150-9752ce88d2c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18396 5465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_setup_stage.183965465 |
| Directory | /workspace/28.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/28.usbdev_setup_trans_ignored.3728476637 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 169410710 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:00 PM PDT 24 |
| Finished | Aug 12 06:34:01 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-55addcb8-e693-46cc-a0f0-d68d138e25fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37284 76637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_setup_trans_ignored.3728476637 |
| Directory | /workspace/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/28.usbdev_smoke.2269212270 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 208211307 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:34:02 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-7685ee6d-c230-45aa-92e4-61bad0fcea01 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22692 12270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.2269212270 |
| Directory | /workspace/28.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/28.usbdev_spurious_pids_ignored.88392901 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 2562882686 ps |
| CPU time | 74.48 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:35:34 PM PDT 24 |
| Peak memory | 217784 kb |
| Host | smart-91847a7e-07ac-45d5-af5e-1c7978b81cf8 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=88392901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.88392901 |
| Directory | /workspace/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/28.usbdev_stall_priority_over_nak.1535924752 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 167556047 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-765d854e-6cb9-4425-bfe3-aafdb7f9ccab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15359 24752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.1535924752 |
| Directory | /workspace/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/28.usbdev_stall_trans.3951560479 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 183282601 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:34:23 PM PDT 24 |
| Finished | Aug 12 06:34:27 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-36bfdd35-ce1c-4ab7-ac73-d86285f6af6a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39515 60479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_trans.3951560479 |
| Directory | /workspace/28.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_stream_len_max.320012679 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 994959787 ps |
| CPU time | 2.7 seconds |
| Started | Aug 12 06:34:21 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-8978bd83-9357-4f2e-9c28-99aee9ffa5a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32001 2679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.320012679 |
| Directory | /workspace/28.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/28.usbdev_streaming_out.3158576777 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 3733110167 ps |
| CPU time | 28.56 seconds |
| Started | Aug 12 06:34:21 PM PDT 24 |
| Finished | Aug 12 06:34:49 PM PDT 24 |
| Peak memory | 217596 kb |
| Host | smart-c84a6fe8-cffc-4647-8af5-a4af0f5be964 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31585 76777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_streaming_out.3158576777 |
| Directory | /workspace/28.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/28.usbdev_timeout_missing_host_handshake.1788279302 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 199597202 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:55 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d7e82852-b5d7-4df3-9b05-974f934e8d05 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1788279302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_hos t_handshake.1788279302 |
| Directory | /workspace/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/28.usbdev_tx_rx_disruption.1251574573 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 640426013 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-1fa3f7f8-1f8f-4b16-b032-1f88131cd514 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1251574573 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_tx_rx_disruption.1251574573 |
| Directory | /workspace/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/280.usbdev_tx_rx_disruption.3881084092 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 483829986 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:37:57 PM PDT 24 |
| Finished | Aug 12 06:37:59 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-3e977827-3546-4353-ba47-a1d02d38cdeb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3881084092 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 280.usbdev_tx_rx_disruption.3881084092 |
| Directory | /workspace/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/281.usbdev_tx_rx_disruption.493601388 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 589320890 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:38:03 PM PDT 24 |
| Finished | Aug 12 06:38:05 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-3a1885c0-a7a2-4f48-bf1a-36e6048ddbed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=493601388 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 281.usbdev_tx_rx_disruption.493601388 |
| Directory | /workspace/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/282.usbdev_tx_rx_disruption.973850271 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 492641111 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-1fb7b939-1602-4323-9a8d-76fb3ba455ff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=973850271 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 282.usbdev_tx_rx_disruption.973850271 |
| Directory | /workspace/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/283.usbdev_tx_rx_disruption.996422339 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 561747802 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:38:11 PM PDT 24 |
| Finished | Aug 12 06:38:13 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-e558a84b-9038-4bc0-9e3f-63602aeab7e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=996422339 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 283.usbdev_tx_rx_disruption.996422339 |
| Directory | /workspace/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/284.usbdev_tx_rx_disruption.2102182744 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 574747801 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:08 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-2bd1ced5-5030-4cbd-b7b9-47c38e54d924 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2102182744 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 284.usbdev_tx_rx_disruption.2102182744 |
| Directory | /workspace/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/285.usbdev_tx_rx_disruption.3915796404 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 639669721 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b93d786c-836d-4687-bd1e-436369384f9c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3915796404 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 285.usbdev_tx_rx_disruption.3915796404 |
| Directory | /workspace/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/286.usbdev_tx_rx_disruption.3592316065 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 598811086 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:38:03 PM PDT 24 |
| Finished | Aug 12 06:38:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ddc64c08-4f97-4748-a00e-25c032f6b588 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3592316065 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 286.usbdev_tx_rx_disruption.3592316065 |
| Directory | /workspace/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/287.usbdev_tx_rx_disruption.2275008396 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 482422754 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:37:38 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-29b56c8d-dcf4-415d-aff4-93dc69cb0259 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2275008396 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 287.usbdev_tx_rx_disruption.2275008396 |
| Directory | /workspace/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/288.usbdev_tx_rx_disruption.3415004301 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 519077372 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:37:54 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-626e6be8-c51c-4d8b-a945-9dfcbc0317c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3415004301 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 288.usbdev_tx_rx_disruption.3415004301 |
| Directory | /workspace/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/289.usbdev_tx_rx_disruption.2309937381 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 519315209 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:37:46 PM PDT 24 |
| Finished | Aug 12 06:37:48 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b07fda61-4cd7-45a2-aaf5-228d5e8dcf8d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2309937381 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 289.usbdev_tx_rx_disruption.2309937381 |
| Directory | /workspace/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/29.usbdev_alert_test.2659675906 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 42477231 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:34:06 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-7122560e-4f2b-44c9-9380-fe9f875f1097 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2659675906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.2659675906 |
| Directory | /workspace/29.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_disconnect.3721288318 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 6641316073 ps |
| CPU time | 9.12 seconds |
| Started | Aug 12 06:34:09 PM PDT 24 |
| Finished | Aug 12 06:34:19 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-79f0dbf4-0422-4ecb-adb8-1000b22efe81 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3721288318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_a on_wake_disconnect.3721288318 |
| Directory | /workspace/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_reset.2061968711 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 18711753729 ps |
| CPU time | 22.58 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:29 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-7ed1cc74-bd5e-47a2-a665-c2514e86bdfd |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2061968711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.2061968711 |
| Directory | /workspace/29.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_resume.3347482465 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 29066247499 ps |
| CPU time | 41.85 seconds |
| Started | Aug 12 06:34:18 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-fce0bdd7-2e30-433b-9cb9-fe629d3c2b1b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3347482465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_a on_wake_resume.3347482465 |
| Directory | /workspace/29.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/29.usbdev_av_buffer.20065367 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 152300928 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:33:55 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f14a7f06-6386-401f-9204-fca7b967faf3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20065 367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_av_buffer.20065367 |
| Directory | /workspace/29.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/29.usbdev_bitstuff_err.2570093798 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 177999070 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:07 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-34b96869-34e8-48be-b7f5-1234e358a05c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25700 93798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_bitstuff_err.2570093798 |
| Directory | /workspace/29.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_data_toggle_clear.820459316 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 172279802 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:34:14 PM PDT 24 |
| Finished | Aug 12 06:34:15 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d8dec0d5-ee86-44ae-825d-54291849e870 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82045 9316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_clear.820459316 |
| Directory | /workspace/29.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/29.usbdev_data_toggle_restore.1055756655 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 905801269 ps |
| CPU time | 2.43 seconds |
| Started | Aug 12 06:33:54 PM PDT 24 |
| Finished | Aug 12 06:33:56 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-53a0aaec-e16f-4819-ae5c-f475194b5e27 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1055756655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.1055756655 |
| Directory | /workspace/29.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/29.usbdev_device_timeout.2898528883 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 2248616311 ps |
| CPU time | 14.76 seconds |
| Started | Aug 12 06:34:13 PM PDT 24 |
| Finished | Aug 12 06:34:33 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-dc148fd5-bffe-4a11-9e5d-c85aa539de04 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2898528883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.2898528883 |
| Directory | /workspace/29.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/29.usbdev_disable_endpoint.2562880509 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 703251924 ps |
| CPU time | 1.96 seconds |
| Started | Aug 12 06:34:03 PM PDT 24 |
| Finished | Aug 12 06:34:05 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-863f3b23-60d2-4b0b-a7f8-e10cdf425831 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25628 80509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_disable_endpoint.2562880509 |
| Directory | /workspace/29.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/29.usbdev_disconnected.587302975 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 141766901 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-fdb58a19-3d6f-43f6-b437-e32c64bcee0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58730 2975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_disconnected.587302975 |
| Directory | /workspace/29.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/29.usbdev_enable.3560621304 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 42308182 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:34:15 PM PDT 24 |
| Finished | Aug 12 06:34:16 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-982fbb3c-745c-4ade-9faa-594f11ac6b90 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35606 21304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.3560621304 |
| Directory | /workspace/29.usbdev_enable/latest |
| Test location | /workspace/coverage/default/29.usbdev_endpoint_access.1678360606 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 965077141 ps |
| CPU time | 2.53 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-a2ca68f3-77cf-4c59-a3ee-9511b7d06fb8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16783 60606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.1678360606 |
| Directory | /workspace/29.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/29.usbdev_endpoint_types.2292582850 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 474054344 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-fc524d9d-2831-4b17-9d7f-ec071876daf3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2292582850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.2292582850 |
| Directory | /workspace/29.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/29.usbdev_fifo_rst.1305462000 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 263875490 ps |
| CPU time | 2.06 seconds |
| Started | Aug 12 06:34:11 PM PDT 24 |
| Finished | Aug 12 06:34:13 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-dc6b1d6f-4797-416f-bb61-91c6b05b85bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13054 62000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_fifo_rst.1305462000 |
| Directory | /workspace/29.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_iso.2325826690 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 227292523 ps |
| CPU time | 1.17 seconds |
| Started | Aug 12 06:34:11 PM PDT 24 |
| Finished | Aug 12 06:34:12 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-87264510-6cab-48f9-bacb-af79a2e51615 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2325826690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.2325826690 |
| Directory | /workspace/29.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_stall.1254883432 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 209610570 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:34:13 PM PDT 24 |
| Finished | Aug 12 06:34:14 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-05f248b4-cc41-44a2-860e-b6eb4584efd3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12548 83432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_stall.1254883432 |
| Directory | /workspace/29.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_trans.4294430200 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 192092147 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:16 PM PDT 24 |
| Finished | Aug 12 06:34:17 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-5d45dd16-2755-4bf8-b2df-0a97eccd447c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42944 30200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_trans.4294430200 |
| Directory | /workspace/29.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_invalid_sync.2071388230 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 4429768912 ps |
| CPU time | 127.06 seconds |
| Started | Aug 12 06:34:16 PM PDT 24 |
| Finished | Aug 12 06:36:23 PM PDT 24 |
| Peak memory | 218268 kb |
| Host | smart-626ae2f1-36e2-4c8e-9ca9-76ce39b92c18 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2071388230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.2071388230 |
| Directory | /workspace/29.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/29.usbdev_iso_retraction.3953091239 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 5389113357 ps |
| CPU time | 39.24 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:44 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-582112dd-4ae9-4f99-a66e-17d3629c8ae6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3953091239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.3953091239 |
| Directory | /workspace/29.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_in_err.2433003161 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 229725866 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:34:15 PM PDT 24 |
| Finished | Aug 12 06:34:16 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6bfb32f9-8667-49dc-969e-ad66ad9a01ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24330 03161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_in_err.2433003161 |
| Directory | /workspace/29.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_resume.3812401533 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 10675319581 ps |
| CPU time | 15.66 seconds |
| Started | Aug 12 06:34:15 PM PDT 24 |
| Finished | Aug 12 06:34:31 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-e0f77a04-250b-4bf9-9b08-433c5e5641e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38124 01533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_resume.3812401533 |
| Directory | /workspace/29.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_suspend.3908218052 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 3341660925 ps |
| CPU time | 5.22 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:16 PM PDT 24 |
| Peak memory | 216732 kb |
| Host | smart-9063098b-28fb-4ae7-b249-092d68e0bbc5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39082 18052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_suspend.3908218052 |
| Directory | /workspace/29.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/29.usbdev_low_speed_traffic.610359013 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 3863821954 ps |
| CPU time | 107.36 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 218848 kb |
| Host | smart-821a1d55-a011-44ed-b6b3-7b6e9c26253f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=610359013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.610359013 |
| Directory | /workspace/29.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_inter_pkt_delay.2019409274 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 2366493409 ps |
| CPU time | 68.23 seconds |
| Started | Aug 12 06:34:10 PM PDT 24 |
| Finished | Aug 12 06:35:19 PM PDT 24 |
| Peak memory | 217420 kb |
| Host | smart-ae163c76-7283-4064-83f5-5c8ceea2075a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2019409274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.2019409274 |
| Directory | /workspace/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_length_in_transaction.4125775392 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 251826078 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:34:02 PM PDT 24 |
| Finished | Aug 12 06:34:03 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f19ff0f3-6aa3-415e-aa06-7198c29dcad2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=4125775392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.4125775392 |
| Directory | /workspace/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_length_out_transaction.2110512670 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 190094874 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:03 PM PDT 24 |
| Finished | Aug 12 06:34:04 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-4548e3bb-21a8-49b0-a6ae-da1d96eda031 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21105 12670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.2110512670 |
| Directory | /workspace/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_inter_pkt_delay.4018218351 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 3415932635 ps |
| CPU time | 34.37 seconds |
| Started | Aug 12 06:34:02 PM PDT 24 |
| Finished | Aug 12 06:34:37 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-c8eb175a-0cd6-4ac1-8b94-8f5396b10a52 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4018218351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.4018218351 |
| Directory | /workspace/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_length_in_transaction.768384675 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 164190149 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:11 PM PDT 24 |
| Finished | Aug 12 06:34:12 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-c5b6f43d-ea4b-4d3b-bca7-7975eaa919db |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=768384675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.768384675 |
| Directory | /workspace/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_length_out_transaction.2348390744 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 144104471 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:11 PM PDT 24 |
| Finished | Aug 12 06:34:12 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-2a3c64ce-e718-4504-8107-cecf0341bcb5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23483 90744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.2348390744 |
| Directory | /workspace/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_nak_trans.1571456682 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 244360523 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:05 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-3f9f244f-f297-46af-8fcb-c8178170da2a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15714 56682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_nak_trans.1571456682 |
| Directory | /workspace/29.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_iso.461504960 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 183942013 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:34:10 PM PDT 24 |
| Finished | Aug 12 06:34:11 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-58ed11ba-675c-43b7-9ebb-b1f03f870143 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46150 4960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_iso.461504960 |
| Directory | /workspace/29.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_stall.686394054 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 192135831 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:06 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-98fcd8e3-4b59-4004-8b9d-b078749dd78f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68639 4054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_stall.686394054 |
| Directory | /workspace/29.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_trans_nak.2227243252 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 175551323 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:25 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-96781b99-6e47-4a80-bf3c-2df421456bb3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22272 43252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_trans_nak.2227243252 |
| Directory | /workspace/29.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/29.usbdev_pending_in_trans.2656570181 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 169563550 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:20 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a16e2e94-9e91-4f74-ae8e-0a7fbc6ea093 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26565 70181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pending_in_trans.2656570181 |
| Directory | /workspace/29.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_config_pinflip.2385641603 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 238802361 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:34:10 PM PDT 24 |
| Finished | Aug 12 06:34:11 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-508cea05-0111-4b68-a509-10adcb75e2ce |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2385641603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.2385641603 |
| Directory | /workspace/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_config_usb_ref_disable.76115176 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 152437848 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:15 PM PDT 24 |
| Finished | Aug 12 06:34:16 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-89da1f5b-d5f3-40bc-b670-196a67031ea6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76115 176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.76115176 |
| Directory | /workspace/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_pins_sense.2693363602 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 28849085 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:05 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2156c6b2-21c3-4f4f-a0f0-27e2059cfaf3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26933 63602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.2693363602 |
| Directory | /workspace/29.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_buffer.1159387372 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 12397018646 ps |
| CPU time | 32.08 seconds |
| Started | Aug 12 06:34:18 PM PDT 24 |
| Finished | Aug 12 06:34:50 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-e4813d9e-06f9-4ade-afda-1d30d27e977b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11593 87372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_buffer.1159387372 |
| Directory | /workspace/29.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_received.429878643 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 171941186 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:06 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ea628bf3-6056-49ad-882d-e988e2a019b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42987 8643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_received.429878643 |
| Directory | /workspace/29.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_sent.310756363 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 220015752 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:06 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-7f18f03a-05f4-4d38-b727-87d8884f1cf4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31075 6363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_sent.310756363 |
| Directory | /workspace/29.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/29.usbdev_random_length_in_transaction.1639229350 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 236541178 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:20 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3e118024-8d39-4ceb-aac3-04d313f02a3c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16392 29350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_in_transaction.1639229350 |
| Directory | /workspace/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_random_length_out_transaction.2354686990 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 158510121 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:05 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-d64b9389-a6b8-43bb-aafb-1102f2699519 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23546 86990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.2354686990 |
| Directory | /workspace/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_rx_crc_err.2802888481 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 194793005 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-24152007-e164-4f1a-9eee-28dabffc65d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28028 88481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_rx_crc_err.2802888481 |
| Directory | /workspace/29.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_setup_stage.1611977401 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 150360365 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:34:21 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-404ba0ca-872a-47e4-bc6c-9b60a4b98339 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16119 77401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_setup_stage.1611977401 |
| Directory | /workspace/29.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/29.usbdev_setup_trans_ignored.2222519049 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 150398232 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:08 PM PDT 24 |
| Finished | Aug 12 06:34:09 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8f273cdf-b1ec-488b-ac1c-d1a5bdb07855 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22225 19049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_setup_trans_ignored.2222519049 |
| Directory | /workspace/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/29.usbdev_smoke.2131329764 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 191167172 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-0c36ab39-28c3-4cea-86d7-458dd2c3f080 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21313 29764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.2131329764 |
| Directory | /workspace/29.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/29.usbdev_spurious_pids_ignored.3745514219 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 2903709264 ps |
| CPU time | 23.19 seconds |
| Started | Aug 12 06:34:04 PM PDT 24 |
| Finished | Aug 12 06:34:27 PM PDT 24 |
| Peak memory | 217840 kb |
| Host | smart-924055a8-8701-4b79-b115-7479ee6aa777 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3745514219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.3745514219 |
| Directory | /workspace/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/29.usbdev_stall_priority_over_nak.3695511478 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 198922674 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-293315d6-6c76-4c71-a0d2-7a74ada319a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36955 11478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.3695511478 |
| Directory | /workspace/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/29.usbdev_stall_trans.3232950446 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 162447401 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-9865834f-4059-4588-a9d7-861c88641305 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32329 50446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_trans.3232950446 |
| Directory | /workspace/29.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_stream_len_max.3168714376 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 513273599 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-10688192-ed58-449d-858d-948d4b9de8e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31687 14376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.3168714376 |
| Directory | /workspace/29.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/29.usbdev_streaming_out.804959190 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 3633527121 ps |
| CPU time | 38.81 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 217424 kb |
| Host | smart-2c6a8956-8a74-4369-bc01-db88b037a2d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80495 9190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_streaming_out.804959190 |
| Directory | /workspace/29.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/29.usbdev_timeout_missing_host_handshake.4072600492 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 1376971770 ps |
| CPU time | 32.91 seconds |
| Started | Aug 12 06:34:01 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-e2a4e670-36bf-4b67-8e44-5d3a95a74e97 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4072600492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_hos t_handshake.4072600492 |
| Directory | /workspace/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/29.usbdev_tx_rx_disruption.2356977458 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 608790681 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:34:08 PM PDT 24 |
| Finished | Aug 12 06:34:10 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-bfa823a5-4c9f-4421-aedb-88632ad58692 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2356977458 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_tx_rx_disruption.2356977458 |
| Directory | /workspace/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/290.usbdev_tx_rx_disruption.633277948 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 684847125 ps |
| CPU time | 1.75 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-c12353d7-573f-4759-8fec-882521ce3964 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=633277948 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 290.usbdev_tx_rx_disruption.633277948 |
| Directory | /workspace/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/291.usbdev_tx_rx_disruption.1534547030 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 568680335 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-40605035-083e-43a5-9acd-1d5b129b187a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1534547030 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 291.usbdev_tx_rx_disruption.1534547030 |
| Directory | /workspace/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/292.usbdev_tx_rx_disruption.2261210295 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 498296919 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:37:44 PM PDT 24 |
| Finished | Aug 12 06:37:45 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0e071fd6-9c3e-4049-9149-35e783701f56 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2261210295 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 292.usbdev_tx_rx_disruption.2261210295 |
| Directory | /workspace/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/294.usbdev_tx_rx_disruption.3189291476 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 628935381 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:37:37 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f732d613-d177-419e-a165-332ceb160602 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3189291476 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 294.usbdev_tx_rx_disruption.3189291476 |
| Directory | /workspace/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/295.usbdev_tx_rx_disruption.1022434560 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 571485312 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:54 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-25679bd6-1b42-4959-9858-8c1e3eff1f24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1022434560 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 295.usbdev_tx_rx_disruption.1022434560 |
| Directory | /workspace/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/296.usbdev_tx_rx_disruption.400465521 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 464535757 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-b3b0d4fe-14ae-4abf-98ce-5140cac105fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=400465521 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 296.usbdev_tx_rx_disruption.400465521 |
| Directory | /workspace/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/297.usbdev_tx_rx_disruption.3978080845 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 500675462 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:38:20 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-b4d89c05-884d-43cc-a6b9-b033baf55b9d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3978080845 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 297.usbdev_tx_rx_disruption.3978080845 |
| Directory | /workspace/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/298.usbdev_tx_rx_disruption.2241809555 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 542528392 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:38:26 PM PDT 24 |
| Finished | Aug 12 06:38:27 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-a780ab3c-1d94-4c59-a769-6b3d473f387d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2241809555 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 298.usbdev_tx_rx_disruption.2241809555 |
| Directory | /workspace/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/299.usbdev_tx_rx_disruption.2772646102 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 513459413 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:38:01 PM PDT 24 |
| Finished | Aug 12 06:38:03 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-e5df733d-ac13-475a-8334-3531dcf22527 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2772646102 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 299.usbdev_tx_rx_disruption.2772646102 |
| Directory | /workspace/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/3.usbdev_alert_test.2182444888 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 76297250 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:29:45 PM PDT 24 |
| Finished | Aug 12 06:29:46 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-e082e354-3f39-4b46-9784-53ee07dad212 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2182444888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.2182444888 |
| Directory | /workspace/3.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_disconnect.1419793041 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 10599905496 ps |
| CPU time | 14.83 seconds |
| Started | Aug 12 06:29:26 PM PDT 24 |
| Finished | Aug 12 06:29:41 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-a15a63cd-48ed-4e3c-9f83-d82bbbbcb4d2 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1419793041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_ao n_wake_disconnect.1419793041 |
| Directory | /workspace/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_reset.1301047266 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 15315685049 ps |
| CPU time | 18.3 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-3fbe8475-d65d-4794-a260-5dbeb05ecd4c |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1301047266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.1301047266 |
| Directory | /workspace/3.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_resume.3585258224 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 28862728151 ps |
| CPU time | 33.73 seconds |
| Started | Aug 12 06:29:26 PM PDT 24 |
| Finished | Aug 12 06:30:00 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-415f8b74-102f-4fbb-a002-cb0379463da3 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3585258224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_ao n_wake_resume.3585258224 |
| Directory | /workspace/3.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_buffer.4140340817 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 170223759 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:28 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d1b397d5-88df-4a3e-a3c8-9d452fcea27e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41403 40817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_buffer.4140340817 |
| Directory | /workspace/3.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_empty.1284954745 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 157212386 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:29:26 PM PDT 24 |
| Finished | Aug 12 06:29:27 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-9bfa96ee-1b81-4b99-8464-dc88e152e6cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12849 54745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_empty.1284954745 |
| Directory | /workspace/3.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_overflow.2708916997 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 166460658 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:28 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-d9f6a31a-b12b-4a4b-93c7-9c5595e7e501 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27089 16997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_overflow.2708916997 |
| Directory | /workspace/3.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/3.usbdev_bitstuff_err.640715688 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 152684085 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:28 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-87ab34b8-7b31-449f-a870-e820a9321797 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64071 5688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_bitstuff_err.640715688 |
| Directory | /workspace/3.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_data_toggle_clear.3309951841 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 349450360 ps |
| CPU time | 1.33 seconds |
| Started | Aug 12 06:29:28 PM PDT 24 |
| Finished | Aug 12 06:29:29 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-cdd2a935-6662-49bc-aeb8-4f90d587c40f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33099 51841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_clear.3309951841 |
| Directory | /workspace/3.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/3.usbdev_data_toggle_restore.632357273 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 1018649027 ps |
| CPU time | 2.61 seconds |
| Started | Aug 12 06:29:26 PM PDT 24 |
| Finished | Aug 12 06:29:29 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-c35e1a8d-f53e-4311-ad4c-98ddd8f858fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=632357273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.632357273 |
| Directory | /workspace/3.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/3.usbdev_device_address.4136290703 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 42877264734 ps |
| CPU time | 70.48 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:30:38 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-18f46815-ca0a-49ce-9ade-36f6bb8c5ef8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41362 90703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.4136290703 |
| Directory | /workspace/3.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/3.usbdev_device_timeout.2340991557 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 3747681105 ps |
| CPU time | 26.67 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:54 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-03f8c43f-9401-4e5c-80c2-c39a47016db4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2340991557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.2340991557 |
| Directory | /workspace/3.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/3.usbdev_disable_endpoint.130838373 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 987644035 ps |
| CPU time | 2.16 seconds |
| Started | Aug 12 06:29:28 PM PDT 24 |
| Finished | Aug 12 06:29:31 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-4608089e-25d2-4b83-9e6b-fcfebec9172c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13083 8373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disable_endpoint.130838373 |
| Directory | /workspace/3.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/3.usbdev_disconnected.1166860297 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 150423113 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:29:26 PM PDT 24 |
| Finished | Aug 12 06:29:27 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-11dcea99-0e51-438f-ad57-afe6b9e95890 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11668 60297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disconnected.1166860297 |
| Directory | /workspace/3.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/3.usbdev_enable.3365454496 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 38869017 ps |
| CPU time | 0.78 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:28 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-1a41bbce-801f-43bd-82ee-fa4ab711d731 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33654 54496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_enable.3365454496 |
| Directory | /workspace/3.usbdev_enable/latest |
| Test location | /workspace/coverage/default/3.usbdev_endpoint_access.221343456 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 732209884 ps |
| CPU time | 2.39 seconds |
| Started | Aug 12 06:29:28 PM PDT 24 |
| Finished | Aug 12 06:29:30 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-e1d971af-ab98-44cb-a5ed-70e5c0a27683 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22134 3456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.221343456 |
| Directory | /workspace/3.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/3.usbdev_endpoint_types.3791151482 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 437171930 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:29:26 PM PDT 24 |
| Finished | Aug 12 06:29:28 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-26d9b667-1237-44ea-a837-c0b259dd9c99 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3791151482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.3791151482 |
| Directory | /workspace/3.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/3.usbdev_fifo_rst.1181292367 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 228659212 ps |
| CPU time | 1.9 seconds |
| Started | Aug 12 06:29:28 PM PDT 24 |
| Finished | Aug 12 06:29:30 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-8888d2d1-c858-42af-ac5f-16325111c6fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11812 92367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_fifo_rst.1181292367 |
| Directory | /workspace/3.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_hiclk.1644963473 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 87200591545 ps |
| CPU time | 162.04 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:32:10 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-24b5a29e-f4ee-4417-9a3c-3e24ce609f9f |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1644963473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.1644963473 |
| Directory | /workspace/3.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_hiclk_max.2753072094 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 96232923390 ps |
| CPU time | 141.84 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:31:49 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-88804d3e-3966-40b8-902e-3df30e50f961 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2753072094 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk_max.2753072094 |
| Directory | /workspace/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_loclk.2175861007 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 96113368184 ps |
| CPU time | 159.46 seconds |
| Started | Aug 12 06:29:26 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-f0e7c90a-9e58-4996-b4a9-9f71d251f7d4 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2175861007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.2175861007 |
| Directory | /workspace/3.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_phase.796359599 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 111153880019 ps |
| CPU time | 187.18 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:32:35 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-3d099547-1aa3-4d46-af97-84db8ca4dea7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79635 9599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_phase.796359599 |
| Directory | /workspace/3.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_iso.1915665035 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 188114239 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:29:35 PM PDT 24 |
| Finished | Aug 12 06:29:36 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-15f69a74-4114-4551-92ba-86b2f494b732 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1915665035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.1915665035 |
| Directory | /workspace/3.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_stall.683925596 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 179867874 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:29:36 PM PDT 24 |
| Finished | Aug 12 06:29:37 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-55424330-ea9b-4b1e-ac82-9be69a039cb1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68392 5596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_stall.683925596 |
| Directory | /workspace/3.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_trans.3832776417 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 253029218 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:29:36 PM PDT 24 |
| Finished | Aug 12 06:29:37 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-e679e541-d731-42bf-be68-974ef4c7ec05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38327 76417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_trans.3832776417 |
| Directory | /workspace/3.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_invalid_sync.2731541113 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 3817911446 ps |
| CPU time | 41.26 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:30:08 PM PDT 24 |
| Peak memory | 217788 kb |
| Host | smart-e8c7b6f3-538a-4307-8bf6-fed293a60d1a |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2731541113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.2731541113 |
| Directory | /workspace/3.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/3.usbdev_iso_retraction.564404980 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 8446446432 ps |
| CPU time | 107.56 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-f642b130-1121-4875-bfda-29fea22b0ef4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=564404980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.564404980 |
| Directory | /workspace/3.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_in_err.353206761 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 271396447 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:29:36 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ad7f4823-7aae-424b-b833-79822e1fa655 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35320 6761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_in_err.353206761 |
| Directory | /workspace/3.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_resume.3191603137 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 23738424992 ps |
| CPU time | 31.55 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:30:06 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-0d67e39e-fefd-470d-bd32-dc2f90a5f817 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31916 03137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_resume.3191603137 |
| Directory | /workspace/3.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_suspend.191927767 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 3559553110 ps |
| CPU time | 4.79 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:29:39 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-c70cbf37-a9a4-4bce-a053-91af597fc69c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19192 7767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_suspend.191927767 |
| Directory | /workspace/3.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/3.usbdev_low_speed_traffic.941775771 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 3144623498 ps |
| CPU time | 25.42 seconds |
| Started | Aug 12 06:29:35 PM PDT 24 |
| Finished | Aug 12 06:30:00 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-7a867239-fb7e-4751-bbda-6ee75ac87077 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=941775771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.941775771 |
| Directory | /workspace/3.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_inter_pkt_delay.2246519782 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 1866250946 ps |
| CPU time | 15.13 seconds |
| Started | Aug 12 06:29:35 PM PDT 24 |
| Finished | Aug 12 06:29:50 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-446c4604-65ce-4307-828f-aa8c20684b63 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2246519782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.2246519782 |
| Directory | /workspace/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_length_in_transaction.1382174202 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 246840861 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:29:35 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-605a5549-dfd1-4d35-9abc-cc9837a7170b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1382174202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.1382174202 |
| Directory | /workspace/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_length_out_transaction.4075009800 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 189713645 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:29:35 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e693b1c8-a80e-4960-bc9f-fcf4d2992b7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40750 09800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.4075009800 |
| Directory | /workspace/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_non_iso_usb_traffic.3542888013 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 2960078506 ps |
| CPU time | 23.99 seconds |
| Started | Aug 12 06:29:33 PM PDT 24 |
| Finished | Aug 12 06:29:57 PM PDT 24 |
| Peak memory | 217928 kb |
| Host | smart-9994d140-172a-4948-838c-6d0bf1fba47a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35428 88013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3542888013 |
| Directory | /workspace/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_usb_traffic.4058688996 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 2089683048 ps |
| CPU time | 58.29 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:30:33 PM PDT 24 |
| Peak memory | 215836 kb |
| Host | smart-6126753c-67cc-4d4f-b23c-16287dd7790e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4058688996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.4058688996 |
| Directory | /workspace/3.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_inter_pkt_delay.3517570681 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 3661445533 ps |
| CPU time | 39.28 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:30:13 PM PDT 24 |
| Peak memory | 217496 kb |
| Host | smart-090753aa-2521-4357-aa6c-8da263b692b0 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3517570681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.3517570681 |
| Directory | /workspace/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_length_in_transaction.2326779814 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 153378234 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:29:35 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-fae6979f-e4f4-4081-a5a6-a6b7e4463cc2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2326779814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.2326779814 |
| Directory | /workspace/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_length_out_transaction.2343855174 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 141699708 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:29:35 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-05a12407-ddae-421a-aa2a-732d9b97ebd2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23438 55174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.2343855174 |
| Directory | /workspace/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_nak_trans.1579738614 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 181435907 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:34 PM PDT 24 |
| Finished | Aug 12 06:29:35 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-494a9dcb-bcd5-44fb-bf28-44cd420994c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15797 38614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_nak_trans.1579738614 |
| Directory | /workspace/3.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_iso.364410155 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 151448072 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:35 PM PDT 24 |
| Finished | Aug 12 06:29:36 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-96f034ae-107c-411b-ad2e-2afc710b7433 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36441 0155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_iso.364410155 |
| Directory | /workspace/3.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_stall.1753525899 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 176726984 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:33 PM PDT 24 |
| Finished | Aug 12 06:29:34 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-54bb8147-d3b3-44b5-86b5-4816d7d2940b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17535 25899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_stall.1753525899 |
| Directory | /workspace/3.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_trans_nak.3935724605 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 202122142 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:29:37 PM PDT 24 |
| Finished | Aug 12 06:29:38 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-f92af4ab-7072-4179-97a8-990ce1771ca9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39357 24605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_trans_nak.3935724605 |
| Directory | /workspace/3.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/3.usbdev_pending_in_trans.4134201441 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 169362380 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:29:36 PM PDT 24 |
| Finished | Aug 12 06:29:37 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-9175e41e-970e-4878-b69a-96e3e6559ce6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41342 01441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.4134201441 |
| Directory | /workspace/3.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_pinflip.3808257587 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 203262040 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:29:35 PM PDT 24 |
| Finished | Aug 12 06:29:36 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-98b8b930-caaa-4315-b7c5-0fad19bd230e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3808257587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.3808257587 |
| Directory | /workspace/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_rand_bus_type.2212413224 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 229659216 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:29:36 PM PDT 24 |
| Finished | Aug 12 06:29:37 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-66ba4a1b-3cb1-473d-82a9-9f03fe06d1c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22124 13224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.2212413224 |
| Directory | /workspace/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_usb_ref_disable.1753168710 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 137258173 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:29:36 PM PDT 24 |
| Finished | Aug 12 06:29:37 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-174ccbf1-146f-444f-adb1-bf9c7910bd7a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17531 68710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.1753168710 |
| Directory | /workspace/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_buffer.3314915650 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 15574591172 ps |
| CPU time | 41.46 seconds |
| Started | Aug 12 06:29:44 PM PDT 24 |
| Finished | Aug 12 06:30:25 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-02442478-6b55-4880-855d-ba463031ead2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33149 15650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_buffer.3314915650 |
| Directory | /workspace/3.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_received.3345884461 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 170584106 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:29:42 PM PDT 24 |
| Finished | Aug 12 06:29:43 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-498cc86c-b38b-4c56-af37-ce3013bba93e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33458 84461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_received.3345884461 |
| Directory | /workspace/3.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_sent.2982475318 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 226328855 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-71732c06-4f68-4b85-8e1d-0f2837f880ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29824 75318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_sent.2982475318 |
| Directory | /workspace/3.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_bus_resets.1824145951 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 6324823855 ps |
| CPU time | 25.23 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 224112 kb |
| Host | smart-8e6f2bf1-2d5d-4384-b378-f57419c72140 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1824145951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.1824145951 |
| Directory | /workspace/3.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_suspends.2978016096 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 9841846241 ps |
| CPU time | 52.51 seconds |
| Started | Aug 12 06:29:44 PM PDT 24 |
| Finished | Aug 12 06:30:36 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-2f144f80-776a-448d-8c3f-ff8c936d0479 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2978016096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.2978016096 |
| Directory | /workspace/3.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/3.usbdev_random_length_in_transaction.1593539281 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 213805631 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:29:42 PM PDT 24 |
| Finished | Aug 12 06:29:43 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2a91bfdf-4224-4bda-ab5f-39b2a02b0cd4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15935 39281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_in_transaction.1593539281 |
| Directory | /workspace/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_random_length_out_transaction.3150491490 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 153519092 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-4825f9eb-95fa-4623-99c4-947f14931dc8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31504 91490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.3150491490 |
| Directory | /workspace/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_resume_link_active.1764771312 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 20227278642 ps |
| CPU time | 27.77 seconds |
| Started | Aug 12 06:29:46 PM PDT 24 |
| Finished | Aug 12 06:30:14 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-cf2fb577-cdb2-425b-81c8-4da33c206b1c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17647 71312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_resume_link_active.1764771312 |
| Directory | /workspace/3.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_crc_err.293634150 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 239187250 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:44 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7068fe84-5eee-46c0-a6a7-e43c81edf8b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29363 4150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_crc_err.293634150 |
| Directory | /workspace/3.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_full.579523166 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 261850674 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7cff6026-c5df-4f69-87ae-a8e0a80edad6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57952 3166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_full.579523166 |
| Directory | /workspace/3.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_pid_err.1219790885 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 172610313 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:29:42 PM PDT 24 |
| Finished | Aug 12 06:29:43 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-cf1df78d-a09b-4fa9-9d19-78b1bdbd81c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12197 90885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_pid_err.1219790885 |
| Directory | /workspace/3.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_sec_cm.3000390488 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 460186781 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:29:42 PM PDT 24 |
| Finished | Aug 12 06:29:44 PM PDT 24 |
| Peak memory | 223212 kb |
| Host | smart-5e2f7ac8-79f0-426a-b101-b1948d89f9f4 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3000390488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.3000390488 |
| Directory | /workspace/3.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_priority.1359990750 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 410691303 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-956b3eb7-6fa7-4449-8531-7ebf32060aba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13599 90750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.1359990750 |
| Directory | /workspace/3.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_priority_over_stall_response.2821481492 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 303390401 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:29:42 PM PDT 24 |
| Finished | Aug 12 06:29:44 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-a4292008-670e-4526-a0f3-5a58dd041260 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28214 81492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.2821481492 |
| Directory | /workspace/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_stage.250311158 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 205034969 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:44 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-340ad3b9-8c1c-4bd2-b624-62fb9d36c666 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25031 1158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_stage.250311158 |
| Directory | /workspace/3.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_trans_ignored.1614803540 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 208113901 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:29:42 PM PDT 24 |
| Finished | Aug 12 06:29:43 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-a0de2b13-4106-4be8-be99-40509044f44b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16148 03540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_trans_ignored.1614803540 |
| Directory | /workspace/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/3.usbdev_smoke.1820852211 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 210354799 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:29:45 PM PDT 24 |
| Finished | Aug 12 06:29:46 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-2a5d7ba1-2516-4890-a4b3-84a98ba78080 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18208 52211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.1820852211 |
| Directory | /workspace/3.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/3.usbdev_spurious_pids_ignored.1185122503 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 2304923563 ps |
| CPU time | 18.82 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:30:02 PM PDT 24 |
| Peak memory | 217928 kb |
| Host | smart-bc5968d1-e4a3-4c83-b3e4-fdc85bffc8f8 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1185122503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.1185122503 |
| Directory | /workspace/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/3.usbdev_stall_priority_over_nak.1825242546 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 180082661 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:29:44 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-bf43d22b-5058-4f1a-85dc-c25af252c158 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18252 42546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.1825242546 |
| Directory | /workspace/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/3.usbdev_stall_trans.3545762178 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 196411541 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:29:42 PM PDT 24 |
| Finished | Aug 12 06:29:43 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5c671f3b-48c6-4533-88eb-de91cf7e6c1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35457 62178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_trans.3545762178 |
| Directory | /workspace/3.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_stream_len_max.1010587606 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 750058898 ps |
| CPU time | 2.14 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-becdcdb1-cddb-4c14-9d24-7916e12bba2f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10105 87606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.1010587606 |
| Directory | /workspace/3.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/3.usbdev_streaming_out.535740086 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 2332309608 ps |
| CPU time | 69.11 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 217556 kb |
| Host | smart-87e5df58-0ae5-41f6-9122-27e172449367 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53574 0086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_streaming_out.535740086 |
| Directory | /workspace/3.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/3.usbdev_stress_usb_traffic.4152181545 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 3694608202 ps |
| CPU time | 24.71 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:30:08 PM PDT 24 |
| Peak memory | 218480 kb |
| Host | smart-f83ffcc2-e554-4e03-97f7-779dab00d7ad |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4152181545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.4152181545 |
| Directory | /workspace/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_timeout_missing_host_handshake.482252063 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 281841690 ps |
| CPU time | 4.42 seconds |
| Started | Aug 12 06:29:27 PM PDT 24 |
| Finished | Aug 12 06:29:31 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-79fe9554-25e1-41b1-8510-4a86ebf73a01 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=482252063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_ handshake.482252063 |
| Directory | /workspace/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/3.usbdev_tx_rx_disruption.3950742983 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 634826438 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:45 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-546ebfd8-ee97-4935-a568-9e3c5111e2c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3950742983 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_tx_rx_disruption.3950742983 |
| Directory | /workspace/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/30.usbdev_alert_test.2516736443 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 31637582 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:34:21 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-ff50f9ff-2484-428e-bc23-7c771d0e0ab3 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2516736443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.2516736443 |
| Directory | /workspace/30.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_disconnect.759168493 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 5298332375 ps |
| CPU time | 8.83 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:28 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-f8b5b573-a0de-4e39-b4b8-bd654a574a28 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=759168493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_ao n_wake_disconnect.759168493 |
| Directory | /workspace/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_reset.2799933061 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 21252031274 ps |
| CPU time | 29.01 seconds |
| Started | Aug 12 06:34:16 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-8c1faba9-e2d1-421e-8119-6b940f06fbdb |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2799933061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.2799933061 |
| Directory | /workspace/30.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_resume.184982456 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 29460400825 ps |
| CPU time | 39.35 seconds |
| Started | Aug 12 06:34:08 PM PDT 24 |
| Finished | Aug 12 06:34:48 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-78f6ca93-fcc5-4dc7-8978-b52815826524 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=184982456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_ao n_wake_resume.184982456 |
| Directory | /workspace/30.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/30.usbdev_av_buffer.3347715837 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 137000545 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:20 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-6119dd02-6dbb-4b80-bcb2-397fa3cfd146 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33477 15837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_av_buffer.3347715837 |
| Directory | /workspace/30.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/30.usbdev_bitstuff_err.4050162056 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 140989929 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:34:14 PM PDT 24 |
| Finished | Aug 12 06:34:15 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-452d2ee5-7a32-4910-b209-cb759d3090d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40501 62056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_bitstuff_err.4050162056 |
| Directory | /workspace/30.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_data_toggle_clear.154428727 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 295023637 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:20 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-374b401b-1166-451c-a3e3-b80eb8ce28f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15442 8727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_clear.154428727 |
| Directory | /workspace/30.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/30.usbdev_data_toggle_restore.1630018616 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 435163123 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:34:22 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-42190107-0f46-40cf-9420-4bf1ed9fd888 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1630018616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.1630018616 |
| Directory | /workspace/30.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/30.usbdev_device_address.2512380689 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 15854765296 ps |
| CPU time | 28.12 seconds |
| Started | Aug 12 06:34:09 PM PDT 24 |
| Finished | Aug 12 06:34:37 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-a1424d4a-8442-476b-9a62-a8df43fee9bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25123 80689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.2512380689 |
| Directory | /workspace/30.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/30.usbdev_device_timeout.2058779202 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 586082820 ps |
| CPU time | 4.94 seconds |
| Started | Aug 12 06:34:15 PM PDT 24 |
| Finished | Aug 12 06:34:25 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-798a0da8-9492-44cf-b891-b1d359cf8971 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2058779202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.2058779202 |
| Directory | /workspace/30.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/30.usbdev_disable_endpoint.4037404132 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 952610973 ps |
| CPU time | 2.03 seconds |
| Started | Aug 12 06:34:06 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-19c099c5-8625-4628-a40a-01e9e17666d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40374 04132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disable_endpoint.4037404132 |
| Directory | /workspace/30.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/30.usbdev_disconnected.597727170 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 137942893 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-4488715b-6fe5-4b31-bb72-db1c133a8de2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59772 7170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disconnected.597727170 |
| Directory | /workspace/30.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/30.usbdev_enable.633447192 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 44545854 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:34:21 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-f0a7a647-a29a-4573-a7f9-571a6d3e60d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63344 7192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_enable.633447192 |
| Directory | /workspace/30.usbdev_enable/latest |
| Test location | /workspace/coverage/default/30.usbdev_endpoint_access.748709733 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 829209256 ps |
| CPU time | 2.28 seconds |
| Started | Aug 12 06:34:25 PM PDT 24 |
| Finished | Aug 12 06:34:27 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-490ed2a9-7559-479c-bf5c-0e5618233ab9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74870 9733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.748709733 |
| Directory | /workspace/30.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/30.usbdev_endpoint_types.730073005 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 575419741 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:34:08 PM PDT 24 |
| Finished | Aug 12 06:34:10 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f7444a6e-402c-4ca6-9ebe-49203a56bdd8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=730073005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.730073005 |
| Directory | /workspace/30.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/30.usbdev_fifo_rst.1213856381 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 231798973 ps |
| CPU time | 2.1 seconds |
| Started | Aug 12 06:34:22 PM PDT 24 |
| Finished | Aug 12 06:34:24 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-9a293ba2-3223-4fa6-887e-b248bc00947c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12138 56381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_fifo_rst.1213856381 |
| Directory | /workspace/30.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_iso.922676230 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 193642455 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 06:34:07 PM PDT 24 |
| Finished | Aug 12 06:34:08 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-8b8ee90b-8844-4cd7-ab6d-3d63305928c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=922676230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.922676230 |
| Directory | /workspace/30.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_stall.2019079218 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 146408057 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:34:05 PM PDT 24 |
| Finished | Aug 12 06:34:11 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c489956c-6b7c-4603-b67e-808c5e7a70a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20190 79218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_stall.2019079218 |
| Directory | /workspace/30.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_trans.1853180467 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 225530158 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:06 PM PDT 24 |
| Finished | Aug 12 06:34:07 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3fd00881-bfb4-48d1-ad5c-906cf48c5509 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18531 80467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_trans.1853180467 |
| Directory | /workspace/30.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_invalid_sync.3181841134 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 4594567874 ps |
| CPU time | 34.73 seconds |
| Started | Aug 12 06:34:18 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 218296 kb |
| Host | smart-327fae58-ab6b-4cb0-8f76-e282477fd504 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3181841134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.3181841134 |
| Directory | /workspace/30.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/30.usbdev_iso_retraction.2394576601 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 9708881709 ps |
| CPU time | 68.76 seconds |
| Started | Aug 12 06:34:15 PM PDT 24 |
| Finished | Aug 12 06:35:24 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-9e8ab530-2440-4d0f-a800-16c50c9cf3a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2394576601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.2394576601 |
| Directory | /workspace/30.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_in_err.607557330 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 215881302 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:34:13 PM PDT 24 |
| Finished | Aug 12 06:34:14 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-6e5e0d11-5604-4fe2-95a6-7db6f289ddec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60755 7330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_in_err.607557330 |
| Directory | /workspace/30.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_resume.4266838175 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 26507701589 ps |
| CPU time | 30.95 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:50 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-b9a1c127-1c5b-49d9-98a0-0bdf537e3352 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42668 38175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_resume.4266838175 |
| Directory | /workspace/30.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_suspend.1120255524 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 9208866289 ps |
| CPU time | 13.28 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:32 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-063dce30-86b0-42e1-9f68-2cadd4cdf185 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11202 55524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_suspend.1120255524 |
| Directory | /workspace/30.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/30.usbdev_low_speed_traffic.1744578216 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 3836162595 ps |
| CPU time | 36.16 seconds |
| Started | Aug 12 06:34:14 PM PDT 24 |
| Finished | Aug 12 06:34:50 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-f086785e-544f-4813-a747-79aa8cfab2a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1744578216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.1744578216 |
| Directory | /workspace/30.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_inter_pkt_delay.2907467023 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 3359671249 ps |
| CPU time | 96.53 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:36:17 PM PDT 24 |
| Peak memory | 217252 kb |
| Host | smart-87bf3899-7a5a-4921-911f-137cff558ffe |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2907467023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.2907467023 |
| Directory | /workspace/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_length_in_transaction.2090780784 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 277811476 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:34:16 PM PDT 24 |
| Finished | Aug 12 06:34:17 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3e6be238-4b40-42b0-a110-896e2071ed95 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2090780784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.2090780784 |
| Directory | /workspace/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_length_out_transaction.2450297413 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 194662652 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-79ca79be-0f1c-4209-bec3-2f12934344f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24502 97413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.2450297413 |
| Directory | /workspace/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_inter_pkt_delay.3074699764 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 2092560092 ps |
| CPU time | 20.91 seconds |
| Started | Aug 12 06:34:10 PM PDT 24 |
| Finished | Aug 12 06:34:31 PM PDT 24 |
| Peak memory | 217356 kb |
| Host | smart-f6356e3a-204d-46f3-9ae8-9375cb255f8d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3074699764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.3074699764 |
| Directory | /workspace/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_length_in_transaction.1707021626 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 165916872 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:28 PM PDT 24 |
| Finished | Aug 12 06:34:29 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-be72077c-eede-4102-96ad-c9e1a03de4e2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1707021626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.1707021626 |
| Directory | /workspace/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_length_out_transaction.673610543 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 144459595 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:22 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-fe4ab9cb-bcf5-407a-beef-9bb127dc63c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67361 0543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.673610543 |
| Directory | /workspace/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_nak_trans.3490522335 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 218686327 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:34:17 PM PDT 24 |
| Finished | Aug 12 06:34:18 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-bebd624e-ae26-4a58-940e-f7bd2155801f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34905 22335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_nak_trans.3490522335 |
| Directory | /workspace/30.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_iso.1989344713 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 183227245 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:23 PM PDT 24 |
| Finished | Aug 12 06:34:24 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-7454922b-ddde-4687-9ac1-18b5d05db146 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19893 44713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_iso.1989344713 |
| Directory | /workspace/30.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_stall.3124090244 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 220692422 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:25 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8029f65f-58c7-4fbc-8b5b-06ac7cee7142 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31240 90244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_stall.3124090244 |
| Directory | /workspace/30.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_trans_nak.3956061073 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 176388428 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:34:26 PM PDT 24 |
| Finished | Aug 12 06:34:27 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-14dbe7e7-9551-4dbd-baca-8160715181cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39560 61073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_trans_nak.3956061073 |
| Directory | /workspace/30.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/30.usbdev_pending_in_trans.1534214366 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 168638752 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:22 PM PDT 24 |
| Finished | Aug 12 06:34:23 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-2820f489-40c6-4bed-9d43-3906e871ca4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15342 14366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pending_in_trans.1534214366 |
| Directory | /workspace/30.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_config_pinflip.3934493335 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 238567056 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207008 kb |
| Host | smart-2b44928d-d96f-4368-bdd9-6d6de8be205c |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3934493335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.3934493335 |
| Directory | /workspace/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_config_usb_ref_disable.1473603334 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 149056254 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:34:25 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-9e15e066-ea5b-4492-9c3a-412a0633a2b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14736 03334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.1473603334 |
| Directory | /workspace/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_pins_sense.1425225561 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 66599998 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:34:18 PM PDT 24 |
| Finished | Aug 12 06:34:18 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-97d2d41d-8311-449e-988c-6390265244d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14252 25561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.1425225561 |
| Directory | /workspace/30.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_buffer.610200435 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 10852518743 ps |
| CPU time | 27.49 seconds |
| Started | Aug 12 06:34:22 PM PDT 24 |
| Finished | Aug 12 06:34:49 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-9b22966e-faeb-41ab-89c8-cd500e7ef961 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61020 0435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_buffer.610200435 |
| Directory | /workspace/30.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_received.543974862 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 185912976 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:34:18 PM PDT 24 |
| Finished | Aug 12 06:34:19 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-b4e5013f-a6cf-492b-90e2-5c7d8b1c7df7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54397 4862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_received.543974862 |
| Directory | /workspace/30.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_sent.1614948778 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 260303107 ps |
| CPU time | 1.15 seconds |
| Started | Aug 12 06:34:27 PM PDT 24 |
| Finished | Aug 12 06:34:29 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-682ee54e-443c-403a-a745-267512efe1dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16149 48778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_sent.1614948778 |
| Directory | /workspace/30.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/30.usbdev_random_length_in_transaction.2406015979 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 209436470 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:34:24 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-e6700286-83a1-4fda-83fe-c09b8662e086 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24060 15979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_in_transaction.2406015979 |
| Directory | /workspace/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_random_length_out_transaction.2630056360 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 179480783 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:25 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-10ef1c13-746d-4c9b-a814-b526cb9a630a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26300 56360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.2630056360 |
| Directory | /workspace/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_rx_crc_err.279158190 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 133879722 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:34:35 PM PDT 24 |
| Finished | Aug 12 06:34:36 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-19a65572-dc8c-4d7a-9d49-0e00d155d700 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27915 8190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_rx_crc_err.279158190 |
| Directory | /workspace/30.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_rx_full.731844549 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 275962107 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:34:10 PM PDT 24 |
| Finished | Aug 12 06:34:12 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-c7ae5e5e-2299-417e-a1cd-ab8ac2af3c31 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73184 4549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_rx_full.731844549 |
| Directory | /workspace/30.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/30.usbdev_setup_stage.447000636 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 186921362 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:18 PM PDT 24 |
| Finished | Aug 12 06:34:19 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-31aca8b8-8fe1-461f-aff4-5f2a67370268 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44700 0636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_setup_stage.447000636 |
| Directory | /workspace/30.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/30.usbdev_setup_trans_ignored.910203235 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 149521402 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:38 PM PDT 24 |
| Finished | Aug 12 06:34:39 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-25b6d7bf-8637-4e84-b4f6-2e7071f63d1c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91020 3235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_setup_trans_ignored.910203235 |
| Directory | /workspace/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/30.usbdev_smoke.72167855 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 240495311 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:34:18 PM PDT 24 |
| Finished | Aug 12 06:34:19 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cc8acba9-278b-4231-9cb0-b3a017c096e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72167 855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /works pace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.72167855 |
| Directory | /workspace/30.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/30.usbdev_spurious_pids_ignored.2222344499 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 2869177099 ps |
| CPU time | 28.73 seconds |
| Started | Aug 12 06:34:21 PM PDT 24 |
| Finished | Aug 12 06:34:50 PM PDT 24 |
| Peak memory | 217856 kb |
| Host | smart-4219a857-b21e-45aa-b950-5a2927c3b67c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2222344499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.2222344499 |
| Directory | /workspace/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/30.usbdev_stall_priority_over_nak.3367369822 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 195127287 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:15 PM PDT 24 |
| Finished | Aug 12 06:34:16 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-0dbe0f80-c52c-4bba-8428-dde63b3822f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33673 69822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.3367369822 |
| Directory | /workspace/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/30.usbdev_stall_trans.394410181 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 189355247 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:14 PM PDT 24 |
| Finished | Aug 12 06:34:15 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-1966c470-7469-4fbd-b27d-550dc5362218 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39441 0181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_trans.394410181 |
| Directory | /workspace/30.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_stream_len_max.2077734284 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 1346346499 ps |
| CPU time | 3.07 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:24 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-0db07c94-b5ea-455b-b264-1b8e61b57e0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20777 34284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.2077734284 |
| Directory | /workspace/30.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/30.usbdev_streaming_out.2731026874 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 2445447231 ps |
| CPU time | 23.92 seconds |
| Started | Aug 12 06:34:25 PM PDT 24 |
| Finished | Aug 12 06:34:49 PM PDT 24 |
| Peak memory | 217592 kb |
| Host | smart-2238021c-5554-4d42-a596-46732c1adcf1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27310 26874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_streaming_out.2731026874 |
| Directory | /workspace/30.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/30.usbdev_timeout_missing_host_handshake.1950558812 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 1177664625 ps |
| CPU time | 26.23 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:46 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-85ec14e1-3d05-4a32-83a2-70702ab0db8f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1950558812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_hos t_handshake.1950558812 |
| Directory | /workspace/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/30.usbdev_tx_rx_disruption.709749465 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 586557470 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:22 PM PDT 24 |
| Peak memory | 206980 kb |
| Host | smart-78ce393e-6d4e-40e4-b5ae-ede09c112f35 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=709749465 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_tx_rx_disruption.709749465 |
| Directory | /workspace/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/300.usbdev_tx_rx_disruption.3188535140 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 563674923 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:38:29 PM PDT 24 |
| Finished | Aug 12 06:38:31 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-fece98f6-c240-4173-b5c4-115851a0a5ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3188535140 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 300.usbdev_tx_rx_disruption.3188535140 |
| Directory | /workspace/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/301.usbdev_tx_rx_disruption.380732476 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 529490126 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d9d4a2ed-0d14-4752-8b65-10546358285b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=380732476 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 301.usbdev_tx_rx_disruption.380732476 |
| Directory | /workspace/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/302.usbdev_tx_rx_disruption.3008695946 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 559253143 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a1d78219-d1f8-4be1-8292-5fe1279d4b24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3008695946 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 302.usbdev_tx_rx_disruption.3008695946 |
| Directory | /workspace/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/303.usbdev_tx_rx_disruption.2644100693 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 530747556 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:54 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-ba9a3e22-d6d8-41c5-aed5-7c270f625445 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2644100693 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 303.usbdev_tx_rx_disruption.2644100693 |
| Directory | /workspace/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/304.usbdev_tx_rx_disruption.3515794146 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 607339609 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-b06f3487-2f2e-45cc-bf6c-2aba4f2fd71e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3515794146 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 304.usbdev_tx_rx_disruption.3515794146 |
| Directory | /workspace/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/305.usbdev_tx_rx_disruption.3160366674 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 567501910 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-68687b07-b698-4b6f-b32a-b8f0575205d5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3160366674 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 305.usbdev_tx_rx_disruption.3160366674 |
| Directory | /workspace/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/306.usbdev_tx_rx_disruption.3044437616 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 471332112 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:37:57 PM PDT 24 |
| Finished | Aug 12 06:37:59 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e3468bee-aa21-4bc6-931d-1b20b7dd6244 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3044437616 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 306.usbdev_tx_rx_disruption.3044437616 |
| Directory | /workspace/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/307.usbdev_tx_rx_disruption.2598512 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 588168346 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 06:37:57 PM PDT 24 |
| Finished | Aug 12 06:37:59 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-1932436d-280c-4fff-9de1-c34778bd5dcd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2598512 -assert nopostproc +UVM_TESTN AME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default. vdb -cm_log /dev/null -cm_name 307.usbdev_tx_rx_disruption.2598512 |
| Directory | /workspace/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/308.usbdev_tx_rx_disruption.2630357443 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 507184674 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:02 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-55f8d52a-9e3a-47ba-9a03-0c33212ece8b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2630357443 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 308.usbdev_tx_rx_disruption.2630357443 |
| Directory | /workspace/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/309.usbdev_tx_rx_disruption.1918969466 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 491561940 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:14 PM PDT 24 |
| Finished | Aug 12 06:38:21 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-d1e8bb83-b834-4386-92ac-57f6244ad02f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1918969466 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 309.usbdev_tx_rx_disruption.1918969466 |
| Directory | /workspace/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/31.usbdev_alert_test.1506857339 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 39211507 ps |
| CPU time | 0.65 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:34:41 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-be7c4ddb-3257-434c-b4a2-24203219d285 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1506857339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.1506857339 |
| Directory | /workspace/31.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_disconnect.4165712847 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 9181104327 ps |
| CPU time | 13.05 seconds |
| Started | Aug 12 06:34:21 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-e9f4c1d2-4d7c-49a9-9367-588bc4f989e9 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4165712847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_a on_wake_disconnect.4165712847 |
| Directory | /workspace/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_reset.835859917 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 14279624382 ps |
| CPU time | 16.56 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:37 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-b39648eb-0123-4e33-9cca-273b2ee1c1ea |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=835859917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.835859917 |
| Directory | /workspace/31.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_resume.585000469 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 28481942748 ps |
| CPU time | 36.41 seconds |
| Started | Aug 12 06:34:28 PM PDT 24 |
| Finished | Aug 12 06:35:04 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-ffa37297-01bc-4257-81c8-d44b9a96fc4b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=585000469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_ao n_wake_resume.585000469 |
| Directory | /workspace/31.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/31.usbdev_av_buffer.1921334240 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 156039113 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:20 PM PDT 24 |
| Finished | Aug 12 06:34:21 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-22a4db85-23cb-4f3f-87e0-c8bbe2ff09a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19213 34240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_av_buffer.1921334240 |
| Directory | /workspace/31.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/31.usbdev_bitstuff_err.295359645 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 168425308 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:37 PM PDT 24 |
| Finished | Aug 12 06:34:38 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-e8160a91-7d27-44d2-9318-32141fc16fcc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29535 9645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_bitstuff_err.295359645 |
| Directory | /workspace/31.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_data_toggle_clear.17701962 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 486670815 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:34:24 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6b8a9de3-968a-4c9b-ad54-b1f4412e927c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17701 962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_clear.17701962 |
| Directory | /workspace/31.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/31.usbdev_data_toggle_restore.1983731717 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 876155239 ps |
| CPU time | 2.53 seconds |
| Started | Aug 12 06:34:23 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-ea084341-b13e-4ae2-95a9-82a18b2bc0fb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1983731717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.1983731717 |
| Directory | /workspace/31.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/31.usbdev_device_address.295776631 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 22367046138 ps |
| CPU time | 35.29 seconds |
| Started | Aug 12 06:34:19 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-e7721cd3-bdb0-4856-8c1f-65cd442c2d9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29577 6631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.295776631 |
| Directory | /workspace/31.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/31.usbdev_device_timeout.3697003400 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 3833694730 ps |
| CPU time | 34.87 seconds |
| Started | Aug 12 06:34:26 PM PDT 24 |
| Finished | Aug 12 06:35:01 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-87532b18-7bce-4d79-83c5-3e92c7c30a63 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3697003400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.3697003400 |
| Directory | /workspace/31.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/31.usbdev_disable_endpoint.3473264985 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 940724629 ps |
| CPU time | 2.07 seconds |
| Started | Aug 12 06:34:33 PM PDT 24 |
| Finished | Aug 12 06:34:36 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-6922fcfe-7c0a-4da4-a735-cdc84e6fab25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34732 64985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disable_endpoint.3473264985 |
| Directory | /workspace/31.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/31.usbdev_disconnected.2964760578 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 190528506 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:35 PM PDT 24 |
| Finished | Aug 12 06:34:36 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-1157551d-a9b9-4ec5-9231-1e09b9e4f759 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29647 60578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disconnected.2964760578 |
| Directory | /workspace/31.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/31.usbdev_enable.1738545848 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 78676972 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:34:34 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-8543c20d-564d-4a48-8f02-4ab971202709 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17385 45848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_enable.1738545848 |
| Directory | /workspace/31.usbdev_enable/latest |
| Test location | /workspace/coverage/default/31.usbdev_endpoint_access.2112601394 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 956713843 ps |
| CPU time | 2.4 seconds |
| Started | Aug 12 06:34:34 PM PDT 24 |
| Finished | Aug 12 06:34:37 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-159562fb-7eac-46c4-914d-80480de4e12d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21126 01394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.2112601394 |
| Directory | /workspace/31.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/31.usbdev_endpoint_types.4063463228 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 441890628 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:34:28 PM PDT 24 |
| Finished | Aug 12 06:34:30 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-6abdc1fc-ee74-436b-80cf-5258194da57b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4063463228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.4063463228 |
| Directory | /workspace/31.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/31.usbdev_fifo_rst.1855771242 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 252635296 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:34:27 PM PDT 24 |
| Finished | Aug 12 06:34:29 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-b6f9125b-0718-45f5-943c-46e0ea0bee16 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18557 71242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_fifo_rst.1855771242 |
| Directory | /workspace/31.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_iso.71855614 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 197750441 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:34:18 PM PDT 24 |
| Finished | Aug 12 06:34:19 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-e037cd3a-73bf-46ab-bcaa-73ef463848d6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=71855614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.71855614 |
| Directory | /workspace/31.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_stall.1392111878 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 142234585 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:34:23 PM PDT 24 |
| Finished | Aug 12 06:34:24 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-0df99b77-2627-46f5-b6f3-7249fa8bb29d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13921 11878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_stall.1392111878 |
| Directory | /workspace/31.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_trans.3501659140 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 215958628 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:34:30 PM PDT 24 |
| Finished | Aug 12 06:34:31 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-787ab706-c528-49cd-9f61-0543fb944ad4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35016 59140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_trans.3501659140 |
| Directory | /workspace/31.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_invalid_sync.2336292164 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 2615038951 ps |
| CPU time | 75.16 seconds |
| Started | Aug 12 06:34:24 PM PDT 24 |
| Finished | Aug 12 06:35:39 PM PDT 24 |
| Peak memory | 217752 kb |
| Host | smart-13943dae-3cff-418a-8efa-4fef9247d677 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2336292164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.2336292164 |
| Directory | /workspace/31.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/31.usbdev_iso_retraction.196887344 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 13611772120 ps |
| CPU time | 95 seconds |
| Started | Aug 12 06:34:24 PM PDT 24 |
| Finished | Aug 12 06:36:01 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-5c524293-cdcd-406b-8334-ab67d17de22a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=196887344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.196887344 |
| Directory | /workspace/31.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_in_err.39270578 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 179897618 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:34:23 PM PDT 24 |
| Finished | Aug 12 06:34:24 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8e672124-f881-4c73-901b-e2bd9c83b171 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39270 578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_in_err.39270578 |
| Directory | /workspace/31.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_resume.3349667176 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 26088531048 ps |
| CPU time | 41.27 seconds |
| Started | Aug 12 06:34:24 PM PDT 24 |
| Finished | Aug 12 06:35:06 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-a63e98d3-d135-4d3b-a597-5d0b98b58f59 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33496 67176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_resume.3349667176 |
| Directory | /workspace/31.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_suspend.1631643041 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 11317067059 ps |
| CPU time | 13.7 seconds |
| Started | Aug 12 06:34:23 PM PDT 24 |
| Finished | Aug 12 06:34:40 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-577a18f3-d4c1-4358-a6d3-842ce32b4e4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16316 43041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_suspend.1631643041 |
| Directory | /workspace/31.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/31.usbdev_low_speed_traffic.3115088628 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 5788000393 ps |
| CPU time | 63.67 seconds |
| Started | Aug 12 06:34:35 PM PDT 24 |
| Finished | Aug 12 06:35:39 PM PDT 24 |
| Peak memory | 219364 kb |
| Host | smart-fed08aa3-7d7d-4ba5-a8f5-95514592ebf3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3115088628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.3115088628 |
| Directory | /workspace/31.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_inter_pkt_delay.2626039246 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 2187777059 ps |
| CPU time | 16.84 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 217524 kb |
| Host | smart-f75f1731-df84-42bf-836c-91218a743ac8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2626039246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.2626039246 |
| Directory | /workspace/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_length_in_transaction.314842034 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 267570825 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:34:30 PM PDT 24 |
| Finished | Aug 12 06:34:31 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-4693cdbf-c910-40a7-a658-a767234c0eb8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=314842034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.314842034 |
| Directory | /workspace/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_length_out_transaction.3522827334 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 203436052 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-1f95d2bb-fe21-4369-b458-2dfa310a16b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35228 27334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.3522827334 |
| Directory | /workspace/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_inter_pkt_delay.1328163327 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 2235968728 ps |
| CPU time | 64.08 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 217144 kb |
| Host | smart-cd944f40-46e1-4e88-acb2-9b66c35606d8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1328163327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.1328163327 |
| Directory | /workspace/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_length_in_transaction.420787291 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 158639665 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-be9de141-d08a-499a-9566-8d440ebde4ef |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=420787291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.420787291 |
| Directory | /workspace/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_length_out_transaction.3250942186 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 149073083 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:36 PM PDT 24 |
| Finished | Aug 12 06:34:37 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-9572d7e3-f555-4daa-8ea5-be1a1c6eec55 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32509 42186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.3250942186 |
| Directory | /workspace/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_iso.2461248038 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 191988551 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:34:51 PM PDT 24 |
| Finished | Aug 12 06:34:52 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-3927b511-92c7-4fe1-8ee9-464dc0b58eb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24612 48038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_iso.2461248038 |
| Directory | /workspace/31.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_stall.579174861 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 186886459 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:24 PM PDT 24 |
| Finished | Aug 12 06:34:25 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9454483e-81fb-45dd-bee5-202199173f4a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57917 4861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_stall.579174861 |
| Directory | /workspace/31.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_trans_nak.3217449074 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 167111131 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:28 PM PDT 24 |
| Finished | Aug 12 06:34:29 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-1278ba2f-b744-42ab-a9c0-8ad775c50cfb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32174 49074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_trans_nak.3217449074 |
| Directory | /workspace/31.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/31.usbdev_pending_in_trans.755511917 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 195951377 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:31 PM PDT 24 |
| Finished | Aug 12 06:34:32 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-ed117645-49af-4a68-aec6-a53879e30086 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75551 1917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pending_in_trans.755511917 |
| Directory | /workspace/31.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_config_pinflip.3899900449 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 214283883 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:39 PM PDT 24 |
| Finished | Aug 12 06:34:40 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-49682778-ae79-46c2-b10a-5db8ef90d03d |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3899900449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.3899900449 |
| Directory | /workspace/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_config_usb_ref_disable.1356214410 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 154907626 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:34:31 PM PDT 24 |
| Finished | Aug 12 06:34:32 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-61307f2a-9122-4554-982b-d13db9a31572 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13562 14410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.1356214410 |
| Directory | /workspace/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_pins_sense.895776071 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 46707104 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:34:25 PM PDT 24 |
| Finished | Aug 12 06:34:27 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-f91b5d28-c9f9-4f16-9034-f5a435701334 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89577 6071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.895776071 |
| Directory | /workspace/31.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_buffer.3701443730 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 8263631641 ps |
| CPU time | 21.37 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-23940426-6c8b-47af-b4a0-5a7840761463 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37014 43730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_buffer.3701443730 |
| Directory | /workspace/31.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_received.489782011 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 197961747 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:34:31 PM PDT 24 |
| Finished | Aug 12 06:34:32 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-0b507b68-d531-4fbc-bb8a-46c44a6907d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48978 2011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_received.489782011 |
| Directory | /workspace/31.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_sent.1768669798 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 223763688 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-15216535-7c52-4cca-ad9d-7aa0c2510774 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17686 69798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_sent.1768669798 |
| Directory | /workspace/31.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/31.usbdev_random_length_in_transaction.3348830635 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 195420741 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:24 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-1bbdaf61-e98b-455e-8a6e-3db368b7650b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33488 30635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_in_transaction.3348830635 |
| Directory | /workspace/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_random_length_out_transaction.2803476264 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 172927137 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:38 PM PDT 24 |
| Finished | Aug 12 06:34:39 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-6e683da3-0500-4404-9dbf-27d38cde7f7d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28034 76264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.2803476264 |
| Directory | /workspace/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_rx_crc_err.2767361709 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 199666752 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:34:38 PM PDT 24 |
| Finished | Aug 12 06:34:39 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-13afd8f0-6220-4629-99fe-7d8b58220e50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27673 61709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_rx_crc_err.2767361709 |
| Directory | /workspace/31.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_rx_full.721301462 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 275039751 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:34:34 PM PDT 24 |
| Finished | Aug 12 06:34:35 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-1d15d0f2-cf3a-44ca-9819-5014987421ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72130 1462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_rx_full.721301462 |
| Directory | /workspace/31.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/31.usbdev_setup_stage.3410572204 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 203319298 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:51 PM PDT 24 |
| Finished | Aug 12 06:34:52 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-a3668fed-b5b1-4efd-91cc-22e51cbb85bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34105 72204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_setup_stage.3410572204 |
| Directory | /workspace/31.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/31.usbdev_setup_trans_ignored.287267621 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 152001938 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:34:41 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-c4402ae1-9235-4c7b-b0ef-abeb28d6f56a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28726 7621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_setup_trans_ignored.287267621 |
| Directory | /workspace/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/31.usbdev_smoke.314219413 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 197950576 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:46 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-80173f1d-81ac-4b49-83be-ea8f9a109c66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31421 9413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.314219413 |
| Directory | /workspace/31.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/31.usbdev_spurious_pids_ignored.3216475192 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 2484708092 ps |
| CPU time | 18.66 seconds |
| Started | Aug 12 06:34:51 PM PDT 24 |
| Finished | Aug 12 06:35:10 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-6f211dd4-7e63-428e-9c1b-552417f57d84 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3216475192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.3216475192 |
| Directory | /workspace/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/31.usbdev_stall_priority_over_nak.2771897437 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 170161264 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:34:54 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e240d055-6e56-4a60-8745-eef5ce75ba48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27718 97437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.2771897437 |
| Directory | /workspace/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/31.usbdev_stall_trans.1167395808 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 177970037 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:34:32 PM PDT 24 |
| Finished | Aug 12 06:34:33 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a1dd3d0b-e598-4e82-a2fb-804f9866d465 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11673 95808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_trans.1167395808 |
| Directory | /workspace/31.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_stream_len_max.2643636356 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 1055420224 ps |
| CPU time | 2.77 seconds |
| Started | Aug 12 06:34:30 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-15b85ea6-95c7-43a4-b46e-ca3bc53c5ce3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26436 36356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.2643636356 |
| Directory | /workspace/31.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/31.usbdev_streaming_out.3441745501 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 2664847825 ps |
| CPU time | 79.34 seconds |
| Started | Aug 12 06:34:46 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 217288 kb |
| Host | smart-8d33ff2c-e089-4def-bd34-e410016a0f5b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34417 45501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_streaming_out.3441745501 |
| Directory | /workspace/31.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/31.usbdev_timeout_missing_host_handshake.440563801 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 1313041985 ps |
| CPU time | 30.95 seconds |
| Started | Aug 12 06:34:41 PM PDT 24 |
| Finished | Aug 12 06:35:12 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-39a3df97-8a26-4f9a-a29b-fb752f801b5b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=440563801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host _handshake.440563801 |
| Directory | /workspace/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/31.usbdev_tx_rx_disruption.1051552248 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 559545239 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:34:41 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-3a58ad41-f3fd-440e-bc0f-685d7ba0985b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1051552248 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_tx_rx_disruption.1051552248 |
| Directory | /workspace/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/310.usbdev_tx_rx_disruption.3972199386 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 459191065 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c8d0f053-6a9a-4765-b304-b36c5bcad9a3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3972199386 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 310.usbdev_tx_rx_disruption.3972199386 |
| Directory | /workspace/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/311.usbdev_tx_rx_disruption.829379399 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 485152620 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-3b62709c-1e62-4335-ae41-83cfe29308eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=829379399 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 311.usbdev_tx_rx_disruption.829379399 |
| Directory | /workspace/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/312.usbdev_tx_rx_disruption.243717173 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 494224809 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1219413f-4de5-4eaf-a578-5daeeeb8098c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=243717173 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 312.usbdev_tx_rx_disruption.243717173 |
| Directory | /workspace/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/313.usbdev_tx_rx_disruption.25727762 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 649705087 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:38:04 PM PDT 24 |
| Finished | Aug 12 06:38:06 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-1f36c3f4-7f94-4ad3-b0fd-c0e34884fd0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25727762 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 313.usbdev_tx_rx_disruption.25727762 |
| Directory | /workspace/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/314.usbdev_tx_rx_disruption.2020423153 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 478917080 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:38:12 PM PDT 24 |
| Finished | Aug 12 06:38:14 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-5c049917-84ef-428f-91b2-af70c96540bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2020423153 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 314.usbdev_tx_rx_disruption.2020423153 |
| Directory | /workspace/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/315.usbdev_tx_rx_disruption.4075387680 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 478963714 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-ae08a4d3-b8b5-4ef6-86ce-8f3add93f787 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4075387680 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 315.usbdev_tx_rx_disruption.4075387680 |
| Directory | /workspace/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/316.usbdev_tx_rx_disruption.513757405 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 594832424 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:37:53 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-b0463a96-a14d-44e0-8084-319e26621f2e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=513757405 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 316.usbdev_tx_rx_disruption.513757405 |
| Directory | /workspace/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/317.usbdev_tx_rx_disruption.61867110 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 513974555 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:38:18 PM PDT 24 |
| Finished | Aug 12 06:38:19 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-bdd29526-5bf9-41f6-b963-3a49511bbf08 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61867110 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 317.usbdev_tx_rx_disruption.61867110 |
| Directory | /workspace/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/318.usbdev_tx_rx_disruption.3591904378 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 562209975 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:02 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-66be164d-5cfc-4fcf-b86e-e04f60cc44d2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3591904378 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 318.usbdev_tx_rx_disruption.3591904378 |
| Directory | /workspace/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/319.usbdev_tx_rx_disruption.2332059517 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 698149034 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c4fdbe6f-8921-451c-a1b4-7c44991785a1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2332059517 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 319.usbdev_tx_rx_disruption.2332059517 |
| Directory | /workspace/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/32.usbdev_alert_test.2867633341 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 44456851 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:34:41 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-22615b53-53b9-4fe6-a1a4-166f5111ca36 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2867633341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.2867633341 |
| Directory | /workspace/32.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_disconnect.1875408577 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 5593934320 ps |
| CPU time | 7.77 seconds |
| Started | Aug 12 06:34:26 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-2096ed18-fb70-488d-80a2-f61114623582 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1875408577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_a on_wake_disconnect.1875408577 |
| Directory | /workspace/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_reset.3251822202 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 15872679796 ps |
| CPU time | 18.66 seconds |
| Started | Aug 12 06:34:39 PM PDT 24 |
| Finished | Aug 12 06:34:58 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-2114ad28-2048-4a23-b08d-a62f42d17e78 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3251822202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3251822202 |
| Directory | /workspace/32.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_resume.734250784 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 28798511975 ps |
| CPU time | 36.06 seconds |
| Started | Aug 12 06:34:36 PM PDT 24 |
| Finished | Aug 12 06:35:12 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-5667f45c-460e-4eba-9bed-7fbfe5f0108c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=734250784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_ao n_wake_resume.734250784 |
| Directory | /workspace/32.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/32.usbdev_av_buffer.3775690462 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 184598818 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:41 PM PDT 24 |
| Finished | Aug 12 06:34:42 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-9cf9fbd1-6066-4717-bd4c-cda4d0a29173 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37756 90462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_av_buffer.3775690462 |
| Directory | /workspace/32.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/32.usbdev_bitstuff_err.2189996911 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 140073866 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:34:34 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-cd78626a-e2e4-4f7d-92aa-15586a334114 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21899 96911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_bitstuff_err.2189996911 |
| Directory | /workspace/32.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_data_toggle_clear.4080573975 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 394189476 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:34:48 PM PDT 24 |
| Finished | Aug 12 06:34:49 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4ca45c75-9e64-4e20-bea7-b2b869687f81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40805 73975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_clear.4080573975 |
| Directory | /workspace/32.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/32.usbdev_data_toggle_restore.630502477 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 890629213 ps |
| CPU time | 2.27 seconds |
| Started | Aug 12 06:34:48 PM PDT 24 |
| Finished | Aug 12 06:34:50 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-ff2f1e5c-ab2d-495a-85f8-ace3356cc50e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=630502477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.630502477 |
| Directory | /workspace/32.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/32.usbdev_device_address.2534955133 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 18079934241 ps |
| CPU time | 35.25 seconds |
| Started | Aug 12 06:34:32 PM PDT 24 |
| Finished | Aug 12 06:35:07 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-0233ef50-1a50-4748-afbb-b6485c86c553 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25349 55133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.2534955133 |
| Directory | /workspace/32.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/32.usbdev_device_timeout.454948534 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 1107657025 ps |
| CPU time | 22.72 seconds |
| Started | Aug 12 06:34:45 PM PDT 24 |
| Finished | Aug 12 06:35:08 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-e774a932-b8eb-4799-ac9b-49bdb3403add |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=454948534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.454948534 |
| Directory | /workspace/32.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/32.usbdev_disable_endpoint.568184270 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 824596637 ps |
| CPU time | 1.87 seconds |
| Started | Aug 12 06:34:51 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-7d2b2558-630b-4296-b9c5-b6819e0f28a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56818 4270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disable_endpoint.568184270 |
| Directory | /workspace/32.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/32.usbdev_disconnected.3555706207 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 143433394 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:25 PM PDT 24 |
| Finished | Aug 12 06:34:26 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-dd726e25-0d51-4b11-aeba-f9d6dbd5ad34 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35557 06207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disconnected.3555706207 |
| Directory | /workspace/32.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/32.usbdev_enable.3187835455 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 56059878 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:34:48 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b89bbdd2-325c-4d2b-9c10-3b9c9a585587 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31878 35455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_enable.3187835455 |
| Directory | /workspace/32.usbdev_enable/latest |
| Test location | /workspace/coverage/default/32.usbdev_endpoint_access.354884217 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 814998290 ps |
| CPU time | 2.1 seconds |
| Started | Aug 12 06:34:25 PM PDT 24 |
| Finished | Aug 12 06:34:27 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-eac11b58-9550-43f1-b710-1020aeccf3ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35488 4217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.354884217 |
| Directory | /workspace/32.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/32.usbdev_endpoint_types.888324317 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 484860981 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:34:45 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-a3719cab-2d4d-4199-b729-29480f6bd934 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=888324317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.888324317 |
| Directory | /workspace/32.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/32.usbdev_fifo_rst.2937585960 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 192069849 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:34:34 PM PDT 24 |
| Finished | Aug 12 06:34:36 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-266df7c9-07a4-4595-8ebf-cdbbd8b9188e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29375 85960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_fifo_rst.2937585960 |
| Directory | /workspace/32.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_iso.1941787512 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 155495557 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:30 PM PDT 24 |
| Finished | Aug 12 06:34:31 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b54d9a8d-137c-49af-ad14-d5a2b0225a68 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1941787512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.1941787512 |
| Directory | /workspace/32.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_stall.632043770 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 150352628 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:45 PM PDT 24 |
| Finished | Aug 12 06:34:46 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-3b5bd4ff-49af-437c-add1-b9f7fcc816fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63204 3770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_stall.632043770 |
| Directory | /workspace/32.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_trans.1694199650 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 161645252 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:43 PM PDT 24 |
| Finished | Aug 12 06:34:44 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-0272a6ac-ba70-483a-a3f9-b551dbabe595 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16941 99650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_trans.1694199650 |
| Directory | /workspace/32.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_invalid_sync.2841325819 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 2919881161 ps |
| CPU time | 85.07 seconds |
| Started | Aug 12 06:34:48 PM PDT 24 |
| Finished | Aug 12 06:36:14 PM PDT 24 |
| Peak memory | 218368 kb |
| Host | smart-0506c1c5-7758-41e3-8d7b-dffe50788818 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2841325819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.2841325819 |
| Directory | /workspace/32.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/32.usbdev_iso_retraction.2787051997 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 8950044107 ps |
| CPU time | 64.52 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-ea3363d6-acec-4a3a-a810-0863b3fc297d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2787051997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.2787051997 |
| Directory | /workspace/32.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_in_err.163804991 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 195806541 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:31 PM PDT 24 |
| Finished | Aug 12 06:34:33 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c466ddc5-c116-4733-98fe-831656ff700d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16380 4991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_in_err.163804991 |
| Directory | /workspace/32.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_resume.2219794387 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 28080222632 ps |
| CPU time | 43.23 seconds |
| Started | Aug 12 06:34:33 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 216636 kb |
| Host | smart-a9e41a8f-e107-4f90-8862-ae8e91cbf6ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22197 94387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_resume.2219794387 |
| Directory | /workspace/32.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_suspend.395431814 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 4371485926 ps |
| CPU time | 6.27 seconds |
| Started | Aug 12 06:34:41 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 216020 kb |
| Host | smart-46fd4241-9a56-4df1-930e-a6494dd28367 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39543 1814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_suspend.395431814 |
| Directory | /workspace/32.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/32.usbdev_low_speed_traffic.1751266269 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 4725602890 ps |
| CPU time | 40.23 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:35:33 PM PDT 24 |
| Peak memory | 219424 kb |
| Host | smart-51064cea-6bac-49b2-98c7-d6e8dd75442a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1751266269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.1751266269 |
| Directory | /workspace/32.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_inter_pkt_delay.2278084164 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 4097904566 ps |
| CPU time | 32.21 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:35:25 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-2dcff5f0-1c22-4755-b4d3-04bce1398aea |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2278084164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.2278084164 |
| Directory | /workspace/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_length_in_transaction.494270973 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 242336843 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:34:43 PM PDT 24 |
| Finished | Aug 12 06:34:44 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-d7240725-e5f1-435b-bea7-c9f15ced58e5 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=494270973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.494270973 |
| Directory | /workspace/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_length_out_transaction.1581609969 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 214551374 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:34:41 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-68e2bd7e-1a60-4328-b0b6-0fa02c6887b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15816 09969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.1581609969 |
| Directory | /workspace/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_inter_pkt_delay.2645183669 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 2589473570 ps |
| CPU time | 20.66 seconds |
| Started | Aug 12 06:34:48 PM PDT 24 |
| Finished | Aug 12 06:35:09 PM PDT 24 |
| Peak memory | 224084 kb |
| Host | smart-8d3e7d90-a8d3-486a-b149-d5609518db63 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2645183669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.2645183669 |
| Directory | /workspace/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_length_in_transaction.3328326889 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 177591483 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-25f38a49-31b6-49fd-aee4-4bf99140d8bb |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3328326889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.3328326889 |
| Directory | /workspace/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_length_out_transaction.361476261 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 186905215 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:46 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-6f21a411-cead-409f-8acc-892590f3212f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36147 6261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.361476261 |
| Directory | /workspace/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_nak_trans.2503690442 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 207429499 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:46 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-1b930f16-44d3-4499-8d7d-8e1d417f42e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25036 90442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_nak_trans.2503690442 |
| Directory | /workspace/32.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_iso.2737206620 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 218632784 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:46 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c68ce34d-1981-4723-879d-5bd4ea771281 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27372 06620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_iso.2737206620 |
| Directory | /workspace/32.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_stall.182515058 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 209925390 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-7c0db501-5cc1-4616-8745-58f75d324bec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18251 5058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_stall.182515058 |
| Directory | /workspace/32.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_trans_nak.724646671 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 150044502 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:34:41 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-50f793da-aee4-4d36-962a-7db8903f3107 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72464 6671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_trans_nak.724646671 |
| Directory | /workspace/32.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/32.usbdev_pending_in_trans.3206433288 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 146618358 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:49 PM PDT 24 |
| Finished | Aug 12 06:34:50 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-0b6e0870-be9c-40be-b655-5eea0f65efde |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32064 33288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pending_in_trans.3206433288 |
| Directory | /workspace/32.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_config_pinflip.3074226200 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 237421254 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:34:32 PM PDT 24 |
| Finished | Aug 12 06:34:33 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-67871c00-4274-4124-9a39-b5259ededf99 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3074226200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.3074226200 |
| Directory | /workspace/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_config_usb_ref_disable.3843154662 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 226915540 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c21e0ed5-2b26-45ba-a5bc-ded85d6424d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38431 54662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.3843154662 |
| Directory | /workspace/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_pins_sense.1425222697 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 36409572 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:34:36 PM PDT 24 |
| Finished | Aug 12 06:34:37 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-095a6fb2-e2c4-40e6-9a5f-ecc09f78f3cf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14252 22697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.1425222697 |
| Directory | /workspace/32.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_buffer.3409275722 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 19191401533 ps |
| CPU time | 50.86 seconds |
| Started | Aug 12 06:34:50 PM PDT 24 |
| Finished | Aug 12 06:35:41 PM PDT 24 |
| Peak memory | 215840 kb |
| Host | smart-39eea45a-de16-4588-84f5-07f846ef8df1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34092 75722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_buffer.3409275722 |
| Directory | /workspace/32.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_received.383733420 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 175053650 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:45 PM PDT 24 |
| Finished | Aug 12 06:34:46 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-6557b032-91a4-4b3e-9647-47b7fd375927 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38373 3420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_received.383733420 |
| Directory | /workspace/32.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_sent.3540162859 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 210126397 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:41 PM PDT 24 |
| Finished | Aug 12 06:34:42 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5a193feb-179b-4be1-834a-33d643ebb063 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35401 62859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_sent.3540162859 |
| Directory | /workspace/32.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/32.usbdev_random_length_in_transaction.2064635027 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 205283014 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:34:48 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-08880ede-78ca-491a-9761-3fbdc994b371 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20646 35027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_in_transaction.2064635027 |
| Directory | /workspace/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_random_length_out_transaction.1679755879 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 158699394 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:32 PM PDT 24 |
| Finished | Aug 12 06:34:33 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-b709cfd5-ce11-45b0-8323-a6ad8cd94dc0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16797 55879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.1679755879 |
| Directory | /workspace/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_rx_crc_err.2700551269 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 149595649 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-7c4d5915-33a5-4f1d-b286-6304b09f2996 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27005 51269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_rx_crc_err.2700551269 |
| Directory | /workspace/32.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_rx_full.2962530275 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 322740830 ps |
| CPU time | 1.22 seconds |
| Started | Aug 12 06:34:37 PM PDT 24 |
| Finished | Aug 12 06:34:39 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-3b1cdc2c-7c14-49f1-b1f8-fa4ef56d4aa0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29625 30275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_rx_full.2962530275 |
| Directory | /workspace/32.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/32.usbdev_setup_stage.2071648082 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 149698144 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:46 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-3738018c-739b-4c5e-9906-5036db67fbd7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20716 48082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_setup_stage.2071648082 |
| Directory | /workspace/32.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/32.usbdev_setup_trans_ignored.1642479574 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 171005228 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-73aec916-8520-480d-86ac-4254b0cd665a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16424 79574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_setup_trans_ignored.1642479574 |
| Directory | /workspace/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/32.usbdev_smoke.934990481 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 192543689 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:34:45 PM PDT 24 |
| Finished | Aug 12 06:34:46 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-071fb530-8be8-4b9a-8d16-2ce0539abf61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93499 0481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.934990481 |
| Directory | /workspace/32.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/32.usbdev_spurious_pids_ignored.3511579830 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 2490003867 ps |
| CPU time | 70.5 seconds |
| Started | Aug 12 06:34:56 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 217552 kb |
| Host | smart-5521f839-d97a-45dd-96de-2142640c8ee7 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3511579830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.3511579830 |
| Directory | /workspace/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/32.usbdev_stall_priority_over_nak.1302516703 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 160947946 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:33 PM PDT 24 |
| Finished | Aug 12 06:34:34 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c3083b06-3918-4239-bcc0-ff585b2d1f5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13025 16703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.1302516703 |
| Directory | /workspace/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/32.usbdev_stall_trans.2464656520 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 182975903 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:36 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-e5bca2e8-fa80-476f-b248-aeac8ca3ac5b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24646 56520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_trans.2464656520 |
| Directory | /workspace/32.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_stream_len_max.814192136 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 839040624 ps |
| CPU time | 2.25 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-4b841b97-8ab4-456a-9bac-b1d41bdb85fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81419 2136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.814192136 |
| Directory | /workspace/32.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/32.usbdev_streaming_out.560786388 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 3012093867 ps |
| CPU time | 86.17 seconds |
| Started | Aug 12 06:34:31 PM PDT 24 |
| Finished | Aug 12 06:35:58 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-3e544c61-d117-4d28-9544-34684e72d645 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56078 6388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_streaming_out.560786388 |
| Directory | /workspace/32.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/32.usbdev_timeout_missing_host_handshake.1972034073 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 3704941115 ps |
| CPU time | 26.48 seconds |
| Started | Aug 12 06:34:32 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207240 kb |
| Host | smart-403723ac-82d7-421e-b668-975f06d70c34 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1972034073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_hos t_handshake.1972034073 |
| Directory | /workspace/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/32.usbdev_tx_rx_disruption.4272552856 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 531548869 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:34:34 PM PDT 24 |
| Finished | Aug 12 06:34:36 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-1b6cd509-6d1e-45d7-af42-ba57745415a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4272552856 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_tx_rx_disruption.4272552856 |
| Directory | /workspace/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/320.usbdev_tx_rx_disruption.2547118225 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 624407327 ps |
| CPU time | 1.75 seconds |
| Started | Aug 12 06:38:13 PM PDT 24 |
| Finished | Aug 12 06:38:15 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2cf53113-96fc-490e-9dad-2285cca4aed5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2547118225 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 320.usbdev_tx_rx_disruption.2547118225 |
| Directory | /workspace/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/321.usbdev_tx_rx_disruption.1938806972 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 543066943 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:38:02 PM PDT 24 |
| Finished | Aug 12 06:38:04 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-e97360f3-01d7-4dd1-9ebc-4f1abd19a22c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1938806972 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 321.usbdev_tx_rx_disruption.1938806972 |
| Directory | /workspace/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/322.usbdev_tx_rx_disruption.2426310225 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 686408620 ps |
| CPU time | 1.82 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e4642574-cb8f-4fd5-8cbf-97bb34cc3b0b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2426310225 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 322.usbdev_tx_rx_disruption.2426310225 |
| Directory | /workspace/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/323.usbdev_tx_rx_disruption.3450314514 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 457103146 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:38:22 PM PDT 24 |
| Finished | Aug 12 06:38:23 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-13adb4c0-8298-4308-bad8-b8e310577121 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3450314514 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 323.usbdev_tx_rx_disruption.3450314514 |
| Directory | /workspace/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/324.usbdev_tx_rx_disruption.2788170898 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 529040087 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-1e4927e8-7762-4b69-a1af-a95d2820527e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2788170898 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 324.usbdev_tx_rx_disruption.2788170898 |
| Directory | /workspace/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/325.usbdev_tx_rx_disruption.3260655035 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 524592424 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-74c2d802-9e23-4fef-8d0f-d6dcc7a7b6bf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3260655035 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 325.usbdev_tx_rx_disruption.3260655035 |
| Directory | /workspace/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/326.usbdev_tx_rx_disruption.1636854841 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 545303520 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-cc837a26-2524-4882-bdec-f762ccfcda5f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1636854841 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 326.usbdev_tx_rx_disruption.1636854841 |
| Directory | /workspace/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/327.usbdev_tx_rx_disruption.2498119459 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 494442384 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:38:02 PM PDT 24 |
| Finished | Aug 12 06:38:03 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-29fa19ab-ad8a-4343-974a-a836374b0e05 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2498119459 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 327.usbdev_tx_rx_disruption.2498119459 |
| Directory | /workspace/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/328.usbdev_tx_rx_disruption.2672282402 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 527424362 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7f08ac3a-6c14-4bb0-81f9-11c1d7596142 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2672282402 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 328.usbdev_tx_rx_disruption.2672282402 |
| Directory | /workspace/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/329.usbdev_tx_rx_disruption.1851849108 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 456911487 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-3d8e7c91-c233-4e38-9d6c-4ed7c93b0cfb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1851849108 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 329.usbdev_tx_rx_disruption.1851849108 |
| Directory | /workspace/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/33.usbdev_alert_test.666214256 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 74552759 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-262c2445-1e79-4e91-8525-e107de909ab7 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=666214256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.666214256 |
| Directory | /workspace/33.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_disconnect.3240261474 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 3999604322 ps |
| CPU time | 5.95 seconds |
| Started | Aug 12 06:34:51 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-2b7df383-44e8-46e9-96ae-cf53440696ff |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3240261474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_a on_wake_disconnect.3240261474 |
| Directory | /workspace/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_reset.528974165 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 21372889336 ps |
| CPU time | 24.93 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:35:20 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-a994d105-2452-41cb-9313-3b7c0fcb6c44 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=528974165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.528974165 |
| Directory | /workspace/33.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_resume.1665792027 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 23402212672 ps |
| CPU time | 29.09 seconds |
| Started | Aug 12 06:34:41 PM PDT 24 |
| Finished | Aug 12 06:35:15 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-c78708c2-713b-4d78-82b6-9bc84ad44d3a |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1665792027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_a on_wake_resume.1665792027 |
| Directory | /workspace/33.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/33.usbdev_av_buffer.731641283 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 156704170 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d15475bb-1f59-48d5-81a7-d7191d197949 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73164 1283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_av_buffer.731641283 |
| Directory | /workspace/33.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/33.usbdev_bitstuff_err.4172046824 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 143896840 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:56 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-39d58d70-8b41-4f0b-9d99-9b98096d6f22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41720 46824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_bitstuff_err.4172046824 |
| Directory | /workspace/33.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_data_toggle_clear.328585534 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 357900843 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:34:54 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b74679d1-c62c-48ec-8f69-d586aa8ca50e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32858 5534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_clear.328585534 |
| Directory | /workspace/33.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/33.usbdev_data_toggle_restore.2164411368 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 488769628 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-5353e860-16c1-40c5-b00e-5b818c78c2a0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2164411368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.2164411368 |
| Directory | /workspace/33.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/33.usbdev_device_address.347043861 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 49572990867 ps |
| CPU time | 80.75 seconds |
| Started | Aug 12 06:34:33 PM PDT 24 |
| Finished | Aug 12 06:35:54 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-e8c5e824-6147-4fcb-8b0c-97ad6ece01e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34704 3861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.347043861 |
| Directory | /workspace/33.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/33.usbdev_device_timeout.56142615 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 3594459538 ps |
| CPU time | 23.91 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:35:11 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-7ad6d365-6762-40f5-8dc6-d4a5fd4c6a3c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56142615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.56142615 |
| Directory | /workspace/33.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/33.usbdev_disable_endpoint.3062186741 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 1039624063 ps |
| CPU time | 2.28 seconds |
| Started | Aug 12 06:34:40 PM PDT 24 |
| Finished | Aug 12 06:34:42 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-6fc7f387-50bd-49bd-8baf-4bf0f69a3e24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30621 86741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disable_endpoint.3062186741 |
| Directory | /workspace/33.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/33.usbdev_disconnected.2986658737 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 160982718 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:51 PM PDT 24 |
| Finished | Aug 12 06:34:52 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-5113f322-7921-409d-ba71-2d5a6b60d764 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29866 58737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disconnected.2986658737 |
| Directory | /workspace/33.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/33.usbdev_enable.3889839269 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 53559649 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e172fc42-17d8-432e-978b-833aba4096a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38898 39269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_enable.3889839269 |
| Directory | /workspace/33.usbdev_enable/latest |
| Test location | /workspace/coverage/default/33.usbdev_endpoint_access.3062800174 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 817258293 ps |
| CPU time | 2.27 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:34:50 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-7623e535-535c-4648-9521-bf1df9494953 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30628 00174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.3062800174 |
| Directory | /workspace/33.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/33.usbdev_fifo_rst.3750759356 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 177607075 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:34:38 PM PDT 24 |
| Finished | Aug 12 06:34:40 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-d476b40d-6fe7-45f6-aa84-d0d6bf0394b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37507 59356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_fifo_rst.3750759356 |
| Directory | /workspace/33.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_iso.184652710 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 229312751 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:34:54 PM PDT 24 |
| Peak memory | 216908 kb |
| Host | smart-3d1f3a85-e929-43b6-9a8d-d3832ec4767e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=184652710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.184652710 |
| Directory | /workspace/33.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_stall.352320320 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 142830222 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:34:31 PM PDT 24 |
| Finished | Aug 12 06:34:32 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-63850f22-ee17-4209-b4d4-78525cc6674e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35232 0320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_stall.352320320 |
| Directory | /workspace/33.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_trans.2126305086 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 174182409 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:48 PM PDT 24 |
| Finished | Aug 12 06:34:49 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-aa05b20b-ca0e-4cfb-9ccf-414d05f6e971 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21263 05086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_trans.2126305086 |
| Directory | /workspace/33.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_invalid_sync.2066663208 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 4957096450 ps |
| CPU time | 138.75 seconds |
| Started | Aug 12 06:34:37 PM PDT 24 |
| Finished | Aug 12 06:36:56 PM PDT 24 |
| Peak memory | 218396 kb |
| Host | smart-49863d2c-094e-4d4a-b403-860c10f823ed |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2066663208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.2066663208 |
| Directory | /workspace/33.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/33.usbdev_iso_retraction.381779991 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 4643474819 ps |
| CPU time | 33.12 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:35:25 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-3f927220-1422-4eb6-bdee-9dbd8e1a2c66 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=381779991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.381779991 |
| Directory | /workspace/33.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_in_err.3424981416 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 226864599 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-989e98cc-233d-49bf-bb73-e2ed7484af64 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34249 81416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_in_err.3424981416 |
| Directory | /workspace/33.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_resume.1039543175 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 32648073639 ps |
| CPU time | 46.24 seconds |
| Started | Aug 12 06:34:41 PM PDT 24 |
| Finished | Aug 12 06:35:27 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-9f3304ee-4d6b-40ae-b367-dbcf8eae6530 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10395 43175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_resume.1039543175 |
| Directory | /workspace/33.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_suspend.2154194314 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 4889623363 ps |
| CPU time | 7.6 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:35:01 PM PDT 24 |
| Peak memory | 216760 kb |
| Host | smart-f667a9b8-6d5e-443c-9a44-7ad0b1eca357 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21541 94314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_suspend.2154194314 |
| Directory | /workspace/33.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/33.usbdev_low_speed_traffic.512546947 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 4134627960 ps |
| CPU time | 43.03 seconds |
| Started | Aug 12 06:34:50 PM PDT 24 |
| Finished | Aug 12 06:35:38 PM PDT 24 |
| Peak memory | 218588 kb |
| Host | smart-aab960e9-5477-4059-98df-71a3a5e12d3c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=512546947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.512546947 |
| Directory | /workspace/33.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_inter_pkt_delay.3287196399 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 2764423036 ps |
| CPU time | 22.94 seconds |
| Started | Aug 12 06:34:30 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-248b73be-3a9b-4647-8de3-434f683984fd |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3287196399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.3287196399 |
| Directory | /workspace/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_length_in_transaction.970545243 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 242325971 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:38 PM PDT 24 |
| Finished | Aug 12 06:34:39 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-5a351720-7967-439d-91eb-7f6dc75713ea |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=970545243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.970545243 |
| Directory | /workspace/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_length_out_transaction.3568327381 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 192387240 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-f36893a5-5d2e-45b9-be79-54e16b97cdc8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35683 27381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.3568327381 |
| Directory | /workspace/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_inter_pkt_delay.3832948895 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 2746204265 ps |
| CPU time | 20.39 seconds |
| Started | Aug 12 06:34:43 PM PDT 24 |
| Finished | Aug 12 06:35:03 PM PDT 24 |
| Peak memory | 217460 kb |
| Host | smart-213d952a-8140-469a-a895-00e54dac56a6 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3832948895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.3832948895 |
| Directory | /workspace/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_length_in_transaction.1282789999 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 145267615 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-3d941d39-6c73-4d71-a8cd-6364993244d4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1282789999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.1282789999 |
| Directory | /workspace/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_length_out_transaction.3637631674 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 151355119 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:34:48 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-c41e3b2a-51d6-421d-9a39-3fec7f4ada13 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36376 31674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.3637631674 |
| Directory | /workspace/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_nak_trans.654844302 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 228427300 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:34:54 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-b2657f4b-5f54-46d6-b406-42f60cbe0614 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65484 4302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_nak_trans.654844302 |
| Directory | /workspace/33.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_iso.228035286 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 150299269 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:43 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-6ba74021-7c12-4942-9de3-f87e1aaddb97 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22803 5286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_iso.228035286 |
| Directory | /workspace/33.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_stall.2453918082 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 149037946 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:34:54 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-4d46ac4c-f9a1-4688-9182-d15963367224 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24539 18082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_stall.2453918082 |
| Directory | /workspace/33.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_trans_nak.2208923173 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 178569587 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:43 PM PDT 24 |
| Finished | Aug 12 06:34:44 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4440edb5-42d9-4fbb-a6b3-9e7f8db6a55d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22089 23173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_trans_nak.2208923173 |
| Directory | /workspace/33.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/33.usbdev_pending_in_trans.2137570796 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 166030698 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-6dc8fc1e-f23a-4916-b859-7e1c3137dfb5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21375 70796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pending_in_trans.2137570796 |
| Directory | /workspace/33.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_config_pinflip.778733198 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 205759730 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:43 PM PDT 24 |
| Finished | Aug 12 06:34:44 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-13a15b12-306d-4bc1-a55a-486c3df1c083 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=778733198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.778733198 |
| Directory | /workspace/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_config_usb_ref_disable.4282271584 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 147303754 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-9afd82e3-8051-41dc-82be-373288c72a4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42822 71584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.4282271584 |
| Directory | /workspace/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_pins_sense.1480557230 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 45919429 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:34:36 PM PDT 24 |
| Finished | Aug 12 06:34:37 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-baed3a1a-4087-4572-ae02-a7c917800c24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14805 57230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.1480557230 |
| Directory | /workspace/33.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_buffer.3567640467 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 22833882691 ps |
| CPU time | 58.01 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:35:45 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-ed7b4fe2-b205-42fe-8926-c555e33bceac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35676 40467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_buffer.3567640467 |
| Directory | /workspace/33.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_received.915657902 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 157963270 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:46 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6e841595-14fc-477a-b505-022df733cec2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91565 7902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_received.915657902 |
| Directory | /workspace/33.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_sent.4183690990 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 163247315 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-39ba87e7-e2cb-409c-a504-c5fa69de8dcc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41836 90990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_sent.4183690990 |
| Directory | /workspace/33.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/33.usbdev_random_length_in_transaction.125301620 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 196266254 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:34:49 PM PDT 24 |
| Finished | Aug 12 06:34:51 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-c328c4e3-d7b0-410f-bb4c-4086b273f46c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12530 1620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_in_transaction.125301620 |
| Directory | /workspace/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_random_length_out_transaction.802661068 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 174588702 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-e922d272-bcc8-4f5c-a84c-1486c0e71c61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80266 1068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.802661068 |
| Directory | /workspace/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_rx_crc_err.3613072058 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 189098445 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:56 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-facc4dda-235b-47fe-b1e0-7738245a0ef4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36130 72058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_rx_crc_err.3613072058 |
| Directory | /workspace/33.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_rx_full.1384141907 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 282474459 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:34:49 PM PDT 24 |
| Finished | Aug 12 06:34:50 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-920a104b-a8a1-4d5c-975d-c34ec80505fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13841 41907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_rx_full.1384141907 |
| Directory | /workspace/33.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/33.usbdev_setup_stage.2071560137 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 162641363 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:03 PM PDT 24 |
| Finished | Aug 12 06:35:04 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-04e719a2-6511-473d-b3d9-a0847545362c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20715 60137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_setup_stage.2071560137 |
| Directory | /workspace/33.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/33.usbdev_setup_trans_ignored.1027579685 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 159054763 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-23da55b6-2336-4499-831a-1aeb72c1114b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10275 79685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_setup_trans_ignored.1027579685 |
| Directory | /workspace/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/33.usbdev_smoke.2061311050 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 215431807 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-ad92515a-5a10-4cde-b38e-679e875390b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20613 11050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.2061311050 |
| Directory | /workspace/33.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/33.usbdev_spurious_pids_ignored.3010631695 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 1631394312 ps |
| CPU time | 16.67 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 216740 kb |
| Host | smart-3c93dd3b-a4a6-4a97-abca-b601f099f41f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3010631695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.3010631695 |
| Directory | /workspace/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/33.usbdev_stall_priority_over_nak.2969295133 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 170055749 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c20c9f41-6906-4c02-8549-9642bae207de |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29692 95133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.2969295133 |
| Directory | /workspace/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/33.usbdev_stall_trans.415961460 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 207515395 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:34:54 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-ff874370-7d2c-44f7-84c9-26ab42a85261 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41596 1460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_trans.415961460 |
| Directory | /workspace/33.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_stream_len_max.261721508 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 1136739332 ps |
| CPU time | 2.78 seconds |
| Started | Aug 12 06:34:37 PM PDT 24 |
| Finished | Aug 12 06:34:40 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-cd124da6-c5ce-4eff-aab6-167e63bb2b5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26172 1508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.261721508 |
| Directory | /workspace/33.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/33.usbdev_streaming_out.2587666737 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 2686811073 ps |
| CPU time | 27.31 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:35:21 PM PDT 24 |
| Peak memory | 217620 kb |
| Host | smart-9aad366f-eeea-4c54-8656-526f25ee6fbf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25876 66737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_streaming_out.2587666737 |
| Directory | /workspace/33.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/33.usbdev_timeout_missing_host_handshake.2175218781 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 1265863939 ps |
| CPU time | 27.79 seconds |
| Started | Aug 12 06:34:51 PM PDT 24 |
| Finished | Aug 12 06:35:20 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-7e99a3ce-0677-445e-a127-f646ba2eaffa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2175218781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_hos t_handshake.2175218781 |
| Directory | /workspace/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/33.usbdev_tx_rx_disruption.2391649151 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 601465490 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-19dc2d46-6039-4f8d-b8c4-40d7ebcc7e52 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2391649151 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_tx_rx_disruption.2391649151 |
| Directory | /workspace/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/330.usbdev_tx_rx_disruption.2396689637 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 505413880 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-3e67affd-4755-429e-b324-d6533390b4e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2396689637 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 330.usbdev_tx_rx_disruption.2396689637 |
| Directory | /workspace/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/331.usbdev_tx_rx_disruption.2539324097 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 498001738 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:38:01 PM PDT 24 |
| Finished | Aug 12 06:38:03 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-862045d2-3fae-4620-9dfa-d05d3e5e9a9e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2539324097 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 331.usbdev_tx_rx_disruption.2539324097 |
| Directory | /workspace/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/332.usbdev_tx_rx_disruption.1170684060 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 601126745 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:16 PM PDT 24 |
| Finished | Aug 12 06:38:18 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-38c0e9b7-0305-4ada-a502-8bb2af37cf12 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1170684060 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 332.usbdev_tx_rx_disruption.1170684060 |
| Directory | /workspace/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/333.usbdev_tx_rx_disruption.4008269218 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 489833307 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-f05e8c9d-4b30-4531-a752-00ae83e243fe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4008269218 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 333.usbdev_tx_rx_disruption.4008269218 |
| Directory | /workspace/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/334.usbdev_tx_rx_disruption.657734782 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 582682239 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:37:52 PM PDT 24 |
| Finished | Aug 12 06:37:54 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-14f6aab6-b034-444f-bd56-a4f3cbd704c7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=657734782 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 334.usbdev_tx_rx_disruption.657734782 |
| Directory | /workspace/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/335.usbdev_tx_rx_disruption.1814645257 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 593357769 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:38:27 PM PDT 24 |
| Finished | Aug 12 06:38:29 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-b45a25f0-c14c-4432-927d-ebe3fc95e120 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1814645257 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 335.usbdev_tx_rx_disruption.1814645257 |
| Directory | /workspace/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/336.usbdev_tx_rx_disruption.3689463732 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 677152262 ps |
| CPU time | 1.9 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-cdfd0475-4bb3-4636-854b-86f273aa8535 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3689463732 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 336.usbdev_tx_rx_disruption.3689463732 |
| Directory | /workspace/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/337.usbdev_tx_rx_disruption.3329593856 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 606505525 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-bf0382b0-2992-432c-98f5-4ca776335b84 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3329593856 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 337.usbdev_tx_rx_disruption.3329593856 |
| Directory | /workspace/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/338.usbdev_tx_rx_disruption.1506124928 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 574372528 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-9717385e-70b8-438a-903b-a85ba3e4ffb2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1506124928 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 338.usbdev_tx_rx_disruption.1506124928 |
| Directory | /workspace/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/339.usbdev_tx_rx_disruption.3757786375 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 577749586 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:04 PM PDT 24 |
| Finished | Aug 12 06:38:05 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2b4f08ef-705c-4963-a051-3e127c9835db |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3757786375 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 339.usbdev_tx_rx_disruption.3757786375 |
| Directory | /workspace/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/34.usbdev_alert_test.3597491265 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 108170807 ps |
| CPU time | 0.78 seconds |
| Started | Aug 12 06:35:02 PM PDT 24 |
| Finished | Aug 12 06:35:03 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-64ed0a31-6cf1-42f3-bf61-5adf41a59532 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3597491265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.3597491265 |
| Directory | /workspace/34.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_disconnect.237770152 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 5075395109 ps |
| CPU time | 8.24 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:35:04 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-60203e00-9481-4d58-8023-ad229a4a30de |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=237770152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_ao n_wake_disconnect.237770152 |
| Directory | /workspace/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_reset.2519080519 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 14013969629 ps |
| CPU time | 17.23 seconds |
| Started | Aug 12 06:34:48 PM PDT 24 |
| Finished | Aug 12 06:35:05 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-9094d3e8-f704-4edd-a88d-789e272fdfba |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2519080519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.2519080519 |
| Directory | /workspace/34.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_resume.1161047418 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 24663357659 ps |
| CPU time | 30.73 seconds |
| Started | Aug 12 06:35:01 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-998b374c-d713-4b44-9bef-45d34777b354 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1161047418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_a on_wake_resume.1161047418 |
| Directory | /workspace/34.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/34.usbdev_av_buffer.834655580 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 165116979 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:56 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-efe6ab56-ec4a-4abf-8441-b5af61494d75 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83465 5580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_av_buffer.834655580 |
| Directory | /workspace/34.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/34.usbdev_bitstuff_err.3165088879 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 145001468 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:34:54 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-d9bebd3a-c3c3-46b3-95ae-544d2a4b1ba9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31650 88879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_bitstuff_err.3165088879 |
| Directory | /workspace/34.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_data_toggle_clear.3170660607 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 182222454 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-c017641e-a80f-4825-b940-8b3d2b0c5e92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31706 60607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_clear.3170660607 |
| Directory | /workspace/34.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/34.usbdev_data_toggle_restore.600166568 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 380284307 ps |
| CPU time | 1.28 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:44 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-43f6dbfa-91a1-4aa0-a2e7-0f38bc8da204 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=600166568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.600166568 |
| Directory | /workspace/34.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/34.usbdev_device_address.2840338528 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 34547871417 ps |
| CPU time | 52.58 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:35:50 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-b19de16d-a158-434c-a238-5d24df450b4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28403 38528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.2840338528 |
| Directory | /workspace/34.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/34.usbdev_device_timeout.1981812200 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 1548993424 ps |
| CPU time | 13.11 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-58b378d4-dd0f-418e-a048-90ed64daed26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1981812200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.1981812200 |
| Directory | /workspace/34.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/34.usbdev_disable_endpoint.235542480 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 435217768 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-c09b6bcc-f9f0-4402-b1a1-6f7c297afd4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23554 2480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_disable_endpoint.235542480 |
| Directory | /workspace/34.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/34.usbdev_disconnected.3970147467 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 145893479 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:34:39 PM PDT 24 |
| Finished | Aug 12 06:34:40 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-488763df-4e37-49a1-bf17-f94a7af252c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39701 47467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_disconnected.3970147467 |
| Directory | /workspace/34.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/34.usbdev_enable.3537540245 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 74654682 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:35:02 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-0773e08b-57b1-498e-9fb2-08c36f83b5e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35375 40245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_enable.3537540245 |
| Directory | /workspace/34.usbdev_enable/latest |
| Test location | /workspace/coverage/default/34.usbdev_endpoint_access.3792638450 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 773413784 ps |
| CPU time | 2.18 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:01 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-ad8573cf-cb09-42ba-9066-8c43bec54332 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37926 38450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.3792638450 |
| Directory | /workspace/34.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/34.usbdev_endpoint_types.3071012219 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 532225912 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4a65785e-b72e-45e3-8e52-9119f409df17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3071012219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.3071012219 |
| Directory | /workspace/34.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/34.usbdev_fifo_rst.4246564900 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 254840091 ps |
| CPU time | 1.98 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-0e68f9bd-024c-45b9-a48d-8b703949c43f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42465 64900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_fifo_rst.4246564900 |
| Directory | /workspace/34.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_iso.1697248983 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 250085850 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 215700 kb |
| Host | smart-cde4b6cd-7d4d-4eba-af5e-74a2a9a06db5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1697248983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.1697248983 |
| Directory | /workspace/34.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_stall.3503762836 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 134428688 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:34:48 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1c3c4522-8eda-46ba-a6fb-035de7d166da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35037 62836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_stall.3503762836 |
| Directory | /workspace/34.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_trans.1072991653 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 292801223 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:05 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d80546d5-19f4-46a8-a599-1f68d6f0a7dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10729 91653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_trans.1072991653 |
| Directory | /workspace/34.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_invalid_sync.1510233711 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 3089739287 ps |
| CPU time | 32.01 seconds |
| Started | Aug 12 06:34:56 PM PDT 24 |
| Finished | Aug 12 06:35:28 PM PDT 24 |
| Peak memory | 217888 kb |
| Host | smart-9490fbaa-84cb-4a2c-8a12-fc429a6ed4ff |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1510233711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.1510233711 |
| Directory | /workspace/34.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/34.usbdev_iso_retraction.559631556 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 7717492587 ps |
| CPU time | 53.55 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-edb97ea2-8d47-44e8-848f-ae56de7da9f3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=559631556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.559631556 |
| Directory | /workspace/34.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_in_err.1258697822 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 181220673 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:48 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-1130cca4-488a-40b8-a522-9c52e36b5e4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12586 97822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_in_err.1258697822 |
| Directory | /workspace/34.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_suspend.508554373 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 4528502312 ps |
| CPU time | 6.01 seconds |
| Started | Aug 12 06:34:41 PM PDT 24 |
| Finished | Aug 12 06:34:47 PM PDT 24 |
| Peak memory | 216668 kb |
| Host | smart-95063112-5248-44c0-bf94-5d301f3db11a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50855 4373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_suspend.508554373 |
| Directory | /workspace/34.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/34.usbdev_low_speed_traffic.1217390629 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 2882360392 ps |
| CPU time | 87.46 seconds |
| Started | Aug 12 06:35:02 PM PDT 24 |
| Finished | Aug 12 06:36:29 PM PDT 24 |
| Peak memory | 218228 kb |
| Host | smart-d5c53b64-2acd-4eba-983f-564008eb75a4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1217390629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.1217390629 |
| Directory | /workspace/34.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_inter_pkt_delay.3545417496 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 2783059000 ps |
| CPU time | 28.61 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:35:24 PM PDT 24 |
| Peak memory | 224108 kb |
| Host | smart-e0151bde-1642-41e0-9177-6030308665af |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3545417496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.3545417496 |
| Directory | /workspace/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_length_in_transaction.4120888287 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 246758459 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-dbbcf3df-ced2-4efc-8302-0fe948a7bd17 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=4120888287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.4120888287 |
| Directory | /workspace/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_length_out_transaction.4202322499 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 194818296 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:58 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-dd7d8c73-6688-4565-8c3e-76945ae6c035 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42023 22499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.4202322499 |
| Directory | /workspace/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_inter_pkt_delay.2471817261 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 2540115193 ps |
| CPU time | 73.94 seconds |
| Started | Aug 12 06:34:45 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 217440 kb |
| Host | smart-036a5bb4-9a48-4933-ac93-0f3c8a1734e5 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2471817261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.2471817261 |
| Directory | /workspace/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_length_in_transaction.1956726971 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 208671281 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-cba5c544-f34d-46ea-80b9-1497dc2a4a65 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1956726971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.1956726971 |
| Directory | /workspace/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_length_out_transaction.1301956326 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 150795818 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-999c5f6f-0c2f-44b7-9022-5b7c3dbce1d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13019 56326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.1301956326 |
| Directory | /workspace/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_nak_trans.1756683528 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 178435559 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-94d9911f-1642-47df-9073-cdce6f34d485 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17566 83528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_nak_trans.1756683528 |
| Directory | /workspace/34.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_iso.2032864377 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 216396873 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-bcccc30f-b270-4758-9b78-d42b526777fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20328 64377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_iso.2032864377 |
| Directory | /workspace/34.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_stall.978697754 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 153443506 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:34:45 PM PDT 24 |
| Finished | Aug 12 06:34:46 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d17fd5dd-0c71-437b-958d-3d384cef18ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97869 7754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_stall.978697754 |
| Directory | /workspace/34.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_trans_nak.1841885531 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 159341599 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:51 PM PDT 24 |
| Finished | Aug 12 06:34:52 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-69f9a146-63e6-45fb-94f9-8661ede7900b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18418 85531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_trans_nak.1841885531 |
| Directory | /workspace/34.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/34.usbdev_pending_in_trans.1716573578 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 166457984 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-69351b44-bee6-4dcf-8305-6139c4036ab5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17165 73578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pending_in_trans.1716573578 |
| Directory | /workspace/34.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_config_pinflip.2533212207 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 237478932 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:34:44 PM PDT 24 |
| Finished | Aug 12 06:34:45 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-74626516-5c6a-4c3f-b99d-416dea435d76 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2533212207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.2533212207 |
| Directory | /workspace/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_config_usb_ref_disable.2216072340 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 146546524 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:34:47 PM PDT 24 |
| Finished | Aug 12 06:34:48 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-224a5474-b9ec-4464-9bec-53809b5e5bb5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22160 72340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.2216072340 |
| Directory | /workspace/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_pins_sense.90220372 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 29399492 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:35:06 PM PDT 24 |
| Finished | Aug 12 06:35:06 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-aa97d405-e006-48a3-9b72-75b337962ce0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90220 372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.90220372 |
| Directory | /workspace/34.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_buffer.1418843820 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 23372341000 ps |
| CPU time | 62.61 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:36:16 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-87d13d6e-3c94-4ffb-b16e-55eae4cffb63 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14188 43820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_buffer.1418843820 |
| Directory | /workspace/34.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_received.758701405 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 196670375 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e34b4c14-109a-4823-ae08-bc8e7e1c6854 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75870 1405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_received.758701405 |
| Directory | /workspace/34.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_sent.21299703 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 198520329 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-a1706f02-e777-4682-986c-3eb204d6e17a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21299 703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_sent.21299703 |
| Directory | /workspace/34.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/34.usbdev_random_length_in_transaction.2023966234 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 239334072 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-4f06c482-021b-45fa-8729-b99e1f5cbb2a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20239 66234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_in_transaction.2023966234 |
| Directory | /workspace/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_random_length_out_transaction.3152045613 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 186605849 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:34:45 PM PDT 24 |
| Finished | Aug 12 06:34:46 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-4f11f16d-e837-4c6d-ac02-c349498f3ce1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31520 45613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.3152045613 |
| Directory | /workspace/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_rx_crc_err.2717386845 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 145463292 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:02 PM PDT 24 |
| Finished | Aug 12 06:35:03 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-99054958-2774-4b9f-8cbe-519a3b3d51bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27173 86845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_rx_crc_err.2717386845 |
| Directory | /workspace/34.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_rx_full.4274095038 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 252151106 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:35:03 PM PDT 24 |
| Finished | Aug 12 06:35:04 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-66967070-c17c-4e39-b461-c703587faf5e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42740 95038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_rx_full.4274095038 |
| Directory | /workspace/34.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/34.usbdev_setup_stage.431101993 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 155000986 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:00 PM PDT 24 |
| Finished | Aug 12 06:35:01 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-ed513e37-4ce6-44dd-9d08-6c96f50edc48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43110 1993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_setup_stage.431101993 |
| Directory | /workspace/34.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/34.usbdev_setup_trans_ignored.2955723737 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 159670917 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4a738d3a-79f9-4933-9b34-d9f9d10997bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29557 23737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_setup_trans_ignored.2955723737 |
| Directory | /workspace/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/34.usbdev_smoke.2794165771 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 212328088 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:12 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-6647143c-f0b1-4185-bfbf-ac442792806a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27941 65771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.2794165771 |
| Directory | /workspace/34.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/34.usbdev_spurious_pids_ignored.1483721840 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 2661329658 ps |
| CPU time | 21.48 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:35:19 PM PDT 24 |
| Peak memory | 224036 kb |
| Host | smart-2cb222e6-1c94-4ec8-b8e5-779addceb0c1 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1483721840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.1483721840 |
| Directory | /workspace/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/34.usbdev_stall_priority_over_nak.4293573097 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 155507052 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:34:54 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-547a921f-e657-442a-8706-b95997d27555 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42935 73097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.4293573097 |
| Directory | /workspace/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/34.usbdev_stall_trans.3305341390 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 148009209 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:13 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-0cf61956-be0b-4fc0-8d78-9d0b93b4ea66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33053 41390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_trans.3305341390 |
| Directory | /workspace/34.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_stream_len_max.4128021184 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 1338002526 ps |
| CPU time | 3.1 seconds |
| Started | Aug 12 06:34:56 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-6af5adfb-58b7-489b-9e41-778a09ebb292 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41280 21184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.4128021184 |
| Directory | /workspace/34.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/34.usbdev_streaming_out.1494172459 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 4117967289 ps |
| CPU time | 127.65 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 217264 kb |
| Host | smart-d979801e-5b12-46ec-a76a-3562a496fe66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14941 72459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_streaming_out.1494172459 |
| Directory | /workspace/34.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/34.usbdev_timeout_missing_host_handshake.1355069139 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 1345510106 ps |
| CPU time | 9.32 seconds |
| Started | Aug 12 06:34:42 PM PDT 24 |
| Finished | Aug 12 06:34:51 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-6cde2ab0-611f-4153-840d-ab7b62f1cdaf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1355069139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_hos t_handshake.1355069139 |
| Directory | /workspace/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/34.usbdev_tx_rx_disruption.333845087 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 611976286 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:34:56 PM PDT 24 |
| Finished | Aug 12 06:34:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-2fc09d9a-8bc6-4bd5-a38e-3a99b0074acb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=333845087 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_tx_rx_disruption.333845087 |
| Directory | /workspace/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/340.usbdev_tx_rx_disruption.341407840 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 451770876 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:02 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f89c31b5-90df-4155-9424-ec224f53882e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=341407840 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 340.usbdev_tx_rx_disruption.341407840 |
| Directory | /workspace/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/341.usbdev_tx_rx_disruption.1817426907 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 586451773 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-0db5ca88-27d2-408f-bc5d-cbaa75557987 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1817426907 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 341.usbdev_tx_rx_disruption.1817426907 |
| Directory | /workspace/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/342.usbdev_tx_rx_disruption.762479251 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 687385898 ps |
| CPU time | 1.88 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-e84db659-b6f1-45f6-aa56-35b17aa33dbb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=762479251 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 342.usbdev_tx_rx_disruption.762479251 |
| Directory | /workspace/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/343.usbdev_tx_rx_disruption.3037992026 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 642231877 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:38:16 PM PDT 24 |
| Finished | Aug 12 06:38:17 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-a56f2293-5fa3-416d-afa3-3226dcf15815 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3037992026 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 343.usbdev_tx_rx_disruption.3037992026 |
| Directory | /workspace/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/344.usbdev_tx_rx_disruption.2474352204 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 563334224 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-1dc9a901-a9d4-4454-a2f4-e1e5f7a1fc3f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2474352204 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 344.usbdev_tx_rx_disruption.2474352204 |
| Directory | /workspace/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/345.usbdev_tx_rx_disruption.3477265472 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 448572655 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-528cce46-d2cc-49ac-a8a0-81eae9b85d97 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3477265472 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 345.usbdev_tx_rx_disruption.3477265472 |
| Directory | /workspace/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/347.usbdev_tx_rx_disruption.1197294501 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 575759359 ps |
| CPU time | 1.8 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:02 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-dd133a67-b712-4ac8-8201-844d58d49576 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1197294501 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 347.usbdev_tx_rx_disruption.1197294501 |
| Directory | /workspace/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/348.usbdev_tx_rx_disruption.2687962763 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 499914561 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:38:03 PM PDT 24 |
| Finished | Aug 12 06:38:05 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-34485f01-52e9-43ba-a069-27ead63f78e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2687962763 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 348.usbdev_tx_rx_disruption.2687962763 |
| Directory | /workspace/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/349.usbdev_tx_rx_disruption.2426829398 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 521823617 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:38:02 PM PDT 24 |
| Finished | Aug 12 06:38:04 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-62e04bb7-8e21-4b8f-9fdc-85c12248de1b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2426829398 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 349.usbdev_tx_rx_disruption.2426829398 |
| Directory | /workspace/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/35.usbdev_alert_test.1341822500 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 41138630 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ad503dc4-7e69-424a-b69c-c66d69675108 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1341822500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.1341822500 |
| Directory | /workspace/35.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_disconnect.3767715034 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 11602336070 ps |
| CPU time | 14.31 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:35:08 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-23d5993c-9045-4955-ba32-4ef2f4896860 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3767715034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_a on_wake_disconnect.3767715034 |
| Directory | /workspace/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_reset.3514218044 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 19311460647 ps |
| CPU time | 27.47 seconds |
| Started | Aug 12 06:35:05 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-dc4e0124-f6eb-43c8-8984-7fba7365d5b0 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3514218044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.3514218044 |
| Directory | /workspace/35.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_resume.4004450016 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 29241868920 ps |
| CPU time | 37.75 seconds |
| Started | Aug 12 06:35:05 PM PDT 24 |
| Finished | Aug 12 06:35:43 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-d4cfa44e-795e-45f6-8b9c-fcc67af66a6f |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4004450016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_a on_wake_resume.4004450016 |
| Directory | /workspace/35.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/35.usbdev_av_buffer.1730586042 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 153796499 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-60774e26-0d2e-479d-82ba-dd2c98e5cdc0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17305 86042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_av_buffer.1730586042 |
| Directory | /workspace/35.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/35.usbdev_bitstuff_err.935856706 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 217359882 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:01 PM PDT 24 |
| Finished | Aug 12 06:35:02 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f0c68dcc-f615-4a39-97ac-81c55e0849c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93585 6706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_bitstuff_err.935856706 |
| Directory | /workspace/35.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/35.usbdev_data_toggle_clear.1066042882 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 339083337 ps |
| CPU time | 1.3 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:58 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-96bd69be-73df-432e-a220-95c551a2b930 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10660 42882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_clear.1066042882 |
| Directory | /workspace/35.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/35.usbdev_data_toggle_restore.2373802356 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 1105988781 ps |
| CPU time | 2.79 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-20e94576-f5e4-4df5-ba1c-63f12c0725fa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2373802356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.2373802356 |
| Directory | /workspace/35.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/35.usbdev_device_timeout.2555809962 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 2034159277 ps |
| CPU time | 13.65 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:35:11 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-0c4699e2-9d40-451a-8470-a84e43fcb90f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2555809962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.2555809962 |
| Directory | /workspace/35.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/35.usbdev_disable_endpoint.2860396580 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 322250999 ps |
| CPU time | 1.22 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:13 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d3940472-3bda-4567-ad9d-2743498df0db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28603 96580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_disable_endpoint.2860396580 |
| Directory | /workspace/35.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/35.usbdev_disconnected.3037540100 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 135218086 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-08862146-89e0-4906-ba68-f73ef0a18520 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30375 40100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_disconnected.3037540100 |
| Directory | /workspace/35.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/35.usbdev_enable.2132101810 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 45508904 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-68f451da-707f-45b7-a52b-5c91eb01a4f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21321 01810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_enable.2132101810 |
| Directory | /workspace/35.usbdev_enable/latest |
| Test location | /workspace/coverage/default/35.usbdev_endpoint_access.736556343 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 1008693366 ps |
| CPU time | 2.55 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:02 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-8c2c8490-e57d-4cb8-b05e-7f4dc88c8ebe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73655 6343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.736556343 |
| Directory | /workspace/35.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/35.usbdev_endpoint_types.856163055 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 479257762 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:35:01 PM PDT 24 |
| Finished | Aug 12 06:35:03 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7a412c89-4d60-4d62-960c-523e7d8aabed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=856163055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.856163055 |
| Directory | /workspace/35.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/35.usbdev_fifo_rst.617735104 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 383290223 ps |
| CPU time | 2.92 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-8c85a5e7-5688-48d8-8fc3-39a8f4eda96b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61773 5104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_fifo_rst.617735104 |
| Directory | /workspace/35.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_iso.2981032073 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 218620414 ps |
| CPU time | 1.19 seconds |
| Started | Aug 12 06:35:04 PM PDT 24 |
| Finished | Aug 12 06:35:05 PM PDT 24 |
| Peak memory | 216908 kb |
| Host | smart-368ff480-66c7-40d8-b0f3-583e4cce1263 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2981032073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.2981032073 |
| Directory | /workspace/35.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_stall.3502753545 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 202107530 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-773730e8-e0c1-4ce2-aa06-894101636787 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35027 53545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_stall.3502753545 |
| Directory | /workspace/35.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_trans.3534740628 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 235911960 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-04d27062-4f75-4e66-b6d8-20481b1f7242 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35347 40628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_trans.3534740628 |
| Directory | /workspace/35.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_invalid_sync.1784633874 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 3853928648 ps |
| CPU time | 40.2 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 217884 kb |
| Host | smart-170dcefe-454d-4dc4-9bfb-09d3aae8c02d |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1784633874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.1784633874 |
| Directory | /workspace/35.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/35.usbdev_iso_retraction.4179564282 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 10555005830 ps |
| CPU time | 78.26 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:36:31 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-981d3fbb-cb39-4817-b6f5-266d0b2f9151 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4179564282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.4179564282 |
| Directory | /workspace/35.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_in_err.1332453692 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 183222944 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:35:02 PM PDT 24 |
| Finished | Aug 12 06:35:03 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-26f40e71-f557-4faa-a3e3-ee1fb8eabda8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13324 53692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_in_err.1332453692 |
| Directory | /workspace/35.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_resume.3393607891 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 27448800949 ps |
| CPU time | 49.87 seconds |
| Started | Aug 12 06:35:04 PM PDT 24 |
| Finished | Aug 12 06:35:54 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-afe62149-4851-4e31-bb61-3da71924fb42 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33936 07891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_resume.3393607891 |
| Directory | /workspace/35.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_suspend.2544097393 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 9169134769 ps |
| CPU time | 13.1 seconds |
| Started | Aug 12 06:35:05 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-ef89d778-c9e0-410b-a2b7-874467ad0c64 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25440 97393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_suspend.2544097393 |
| Directory | /workspace/35.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/35.usbdev_low_speed_traffic.3691439995 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 4423772981 ps |
| CPU time | 38.66 seconds |
| Started | Aug 12 06:35:03 PM PDT 24 |
| Finished | Aug 12 06:35:42 PM PDT 24 |
| Peak memory | 219156 kb |
| Host | smart-286f93f5-e385-447c-a31d-db5eb4aa5a97 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3691439995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.3691439995 |
| Directory | /workspace/35.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_inter_pkt_delay.951283988 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 2843292687 ps |
| CPU time | 28.88 seconds |
| Started | Aug 12 06:35:03 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 217100 kb |
| Host | smart-40d00200-51ba-48be-9cc4-2dd1be58b435 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=951283988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.951283988 |
| Directory | /workspace/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_length_in_transaction.2729119165 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 233395615 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:58 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-49f5ed94-be3a-4668-8f85-2aece9ca46ff |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2729119165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.2729119165 |
| Directory | /workspace/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_length_out_transaction.2637142198 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 193084883 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:35:10 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-6be0cdc1-5f0c-4034-ad01-fa10430ff2ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26371 42198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.2637142198 |
| Directory | /workspace/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_inter_pkt_delay.2565652796 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 2175790701 ps |
| CPU time | 62.96 seconds |
| Started | Aug 12 06:34:53 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 216924 kb |
| Host | smart-aaf7b9f3-5d55-43fb-9b64-cc8810eb0ff7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2565652796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.2565652796 |
| Directory | /workspace/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_length_in_transaction.1683900254 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 220798066 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:57 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-869e2e5a-bb67-4a71-98de-fc50f1080648 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1683900254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.1683900254 |
| Directory | /workspace/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_length_out_transaction.3186849933 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 195858831 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-7fdc5518-4f79-4b2e-a857-be700bd8d247 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31868 49933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.3186849933 |
| Directory | /workspace/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_nak_trans.1247914197 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 258278948 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:02 PM PDT 24 |
| Finished | Aug 12 06:35:03 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c4db4364-d54f-455a-8a5f-bb9d26f636a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12479 14197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_nak_trans.1247914197 |
| Directory | /workspace/35.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_iso.3067272568 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 171051572 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-9731d101-9aa6-4248-a013-6034c522d5fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30672 72568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_iso.3067272568 |
| Directory | /workspace/35.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_stall.795507904 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 160463943 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:58 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-0080515e-f023-42c5-ae7f-9e2de5e11ec9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79550 7904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_stall.795507904 |
| Directory | /workspace/35.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_trans_nak.3461466943 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 202992343 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-df2208bc-afaa-4208-b1fd-90667948cdf4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34614 66943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_trans_nak.3461466943 |
| Directory | /workspace/35.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/35.usbdev_pending_in_trans.1313304127 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 194796002 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:34:53 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-bb2d4dab-7664-43f7-b3ba-8fa94b73331d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13133 04127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.1313304127 |
| Directory | /workspace/35.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_config_pinflip.3366469876 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 204429628 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:35:09 PM PDT 24 |
| Finished | Aug 12 06:35:11 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-95d5fd71-f6eb-42f0-a3b8-5abc40d1e81c |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3366469876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.3366469876 |
| Directory | /workspace/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_config_usb_ref_disable.2253590976 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 187038064 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:35:08 PM PDT 24 |
| Finished | Aug 12 06:35:09 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c575698d-b49e-4cd5-b5a8-69cd11f470d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22535 90976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.2253590976 |
| Directory | /workspace/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_pins_sense.180647230 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 43280260 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-ad1c7462-bc80-4c9b-bd07-b30e7cdba45e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18064 7230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.180647230 |
| Directory | /workspace/35.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_buffer.4056543307 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 13055584131 ps |
| CPU time | 32.36 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:35:30 PM PDT 24 |
| Peak memory | 224148 kb |
| Host | smart-ac9eea60-f949-420e-a3e4-28e109034278 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40565 43307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_buffer.4056543307 |
| Directory | /workspace/35.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_received.3121823193 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 160767179 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:11 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0706ab03-fbcb-4af6-ba15-fde00748bc32 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31218 23193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_received.3121823193 |
| Directory | /workspace/35.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_sent.978455742 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 173151512 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:05 PM PDT 24 |
| Finished | Aug 12 06:35:06 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c396fd61-ad34-42da-b4c9-b3bff4384199 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97845 5742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_sent.978455742 |
| Directory | /workspace/35.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/35.usbdev_random_length_in_transaction.205606803 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 232032839 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-9085d418-73f4-4e4b-b86e-f64485d00ac5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20560 6803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_in_transaction.205606803 |
| Directory | /workspace/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_random_length_out_transaction.1317110885 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 201140380 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-36a61a14-3c08-4661-98f1-9b65e431c252 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13171 10885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.1317110885 |
| Directory | /workspace/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_rx_crc_err.1772938892 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 140472812 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:58 PM PDT 24 |
| Peak memory | 207336 kb |
| Host | smart-e067c11e-89c5-41d8-b573-df2d31fa8d55 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17729 38892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_rx_crc_err.1772938892 |
| Directory | /workspace/35.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/35.usbdev_rx_full.2708305170 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 261913193 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:35:09 PM PDT 24 |
| Finished | Aug 12 06:35:11 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-0625ae37-4bc8-4112-a712-e042ba823ba1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27083 05170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_rx_full.2708305170 |
| Directory | /workspace/35.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/35.usbdev_setup_stage.3295101177 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 151226531 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:09 PM PDT 24 |
| Finished | Aug 12 06:35:10 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-b74f5b7a-2bd2-4afe-9770-94a92256e962 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32951 01177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_setup_stage.3295101177 |
| Directory | /workspace/35.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/35.usbdev_setup_trans_ignored.776850349 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 148011178 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:12 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-1b9f0bb1-5f76-4982-8945-7f2ca6d6d398 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77685 0349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_setup_trans_ignored.776850349 |
| Directory | /workspace/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/35.usbdev_smoke.2367063490 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 203902433 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:34:54 PM PDT 24 |
| Finished | Aug 12 06:34:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ed613ddc-71fe-442f-a0f9-9c479e065f8b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23670 63490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.2367063490 |
| Directory | /workspace/35.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/35.usbdev_spurious_pids_ignored.1662613247 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 1878280284 ps |
| CPU time | 52.71 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 224020 kb |
| Host | smart-70bfcbe8-a803-4f29-88e0-8a71ea839e3b |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1662613247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.1662613247 |
| Directory | /workspace/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/35.usbdev_stall_priority_over_nak.1327292128 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 191663020 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:35:06 PM PDT 24 |
| Finished | Aug 12 06:35:07 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e5145e61-8cb2-4fd7-be5c-aea85e8dbcbf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13272 92128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.1327292128 |
| Directory | /workspace/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/35.usbdev_stall_trans.2448555677 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 169773025 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:55 PM PDT 24 |
| Finished | Aug 12 06:34:56 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-4637c42b-8809-4519-8962-27be3dd2f13e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24485 55677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_trans.2448555677 |
| Directory | /workspace/35.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_stream_len_max.2900645394 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 517039258 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:35:09 PM PDT 24 |
| Finished | Aug 12 06:35:11 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-6da9e9ea-48d2-4f83-a11c-13a9ff12133b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29006 45394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.2900645394 |
| Directory | /workspace/35.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/35.usbdev_streaming_out.1338444051 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 3122868998 ps |
| CPU time | 29.8 seconds |
| Started | Aug 12 06:35:21 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 217660 kb |
| Host | smart-5518b4f9-3645-4cdc-a586-ae9aecb2cf37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13384 44051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_streaming_out.1338444051 |
| Directory | /workspace/35.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/35.usbdev_timeout_missing_host_handshake.3107145819 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 285252341 ps |
| CPU time | 4.36 seconds |
| Started | Aug 12 06:35:01 PM PDT 24 |
| Finished | Aug 12 06:35:05 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-f63b1c31-ca73-4fea-8836-954c8af20f98 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3107145819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_hos t_handshake.3107145819 |
| Directory | /workspace/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/35.usbdev_tx_rx_disruption.1444100706 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 632702360 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:35:08 PM PDT 24 |
| Finished | Aug 12 06:35:10 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-080b5b83-eab5-4345-9337-b32558df96e4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1444100706 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_tx_rx_disruption.1444100706 |
| Directory | /workspace/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/350.usbdev_tx_rx_disruption.973319256 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 434484501 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 06:38:11 PM PDT 24 |
| Finished | Aug 12 06:38:13 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-54c0364e-63a0-41cf-a05f-18a6b84f7a1e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=973319256 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 350.usbdev_tx_rx_disruption.973319256 |
| Directory | /workspace/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/351.usbdev_tx_rx_disruption.1263083440 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 525750000 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:38:13 PM PDT 24 |
| Finished | Aug 12 06:38:15 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-cd391b45-872d-46ed-823f-611e57a5599a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1263083440 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 351.usbdev_tx_rx_disruption.1263083440 |
| Directory | /workspace/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/352.usbdev_tx_rx_disruption.3148363652 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 700497864 ps |
| CPU time | 1.89 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-13194a91-6077-4663-a59c-dadb99e81e71 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3148363652 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 352.usbdev_tx_rx_disruption.3148363652 |
| Directory | /workspace/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/353.usbdev_tx_rx_disruption.1782111592 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 601162591 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7b9d4ad1-f43f-480a-907a-5e1ab736e90f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1782111592 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 353.usbdev_tx_rx_disruption.1782111592 |
| Directory | /workspace/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/354.usbdev_tx_rx_disruption.461711094 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 603705794 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:37:51 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-15bd553e-34a5-4a50-b706-b73911404bab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=461711094 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 354.usbdev_tx_rx_disruption.461711094 |
| Directory | /workspace/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/355.usbdev_tx_rx_disruption.3279931854 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 590139395 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:55 PM PDT 24 |
| Finished | Aug 12 06:37:56 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-65912b52-f39d-4691-b3a1-c9b1638de524 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3279931854 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 355.usbdev_tx_rx_disruption.3279931854 |
| Directory | /workspace/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/356.usbdev_tx_rx_disruption.3160583932 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 601432025 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:37:48 PM PDT 24 |
| Finished | Aug 12 06:37:50 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-a375b6e9-3771-4c8c-bdf4-34231d6ff436 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3160583932 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 356.usbdev_tx_rx_disruption.3160583932 |
| Directory | /workspace/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/357.usbdev_tx_rx_disruption.1260201459 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 554548336 ps |
| CPU time | 1.87 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-44da624e-58de-4595-ba1c-e25fc607338e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1260201459 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 357.usbdev_tx_rx_disruption.1260201459 |
| Directory | /workspace/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/358.usbdev_tx_rx_disruption.3951951043 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 513315905 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:07 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c630b0cb-f67b-48d3-ae57-f8cfb6a4eafc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3951951043 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 358.usbdev_tx_rx_disruption.3951951043 |
| Directory | /workspace/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/359.usbdev_tx_rx_disruption.36156825 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 655404426 ps |
| CPU time | 1.92 seconds |
| Started | Aug 12 06:38:14 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-00c66b96-def5-47df-b0c3-a52ea4042d8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36156825 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 359.usbdev_tx_rx_disruption.36156825 |
| Directory | /workspace/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/36.usbdev_alert_test.3795311316 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 37763549 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:12 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-d4061b58-00a3-4c9e-b1a9-7040fe3d70a5 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3795311316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.3795311316 |
| Directory | /workspace/36.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_disconnect.1797181238 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 10310715722 ps |
| CPU time | 12.5 seconds |
| Started | Aug 12 06:35:02 PM PDT 24 |
| Finished | Aug 12 06:35:15 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-a1ddf510-fec6-4ab4-8735-8cb10b2f63e7 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1797181238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_a on_wake_disconnect.1797181238 |
| Directory | /workspace/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_reset.2930428339 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 20879869216 ps |
| CPU time | 27.66 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:40 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-b4692e00-17fc-4487-a396-fbe025a16382 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2930428339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.2930428339 |
| Directory | /workspace/36.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_resume.301510079 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 24872699619 ps |
| CPU time | 31.91 seconds |
| Started | Aug 12 06:35:26 PM PDT 24 |
| Finished | Aug 12 06:35:58 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-e52b4f2e-f157-4b16-bded-ecd01f23f8f6 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=301510079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_ao n_wake_resume.301510079 |
| Directory | /workspace/36.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/36.usbdev_av_buffer.2871755122 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 149377665 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:04 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-ae09b43b-5fb0-46d3-8748-ba31604f5bee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28717 55122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_av_buffer.2871755122 |
| Directory | /workspace/36.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/36.usbdev_bitstuff_err.3443794022 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 158990977 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-cb4f9bea-910b-4fb7-afcd-c745a2a7e99d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34437 94022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_bitstuff_err.3443794022 |
| Directory | /workspace/36.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_data_toggle_clear.2051250316 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 331783783 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-9e559e9f-662f-4ef8-91f5-824881829746 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20512 50316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_clear.2051250316 |
| Directory | /workspace/36.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/36.usbdev_data_toggle_restore.842848145 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 661816738 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:35:14 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-eec49f4f-b874-4006-abac-e90daae17743 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=842848145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.842848145 |
| Directory | /workspace/36.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/36.usbdev_device_address.3262611743 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 15721102184 ps |
| CPU time | 30.09 seconds |
| Started | Aug 12 06:35:02 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-d477dd1c-c841-40f1-9159-8ae10d4531e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32626 11743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.3262611743 |
| Directory | /workspace/36.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/36.usbdev_device_timeout.1904407482 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 4294031246 ps |
| CPU time | 28.73 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:40 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-48ef818b-7441-4901-80dd-b47257f275fa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1904407482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.1904407482 |
| Directory | /workspace/36.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/36.usbdev_disable_endpoint.2617486588 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 668061317 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:35:10 PM PDT 24 |
| Finished | Aug 12 06:35:12 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-a01e4d91-307f-4cb3-be8b-196fe39a7c10 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26174 86588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disable_endpoint.2617486588 |
| Directory | /workspace/36.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/36.usbdev_disconnected.3375832135 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 152853179 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:03 PM PDT 24 |
| Finished | Aug 12 06:35:04 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-12b71f1f-a857-4e66-8a94-73abae9e7ef5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33758 32135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disconnected.3375832135 |
| Directory | /workspace/36.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/36.usbdev_enable.3471311188 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 62806455 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:35:06 PM PDT 24 |
| Finished | Aug 12 06:35:06 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2c842cc8-ce3c-4d16-9344-949f8fd3d165 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34713 11188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_enable.3471311188 |
| Directory | /workspace/36.usbdev_enable/latest |
| Test location | /workspace/coverage/default/36.usbdev_endpoint_access.290718786 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 905241022 ps |
| CPU time | 2.37 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:13 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-cd9e8787-bd94-483b-9573-68735f59d802 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29071 8786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.290718786 |
| Directory | /workspace/36.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/36.usbdev_endpoint_types.169292471 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 394367736 ps |
| CPU time | 1.31 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-b7825bed-77e3-4f59-aee5-f4100b27af54 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=169292471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.169292471 |
| Directory | /workspace/36.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/36.usbdev_fifo_rst.3160283926 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 181093978 ps |
| CPU time | 2.12 seconds |
| Started | Aug 12 06:35:09 PM PDT 24 |
| Finished | Aug 12 06:35:11 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-9176f037-4120-4397-bee9-b2cbc0fa56bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31602 83926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_fifo_rst.3160283926 |
| Directory | /workspace/36.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_iso.2459768756 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 192011067 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:35:18 PM PDT 24 |
| Finished | Aug 12 06:35:19 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-918360e4-292a-4015-9f72-72a4333ed640 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2459768756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.2459768756 |
| Directory | /workspace/36.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_stall.3615491883 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 143530211 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-0ebb29fd-9647-4a30-bd96-0e18c9ecd03a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36154 91883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_stall.3615491883 |
| Directory | /workspace/36.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_trans.1550999256 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 166419458 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:14 PM PDT 24 |
| Finished | Aug 12 06:35:15 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a4ad9745-4493-48e4-ba6c-4fabfd689fc1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15509 99256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_trans.1550999256 |
| Directory | /workspace/36.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_invalid_sync.1670543915 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 4535197136 ps |
| CPU time | 42.53 seconds |
| Started | Aug 12 06:34:52 PM PDT 24 |
| Finished | Aug 12 06:35:35 PM PDT 24 |
| Peak memory | 217068 kb |
| Host | smart-6372ec7c-ec80-47f6-bf0a-006dd9ee1695 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1670543915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.1670543915 |
| Directory | /workspace/36.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/36.usbdev_iso_retraction.2519530478 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 10862205664 ps |
| CPU time | 72.16 seconds |
| Started | Aug 12 06:34:57 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-310f9534-4eae-4a7a-acbb-f23cdc89a26a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2519530478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.2519530478 |
| Directory | /workspace/36.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_in_err.816532450 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 230685371 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-0bb877a7-aa45-492a-a085-b4de18327b95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81653 2450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_in_err.816532450 |
| Directory | /workspace/36.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_resume.2038334339 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 28003736888 ps |
| CPU time | 40.5 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-e2a6fc95-9055-4a11-abd7-548fcb9f053f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20383 34339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_resume.2038334339 |
| Directory | /workspace/36.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_suspend.567419523 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 8407072802 ps |
| CPU time | 11.43 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:35:10 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-ffb49255-f069-4284-8779-96dd21a95251 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56741 9523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_suspend.567419523 |
| Directory | /workspace/36.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/36.usbdev_low_speed_traffic.2890851302 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 4130111866 ps |
| CPU time | 119.14 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 218436 kb |
| Host | smart-3cad7674-5ab4-4b92-9d26-915adac81547 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2890851302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.2890851302 |
| Directory | /workspace/36.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_inter_pkt_delay.2427537930 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 2467614814 ps |
| CPU time | 68.11 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:36:12 PM PDT 24 |
| Peak memory | 217572 kb |
| Host | smart-4db0ebc7-a45e-43d7-8a06-f58797a84fb8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2427537930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.2427537930 |
| Directory | /workspace/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_length_in_transaction.258228258 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 243421797 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:13 PM PDT 24 |
| Peak memory | 206432 kb |
| Host | smart-f3707c7b-c65b-4285-aac3-317c902b0809 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=258228258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.258228258 |
| Directory | /workspace/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_length_out_transaction.940999115 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 197914065 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:13 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-a0682b36-ada1-437e-9d96-cb371dbca794 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94099 9115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.940999115 |
| Directory | /workspace/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_inter_pkt_delay.3156978518 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 3454255633 ps |
| CPU time | 97.18 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:36:37 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-8fbb4473-82ae-4864-9ea1-06d5e270d4e0 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3156978518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.3156978518 |
| Directory | /workspace/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_length_in_transaction.3024260442 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 163493807 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:34:58 PM PDT 24 |
| Finished | Aug 12 06:34:59 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-ce14695c-713a-4a13-8ce7-d867fe1d1166 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3024260442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.3024260442 |
| Directory | /workspace/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_length_out_transaction.3742817691 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 159048206 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:21 PM PDT 24 |
| Finished | Aug 12 06:35:22 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-069ea975-87ff-492a-9c57-9cc180b20857 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37428 17691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.3742817691 |
| Directory | /workspace/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_nak_trans.1424783619 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 152389818 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:34:59 PM PDT 24 |
| Finished | Aug 12 06:35:00 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-19b231cb-3918-4c2b-8c57-d5e498913e53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14247 83619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_nak_trans.1424783619 |
| Directory | /workspace/36.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_iso.684861443 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 161555908 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:04 PM PDT 24 |
| Finished | Aug 12 06:35:05 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-3e76d080-fa73-4346-9d0d-7adec2646b91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68486 1443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_iso.684861443 |
| Directory | /workspace/36.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_stall.2966975321 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 169518325 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-94517d86-f288-4abf-b22f-285072723bb1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29669 75321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_stall.2966975321 |
| Directory | /workspace/36.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_trans_nak.2984966154 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 167765336 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-c75cdced-bd17-44e1-8e1f-6aa2608f017f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29849 66154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_trans_nak.2984966154 |
| Directory | /workspace/36.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/36.usbdev_pending_in_trans.417732107 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 142524567 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-f056560f-d59c-4015-ad84-ee0d288eb1d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41773 2107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.417732107 |
| Directory | /workspace/36.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_config_pinflip.540551656 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 197279288 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:35:21 PM PDT 24 |
| Finished | Aug 12 06:35:23 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-0569d09b-2d81-43e3-9fee-e571283de0db |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=540551656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.540551656 |
| Directory | /workspace/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_config_usb_ref_disable.1844713472 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 144856419 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-7e3e6f18-5404-4f93-8d9d-b0a18b33f0e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18447 13472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.1844713472 |
| Directory | /workspace/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_pins_sense.474875286 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 36168406 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:35:14 PM PDT 24 |
| Finished | Aug 12 06:35:15 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f6e9e3dc-efbc-4c78-9909-cfdaedd1ea62 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47487 5286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.474875286 |
| Directory | /workspace/36.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/36.usbdev_pkt_buffer.2930936738 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 14983982155 ps |
| CPU time | 38.82 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:54 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-58769c6f-f73c-4ede-905c-e3bcb633a5a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29309 36738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_buffer.2930936738 |
| Directory | /workspace/36.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/36.usbdev_pkt_received.864887384 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 216522052 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 206424 kb |
| Host | smart-eb16649e-a5c7-40b9-b9b7-3171a29c60c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86488 7384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_received.864887384 |
| Directory | /workspace/36.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/36.usbdev_pkt_sent.273015097 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 187372947 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:35:02 PM PDT 24 |
| Finished | Aug 12 06:35:03 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-f9fdb347-bb9b-40ce-8e2f-2f2e5fe1c09e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27301 5097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_sent.273015097 |
| Directory | /workspace/36.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/36.usbdev_random_length_in_transaction.4206203267 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 189838527 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-5cbed6d7-b7f8-47dc-9105-cbb73cecff8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42062 03267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_in_transaction.4206203267 |
| Directory | /workspace/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_random_length_out_transaction.362307939 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 183382177 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:13 PM PDT 24 |
| Peak memory | 206424 kb |
| Host | smart-0827c703-984a-4b24-a3fc-7cebbf53dea8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36230 7939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.362307939 |
| Directory | /workspace/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_rx_crc_err.2496753416 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 156668647 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:35:18 PM PDT 24 |
| Finished | Aug 12 06:35:19 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-72ba85cb-11c9-4c56-95a6-7ba8c7b77bcb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24967 53416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_rx_crc_err.2496753416 |
| Directory | /workspace/36.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_rx_full.788142087 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 342867163 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:35:26 PM PDT 24 |
| Finished | Aug 12 06:35:28 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-106a3b14-a2a9-49bb-adfb-2182a81fdf18 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78814 2087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_rx_full.788142087 |
| Directory | /workspace/36.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/36.usbdev_setup_stage.2889047892 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 150058610 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-da6787c3-d747-4561-99c0-2551713dba93 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28890 47892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_setup_stage.2889047892 |
| Directory | /workspace/36.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/36.usbdev_setup_trans_ignored.3141462903 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 146306818 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:35:19 PM PDT 24 |
| Finished | Aug 12 06:35:20 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-a3935563-e3be-4264-9df7-24489058d2c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31414 62903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_setup_trans_ignored.3141462903 |
| Directory | /workspace/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/36.usbdev_smoke.2046591598 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 187398916 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-74f1ea31-2ab3-419f-b356-52f6ce91d641 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20465 91598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.2046591598 |
| Directory | /workspace/36.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/36.usbdev_spurious_pids_ignored.4260867463 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 2721294742 ps |
| CPU time | 27.74 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:38 PM PDT 24 |
| Peak memory | 223988 kb |
| Host | smart-470d9a27-583b-4439-b754-0642c6398950 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4260867463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.4260867463 |
| Directory | /workspace/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/36.usbdev_stall_priority_over_nak.2825638418 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 164661752 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-f4085560-8f0a-4609-9d8a-900b93fa846a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28256 38418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.2825638418 |
| Directory | /workspace/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/36.usbdev_stall_trans.3626960545 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 149504026 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:21 PM PDT 24 |
| Finished | Aug 12 06:35:22 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-bf47f894-2864-40a4-a2b8-9593f7cfa6bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36269 60545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_trans.3626960545 |
| Directory | /workspace/36.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_stream_len_max.881163278 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 955641377 ps |
| CPU time | 2.44 seconds |
| Started | Aug 12 06:35:06 PM PDT 24 |
| Finished | Aug 12 06:35:08 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-f7c7a939-a965-47b1-a5a4-fa78cbd3e2b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88116 3278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.881163278 |
| Directory | /workspace/36.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/36.usbdev_streaming_out.1394201303 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 3980438366 ps |
| CPU time | 41.72 seconds |
| Started | Aug 12 06:35:41 PM PDT 24 |
| Finished | Aug 12 06:36:23 PM PDT 24 |
| Peak memory | 217556 kb |
| Host | smart-7035b0d3-a9de-4fb0-8303-b4813899a2b0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13942 01303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_streaming_out.1394201303 |
| Directory | /workspace/36.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/36.usbdev_timeout_missing_host_handshake.1762270202 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 1421318495 ps |
| CPU time | 34.63 seconds |
| Started | Aug 12 06:35:05 PM PDT 24 |
| Finished | Aug 12 06:35:40 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-5b6a4b7b-b1a7-4d35-abc6-7e4f9c17d857 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1762270202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_hos t_handshake.1762270202 |
| Directory | /workspace/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/36.usbdev_tx_rx_disruption.2813271829 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 610576296 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:35:14 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-675db549-7331-40ee-b789-eb4400a11b5c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2813271829 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_tx_rx_disruption.2813271829 |
| Directory | /workspace/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/360.usbdev_tx_rx_disruption.1834216284 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 472684568 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:08 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-14fc39d0-1b10-415b-9436-22dfe3c00775 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1834216284 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 360.usbdev_tx_rx_disruption.1834216284 |
| Directory | /workspace/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/361.usbdev_tx_rx_disruption.2359343301 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 581557827 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f5d5c75c-8796-49a9-905b-40bc40b088b8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2359343301 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 361.usbdev_tx_rx_disruption.2359343301 |
| Directory | /workspace/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/362.usbdev_tx_rx_disruption.354041387 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 536427535 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:38:11 PM PDT 24 |
| Finished | Aug 12 06:38:13 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-fdd20a89-f9d4-4631-a2a2-5ba423fff791 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=354041387 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 362.usbdev_tx_rx_disruption.354041387 |
| Directory | /workspace/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/363.usbdev_tx_rx_disruption.1121031948 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 603952092 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-61a8feca-ae9e-4f45-a0b4-5d14f056abc4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1121031948 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 363.usbdev_tx_rx_disruption.1121031948 |
| Directory | /workspace/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/364.usbdev_tx_rx_disruption.3082088324 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 558785379 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:38:02 PM PDT 24 |
| Finished | Aug 12 06:38:04 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d0d51712-d5de-4563-bae7-a1d546b495e1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3082088324 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 364.usbdev_tx_rx_disruption.3082088324 |
| Directory | /workspace/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/365.usbdev_tx_rx_disruption.3068671369 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 609562681 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-19a38bf9-4e2e-4cf2-a1b3-02ab8dde39ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3068671369 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 365.usbdev_tx_rx_disruption.3068671369 |
| Directory | /workspace/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/366.usbdev_tx_rx_disruption.604725196 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 665162956 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:00 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-9dcaf46d-9d9b-4d3a-801f-3037166d9733 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=604725196 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 366.usbdev_tx_rx_disruption.604725196 |
| Directory | /workspace/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/367.usbdev_tx_rx_disruption.4080381587 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 630747664 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-c2b6e26c-46df-4602-898c-1300ceb6ba35 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4080381587 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 367.usbdev_tx_rx_disruption.4080381587 |
| Directory | /workspace/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/368.usbdev_tx_rx_disruption.1783159579 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 503608136 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:02 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-af377b54-7831-44fa-85b0-48330a849143 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1783159579 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 368.usbdev_tx_rx_disruption.1783159579 |
| Directory | /workspace/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/369.usbdev_tx_rx_disruption.2837179956 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 687535723 ps |
| CPU time | 2.02 seconds |
| Started | Aug 12 06:37:48 PM PDT 24 |
| Finished | Aug 12 06:37:50 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-2a3ee1cc-5d3c-4819-aeaa-291684b12271 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2837179956 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 369.usbdev_tx_rx_disruption.2837179956 |
| Directory | /workspace/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/37.usbdev_alert_test.695276107 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 44737948 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5b6fe955-a1bd-41af-8420-70b5df1f0d4c |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=695276107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.695276107 |
| Directory | /workspace/37.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_disconnect.440032401 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 5344876130 ps |
| CPU time | 8.63 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:35:22 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-415ba63b-9470-443c-993a-eee0471fec95 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=440032401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_ao n_wake_disconnect.440032401 |
| Directory | /workspace/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_reset.2298511597 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 19541466493 ps |
| CPU time | 23.65 seconds |
| Started | Aug 12 06:35:06 PM PDT 24 |
| Finished | Aug 12 06:35:30 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-faabccd6-5d9e-4185-9c23-5ef637a03519 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2298511597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.2298511597 |
| Directory | /workspace/37.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_resume.3533813087 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 26122949117 ps |
| CPU time | 33.92 seconds |
| Started | Aug 12 06:35:09 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-02631ae0-fa7c-421f-a3ad-eeb172ac803d |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3533813087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_a on_wake_resume.3533813087 |
| Directory | /workspace/37.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/37.usbdev_av_buffer.3466589985 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 167483579 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-ebdbf6e3-c151-4796-9468-8c80aa64b68c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34665 89985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_av_buffer.3466589985 |
| Directory | /workspace/37.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/37.usbdev_bitstuff_err.3026066525 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 168463924 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-11470244-0a52-45da-b32e-96663809862c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30260 66525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_bitstuff_err.3026066525 |
| Directory | /workspace/37.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/37.usbdev_data_toggle_clear.953342953 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 287742437 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:35:12 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-9ba4a771-6b70-4d81-bf19-e5fcbf6312e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95334 2953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_clear.953342953 |
| Directory | /workspace/37.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/37.usbdev_data_toggle_restore.272807361 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 563469374 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:35:18 PM PDT 24 |
| Finished | Aug 12 06:35:20 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-b2cb634e-0e8f-40b0-9f27-7481779934b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=272807361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.272807361 |
| Directory | /workspace/37.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/37.usbdev_device_address.1770312026 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 33051011074 ps |
| CPU time | 57.93 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:36:15 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-72b1da47-8666-45ff-8353-f56fe3e62891 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17703 12026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.1770312026 |
| Directory | /workspace/37.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/37.usbdev_device_timeout.18284284 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 5516173199 ps |
| CPU time | 37.26 seconds |
| Started | Aug 12 06:35:29 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-4b59feb5-a2a0-450a-baea-f7633b3d4dc8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18284284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.18284284 |
| Directory | /workspace/37.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/37.usbdev_disable_endpoint.847248206 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 975404571 ps |
| CPU time | 2.02 seconds |
| Started | Aug 12 06:35:08 PM PDT 24 |
| Finished | Aug 12 06:35:10 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-cd28322f-a2df-4414-8860-7f1a17d2b02b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84724 8206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disable_endpoint.847248206 |
| Directory | /workspace/37.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/37.usbdev_disconnected.3735678938 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 134298373 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:35:23 PM PDT 24 |
| Finished | Aug 12 06:35:24 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-6f91f394-3f4f-4b09-9567-4a110d911edd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37356 78938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disconnected.3735678938 |
| Directory | /workspace/37.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/37.usbdev_enable.2435043284 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 40285931 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:35:20 PM PDT 24 |
| Finished | Aug 12 06:35:20 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a816f3f1-6d49-4dd9-bb2b-34f641e8ce14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24350 43284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_enable.2435043284 |
| Directory | /workspace/37.usbdev_enable/latest |
| Test location | /workspace/coverage/default/37.usbdev_endpoint_access.2065823357 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 847570052 ps |
| CPU time | 2.36 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:19 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-762e4c20-4177-493a-bdb6-7db0b4dcc78e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20658 23357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.2065823357 |
| Directory | /workspace/37.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/37.usbdev_fifo_rst.1021481887 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 367202151 ps |
| CPU time | 2.68 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-6e6c3e5d-bc27-4c26-80c1-6a6622b4f345 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10214 81887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_fifo_rst.1021481887 |
| Directory | /workspace/37.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_iso.3401052866 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 167192038 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:35:33 PM PDT 24 |
| Finished | Aug 12 06:35:34 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-bf6a52ad-1c50-4510-95a9-c1ba38656fc9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3401052866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.3401052866 |
| Directory | /workspace/37.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_stall.1226957359 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 147464188 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:23 PM PDT 24 |
| Finished | Aug 12 06:35:27 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-55288809-e5c0-4a01-a693-3d4df8409688 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12269 57359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_stall.1226957359 |
| Directory | /workspace/37.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_trans.1462818009 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 203571156 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:35:22 PM PDT 24 |
| Finished | Aug 12 06:35:23 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-aba182df-cdd1-4913-a330-aead662c0224 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14628 18009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_trans.1462818009 |
| Directory | /workspace/37.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_invalid_sync.3699182492 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 3506388459 ps |
| CPU time | 25.43 seconds |
| Started | Aug 12 06:35:14 PM PDT 24 |
| Finished | Aug 12 06:35:40 PM PDT 24 |
| Peak memory | 218188 kb |
| Host | smart-c32fc8f4-0d61-4e95-a9e7-516741999382 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3699182492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.3699182492 |
| Directory | /workspace/37.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/37.usbdev_iso_retraction.2547260752 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 7334277063 ps |
| CPU time | 86.93 seconds |
| Started | Aug 12 06:35:11 PM PDT 24 |
| Finished | Aug 12 06:36:39 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-ba8478fe-b533-4a9b-b447-fbc5d229c3b5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2547260752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.2547260752 |
| Directory | /workspace/37.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_in_err.1170048026 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 187999196 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:21 PM PDT 24 |
| Finished | Aug 12 06:35:22 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-7b729e1f-7ef0-4ff7-b29c-6d0c9e9e598a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11700 48026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_in_err.1170048026 |
| Directory | /workspace/37.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_resume.2599221972 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 5985708366 ps |
| CPU time | 8.6 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:23 PM PDT 24 |
| Peak memory | 216036 kb |
| Host | smart-a412b466-ae5d-408f-b88b-6bd55d2f7780 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25992 21972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_resume.2599221972 |
| Directory | /workspace/37.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_suspend.427836961 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 10002376333 ps |
| CPU time | 12.76 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:29 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-1d124657-7875-42d8-9f56-968c5bc5c3d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42783 6961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_suspend.427836961 |
| Directory | /workspace/37.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/37.usbdev_low_speed_traffic.4292301521 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 3521161739 ps |
| CPU time | 95.33 seconds |
| Started | Aug 12 06:35:22 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 218524 kb |
| Host | smart-2ca246b8-4282-4701-b0fa-2916540da890 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4292301521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.4292301521 |
| Directory | /workspace/37.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_inter_pkt_delay.1925856966 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 2053925211 ps |
| CPU time | 59.64 seconds |
| Started | Aug 12 06:35:30 PM PDT 24 |
| Finished | Aug 12 06:36:30 PM PDT 24 |
| Peak memory | 215768 kb |
| Host | smart-59dde88b-0483-412b-9ff2-1320426f5183 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1925856966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.1925856966 |
| Directory | /workspace/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_length_in_transaction.1926691347 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 305493822 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:35:24 PM PDT 24 |
| Finished | Aug 12 06:35:25 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8cfb1ad3-8caa-4cbd-a21d-43e1771426bd |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1926691347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.1926691347 |
| Directory | /workspace/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_length_out_transaction.3771001310 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 205139350 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-35daecad-7701-4c53-8939-ecf2adf58c8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37710 01310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.3771001310 |
| Directory | /workspace/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_inter_pkt_delay.1993120767 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 3767400542 ps |
| CPU time | 38.62 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:55 PM PDT 24 |
| Peak memory | 217468 kb |
| Host | smart-25ff9e34-9bdd-49a8-aac9-583b1ff9bf7e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1993120767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.1993120767 |
| Directory | /workspace/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_length_in_transaction.2322247948 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 191697607 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-0a1e4c2d-797a-4fea-8d7f-08019eed2351 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2322247948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.2322247948 |
| Directory | /workspace/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_length_out_transaction.1577290988 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 158018206 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:10 PM PDT 24 |
| Finished | Aug 12 06:35:11 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-d0e59fa3-2e0d-4da3-8706-bd892edfeeea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15772 90988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.1577290988 |
| Directory | /workspace/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_nak_trans.29467066 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 177077483 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-921ca3a7-721e-4a6d-904a-220d545d28c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29467 066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_nak_trans.29467066 |
| Directory | /workspace/37.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_iso.2047143517 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 184542663 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:13 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-04d48bb5-50d2-42e3-9937-430795083d04 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20471 43517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_iso.2047143517 |
| Directory | /workspace/37.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_stall.3192797836 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 200398729 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:35:20 PM PDT 24 |
| Finished | Aug 12 06:35:21 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-4dbf6923-65dc-497a-95e5-87f19f56a230 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31927 97836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_stall.3192797836 |
| Directory | /workspace/37.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_trans_nak.2746841018 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 218918979 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:35:36 PM PDT 24 |
| Finished | Aug 12 06:35:37 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-9cb7728a-c25d-471e-9598-1cf0d12b1eb2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27468 41018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_trans_nak.2746841018 |
| Directory | /workspace/37.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/37.usbdev_pending_in_trans.2112780208 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 150872426 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:35:20 PM PDT 24 |
| Finished | Aug 12 06:35:21 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-19008ef5-a0fd-4f73-b0c1-ac43cfcc8564 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21127 80208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pending_in_trans.2112780208 |
| Directory | /workspace/37.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_config_pinflip.1355314770 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 211828487 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:35:14 PM PDT 24 |
| Finished | Aug 12 06:35:15 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-95fe4669-356f-4d6a-85f3-a1a6bad52c82 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1355314770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.1355314770 |
| Directory | /workspace/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_config_usb_ref_disable.147049446 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 159048266 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:35:23 PM PDT 24 |
| Finished | Aug 12 06:35:24 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-af0b53a1-e753-430a-aedb-61a80aadbb57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14704 9446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.147049446 |
| Directory | /workspace/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_pins_sense.2451240947 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 37088943 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-a0590a07-56b4-46db-8266-1b5cc8a4e90b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24512 40947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.2451240947 |
| Directory | /workspace/37.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_buffer.351418915 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 21530328025 ps |
| CPU time | 56.57 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:36:12 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-c4617c99-a8c3-43b0-99e4-91efc7fa8a45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35141 8915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_buffer.351418915 |
| Directory | /workspace/37.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_received.3876268695 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 167591169 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:23 PM PDT 24 |
| Finished | Aug 12 06:35:24 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e1b16de2-6f4b-4583-bc06-ed28f16f8bf8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38762 68695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_received.3876268695 |
| Directory | /workspace/37.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_sent.720494225 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 203889166 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:35:24 PM PDT 24 |
| Finished | Aug 12 06:35:25 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8ecc6c28-2354-489c-8425-5ca5e6fbcf45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72049 4225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_sent.720494225 |
| Directory | /workspace/37.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/37.usbdev_random_length_in_transaction.2882138354 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 209280533 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-d89d639e-a223-4604-a6e7-116996fd2412 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28821 38354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_in_transaction.2882138354 |
| Directory | /workspace/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_random_length_out_transaction.3528786188 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 165447691 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-de1fb284-19e6-4a46-8f59-ff6d490559fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35287 86188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.3528786188 |
| Directory | /workspace/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_rx_crc_err.882295628 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 139395019 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-0473f17e-90cb-4941-b259-23ba579efaaf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88229 5628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_rx_crc_err.882295628 |
| Directory | /workspace/37.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/37.usbdev_rx_full.1817813259 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 301584939 ps |
| CPU time | 1.15 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-339108f6-900e-4756-ae36-0fd373172712 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18178 13259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_rx_full.1817813259 |
| Directory | /workspace/37.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/37.usbdev_setup_stage.2538599154 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 190411847 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:35:06 PM PDT 24 |
| Finished | Aug 12 06:35:07 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-818a6c08-313d-4def-a54b-a8b6a9c82b08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25385 99154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_setup_stage.2538599154 |
| Directory | /workspace/37.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/37.usbdev_setup_trans_ignored.3612917715 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 172354851 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:19 PM PDT 24 |
| Finished | Aug 12 06:35:20 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-8e0e7be6-aa6a-4f95-9519-3ee5215f197f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36129 17715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_setup_trans_ignored.3612917715 |
| Directory | /workspace/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/37.usbdev_smoke.1811579187 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 180439641 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-12fd2ba0-9b3d-46b5-bb6c-34a0d33cd42b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18115 79187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.1811579187 |
| Directory | /workspace/37.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/37.usbdev_spurious_pids_ignored.2737215590 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 2938492239 ps |
| CPU time | 21.95 seconds |
| Started | Aug 12 06:35:14 PM PDT 24 |
| Finished | Aug 12 06:35:36 PM PDT 24 |
| Peak memory | 224056 kb |
| Host | smart-fda3980e-0725-4c9e-b614-21246434fae4 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2737215590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.2737215590 |
| Directory | /workspace/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/37.usbdev_stall_priority_over_nak.1592390614 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 171091115 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-bd2ff8d1-2faf-4750-84c4-3628715d0569 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15923 90614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.1592390614 |
| Directory | /workspace/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/37.usbdev_stall_trans.1810451482 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 158744343 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:32 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2f2a7a72-50f2-4e79-bc46-77363e001a82 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18104 51482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_trans.1810451482 |
| Directory | /workspace/37.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_stream_len_max.2547774733 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 521901175 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:35:12 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-6da37f97-933c-4eb1-82b9-7e5209f514a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25477 74733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.2547774733 |
| Directory | /workspace/37.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/37.usbdev_streaming_out.910463842 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 2275891428 ps |
| CPU time | 21.79 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:39 PM PDT 24 |
| Peak memory | 216572 kb |
| Host | smart-d0d5feb6-6086-4076-904b-033fdcf54b5e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91046 3842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_streaming_out.910463842 |
| Directory | /workspace/37.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/37.usbdev_timeout_missing_host_handshake.3120789682 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 2044762582 ps |
| CPU time | 17.4 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:33 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-78d370c6-8df7-4dc9-a56c-4006fc89125d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3120789682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_hos t_handshake.3120789682 |
| Directory | /workspace/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/37.usbdev_tx_rx_disruption.1772969034 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 572882787 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f2c1c95a-e533-4d0f-a0f7-e17473702d95 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1772969034 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_tx_rx_disruption.1772969034 |
| Directory | /workspace/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/370.usbdev_tx_rx_disruption.2724899258 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 614415871 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-30767545-2df0-4ebc-8543-e218ab249d4b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2724899258 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 370.usbdev_tx_rx_disruption.2724899258 |
| Directory | /workspace/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/371.usbdev_tx_rx_disruption.2254920250 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 534476569 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:37:57 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6f9fc37c-a173-48c0-8d29-f3c08f04132c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2254920250 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 371.usbdev_tx_rx_disruption.2254920250 |
| Directory | /workspace/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/372.usbdev_tx_rx_disruption.3628244822 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 612985356 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-b8f93f1e-dac8-4404-8109-6a34b2cbd187 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3628244822 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 372.usbdev_tx_rx_disruption.3628244822 |
| Directory | /workspace/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/373.usbdev_tx_rx_disruption.2795036411 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 552389019 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:38:04 PM PDT 24 |
| Finished | Aug 12 06:38:05 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-cd14fb57-9931-4cf4-85f4-60638bcb2785 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2795036411 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 373.usbdev_tx_rx_disruption.2795036411 |
| Directory | /workspace/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/374.usbdev_tx_rx_disruption.2501829928 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 480633192 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:37:54 PM PDT 24 |
| Finished | Aug 12 06:37:56 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-458bb43d-5ce5-40d2-a677-a4ea291f8d0b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2501829928 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 374.usbdev_tx_rx_disruption.2501829928 |
| Directory | /workspace/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/375.usbdev_tx_rx_disruption.1265868452 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 456467594 ps |
| CPU time | 1.37 seconds |
| Started | Aug 12 06:38:22 PM PDT 24 |
| Finished | Aug 12 06:38:24 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-d53bb3b0-315f-42df-991b-e215fa0cc166 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1265868452 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 375.usbdev_tx_rx_disruption.1265868452 |
| Directory | /workspace/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/377.usbdev_tx_rx_disruption.452486024 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 526641186 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:59 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-dc8ca86d-a885-4c31-b340-bf2adc5a24eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=452486024 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 377.usbdev_tx_rx_disruption.452486024 |
| Directory | /workspace/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/379.usbdev_tx_rx_disruption.1247077861 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 516506045 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:38:27 PM PDT 24 |
| Finished | Aug 12 06:38:29 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-777bc9d8-2926-4528-9f08-8c17ae95c563 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1247077861 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 379.usbdev_tx_rx_disruption.1247077861 |
| Directory | /workspace/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/38.usbdev_alert_test.3042135652 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 41893391 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:35:57 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-032be85e-3dfe-4d0b-acff-82cb32f45926 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3042135652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.3042135652 |
| Directory | /workspace/38.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_disconnect.1217450669 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 6049866790 ps |
| CPU time | 7.53 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:22 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-9b54b879-46b5-4aa3-a662-a03cf88feb73 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1217450669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_a on_wake_disconnect.1217450669 |
| Directory | /workspace/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_reset.490013848 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 18375640983 ps |
| CPU time | 24.7 seconds |
| Started | Aug 12 06:35:30 PM PDT 24 |
| Finished | Aug 12 06:35:55 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-059b7d6a-b5d2-4262-bafc-4a0c8f46ba00 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=490013848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.490013848 |
| Directory | /workspace/38.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_resume.227374164 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 30481041768 ps |
| CPU time | 42.02 seconds |
| Started | Aug 12 06:35:22 PM PDT 24 |
| Finished | Aug 12 06:36:04 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-116fe3b8-4f8c-45b3-a24f-9ac3401de329 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=227374164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_ao n_wake_resume.227374164 |
| Directory | /workspace/38.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/38.usbdev_av_buffer.742918511 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 163823771 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-75e49c4c-f2a2-4824-8099-aeec39e7e994 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74291 8511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_av_buffer.742918511 |
| Directory | /workspace/38.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/38.usbdev_bitstuff_err.2348347816 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 153363596 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:26 PM PDT 24 |
| Finished | Aug 12 06:35:27 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-43943021-4143-4563-991a-3894d28515d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23483 47816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_bitstuff_err.2348347816 |
| Directory | /workspace/38.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_data_toggle_clear.4120225064 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 409256019 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:35:24 PM PDT 24 |
| Finished | Aug 12 06:35:26 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-defc922e-fc13-4493-b3e3-88401ab887ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41202 25064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_clear.4120225064 |
| Directory | /workspace/38.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/38.usbdev_data_toggle_restore.3746047801 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 339810085 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:35:21 PM PDT 24 |
| Finished | Aug 12 06:35:23 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8055c9ea-7dc1-4d57-822e-c9da010fc619 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3746047801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.3746047801 |
| Directory | /workspace/38.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/38.usbdev_device_address.3723373459 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 20665070102 ps |
| CPU time | 32.99 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-e31583ee-a7e8-4d9d-a896-5080192f8c2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37233 73459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.3723373459 |
| Directory | /workspace/38.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/38.usbdev_device_timeout.619201419 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 1453715949 ps |
| CPU time | 32.81 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-90cb0285-53f4-4468-af1c-3b04e497f63a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=619201419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.619201419 |
| Directory | /workspace/38.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/38.usbdev_disable_endpoint.3189751612 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 762977884 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:35:38 PM PDT 24 |
| Finished | Aug 12 06:35:40 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ed663600-a917-4c1d-9f2e-df0fc5addcdf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31897 51612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_disable_endpoint.3189751612 |
| Directory | /workspace/38.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/38.usbdev_disconnected.520002584 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 145333432 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-e2ab50af-c70c-4244-8ca4-07714f0cb7e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52000 2584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_disconnected.520002584 |
| Directory | /workspace/38.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/38.usbdev_enable.775429230 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 38784565 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:35:18 PM PDT 24 |
| Finished | Aug 12 06:35:19 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ae1a57fa-4523-4955-8a4e-c49ef1fe4965 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77542 9230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_enable.775429230 |
| Directory | /workspace/38.usbdev_enable/latest |
| Test location | /workspace/coverage/default/38.usbdev_endpoint_access.3686508407 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 898104973 ps |
| CPU time | 2.49 seconds |
| Started | Aug 12 06:35:14 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-52442c44-dfd7-460a-9ecf-11e97f7de4c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36865 08407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.3686508407 |
| Directory | /workspace/38.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/38.usbdev_endpoint_types.892671999 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 589551206 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:35:13 PM PDT 24 |
| Finished | Aug 12 06:35:14 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-60e7a1f0-4233-4b81-a35e-9671151b9e13 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=892671999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.892671999 |
| Directory | /workspace/38.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/38.usbdev_fifo_rst.682608858 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 270150954 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:35:25 PM PDT 24 |
| Finished | Aug 12 06:35:27 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-b2e4b1e4-b643-46ff-8a98-925dcf951dd2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68260 8858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_fifo_rst.682608858 |
| Directory | /workspace/38.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_iso.966231677 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 215511608 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:35:31 PM PDT 24 |
| Finished | Aug 12 06:35:33 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-a7c950d8-84ff-40ae-9a80-1412a6c8a19c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=966231677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.966231677 |
| Directory | /workspace/38.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_stall.1450323237 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 189610446 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:21 PM PDT 24 |
| Finished | Aug 12 06:35:22 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-7c531c35-29b0-4979-97cb-2d67d8bbd646 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14503 23237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_stall.1450323237 |
| Directory | /workspace/38.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_trans.165759658 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 160381282 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-6da794a6-3e8c-41d4-8fb6-7faacf269ecf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16575 9658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_trans.165759658 |
| Directory | /workspace/38.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_invalid_sync.926961577 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 4766931887 ps |
| CPU time | 134.24 seconds |
| Started | Aug 12 06:35:27 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 218328 kb |
| Host | smart-ae642967-f6d2-4df1-8e67-82d3c3078818 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=926961577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.926961577 |
| Directory | /workspace/38.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/38.usbdev_iso_retraction.996493435 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 5348562259 ps |
| CPU time | 33.9 seconds |
| Started | Aug 12 06:35:18 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-d5ed53d6-9226-47e7-b805-fa1cb7090820 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=996493435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.996493435 |
| Directory | /workspace/38.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_in_err.1981808190 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 216769287 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:35:23 PM PDT 24 |
| Finished | Aug 12 06:35:34 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2cfc03dc-1b5e-4d52-a9f7-1d287128ca19 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19818 08190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_in_err.1981808190 |
| Directory | /workspace/38.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_resume.2330534109 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 32636443353 ps |
| CPU time | 49.72 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:36:38 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-e5811549-e41c-462f-ba9a-99560a205e3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23305 34109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_resume.2330534109 |
| Directory | /workspace/38.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_suspend.3762188971 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 5474208370 ps |
| CPU time | 7.85 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:23 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-bc1bfe51-f258-4f3f-8568-313babed285a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37621 88971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_suspend.3762188971 |
| Directory | /workspace/38.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/38.usbdev_low_speed_traffic.4169123256 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 5000982958 ps |
| CPU time | 41.41 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 224088 kb |
| Host | smart-c9bfb34a-db9c-4e13-b7ee-f5a036111001 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4169123256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.4169123256 |
| Directory | /workspace/38.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_inter_pkt_delay.404852593 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 2238925727 ps |
| CPU time | 61.54 seconds |
| Started | Aug 12 06:35:18 PM PDT 24 |
| Finished | Aug 12 06:36:20 PM PDT 24 |
| Peak memory | 217284 kb |
| Host | smart-9bc5c6f1-8790-4bcf-b8d8-1e38f96a57fc |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=404852593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.404852593 |
| Directory | /workspace/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_length_in_transaction.2451913264 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 228707242 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:35:15 PM PDT 24 |
| Finished | Aug 12 06:35:16 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-9f0f3a72-6cbb-42e2-8c05-d16ea68145ab |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2451913264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.2451913264 |
| Directory | /workspace/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_length_out_transaction.2690099011 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 221864044 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:19 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c92edb5e-13a1-40ad-9d22-255487e3b064 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26900 99011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.2690099011 |
| Directory | /workspace/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_inter_pkt_delay.1341186105 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 2446793590 ps |
| CPU time | 74.04 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:36:31 PM PDT 24 |
| Peak memory | 217440 kb |
| Host | smart-338a4f9b-307b-49e6-a089-2db842a95390 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1341186105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.1341186105 |
| Directory | /workspace/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_length_in_transaction.2980225438 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 175228665 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:35:25 PM PDT 24 |
| Finished | Aug 12 06:35:26 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e5936ab9-5abb-4ca8-ba0c-1a5fdefcbb32 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2980225438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.2980225438 |
| Directory | /workspace/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_length_out_transaction.758844122 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 211820912 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:35 PM PDT 24 |
| Finished | Aug 12 06:35:36 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-374ba94e-2a90-4cc3-8029-f1193bae9097 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75884 4122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.758844122 |
| Directory | /workspace/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_nak_trans.1732900814 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 200778425 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-23001637-7aa3-4586-b4cc-b8aee375f71f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17329 00814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_nak_trans.1732900814 |
| Directory | /workspace/38.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_iso.1836663677 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 153668178 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:38 PM PDT 24 |
| Finished | Aug 12 06:35:38 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a295db6e-73e1-476d-869c-5cd21ea2f0c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18366 63677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_iso.1836663677 |
| Directory | /workspace/38.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_stall.694488640 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 173158185 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:31 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4411c085-1b75-46b4-9b52-8b1093aa9421 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69448 8640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_stall.694488640 |
| Directory | /workspace/38.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_trans_nak.1411827587 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 148962770 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:25 PM PDT 24 |
| Finished | Aug 12 06:35:31 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-63731def-2f51-47ce-a3fa-786cefb4eb44 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14118 27587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_trans_nak.1411827587 |
| Directory | /workspace/38.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/38.usbdev_pending_in_trans.3492093466 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 152579221 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:31 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-82eebd90-b878-4227-91f4-da091e2438a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34920 93466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pending_in_trans.3492093466 |
| Directory | /workspace/38.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_config_pinflip.188365241 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 194189426 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:42 PM PDT 24 |
| Finished | Aug 12 06:35:43 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-ce0d3760-b816-47b9-b8c8-9fd3d392cee7 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=188365241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.188365241 |
| Directory | /workspace/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_config_usb_ref_disable.3004444427 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 146479063 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:35:22 PM PDT 24 |
| Finished | Aug 12 06:35:23 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8318707e-216e-48c1-8b9f-6f287c050b19 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30044 44427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.3004444427 |
| Directory | /workspace/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_pins_sense.3386946348 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 71448636 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 06:35:32 PM PDT 24 |
| Finished | Aug 12 06:35:33 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-a294326c-2b54-4a40-8e31-f366d8dd8a44 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33869 46348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.3386946348 |
| Directory | /workspace/38.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_buffer.2028484857 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 20894651192 ps |
| CPU time | 51.15 seconds |
| Started | Aug 12 06:35:28 PM PDT 24 |
| Finished | Aug 12 06:36:19 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-4d344fce-5522-4aa1-a893-e20a6347d94c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20284 84857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_buffer.2028484857 |
| Directory | /workspace/38.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_received.1691748973 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 155913731 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:39 PM PDT 24 |
| Finished | Aug 12 06:35:40 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9ac4911b-9861-4669-8552-a50637fedd27 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16917 48973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_received.1691748973 |
| Directory | /workspace/38.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_sent.3633204251 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 277063187 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-aa678824-53d8-42f9-ab48-f6490ab06ab8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36332 04251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_sent.3633204251 |
| Directory | /workspace/38.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/38.usbdev_random_length_in_transaction.434300555 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 207623620 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:24 PM PDT 24 |
| Finished | Aug 12 06:35:25 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f04f9034-c71f-4028-b334-21bf04a31908 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43430 0555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_in_transaction.434300555 |
| Directory | /workspace/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_random_length_out_transaction.3107959022 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 197575540 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5789fa89-b2b1-4cc0-9758-c49a2337406e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31079 59022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.3107959022 |
| Directory | /workspace/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_rx_crc_err.4256401852 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 226662519 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:35:26 PM PDT 24 |
| Finished | Aug 12 06:35:27 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-c196a5f1-4fb5-44e6-81f3-d5de5b0d5338 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42564 01852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_rx_crc_err.4256401852 |
| Directory | /workspace/38.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_rx_full.621821540 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 259616403 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:35:34 PM PDT 24 |
| Finished | Aug 12 06:35:35 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8676f6d3-5c77-4349-aedb-a8f2481f65e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62182 1540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_rx_full.621821540 |
| Directory | /workspace/38.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/38.usbdev_setup_stage.1403161062 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 178914247 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:35:32 PM PDT 24 |
| Finished | Aug 12 06:35:33 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-73a9c2f6-09ab-4317-acab-960ab6607b58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14031 61062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_setup_stage.1403161062 |
| Directory | /workspace/38.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/38.usbdev_setup_trans_ignored.3079254588 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 151354346 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:35:31 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-83fe7f39-b224-4b10-819c-09bafa4b1376 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30792 54588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_setup_trans_ignored.3079254588 |
| Directory | /workspace/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/38.usbdev_smoke.3997060151 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 235268038 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:35:26 PM PDT 24 |
| Finished | Aug 12 06:35:27 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-212cc5b9-770b-4f6c-891f-fb7e7f34344e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39970 60151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.3997060151 |
| Directory | /workspace/38.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/38.usbdev_spurious_pids_ignored.2925463184 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 2452935646 ps |
| CPU time | 23 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:40 PM PDT 24 |
| Peak memory | 224096 kb |
| Host | smart-e7a53796-1264-4ed6-b04f-0396d842511c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2925463184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.2925463184 |
| Directory | /workspace/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/38.usbdev_stall_priority_over_nak.3499183940 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 166336895 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:35:17 PM PDT 24 |
| Finished | Aug 12 06:35:18 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-8972c45c-c266-458c-93b3-8db6e6e8aed3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34991 83940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.3499183940 |
| Directory | /workspace/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/38.usbdev_stall_trans.3572207739 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 184869743 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:35:16 PM PDT 24 |
| Finished | Aug 12 06:35:17 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-f5475529-7cc5-4b3e-a050-261bfff3ffda |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35722 07739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_trans.3572207739 |
| Directory | /workspace/38.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_stream_len_max.821459263 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 885580861 ps |
| CPU time | 2.35 seconds |
| Started | Aug 12 06:35:34 PM PDT 24 |
| Finished | Aug 12 06:35:37 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-a461d299-c4a0-44e0-ad03-644d3718a4c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82145 9263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.821459263 |
| Directory | /workspace/38.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/38.usbdev_streaming_out.2187155913 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 1647181751 ps |
| CPU time | 13.24 seconds |
| Started | Aug 12 06:35:35 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 224032 kb |
| Host | smart-52c2d4b0-9bb8-4d85-bf67-f897ed9ed6ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21871 55913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_streaming_out.2187155913 |
| Directory | /workspace/38.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/38.usbdev_timeout_missing_host_handshake.980096675 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 4321868755 ps |
| CPU time | 28.3 seconds |
| Started | Aug 12 06:35:20 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-d033d8a1-0eb1-49b2-a77c-a6a6b085889c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=980096675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host _handshake.980096675 |
| Directory | /workspace/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/38.usbdev_tx_rx_disruption.1677887854 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 448995768 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:35:34 PM PDT 24 |
| Finished | Aug 12 06:35:35 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-bbc585a7-709b-48a3-a41b-6f7e32b7af26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1677887854 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_tx_rx_disruption.1677887854 |
| Directory | /workspace/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/380.usbdev_tx_rx_disruption.80390885 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 557095524 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-c0268d33-bc9f-4ff9-a70a-d04e36890099 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80390885 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 380.usbdev_tx_rx_disruption.80390885 |
| Directory | /workspace/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/381.usbdev_tx_rx_disruption.4196073700 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 513143446 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:08 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-99c5ea0a-bcd9-410d-aad9-3c2909ad46ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4196073700 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 381.usbdev_tx_rx_disruption.4196073700 |
| Directory | /workspace/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/382.usbdev_tx_rx_disruption.2541595601 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 501801021 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-3f387206-4c0b-455e-8527-6e3bef510ca1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2541595601 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 382.usbdev_tx_rx_disruption.2541595601 |
| Directory | /workspace/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/383.usbdev_tx_rx_disruption.1017077912 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 479803709 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:37:53 PM PDT 24 |
| Finished | Aug 12 06:37:54 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-dd9fc7e4-7c5e-45cd-88e8-d225bc20847d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1017077912 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 383.usbdev_tx_rx_disruption.1017077912 |
| Directory | /workspace/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/384.usbdev_tx_rx_disruption.651024188 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 582854580 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ff77367a-75e5-42ca-9ba0-606a9d08ec26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=651024188 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 384.usbdev_tx_rx_disruption.651024188 |
| Directory | /workspace/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/385.usbdev_tx_rx_disruption.3264262251 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 517750254 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-fcaf67bf-651e-43d3-b2e2-a8ba60dea5ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3264262251 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 385.usbdev_tx_rx_disruption.3264262251 |
| Directory | /workspace/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/386.usbdev_tx_rx_disruption.3678634665 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 511140770 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:06 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-8eeee768-e56a-44f4-9f44-792e0d79dc33 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3678634665 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 386.usbdev_tx_rx_disruption.3678634665 |
| Directory | /workspace/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/387.usbdev_tx_rx_disruption.2570850170 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 568975127 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-240f7322-1073-4220-be9b-4eb5892bb43f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2570850170 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 387.usbdev_tx_rx_disruption.2570850170 |
| Directory | /workspace/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/388.usbdev_tx_rx_disruption.2241719251 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 643981297 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:38:14 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-0fb78549-89a0-497e-8fec-174d803ec225 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2241719251 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 388.usbdev_tx_rx_disruption.2241719251 |
| Directory | /workspace/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/389.usbdev_tx_rx_disruption.1057550044 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 530694792 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-815a42d7-bd8f-4be6-a69b-7dc7064616a1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1057550044 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 389.usbdev_tx_rx_disruption.1057550044 |
| Directory | /workspace/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/39.usbdev_alert_test.923281540 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 76164555 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-3aa1133e-0b02-4d5a-8aca-49f4e9364044 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=923281540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.923281540 |
| Directory | /workspace/39.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_disconnect.847715725 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 9231925662 ps |
| CPU time | 12.24 seconds |
| Started | Aug 12 06:35:34 PM PDT 24 |
| Finished | Aug 12 06:35:46 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-b0c8ac55-88df-4763-b9f1-3b408bba66e5 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=847715725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_ao n_wake_disconnect.847715725 |
| Directory | /workspace/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_reset.3407857785 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 21356089136 ps |
| CPU time | 25.41 seconds |
| Started | Aug 12 06:35:32 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-60b18f43-adcc-4b96-9988-4395b8fc5e67 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3407857785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.3407857785 |
| Directory | /workspace/39.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_resume.1202356178 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 30429001901 ps |
| CPU time | 41.25 seconds |
| Started | Aug 12 06:35:33 PM PDT 24 |
| Finished | Aug 12 06:36:15 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-3fcfe484-a84e-4eb9-9b5c-f0fd7e7327e7 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1202356178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_a on_wake_resume.1202356178 |
| Directory | /workspace/39.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/39.usbdev_av_buffer.2586337316 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 146903644 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:34 PM PDT 24 |
| Finished | Aug 12 06:35:35 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-0aed32bc-1764-4e71-93de-e1bee429970e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25863 37316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_av_buffer.2586337316 |
| Directory | /workspace/39.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/39.usbdev_bitstuff_err.1920582742 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 145859894 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:39 PM PDT 24 |
| Finished | Aug 12 06:35:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-0c79dd4e-d236-4198-a41e-29c5f32d65a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19205 82742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_bitstuff_err.1920582742 |
| Directory | /workspace/39.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_data_toggle_clear.2423870378 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 397118465 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:35:44 PM PDT 24 |
| Finished | Aug 12 06:35:46 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-3e5a13a6-3292-4768-b9e8-2f6e36490a48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24238 70378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_clear.2423870378 |
| Directory | /workspace/39.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/39.usbdev_data_toggle_restore.1824344503 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 715348097 ps |
| CPU time | 1.99 seconds |
| Started | Aug 12 06:35:47 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-df464df6-e272-40af-b1a3-e81a73ad7508 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1824344503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.1824344503 |
| Directory | /workspace/39.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/39.usbdev_device_address.3665338815 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 19705166208 ps |
| CPU time | 32.76 seconds |
| Started | Aug 12 06:35:33 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-5baffa9a-80f6-4a06-a97e-f9e22db4fc12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36653 38815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.3665338815 |
| Directory | /workspace/39.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/39.usbdev_device_timeout.2948974566 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 1123549863 ps |
| CPU time | 26.15 seconds |
| Started | Aug 12 06:35:41 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-4d397a43-8507-4791-8f9c-ded365f78a7a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2948974566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.2948974566 |
| Directory | /workspace/39.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/39.usbdev_disable_endpoint.1377778229 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 1128082246 ps |
| CPU time | 2.72 seconds |
| Started | Aug 12 06:35:27 PM PDT 24 |
| Finished | Aug 12 06:35:30 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-96c8cb8f-9f0c-4a97-8e87-61e65ef0fb4a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13777 78229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disable_endpoint.1377778229 |
| Directory | /workspace/39.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/39.usbdev_disconnected.3844290264 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 143926595 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:31 PM PDT 24 |
| Finished | Aug 12 06:35:32 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-99f9bdce-b6c3-4c43-b4ef-24735285bef3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38442 90264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disconnected.3844290264 |
| Directory | /workspace/39.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/39.usbdev_enable.2635088356 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 51475325 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:35:28 PM PDT 24 |
| Finished | Aug 12 06:35:29 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5cf80243-7490-4d65-b660-d0470ada3638 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26350 88356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_enable.2635088356 |
| Directory | /workspace/39.usbdev_enable/latest |
| Test location | /workspace/coverage/default/39.usbdev_endpoint_access.1007588857 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 894047268 ps |
| CPU time | 2.22 seconds |
| Started | Aug 12 06:35:54 PM PDT 24 |
| Finished | Aug 12 06:35:56 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-291e0c86-9c01-4434-8b11-763a4d32f72c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10075 88857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.1007588857 |
| Directory | /workspace/39.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/39.usbdev_endpoint_types.2423011544 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 644191454 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:35:31 PM PDT 24 |
| Finished | Aug 12 06:35:33 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e9458c71-b871-48a8-b0d7-e2613218123b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2423011544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.2423011544 |
| Directory | /workspace/39.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/39.usbdev_fifo_rst.518166949 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 258108440 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:35:32 PM PDT 24 |
| Finished | Aug 12 06:35:34 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-cd7f9e05-f052-4bc1-aeba-1fe4566b9570 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51816 6949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_fifo_rst.518166949 |
| Directory | /workspace/39.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_iso.3454328400 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 196671362 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:35:25 PM PDT 24 |
| Finished | Aug 12 06:35:26 PM PDT 24 |
| Peak memory | 215868 kb |
| Host | smart-ff73f629-7a88-47c5-becb-14d4d6dc5520 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3454328400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.3454328400 |
| Directory | /workspace/39.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_stall.1497601943 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 139177859 ps |
| CPU time | 0.79 seconds |
| Started | Aug 12 06:35:47 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-9f64724e-3a69-4b30-8a24-342f22d061b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14976 01943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_stall.1497601943 |
| Directory | /workspace/39.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_trans.3501122409 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 230917009 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:35:33 PM PDT 24 |
| Finished | Aug 12 06:35:34 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-cdd3efb8-b602-432e-a665-5c7d826b2e48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35011 22409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_trans.3501122409 |
| Directory | /workspace/39.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_invalid_sync.2923780466 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 5005479005 ps |
| CPU time | 145.31 seconds |
| Started | Aug 12 06:35:35 PM PDT 24 |
| Finished | Aug 12 06:38:00 PM PDT 24 |
| Peak memory | 216012 kb |
| Host | smart-9de52e0f-c1ba-4b15-b16b-d184792d9f29 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2923780466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.2923780466 |
| Directory | /workspace/39.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/39.usbdev_iso_retraction.2311143149 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 10777368292 ps |
| CPU time | 127.87 seconds |
| Started | Aug 12 06:35:42 PM PDT 24 |
| Finished | Aug 12 06:37:55 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-f13b4f6c-e9e8-4348-a89c-a46739b57bc6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2311143149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.2311143149 |
| Directory | /workspace/39.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_in_err.743130247 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 218753595 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:50 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-9e72b414-ce52-41c4-a3fb-16ff4dd48f61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74313 0247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_in_err.743130247 |
| Directory | /workspace/39.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_resume.2893938831 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 13186800929 ps |
| CPU time | 20.63 seconds |
| Started | Aug 12 06:35:35 PM PDT 24 |
| Finished | Aug 12 06:35:55 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-bec64d81-c030-4e9c-ac69-3702d22a7668 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28939 38831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_resume.2893938831 |
| Directory | /workspace/39.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_suspend.775336203 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 11142974372 ps |
| CPU time | 14.28 seconds |
| Started | Aug 12 06:35:53 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-1a695c40-bac8-4685-9d87-9de0ccb52f12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77533 6203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_suspend.775336203 |
| Directory | /workspace/39.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/39.usbdev_low_speed_traffic.3537912400 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 4328162559 ps |
| CPU time | 34.81 seconds |
| Started | Aug 12 06:35:29 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 219304 kb |
| Host | smart-4b58ac1f-8254-495f-a6f6-626dbb130271 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3537912400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3537912400 |
| Directory | /workspace/39.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_inter_pkt_delay.2738725137 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 2542297775 ps |
| CPU time | 73.28 seconds |
| Started | Aug 12 06:35:21 PM PDT 24 |
| Finished | Aug 12 06:36:35 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-d1e29521-4f62-47ce-a1a8-5cdaa6edb67e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2738725137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.2738725137 |
| Directory | /workspace/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_length_in_transaction.684104540 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 239943960 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:35:45 PM PDT 24 |
| Finished | Aug 12 06:35:46 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-16c3466d-63d4-4673-884d-571576456a76 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=684104540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.684104540 |
| Directory | /workspace/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_length_out_transaction.345165005 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 195941614 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:33 PM PDT 24 |
| Finished | Aug 12 06:35:34 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7d35e8d2-bf95-4a2b-9021-58d91a7f4b76 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34516 5005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.345165005 |
| Directory | /workspace/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_inter_pkt_delay.595601595 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 2369046777 ps |
| CPU time | 65.39 seconds |
| Started | Aug 12 06:35:33 PM PDT 24 |
| Finished | Aug 12 06:36:39 PM PDT 24 |
| Peak memory | 217356 kb |
| Host | smart-925439f4-4a3d-499a-ab08-37ed9a62e17b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=595601595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.595601595 |
| Directory | /workspace/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_length_in_transaction.1931382438 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 166561727 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:33 PM PDT 24 |
| Finished | Aug 12 06:35:34 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-8a7ad628-3919-44d8-8470-bfbfc743a8ce |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1931382438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.1931382438 |
| Directory | /workspace/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_length_out_transaction.1088790667 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 154160414 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:35:54 PM PDT 24 |
| Finished | Aug 12 06:35:55 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-afd74ff2-3160-43db-bab1-750ddb60ae55 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10887 90667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.1088790667 |
| Directory | /workspace/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_nak_trans.3532344437 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 163717696 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-d46fa6a4-2961-4301-b0d0-2072a6ce8b60 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35323 44437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_nak_trans.3532344437 |
| Directory | /workspace/39.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_iso.487525435 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 206793548 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:41 PM PDT 24 |
| Finished | Aug 12 06:35:42 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-360a78ba-2469-4cdb-bcb7-3eb4215b5062 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48752 5435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_iso.487525435 |
| Directory | /workspace/39.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_stall.354165168 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 163367422 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:50 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-0f27957f-6f8d-4454-b744-9d5ffaf4d693 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35416 5168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_stall.354165168 |
| Directory | /workspace/39.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_trans_nak.1388630116 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 209661317 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:55 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b28f7785-1e59-49bc-89a8-6074669d5a03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13886 30116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_trans_nak.1388630116 |
| Directory | /workspace/39.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/39.usbdev_pending_in_trans.112664292 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 172293889 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:35:57 PM PDT 24 |
| Finished | Aug 12 06:35:58 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-4556c20d-6231-463c-afe7-87169a8808c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11266 4292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pending_in_trans.112664292 |
| Directory | /workspace/39.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_config_pinflip.3118789365 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 215389236 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-e9be2087-67cc-47a9-8016-ddfa3d325493 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3118789365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.3118789365 |
| Directory | /workspace/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_config_usb_ref_disable.1954218872 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 143461650 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:34 PM PDT 24 |
| Finished | Aug 12 06:35:35 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-18037fab-2279-4c40-aa94-c10c6f5e5ef5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19542 18872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.1954218872 |
| Directory | /workspace/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_pins_sense.1521218038 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 70379987 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-50cbd06b-b63f-433c-85fe-8499eb77abdc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15212 18038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.1521218038 |
| Directory | /workspace/39.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_buffer.1758079987 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 8483525525 ps |
| CPU time | 22.19 seconds |
| Started | Aug 12 06:35:52 PM PDT 24 |
| Finished | Aug 12 06:36:14 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-c5a86938-8e0b-41d8-9ec2-92d6557437d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17580 79987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_buffer.1758079987 |
| Directory | /workspace/39.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_received.2922515273 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 182202657 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:35:58 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c1039166-4f35-462b-a9ee-616e707c87e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29225 15273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_received.2922515273 |
| Directory | /workspace/39.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_sent.103898359 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 239801309 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:35:59 PM PDT 24 |
| Finished | Aug 12 06:36:01 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c77ff0b2-1760-4bc4-aead-c1f8ca9f650c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10389 8359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_sent.103898359 |
| Directory | /workspace/39.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/39.usbdev_random_length_in_transaction.30560251 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 248902979 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:36:03 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-d1284e16-bc26-4713-a1b4-eae2b1fa25ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30560 251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_in_transaction.30560251 |
| Directory | /workspace/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_random_length_out_transaction.4253951130 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 170746339 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:01 PM PDT 24 |
| Finished | Aug 12 06:36:02 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-de8bcc77-6128-42d4-a939-b5562a2719e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42539 51130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.4253951130 |
| Directory | /workspace/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_rx_crc_err.2564972746 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 170742187 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:40 PM PDT 24 |
| Finished | Aug 12 06:35:41 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-44ec142b-3698-46df-82c8-cecf8d53dd90 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25649 72746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_rx_crc_err.2564972746 |
| Directory | /workspace/39.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_rx_full.1616839099 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 253155150 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:35:35 PM PDT 24 |
| Finished | Aug 12 06:35:36 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3783a31d-795e-4846-ab44-bc1ff032af11 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16168 39099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_rx_full.1616839099 |
| Directory | /workspace/39.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/39.usbdev_setup_stage.1102447868 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 164774035 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-cd7a0676-f615-4b23-85a4-842d5fa0d3f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11024 47868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_setup_stage.1102447868 |
| Directory | /workspace/39.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/39.usbdev_setup_trans_ignored.2564400591 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 147982178 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:38 PM PDT 24 |
| Finished | Aug 12 06:35:39 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-ddac0fd6-c07a-4540-b68f-b7aba7531a6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25644 00591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_setup_trans_ignored.2564400591 |
| Directory | /workspace/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/39.usbdev_smoke.915492392 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 193349677 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:58 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-567e1c1d-6bec-408f-810c-9f3d3d14457c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91549 2392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.915492392 |
| Directory | /workspace/39.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/39.usbdev_spurious_pids_ignored.889036744 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 1902015352 ps |
| CPU time | 50.34 seconds |
| Started | Aug 12 06:35:44 PM PDT 24 |
| Finished | Aug 12 06:36:35 PM PDT 24 |
| Peak memory | 223964 kb |
| Host | smart-c65859e7-68c1-4512-b5b4-5e8c369725e4 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=889036744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.889036744 |
| Directory | /workspace/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/39.usbdev_stall_priority_over_nak.1467177864 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 196405012 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:52 PM PDT 24 |
| Finished | Aug 12 06:35:53 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-8b7886fc-d85c-4fc1-a448-3db450e63193 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14671 77864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.1467177864 |
| Directory | /workspace/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/39.usbdev_stall_trans.2267763270 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 184273785 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:35:47 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ae5af7c1-e185-44a8-ba28-cd5ad1fa579b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22677 63270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_trans.2267763270 |
| Directory | /workspace/39.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_stream_len_max.1878663634 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 555919694 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c634d605-715c-4fd2-af4a-58a18612919f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18786 63634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.1878663634 |
| Directory | /workspace/39.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/39.usbdev_streaming_out.3696871476 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 1596662975 ps |
| CPU time | 12.47 seconds |
| Started | Aug 12 06:35:59 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-12fdfe01-cf85-40e7-a8ab-3c0f04cdd7ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36968 71476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_streaming_out.3696871476 |
| Directory | /workspace/39.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/39.usbdev_timeout_missing_host_handshake.1654812212 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 735222089 ps |
| CPU time | 15.02 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:36:04 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-b964c7f4-e8d3-4f10-b897-efcae2c59417 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1654812212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_hos t_handshake.1654812212 |
| Directory | /workspace/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/39.usbdev_tx_rx_disruption.2373719505 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 593312820 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-e1442514-40ed-4e83-909c-4571b71bc354 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2373719505 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_tx_rx_disruption.2373719505 |
| Directory | /workspace/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/390.usbdev_tx_rx_disruption.1552006836 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 612004463 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:31 PM PDT 24 |
| Finished | Aug 12 06:38:32 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-7065bbd7-acc6-439c-8eca-f08deb73af87 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1552006836 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 390.usbdev_tx_rx_disruption.1552006836 |
| Directory | /workspace/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/391.usbdev_tx_rx_disruption.3942033151 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 518718369 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:38:31 PM PDT 24 |
| Finished | Aug 12 06:38:33 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f33f3cd0-b69d-443d-a17f-d71f990b982f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3942033151 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 391.usbdev_tx_rx_disruption.3942033151 |
| Directory | /workspace/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/392.usbdev_tx_rx_disruption.957567815 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 608607288 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:38:02 PM PDT 24 |
| Finished | Aug 12 06:38:04 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-471c6b9f-3598-42de-9802-51c88f0e9812 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=957567815 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 392.usbdev_tx_rx_disruption.957567815 |
| Directory | /workspace/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/393.usbdev_tx_rx_disruption.2537910008 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 651365835 ps |
| CPU time | 1.89 seconds |
| Started | Aug 12 06:37:56 PM PDT 24 |
| Finished | Aug 12 06:37:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-22b4a4c1-000c-42f0-8479-68ec48fa22d3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2537910008 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 393.usbdev_tx_rx_disruption.2537910008 |
| Directory | /workspace/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/394.usbdev_tx_rx_disruption.1202003685 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 513405221 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:15 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bc146d64-6a60-4991-a14e-3053717f23d0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1202003685 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 394.usbdev_tx_rx_disruption.1202003685 |
| Directory | /workspace/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/395.usbdev_tx_rx_disruption.1257842785 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 655557972 ps |
| CPU time | 1.93 seconds |
| Started | Aug 12 06:37:55 PM PDT 24 |
| Finished | Aug 12 06:37:57 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-388f4e78-653c-4c4b-87a5-1774f803fcdf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1257842785 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 395.usbdev_tx_rx_disruption.1257842785 |
| Directory | /workspace/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/396.usbdev_tx_rx_disruption.3497528960 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 452236252 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:37:49 PM PDT 24 |
| Finished | Aug 12 06:37:51 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-5181c424-a75f-4d4a-8da2-2ed8b2fbc0b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3497528960 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 396.usbdev_tx_rx_disruption.3497528960 |
| Directory | /workspace/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/397.usbdev_tx_rx_disruption.2613419903 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 467117899 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:38:03 PM PDT 24 |
| Finished | Aug 12 06:38:05 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-afeb2ca2-141e-4b9f-a1f3-136701060e06 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2613419903 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 397.usbdev_tx_rx_disruption.2613419903 |
| Directory | /workspace/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/398.usbdev_tx_rx_disruption.2991819589 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 470507255 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:50 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-913f52ca-eeac-4fc0-8ca3-584a9001953b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2991819589 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 398.usbdev_tx_rx_disruption.2991819589 |
| Directory | /workspace/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/399.usbdev_tx_rx_disruption.1657766604 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 626286710 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-303aac70-ddc8-41cd-a75b-af2c1f4e2b02 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1657766604 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 399.usbdev_tx_rx_disruption.1657766604 |
| Directory | /workspace/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/4.usbdev_alert_test.20642664 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 57053159 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:08 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-065840ae-b0aa-433f-a5c9-f69b05b5dfd1 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=20642664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.20642664 |
| Directory | /workspace/4.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_disconnect.788663210 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 5120757600 ps |
| CPU time | 7.74 seconds |
| Started | Aug 12 06:29:43 PM PDT 24 |
| Finished | Aug 12 06:29:51 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-21afcaa8-68eb-40d0-97bb-a797ea690d0b |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=788663210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon _wake_disconnect.788663210 |
| Directory | /workspace/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_reset.3996403970 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 13860304528 ps |
| CPU time | 15.96 seconds |
| Started | Aug 12 06:29:44 PM PDT 24 |
| Finished | Aug 12 06:30:00 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-ef2d624e-6309-4922-ac97-782afd5ac6c3 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3996403970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.3996403970 |
| Directory | /workspace/4.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_resume.1217295018 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 25762705668 ps |
| CPU time | 31.48 seconds |
| Started | Aug 12 06:29:41 PM PDT 24 |
| Finished | Aug 12 06:30:13 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-67441f9d-29e4-45ac-ac7c-17dad952a3d2 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1217295018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_ao n_wake_resume.1217295018 |
| Directory | /workspace/4.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_buffer.2315605968 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 210961085 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:45 PM PDT 24 |
| Finished | Aug 12 06:29:46 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-b68b9a3f-c470-4ec6-81d4-c73e2f75053b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23156 05968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_buffer.2315605968 |
| Directory | /workspace/4.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_empty.3868128942 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 177469416 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:29:42 PM PDT 24 |
| Finished | Aug 12 06:29:43 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-bd14ea77-6729-49dd-bbb8-0fe2cdf0fa16 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38681 28942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_empty.3868128942 |
| Directory | /workspace/4.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_overflow.1618771075 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 152587885 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:29:56 PM PDT 24 |
| Finished | Aug 12 06:29:56 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0e919247-2bfa-4948-bb29-5d6a4eea8253 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16187 71075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_overflow.1618771075 |
| Directory | /workspace/4.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/4.usbdev_bitstuff_err.1177333030 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 147202657 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-1dbae6ee-e8ba-4195-8825-dd038f37b5c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11773 33030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_bitstuff_err.1177333030 |
| Directory | /workspace/4.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_data_toggle_clear.2468479183 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 265164026 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:29:50 PM PDT 24 |
| Finished | Aug 12 06:29:51 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-06932ce0-6bff-4b74-b16d-5c16280d4926 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24684 79183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_clear.2468479183 |
| Directory | /workspace/4.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/4.usbdev_data_toggle_restore.125150959 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 391698605 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:29:50 PM PDT 24 |
| Finished | Aug 12 06:29:51 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-dc9d4a1e-a54c-45c9-a39b-7192907b8dbc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=125150959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.125150959 |
| Directory | /workspace/4.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/4.usbdev_device_address.1421915598 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 32222456455 ps |
| CPU time | 55.22 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:30:53 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-8ca7be12-d2ef-4f86-ad92-b0b07b8d2a33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14219 15598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.1421915598 |
| Directory | /workspace/4.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/4.usbdev_device_timeout.246978066 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 874244476 ps |
| CPU time | 19.32 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:30:13 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-cf504809-a313-4edc-9424-7315fbb5e0b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=246978066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.246978066 |
| Directory | /workspace/4.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/4.usbdev_disable_endpoint.165001416 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 490510145 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-8952e704-aea3-4813-a2b0-50c20ae63b9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16500 1416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disable_endpoint.165001416 |
| Directory | /workspace/4.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/4.usbdev_disconnected.433909907 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 161944919 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:29:53 PM PDT 24 |
| Finished | Aug 12 06:29:54 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8e9c0e81-3a3e-441f-8eca-f6ce2bbd04fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43390 9907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disconnected.433909907 |
| Directory | /workspace/4.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/4.usbdev_enable.80303761 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 36282618 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:29:51 PM PDT 24 |
| Finished | Aug 12 06:29:52 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-ab488239-0a1e-4a84-ab50-eaab906aedd8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80303 761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_enable.80303761 |
| Directory | /workspace/4.usbdev_enable/latest |
| Test location | /workspace/coverage/default/4.usbdev_endpoint_access.3823755957 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 740662804 ps |
| CPU time | 2.32 seconds |
| Started | Aug 12 06:29:59 PM PDT 24 |
| Finished | Aug 12 06:30:01 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-77764be5-575c-43aa-82dd-81d711d4c02c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38237 55957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.3823755957 |
| Directory | /workspace/4.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/4.usbdev_endpoint_types.4232817998 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 469467118 ps |
| CPU time | 1.36 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a0386b53-c0a7-49c0-85f0-eb2c4f553de1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4232817998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.4232817998 |
| Directory | /workspace/4.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/4.usbdev_fifo_rst.896150773 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 167997079 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:29:53 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-71f02dfd-f9e8-4b01-8f5e-38bdaabaef0d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89615 0773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_fifo_rst.896150773 |
| Directory | /workspace/4.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_hiclk_max.994978675 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 98231414530 ps |
| CPU time | 186.1 seconds |
| Started | Aug 12 06:29:52 PM PDT 24 |
| Finished | Aug 12 06:32:58 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-06f6abac-a3a5-492d-8e8e-b9374fe5833c |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=994978675 -assert no postproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspac e/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk_max.994978675 |
| Directory | /workspace/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_loclk.2430235235 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 108104893914 ps |
| CPU time | 170.2 seconds |
| Started | Aug 12 06:29:53 PM PDT 24 |
| Finished | Aug 12 06:32:44 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-9071100e-decb-4edb-b485-8fd498560534 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2430235235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.2430235235 |
| Directory | /workspace/4.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_loclk_max.55660617 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 103005767596 ps |
| CPU time | 167.92 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:32:42 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-e22113aa-ef18-4176-9db1-274494693d29 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55660617 -assert nop ostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace /coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk_max.55660617 |
| Directory | /workspace/4.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_phase.3667844542 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 89201952159 ps |
| CPU time | 164.8 seconds |
| Started | Aug 12 06:29:49 PM PDT 24 |
| Finished | Aug 12 06:32:34 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-83dfd220-879d-41b9-a52b-8d7819417572 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36678 44542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_phase.3667844542 |
| Directory | /workspace/4.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_iso.705974796 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 265405873 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:29:53 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-65c8adf4-f278-4797-aaeb-d1d7bf3e3db8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=705974796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.705974796 |
| Directory | /workspace/4.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_stall.3584073229 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 150079861 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:29:51 PM PDT 24 |
| Finished | Aug 12 06:29:52 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-48375425-21de-43ba-b2ac-19eca05d1b00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35840 73229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_stall.3584073229 |
| Directory | /workspace/4.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_trans.1606129598 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 225813482 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:56 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-93095710-6142-4a77-9618-3218e88cf899 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16061 29598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_trans.1606129598 |
| Directory | /workspace/4.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_invalid_sync.2960229757 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 4669664444 ps |
| CPU time | 49.6 seconds |
| Started | Aug 12 06:29:53 PM PDT 24 |
| Finished | Aug 12 06:30:42 PM PDT 24 |
| Peak memory | 218248 kb |
| Host | smart-fd456b68-9063-4d6c-84c2-a46b8257eba5 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2960229757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.2960229757 |
| Directory | /workspace/4.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/4.usbdev_iso_retraction.785960331 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 4050001727 ps |
| CPU time | 29.89 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:30:24 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-365a3c34-530b-4af8-9486-29b1a7976766 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=785960331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.785960331 |
| Directory | /workspace/4.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_in_err.672610434 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 213686671 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e4814e12-2c21-41df-a626-cd5586d54272 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67261 0434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_in_err.672610434 |
| Directory | /workspace/4.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_resume.2738100600 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 27018827620 ps |
| CPU time | 31.63 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:30:25 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-0806a982-10f8-42ff-bfdf-10bc28fff377 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27381 00600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_resume.2738100600 |
| Directory | /workspace/4.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_suspend.2367320474 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 9796917458 ps |
| CPU time | 13.38 seconds |
| Started | Aug 12 06:29:52 PM PDT 24 |
| Finished | Aug 12 06:30:05 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-d29c6905-62a7-4d02-9013-2e7f2dfe96e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23673 20474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_suspend.2367320474 |
| Directory | /workspace/4.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/4.usbdev_low_speed_traffic.671391446 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 4030336611 ps |
| CPU time | 116.48 seconds |
| Started | Aug 12 06:29:51 PM PDT 24 |
| Finished | Aug 12 06:31:48 PM PDT 24 |
| Peak memory | 218392 kb |
| Host | smart-ebd86cdc-025b-4e7b-a506-3683887c116d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=671391446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.671391446 |
| Directory | /workspace/4.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_inter_pkt_delay.3939903761 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 2171526892 ps |
| CPU time | 61.68 seconds |
| Started | Aug 12 06:29:52 PM PDT 24 |
| Finished | Aug 12 06:30:53 PM PDT 24 |
| Peak memory | 217020 kb |
| Host | smart-daa8b5b6-9263-4e87-b85d-981c0e61daa7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3939903761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.3939903761 |
| Directory | /workspace/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_length_in_transaction.3860628408 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 240910493 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:56 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-ab2e818a-89ee-4572-b87b-7fca7b9b816f |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3860628408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.3860628408 |
| Directory | /workspace/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_length_out_transaction.3834943086 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 201491823 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:29:51 PM PDT 24 |
| Finished | Aug 12 06:29:52 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-34a46973-0236-400f-aa06-388db539e08d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38349 43086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.3834943086 |
| Directory | /workspace/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_non_iso_usb_traffic.3616428971 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 3309186811 ps |
| CPU time | 25.93 seconds |
| Started | Aug 12 06:29:53 PM PDT 24 |
| Finished | Aug 12 06:30:19 PM PDT 24 |
| Peak memory | 217788 kb |
| Host | smart-6541c5e6-21f9-4656-a1bc-59092bcceec6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36164 28971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.3616428971 |
| Directory | /workspace/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_usb_traffic.3150344379 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 2054869207 ps |
| CPU time | 20.38 seconds |
| Started | Aug 12 06:29:50 PM PDT 24 |
| Finished | Aug 12 06:30:11 PM PDT 24 |
| Peak memory | 216784 kb |
| Host | smart-7f057022-97ff-4b5b-9939-aa126a347b0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3150344379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.3150344379 |
| Directory | /workspace/4.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_inter_pkt_delay.753627386 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 4203707737 ps |
| CPU time | 116.77 seconds |
| Started | Aug 12 06:29:50 PM PDT 24 |
| Finished | Aug 12 06:31:47 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-7f23f541-1bc5-4c4c-9d65-25f34610cabd |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=753627386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.753627386 |
| Directory | /workspace/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_length_in_transaction.2490452896 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 155312464 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:29:50 PM PDT 24 |
| Finished | Aug 12 06:29:52 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d1af5942-07f1-4441-8c2d-b4c16769d2c8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2490452896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.2490452896 |
| Directory | /workspace/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_length_out_transaction.892372573 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 183171524 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:29:59 PM PDT 24 |
| Finished | Aug 12 06:30:00 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-aff232e1-c388-462d-9345-13f2b6b2b9f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89237 2573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.892372573 |
| Directory | /workspace/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_nak_trans.1903604459 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 239661899 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:29:52 PM PDT 24 |
| Finished | Aug 12 06:29:53 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e1fd2950-2c12-4aef-8d16-5ba9e922bcb0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19036 04459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_nak_trans.1903604459 |
| Directory | /workspace/4.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_iso.977511291 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 149956294 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-d69bc2c1-c91c-4a30-91e5-e408f08448ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97751 1291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_iso.977511291 |
| Directory | /workspace/4.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_stall.50168685 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 195862924 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-f42163ba-b7f5-417a-8179-4801a348cbeb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50168 685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_stall.50168685 |
| Directory | /workspace/4.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_trans_nak.3180790868 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 202884079 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:29:51 PM PDT 24 |
| Finished | Aug 12 06:29:52 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-23e4ba19-787c-4792-8406-70a1882a09cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31807 90868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_trans_nak.3180790868 |
| Directory | /workspace/4.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/4.usbdev_pending_in_trans.848036793 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 157596433 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:29:54 PM PDT 24 |
| Finished | Aug 12 06:29:55 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-747d51e1-c7fa-452c-bb19-23d85824b52c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84803 6793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pending_in_trans.848036793 |
| Directory | /workspace/4.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_pinflip.2462346101 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 228501246 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:29:59 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0ff2e99c-6802-4d39-bbdb-950a7ba1bdf5 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2462346101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.2462346101 |
| Directory | /workspace/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_rand_bus_type.102284576 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 246982461 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:29:59 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-7ec51144-f6ed-4cf8-89e4-c0cf8a1bed17 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10228 4576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.102284576 |
| Directory | /workspace/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_usb_ref_disable.3433146276 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 171562162 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:29:59 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-1b4dd046-77c9-43e2-9ddc-18729d9fc352 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34331 46276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.3433146276 |
| Directory | /workspace/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_pins_sense.3774578662 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 38047909 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:29:56 PM PDT 24 |
| Finished | Aug 12 06:29:57 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8446926f-cfde-46d2-b5a6-2018350c7464 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37745 78662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.3774578662 |
| Directory | /workspace/4.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_buffer.1394467099 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 22103426418 ps |
| CPU time | 54.12 seconds |
| Started | Aug 12 06:29:57 PM PDT 24 |
| Finished | Aug 12 06:30:51 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-5e367e31-181b-43f2-a783-f58239f151c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13944 67099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_buffer.1394467099 |
| Directory | /workspace/4.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_received.3731837390 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 194520439 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:29:59 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-1467cff4-21bc-4e1d-bc65-92d444d82450 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37318 37390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_received.3731837390 |
| Directory | /workspace/4.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_sent.1808360691 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 156879592 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:29:57 PM PDT 24 |
| Finished | Aug 12 06:29:58 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-e5bf9e8b-0565-489a-9322-366f3adc3c25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18083 60691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_sent.1808360691 |
| Directory | /workspace/4.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_bus_disconnects.3453428319 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 2015793222 ps |
| CPU time | 52.06 seconds |
| Started | Aug 12 06:29:59 PM PDT 24 |
| Finished | Aug 12 06:30:51 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-7582329a-65fa-4149-90bd-810885cc296e |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3453428319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.3453428319 |
| Directory | /workspace/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_bus_resets.1005006636 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 10084969465 ps |
| CPU time | 173.17 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:32:52 PM PDT 24 |
| Peak memory | 219048 kb |
| Host | smart-4241bfbc-f445-40d0-b1bf-ad02fb717679 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1005006636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.1005006636 |
| Directory | /workspace/4.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_suspends.613871833 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 14174518740 ps |
| CPU time | 104.27 seconds |
| Started | Aug 12 06:29:57 PM PDT 24 |
| Finished | Aug 12 06:31:41 PM PDT 24 |
| Peak memory | 224100 kb |
| Host | smart-1202999c-9b28-462e-bcb9-247eacdef8e9 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=613871833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.613871833 |
| Directory | /workspace/4.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/4.usbdev_random_length_in_transaction.434623525 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 163786395 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:29:59 PM PDT 24 |
| Finished | Aug 12 06:30:00 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-33d538ed-3e91-4411-a161-50e9acf1bd5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43462 3525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_in_transaction.434623525 |
| Directory | /workspace/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_random_length_out_transaction.3586211069 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 259584028 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:30:00 PM PDT 24 |
| Finished | Aug 12 06:30:01 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3a0c0035-eed9-437f-b402-390f72623521 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35862 11069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.3586211069 |
| Directory | /workspace/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_resume_link_active.1159957427 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 20150650462 ps |
| CPU time | 30.27 seconds |
| Started | Aug 12 06:30:00 PM PDT 24 |
| Finished | Aug 12 06:30:30 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-7d7bdf1b-2126-4a55-9b2a-e14b63a6776f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11599 57427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_resume_link_active.1159957427 |
| Directory | /workspace/4.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_crc_err.3671698693 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 170711337 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:03 PM PDT 24 |
| Finished | Aug 12 06:30:04 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-22389e08-1d79-4d10-a54c-0338242ab0d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36716 98693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_crc_err.3671698693 |
| Directory | /workspace/4.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_full.2984228337 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 432957310 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:30:03 PM PDT 24 |
| Finished | Aug 12 06:30:05 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-1730186c-c53b-46c5-8857-c9987aa2379a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29842 28337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_full.2984228337 |
| Directory | /workspace/4.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_pid_err.3895815745 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 169688843 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:30:00 PM PDT 24 |
| Finished | Aug 12 06:30:01 PM PDT 24 |
| Peak memory | 206428 kb |
| Host | smart-231ea0ba-1aed-4c72-bd04-049a1d87a5be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38958 15745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_pid_err.3895815745 |
| Directory | /workspace/4.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_sec_cm.2080956222 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 446149990 ps |
| CPU time | 1.29 seconds |
| Started | Aug 12 06:30:09 PM PDT 24 |
| Finished | Aug 12 06:30:10 PM PDT 24 |
| Peak memory | 223336 kb |
| Host | smart-96815b07-8755-4e3b-aba5-69de95712e90 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2080956222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.2080956222 |
| Directory | /workspace/4.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_priority.2035761989 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 390572275 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:30:04 PM PDT 24 |
| Finished | Aug 12 06:30:05 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4761b550-832f-4c5e-b7e9-7f3e4adc893d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20357 61989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.2035761989 |
| Directory | /workspace/4.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_priority_over_stall_response.968979623 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 300213400 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:29:59 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-bc3f88bf-0610-4fff-8ea3-9fa00c2f6764 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96897 9623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+tg l+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.968979623 |
| Directory | /workspace/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_stage.119035023 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 164597768 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:29:59 PM PDT 24 |
| Finished | Aug 12 06:30:00 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-0fdfbff8-81fd-4838-892c-f2cdc388ddd8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11903 5023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_stage.119035023 |
| Directory | /workspace/4.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_trans_ignored.2174728260 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 200125328 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:00 PM PDT 24 |
| Finished | Aug 12 06:30:01 PM PDT 24 |
| Peak memory | 206432 kb |
| Host | smart-774c90d3-ba21-41f6-8c4e-3e93f6a9a59d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21747 28260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_trans_ignored.2174728260 |
| Directory | /workspace/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/4.usbdev_smoke.2436438945 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 261836801 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:29:59 PM PDT 24 |
| Finished | Aug 12 06:30:00 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-dc87b17c-6d7b-4d34-a226-4b40343af07a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24364 38945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.2436438945 |
| Directory | /workspace/4.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/4.usbdev_spurious_pids_ignored.1086734240 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 2386111229 ps |
| CPU time | 70.12 seconds |
| Started | Aug 12 06:29:59 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-b56a289a-4d67-40d5-b03b-39452bbcbfe9 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1086734240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.1086734240 |
| Directory | /workspace/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/4.usbdev_stall_priority_over_nak.1133476661 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 146620157 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:00 PM PDT 24 |
| Finished | Aug 12 06:30:01 PM PDT 24 |
| Peak memory | 206428 kb |
| Host | smart-4a490ab7-984d-49fc-b2b9-70d13f3c257c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11334 76661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.1133476661 |
| Directory | /workspace/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/4.usbdev_stall_trans.903595532 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 183618307 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:29:59 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-1b3d7a5d-c1fc-4799-97fa-4a00e7b0e868 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90359 5532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_trans.903595532 |
| Directory | /workspace/4.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_stream_len_max.413102326 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 1306867850 ps |
| CPU time | 3.25 seconds |
| Started | Aug 12 06:29:58 PM PDT 24 |
| Finished | Aug 12 06:30:02 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-4a2fa4af-2ad1-46d7-8a8e-fabc21d9bfcb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41310 2326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.413102326 |
| Directory | /workspace/4.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_streaming_out.3122692945 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 2849229370 ps |
| CPU time | 28.63 seconds |
| Started | Aug 12 06:29:59 PM PDT 24 |
| Finished | Aug 12 06:30:28 PM PDT 24 |
| Peak memory | 217676 kb |
| Host | smart-cfc3c65d-d8f2-469a-a1f7-de7ef02181cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31226 92945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_streaming_out.3122692945 |
| Directory | /workspace/4.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/4.usbdev_timeout_missing_host_handshake.253869661 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 4310970500 ps |
| CPU time | 29.9 seconds |
| Started | Aug 12 06:29:50 PM PDT 24 |
| Finished | Aug 12 06:30:20 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-ef30be3f-efcc-4d05-809f-0b60cb2e7658 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=253869661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_ handshake.253869661 |
| Directory | /workspace/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/4.usbdev_tx_rx_disruption.1516788995 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 660089580 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:29:57 PM PDT 24 |
| Finished | Aug 12 06:29:59 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-9224942e-c64c-48b6-bbd4-04b0324687ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1516788995 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_tx_rx_disruption.1516788995 |
| Directory | /workspace/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/40.usbdev_alert_test.1549695268 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 57730126 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-7240c0ce-5e7a-4d90-ba19-693953709c7c |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1549695268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.1549695268 |
| Directory | /workspace/40.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_disconnect.998586783 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 11614352034 ps |
| CPU time | 13.94 seconds |
| Started | Aug 12 06:35:45 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-089eea71-00da-4355-b5c9-03776e631f44 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=998586783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_ao n_wake_disconnect.998586783 |
| Directory | /workspace/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_reset.1799261748 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 21373118929 ps |
| CPU time | 26.29 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:36:19 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-66db6ea2-13f6-4d1b-9da8-0891752461e5 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1799261748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.1799261748 |
| Directory | /workspace/40.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_resume.2572857728 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 30502615945 ps |
| CPU time | 38.07 seconds |
| Started | Aug 12 06:35:45 PM PDT 24 |
| Finished | Aug 12 06:36:23 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-48b83902-3364-4ac2-93e6-1763a19459f6 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2572857728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_a on_wake_resume.2572857728 |
| Directory | /workspace/40.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/40.usbdev_av_buffer.2504903947 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 210733720 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:45 PM PDT 24 |
| Finished | Aug 12 06:35:46 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-82eaee86-95ae-4a47-adfb-4645ae0e1325 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25049 03947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_av_buffer.2504903947 |
| Directory | /workspace/40.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/40.usbdev_bitstuff_err.5470653 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 165879773 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-4c85ffce-4b27-468b-8a76-1ffb2bc49af1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54706 53 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_bitstuff_err.5470653 |
| Directory | /workspace/40.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_data_toggle_clear.245433946 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 316238597 ps |
| CPU time | 1.25 seconds |
| Started | Aug 12 06:35:44 PM PDT 24 |
| Finished | Aug 12 06:35:45 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-69f2d3b6-4a17-4e5e-8672-18ee053c4d29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24543 3946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_clear.245433946 |
| Directory | /workspace/40.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/40.usbdev_data_toggle_restore.2210738196 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 791168734 ps |
| CPU time | 2.22 seconds |
| Started | Aug 12 06:35:34 PM PDT 24 |
| Finished | Aug 12 06:35:37 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-0f86c0f4-9158-4875-9b55-016e7a292ab0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2210738196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.2210738196 |
| Directory | /workspace/40.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/40.usbdev_device_address.579716800 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 20400384802 ps |
| CPU time | 33.05 seconds |
| Started | Aug 12 06:35:33 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-ecacb2f2-18c3-443f-98b6-0a0dba58dd46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57971 6800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.579716800 |
| Directory | /workspace/40.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/40.usbdev_device_timeout.2347400968 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 766327976 ps |
| CPU time | 15.75 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:36:01 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-bc1849d0-1ce7-427a-b1a1-1b417e5ac394 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2347400968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.2347400968 |
| Directory | /workspace/40.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/40.usbdev_disable_endpoint.1556795209 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 741683922 ps |
| CPU time | 2.01 seconds |
| Started | Aug 12 06:35:45 PM PDT 24 |
| Finished | Aug 12 06:35:47 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8ee3d771-6c40-4836-8153-a3946a23ccda |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15567 95209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disable_endpoint.1556795209 |
| Directory | /workspace/40.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/40.usbdev_disconnected.4096412719 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 139785390 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:02 PM PDT 24 |
| Finished | Aug 12 06:36:03 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-04477198-3193-4b10-9bb1-f928fc64e65c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40964 12719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disconnected.4096412719 |
| Directory | /workspace/40.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/40.usbdev_enable.2074937634 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 48485913 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 06:35:38 PM PDT 24 |
| Finished | Aug 12 06:35:39 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-0eaa38fb-f81b-4942-ab71-9d7685b46514 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20749 37634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_enable.2074937634 |
| Directory | /workspace/40.usbdev_enable/latest |
| Test location | /workspace/coverage/default/40.usbdev_endpoint_access.2373991382 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 754049586 ps |
| CPU time | 2.19 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:35:58 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-3b63ec4d-aa67-477f-be0d-71c10a7cf10c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23739 91382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.2373991382 |
| Directory | /workspace/40.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/40.usbdev_endpoint_types.2971496401 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 140763520 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-3c26823a-0016-41b3-af30-c1116fad375b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2971496401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.2971496401 |
| Directory | /workspace/40.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/40.usbdev_fifo_rst.1436657560 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 239574877 ps |
| CPU time | 1.87 seconds |
| Started | Aug 12 06:35:44 PM PDT 24 |
| Finished | Aug 12 06:35:46 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-6957c151-7dd4-455f-8b24-b89e85119dbb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14366 57560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_fifo_rst.1436657560 |
| Directory | /workspace/40.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_iso.3120966400 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 218089607 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:35:54 PM PDT 24 |
| Finished | Aug 12 06:35:55 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-8ae91fca-f334-4a8d-b577-3f6b5a84534b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3120966400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.3120966400 |
| Directory | /workspace/40.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_stall.2245483057 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 171988842 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:35:58 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-a897392e-ec90-4995-9f4f-4bf5081fccc7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22454 83057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_stall.2245483057 |
| Directory | /workspace/40.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_trans.1546761354 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 196808347 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:35:40 PM PDT 24 |
| Finished | Aug 12 06:35:41 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7b610bce-c06e-4d90-8272-87f28033c1af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15467 61354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_trans.1546761354 |
| Directory | /workspace/40.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_invalid_sync.3095022579 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 3084719094 ps |
| CPU time | 23.29 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 224108 kb |
| Host | smart-e210bd04-934c-4330-88ce-add7724b3737 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3095022579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.3095022579 |
| Directory | /workspace/40.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/40.usbdev_iso_retraction.3372317238 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 10182351113 ps |
| CPU time | 129.94 seconds |
| Started | Aug 12 06:35:58 PM PDT 24 |
| Finished | Aug 12 06:38:08 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-36b6b500-ae32-420c-ba38-455e40dd6364 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3372317238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.3372317238 |
| Directory | /workspace/40.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_in_err.1921183021 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 240550747 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0aa71532-c4f1-4032-a3df-e510abb8032c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19211 83021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_in_err.1921183021 |
| Directory | /workspace/40.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_resume.4014394395 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 21844226768 ps |
| CPU time | 32.54 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:36:29 PM PDT 24 |
| Peak memory | 216136 kb |
| Host | smart-e231a3f0-cc58-41e5-b4f3-ab55ba073ad6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40143 94395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_resume.4014394395 |
| Directory | /workspace/40.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_suspend.3034564643 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 6228478802 ps |
| CPU time | 8.27 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:15 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-43c9ea63-c322-44e1-ab67-4a9c14c29cf0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30345 64643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_suspend.3034564643 |
| Directory | /workspace/40.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/40.usbdev_low_speed_traffic.4103549310 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 4571092166 ps |
| CPU time | 134.2 seconds |
| Started | Aug 12 06:36:01 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 224104 kb |
| Host | smart-77c4c6c3-8fc7-4544-a6cd-9d788cd234ac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4103549310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.4103549310 |
| Directory | /workspace/40.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_inter_pkt_delay.235161244 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 3316950597 ps |
| CPU time | 32.04 seconds |
| Started | Aug 12 06:35:41 PM PDT 24 |
| Finished | Aug 12 06:36:13 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-ef9aed42-a382-488f-bfa1-2ab0d21c4f3f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=235161244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.235161244 |
| Directory | /workspace/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_length_in_transaction.3563358708 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 236781465 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:36:03 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d167b180-36c7-432e-a5ae-7265c57eab4a |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3563358708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.3563358708 |
| Directory | /workspace/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_length_out_transaction.3385258593 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 189495025 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e691a65f-223c-4a1c-9d22-9512faace939 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33852 58593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.3385258593 |
| Directory | /workspace/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_inter_pkt_delay.2162632392 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 2072392747 ps |
| CPU time | 20.9 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:36:17 PM PDT 24 |
| Peak memory | 217228 kb |
| Host | smart-bdb265ee-27af-408f-9669-1b66e9c2e579 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2162632392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.2162632392 |
| Directory | /workspace/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_length_in_transaction.4102421842 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 183154131 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:47 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-52f7f1f2-7776-4973-90b0-31786a183d58 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4102421842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.4102421842 |
| Directory | /workspace/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_length_out_transaction.4066670940 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 158685180 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:50 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-fe1f14ef-d922-4ca4-ad15-75054e8da55f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40666 70940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.4066670940 |
| Directory | /workspace/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_nak_trans.790096505 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 266591638 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-838c0dff-4b6b-4333-8b9b-aeee073cb12f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79009 6505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_nak_trans.790096505 |
| Directory | /workspace/40.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_iso.3256505882 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 260619292 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-523e08be-a01e-4bdc-a1c0-efa1bfb20af7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32565 05882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_iso.3256505882 |
| Directory | /workspace/40.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_stall.243093578 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 181223603 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:44 PM PDT 24 |
| Finished | Aug 12 06:35:45 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-16634120-afc3-43a1-9e01-c7bb33463156 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24309 3578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_stall.243093578 |
| Directory | /workspace/40.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_trans_nak.4174375513 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 158737856 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:35:47 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d8c196ef-8ea9-4281-8d25-bd611134fde9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41743 75513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_trans_nak.4174375513 |
| Directory | /workspace/40.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/40.usbdev_pending_in_trans.3980070510 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 156948646 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:02 PM PDT 24 |
| Finished | Aug 12 06:36:03 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5e57a077-7c05-47b2-9e41-ac15ee05fe36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39800 70510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pending_in_trans.3980070510 |
| Directory | /workspace/40.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_config_pinflip.2466472704 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 279596861 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c94f8f7f-5396-440e-964c-1d5a4c4af3dd |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2466472704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.2466472704 |
| Directory | /workspace/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_config_usb_ref_disable.2815524039 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 149881360 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:52 PM PDT 24 |
| Finished | Aug 12 06:35:53 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-20a3c58c-1d00-4b6c-89a7-f9fe86d7694e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28155 24039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.2815524039 |
| Directory | /workspace/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_pins_sense.3170655500 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 47799380 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:36:03 PM PDT 24 |
| Finished | Aug 12 06:36:04 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4fa4934d-fe44-4496-863a-d4b462040053 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31706 55500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.3170655500 |
| Directory | /workspace/40.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_buffer.1803001898 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 9278725122 ps |
| CPU time | 22.87 seconds |
| Started | Aug 12 06:35:43 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-903031ee-b110-440d-ab5d-780f2776a2c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18030 01898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_buffer.1803001898 |
| Directory | /workspace/40.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_received.602701330 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 199554432 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:35:45 PM PDT 24 |
| Finished | Aug 12 06:35:47 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-e389dd98-edba-48c1-b55a-8d3ba3b513fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60270 1330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_received.602701330 |
| Directory | /workspace/40.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_sent.3734173780 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 204847871 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-77a3b395-fb08-4a47-8e82-55f77dcbe262 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37341 73780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_sent.3734173780 |
| Directory | /workspace/40.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/40.usbdev_random_length_in_transaction.4044297391 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 243755515 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ed79f4bf-a015-43fa-be5d-ab5b54b8eaa0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40442 97391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_in_transaction.4044297391 |
| Directory | /workspace/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_random_length_out_transaction.2522690110 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 200994246 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:35:42 PM PDT 24 |
| Finished | Aug 12 06:35:43 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4f8737a9-8b53-4fa7-9364-fcbf42527b4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25226 90110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2522690110 |
| Directory | /workspace/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_rx_crc_err.2397707335 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 181717248 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-c8b679ec-7a15-4c67-909a-5aeb7d588525 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23977 07335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_rx_crc_err.2397707335 |
| Directory | /workspace/40.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_rx_full.1715462991 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 435760228 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:35:43 PM PDT 24 |
| Finished | Aug 12 06:35:44 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2e5761de-e6df-47f8-bfe8-85b87cd2d325 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17154 62991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_rx_full.1715462991 |
| Directory | /workspace/40.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/40.usbdev_setup_stage.3253933548 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 150359671 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2c8208ec-e6ac-4d74-a2ee-7ed86cf1a14d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32539 33548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_setup_stage.3253933548 |
| Directory | /workspace/40.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/40.usbdev_setup_trans_ignored.3603374198 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 179365478 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-bdb99224-e234-485b-85a8-9fa609c8a5f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36033 74198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_setup_trans_ignored.3603374198 |
| Directory | /workspace/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/40.usbdev_smoke.2401475842 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 187247071 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:36 PM PDT 24 |
| Finished | Aug 12 06:35:37 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-bb0f067b-1eb9-471c-afc2-19fff0cab4cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24014 75842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.2401475842 |
| Directory | /workspace/40.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/40.usbdev_spurious_pids_ignored.870071489 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 3455290280 ps |
| CPU time | 33.53 seconds |
| Started | Aug 12 06:35:53 PM PDT 24 |
| Finished | Aug 12 06:36:27 PM PDT 24 |
| Peak memory | 224132 kb |
| Host | smart-69ec9cbd-53af-4433-a641-9e234ac84323 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=870071489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.870071489 |
| Directory | /workspace/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/40.usbdev_stall_priority_over_nak.716729331 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 172890586 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:35:59 PM PDT 24 |
| Finished | Aug 12 06:36:00 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-06ee9c40-25f1-45f4-a030-37c470b2c714 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71672 9331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.716729331 |
| Directory | /workspace/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/40.usbdev_stall_trans.3165891003 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 163364579 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-922f8375-845f-4d4b-89a7-85caf95c97e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31658 91003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_trans.3165891003 |
| Directory | /workspace/40.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_stream_len_max.3058235061 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 609951811 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:35:47 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a2e56ac6-91a9-49ee-8e74-0b86e80e7b95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30582 35061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.3058235061 |
| Directory | /workspace/40.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/40.usbdev_streaming_out.677741480 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 3321619622 ps |
| CPU time | 32.99 seconds |
| Started | Aug 12 06:35:37 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-b2a24449-35f8-44bf-a169-7723ebd044c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67774 1480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_streaming_out.677741480 |
| Directory | /workspace/40.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/40.usbdev_timeout_missing_host_handshake.4284842717 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 176323114 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:35:45 PM PDT 24 |
| Finished | Aug 12 06:35:46 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-dc7e5978-362c-4f52-9d92-5ab85c5a5c5c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4284842717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_hos t_handshake.4284842717 |
| Directory | /workspace/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/40.usbdev_tx_rx_disruption.3516792677 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 640665461 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:36:03 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-9d96ef18-1a65-4f2e-92e1-c2ed58ba703e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3516792677 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_tx_rx_disruption.3516792677 |
| Directory | /workspace/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/400.usbdev_tx_rx_disruption.1427459617 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 531126714 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:38:15 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-abf61ef2-7e2b-4f05-943a-b82f358941be |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1427459617 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 400.usbdev_tx_rx_disruption.1427459617 |
| Directory | /workspace/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/401.usbdev_tx_rx_disruption.2127878589 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 471389412 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-172909a3-7af5-4412-b7a6-98d600dc8c2c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2127878589 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 401.usbdev_tx_rx_disruption.2127878589 |
| Directory | /workspace/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/402.usbdev_tx_rx_disruption.330184732 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 576196160 ps |
| CPU time | 1.84 seconds |
| Started | Aug 12 06:38:13 PM PDT 24 |
| Finished | Aug 12 06:38:15 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-df6d3b0c-83d7-4332-8bfd-ab8692286f0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=330184732 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 402.usbdev_tx_rx_disruption.330184732 |
| Directory | /workspace/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/403.usbdev_tx_rx_disruption.2449565751 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 476409606 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:38:18 PM PDT 24 |
| Finished | Aug 12 06:38:20 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-f2487d13-ed70-4f21-aebb-12686b1d99e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2449565751 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 403.usbdev_tx_rx_disruption.2449565751 |
| Directory | /workspace/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/404.usbdev_tx_rx_disruption.572340499 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 453388172 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-8a9e0a94-3852-49e0-b1b0-d29ccf75ffe5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=572340499 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 404.usbdev_tx_rx_disruption.572340499 |
| Directory | /workspace/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/405.usbdev_tx_rx_disruption.3132987136 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 499426771 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:38:25 PM PDT 24 |
| Finished | Aug 12 06:38:26 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-31b0c576-6654-49e9-99a8-ed44a1603efa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3132987136 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 405.usbdev_tx_rx_disruption.3132987136 |
| Directory | /workspace/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/406.usbdev_tx_rx_disruption.2842667265 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 531109072 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 06:38:12 PM PDT 24 |
| Finished | Aug 12 06:38:14 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-071cdbd9-68a0-4d5f-acfb-5d57aff4f9aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2842667265 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 406.usbdev_tx_rx_disruption.2842667265 |
| Directory | /workspace/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/407.usbdev_tx_rx_disruption.2936671291 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 540536296 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a3b9d3b3-3674-44fa-9467-2524b36dc54d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2936671291 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 407.usbdev_tx_rx_disruption.2936671291 |
| Directory | /workspace/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/408.usbdev_tx_rx_disruption.1489523318 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 463483656 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:38:33 PM PDT 24 |
| Finished | Aug 12 06:38:35 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-a577ba09-a196-48e8-a435-142028939427 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1489523318 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 408.usbdev_tx_rx_disruption.1489523318 |
| Directory | /workspace/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/409.usbdev_tx_rx_disruption.1172191357 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 472640099 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:02 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-92792e06-4b35-43ae-98e6-6af634345170 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1172191357 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 409.usbdev_tx_rx_disruption.1172191357 |
| Directory | /workspace/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/41.usbdev_alert_test.2943033763 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 39815061 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a8d11643-525f-4c36-b700-87ec1c5be947 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2943033763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.2943033763 |
| Directory | /workspace/41.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_disconnect.3306171563 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 9264250284 ps |
| CPU time | 11.8 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:36:02 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-ba14e062-d8f6-4253-92f7-43be851e3114 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3306171563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_a on_wake_disconnect.3306171563 |
| Directory | /workspace/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_reset.2567376042 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 19512820798 ps |
| CPU time | 23.51 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-558183cc-7003-450c-9511-7463e3aff345 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2567376042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.2567376042 |
| Directory | /workspace/41.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_resume.1673622946 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 31454149603 ps |
| CPU time | 38.88 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:36:35 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-6984b2ee-4871-48f5-b550-b7c569632c22 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1673622946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_a on_wake_resume.1673622946 |
| Directory | /workspace/41.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/41.usbdev_av_buffer.162292899 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 152073970 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:44 PM PDT 24 |
| Finished | Aug 12 06:35:45 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0397da10-d56f-4297-8ac5-fe8196af4854 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16229 2899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_av_buffer.162292899 |
| Directory | /workspace/41.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/41.usbdev_bitstuff_err.942653325 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 151282234 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e3e45889-9779-4a98-9581-542bb18854cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94265 3325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_bitstuff_err.942653325 |
| Directory | /workspace/41.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_data_toggle_clear.4060502567 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 193019529 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:35:58 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-fe74e2ea-ec98-4f1e-861a-5939e0e4655c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40605 02567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_clear.4060502567 |
| Directory | /workspace/41.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/41.usbdev_data_toggle_restore.1744527657 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 400180214 ps |
| CPU time | 1.27 seconds |
| Started | Aug 12 06:35:47 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-bbd34515-12c0-456b-9937-459b1891c72a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1744527657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.1744527657 |
| Directory | /workspace/41.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/41.usbdev_device_address.2575540600 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 40229240374 ps |
| CPU time | 64.1 seconds |
| Started | Aug 12 06:35:43 PM PDT 24 |
| Finished | Aug 12 06:36:47 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-61caca22-49e5-436f-8537-dc1565e048a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25755 40600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.2575540600 |
| Directory | /workspace/41.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/41.usbdev_device_timeout.1784798163 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 6773563885 ps |
| CPU time | 45.63 seconds |
| Started | Aug 12 06:36:14 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-8dc181eb-de73-4ba4-8340-bea701465e61 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1784798163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.1784798163 |
| Directory | /workspace/41.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/41.usbdev_disable_endpoint.2113683616 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 649407384 ps |
| CPU time | 1.88 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-749de206-7f17-486b-8860-40bcf998ae06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21136 83616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_disable_endpoint.2113683616 |
| Directory | /workspace/41.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/41.usbdev_disconnected.1386160544 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 144506573 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:50 PM PDT 24 |
| Peak memory | 207140 kb |
| Host | smart-2e21095c-4567-4bc9-b3bc-1daa00cf2c21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13861 60544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_disconnected.1386160544 |
| Directory | /workspace/41.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/41.usbdev_enable.3273641737 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 37600009 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-4414aac0-fc40-48fa-93be-cb67acf71958 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32736 41737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_enable.3273641737 |
| Directory | /workspace/41.usbdev_enable/latest |
| Test location | /workspace/coverage/default/41.usbdev_endpoint_access.376430266 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 856343069 ps |
| CPU time | 2.31 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-a5402600-1932-4b19-8b43-88d2bef5693c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37643 0266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.376430266 |
| Directory | /workspace/41.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/41.usbdev_endpoint_types.81931780 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 293317853 ps |
| CPU time | 1.23 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-1a749b8f-3905-4261-bd17-a13602827388 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=81931780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.81931780 |
| Directory | /workspace/41.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/41.usbdev_fifo_rst.1276109813 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 248715660 ps |
| CPU time | 1.96 seconds |
| Started | Aug 12 06:35:52 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-ca40e08e-c823-4ed6-a145-f2c45801b874 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12761 09813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_fifo_rst.1276109813 |
| Directory | /workspace/41.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_iso.3236853259 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 216042877 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-3ea1040d-04fe-4ccd-8e5f-90afcd96edec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3236853259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.3236853259 |
| Directory | /workspace/41.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_stall.3902508688 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 152803323 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5c098228-2d85-4c81-b13f-70d0bbb513e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39025 08688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_stall.3902508688 |
| Directory | /workspace/41.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_trans.1186669475 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 166209238 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-b5a4d608-27f5-4c22-bd27-2abab9c2b6bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11866 69475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_trans.1186669475 |
| Directory | /workspace/41.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_invalid_sync.570252841 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 4617948044 ps |
| CPU time | 135.21 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:38:06 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-d5a6bfc4-6713-4583-99b7-426334de39b3 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=570252841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.570252841 |
| Directory | /workspace/41.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/41.usbdev_iso_retraction.252266328 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 15045632675 ps |
| CPU time | 90.54 seconds |
| Started | Aug 12 06:35:44 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-276053b6-0a94-4802-baec-fec4aa94f92e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=252266328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.252266328 |
| Directory | /workspace/41.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_in_err.704142344 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 213593259 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:35:47 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-898adb03-abed-4885-a77c-51e37e3b7869 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70414 2344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_in_err.704142344 |
| Directory | /workspace/41.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_resume.4207918174 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 26738081260 ps |
| CPU time | 47.66 seconds |
| Started | Aug 12 06:36:03 PM PDT 24 |
| Finished | Aug 12 06:36:51 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-965cdee4-7c27-4da9-a3fd-080e6be24d54 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42079 18174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_resume.4207918174 |
| Directory | /workspace/41.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_suspend.523629782 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 8555374682 ps |
| CPU time | 12.39 seconds |
| Started | Aug 12 06:35:57 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-2c48cc1e-4387-48c2-8b96-af8838755f18 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52362 9782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_suspend.523629782 |
| Directory | /workspace/41.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/41.usbdev_low_speed_traffic.2411201154 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 5040255175 ps |
| CPU time | 39.04 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 219152 kb |
| Host | smart-b7ad0cb2-f86c-4d1c-8509-d33bff64996a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2411201154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.2411201154 |
| Directory | /workspace/41.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_inter_pkt_delay.2595039829 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 3072345440 ps |
| CPU time | 30.44 seconds |
| Started | Aug 12 06:35:58 PM PDT 24 |
| Finished | Aug 12 06:36:28 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-3507b5de-870f-4034-a81b-bb4286ab1520 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2595039829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.2595039829 |
| Directory | /workspace/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_length_in_transaction.3397275652 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 240720991 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-47fcd1af-a5ab-409a-a370-02f28d9fc0ca |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3397275652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.3397275652 |
| Directory | /workspace/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_length_out_transaction.1656777024 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 180023679 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:13 PM PDT 24 |
| Finished | Aug 12 06:36:14 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-a06a75d9-4b0e-4aef-96b0-5d9c79db8565 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16567 77024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.1656777024 |
| Directory | /workspace/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_inter_pkt_delay.3764131768 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 2281451872 ps |
| CPU time | 21.49 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 217692 kb |
| Host | smart-6a3d1cac-a8ad-42bf-883e-f8e28955bf9e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3764131768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.3764131768 |
| Directory | /workspace/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_length_in_transaction.107242206 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 153355688 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-c16af0f8-6181-4703-a454-52f4f02518aa |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=107242206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.107242206 |
| Directory | /workspace/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_length_out_transaction.3567561745 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 153428163 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:43 PM PDT 24 |
| Finished | Aug 12 06:35:44 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ed25bbb3-a6f2-4b5d-8edb-065e4fb686ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35675 61745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3567561745 |
| Directory | /workspace/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_nak_trans.1442392513 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 187445364 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6f407b3c-5569-488b-bcdc-54b62ad78974 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14423 92513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_nak_trans.1442392513 |
| Directory | /workspace/41.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_iso.2664584778 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 170577777 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:36:02 PM PDT 24 |
| Finished | Aug 12 06:36:03 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-7ce9d9a2-2444-48b2-bab0-4de269c03314 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26645 84778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_iso.2664584778 |
| Directory | /workspace/41.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_stall.505569157 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 183050856 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-475d5c8c-7c26-4eb1-b0f5-f08f2991c480 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50556 9157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_stall.505569157 |
| Directory | /workspace/41.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_trans_nak.3711408118 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 190669073 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:50 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-81c7d7b9-1d4b-44d2-9ec8-8a1b60538540 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37114 08118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_trans_nak.3711408118 |
| Directory | /workspace/41.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/41.usbdev_pending_in_trans.320080426 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 172400171 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:35:53 PM PDT 24 |
| Finished | Aug 12 06:35:54 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-f6c5aeb9-a309-44cd-a484-61b6f3e7fa34 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32008 0426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pending_in_trans.320080426 |
| Directory | /workspace/41.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_config_pinflip.3040992669 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 201122774 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-fad2f60d-8094-44e8-a0af-ff574399f5be |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3040992669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.3040992669 |
| Directory | /workspace/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_config_usb_ref_disable.2203707205 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 167912511 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a853ab5f-63fc-4224-8b47-7dbb1e600de9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22037 07205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.2203707205 |
| Directory | /workspace/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_pins_sense.39945838 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 36251117 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:36:01 PM PDT 24 |
| Finished | Aug 12 06:36:02 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-a12f065a-a12b-4958-9756-a21164f401f5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39945 838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.39945838 |
| Directory | /workspace/41.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_buffer.4038595450 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 22317911264 ps |
| CPU time | 60.47 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:36:49 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-943c5c4c-a40d-40b6-803d-2f1926df0523 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40385 95450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_buffer.4038595450 |
| Directory | /workspace/41.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_received.3017187496 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 177655772 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-d4b4d384-9f9f-44be-89bb-3114c462e73e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30171 87496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_received.3017187496 |
| Directory | /workspace/41.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_sent.1213956846 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 273244541 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-449cc5b6-6d10-4015-8de6-1d8f6889a3e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12139 56846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_sent.1213956846 |
| Directory | /workspace/41.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/41.usbdev_random_length_in_transaction.1561112149 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 228144635 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-9774424e-3fb4-4c8e-b31a-c58a5c8e8289 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15611 12149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_in_transaction.1561112149 |
| Directory | /workspace/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_random_length_out_transaction.3508161775 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 146150925 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:36:01 PM PDT 24 |
| Finished | Aug 12 06:36:02 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-c81d1c74-9416-42e4-9614-a9bb9d85543c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35081 61775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.3508161775 |
| Directory | /workspace/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_rx_crc_err.236178912 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 178733113 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-ed3f06ea-355c-484b-b39c-476110774424 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23617 8912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_rx_crc_err.236178912 |
| Directory | /workspace/41.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_rx_full.789013016 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 347302572 ps |
| CPU time | 1.24 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-16506927-1879-4364-8804-64c86f634ff7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78901 3016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_rx_full.789013016 |
| Directory | /workspace/41.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/41.usbdev_setup_stage.1236696023 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 247882300 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-5dbcaae5-e17a-4c8a-8acc-e5ada1839737 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12366 96023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_setup_stage.1236696023 |
| Directory | /workspace/41.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/41.usbdev_setup_trans_ignored.2737372341 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 185793969 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:50 PM PDT 24 |
| Peak memory | 207252 kb |
| Host | smart-fe866c22-7508-4328-9755-e8cee0e141d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27373 72341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_setup_trans_ignored.2737372341 |
| Directory | /workspace/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/41.usbdev_smoke.1063609802 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 205383949 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-47a8e269-22d2-4c82-97ec-58487e993e20 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10636 09802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.1063609802 |
| Directory | /workspace/41.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/41.usbdev_spurious_pids_ignored.3683742663 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 3307473067 ps |
| CPU time | 33.23 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:41 PM PDT 24 |
| Peak memory | 224016 kb |
| Host | smart-d03ec4be-9cb1-4956-892d-b6bab3722363 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3683742663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.3683742663 |
| Directory | /workspace/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/41.usbdev_stall_priority_over_nak.2902887753 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 227710976 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-abca9d97-56b5-43ab-b8ff-8d66eeeaaf21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29028 87753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.2902887753 |
| Directory | /workspace/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/41.usbdev_stall_trans.403228664 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 157992986 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a25cb3eb-da6e-41cf-a431-60751d7dc0af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40322 8664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_trans.403228664 |
| Directory | /workspace/41.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_stream_len_max.1665721446 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 1108479371 ps |
| CPU time | 2.76 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-d6b2549f-b848-4d3b-b522-27793f412546 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16657 21446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.1665721446 |
| Directory | /workspace/41.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/41.usbdev_streaming_out.2541104718 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 2248176585 ps |
| CPU time | 62.58 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:37:09 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-228a039b-ef9b-4f65-bf46-7345040954c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25411 04718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_streaming_out.2541104718 |
| Directory | /workspace/41.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/41.usbdev_timeout_missing_host_handshake.1916313800 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 409942812 ps |
| CPU time | 7.38 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-d71da79c-79ef-4db5-9748-db04c1f5d6b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1916313800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_hos t_handshake.1916313800 |
| Directory | /workspace/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/41.usbdev_tx_rx_disruption.1933576561 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 572313949 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:53 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e7f531e0-a4e7-43f0-9175-bddb97e2264a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1933576561 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_tx_rx_disruption.1933576561 |
| Directory | /workspace/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/410.usbdev_tx_rx_disruption.1784070573 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 499265056 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-a46cc024-44e7-4f71-abb0-6886ab56a84a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1784070573 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 410.usbdev_tx_rx_disruption.1784070573 |
| Directory | /workspace/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/411.usbdev_tx_rx_disruption.3867051346 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 492793315 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:23 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-e876d72b-920b-47d3-8c03-a671a0b9cdcc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3867051346 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 411.usbdev_tx_rx_disruption.3867051346 |
| Directory | /workspace/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/412.usbdev_tx_rx_disruption.2673568519 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 608768208 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:38:37 PM PDT 24 |
| Finished | Aug 12 06:38:39 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-79e9145d-c455-4662-82e1-eebd8784f021 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2673568519 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 412.usbdev_tx_rx_disruption.2673568519 |
| Directory | /workspace/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/413.usbdev_tx_rx_disruption.952398557 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 566366519 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:38:16 PM PDT 24 |
| Finished | Aug 12 06:38:18 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-298c717e-16a4-41e6-af5b-4a1e0b4cf68c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=952398557 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 413.usbdev_tx_rx_disruption.952398557 |
| Directory | /workspace/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/414.usbdev_tx_rx_disruption.812023217 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 643382745 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:38:26 PM PDT 24 |
| Finished | Aug 12 06:38:27 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-d9544140-bc2c-4960-88c6-46acc25e00e1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=812023217 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 414.usbdev_tx_rx_disruption.812023217 |
| Directory | /workspace/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/415.usbdev_tx_rx_disruption.463054875 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 495966331 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:38:12 PM PDT 24 |
| Finished | Aug 12 06:38:14 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-4a252218-3c08-4904-84f0-81c9a58b8e86 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=463054875 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 415.usbdev_tx_rx_disruption.463054875 |
| Directory | /workspace/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/416.usbdev_tx_rx_disruption.1586126092 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 450499939 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:38:13 PM PDT 24 |
| Finished | Aug 12 06:38:14 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-75750393-bd80-4bfe-b83e-f5041a430ea6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1586126092 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 416.usbdev_tx_rx_disruption.1586126092 |
| Directory | /workspace/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/417.usbdev_tx_rx_disruption.525789543 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 628149407 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-92fa6ae8-c85b-4b15-9298-543b98036b2d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=525789543 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 417.usbdev_tx_rx_disruption.525789543 |
| Directory | /workspace/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/418.usbdev_tx_rx_disruption.2767949 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 555891646 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:38:14 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b3eeb6cf-d416-4d7d-a9ca-5c9c43e801b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2767949 -assert nopostproc +UVM_TESTN AME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default. vdb -cm_log /dev/null -cm_name 418.usbdev_tx_rx_disruption.2767949 |
| Directory | /workspace/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/419.usbdev_tx_rx_disruption.1141502316 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 704734969 ps |
| CPU time | 1.88 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a0dc64b7-359a-4be8-8aa4-98347d534550 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1141502316 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 419.usbdev_tx_rx_disruption.1141502316 |
| Directory | /workspace/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/42.usbdev_alert_test.883766338 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 57328208 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:35:53 PM PDT 24 |
| Finished | Aug 12 06:35:54 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-911a9563-4b3c-4bb3-877c-5141baa9ad58 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=883766338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.883766338 |
| Directory | /workspace/42.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_disconnect.3915916538 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 4926020239 ps |
| CPU time | 6.73 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:56 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-b5686a4e-a428-4a59-909c-9871d4f5b35d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3915916538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_a on_wake_disconnect.3915916538 |
| Directory | /workspace/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_reset.2082341419 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 14496690426 ps |
| CPU time | 15.87 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:36:04 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-4a704942-03d4-4d66-8f8f-7c0b6977ac51 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2082341419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.2082341419 |
| Directory | /workspace/42.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_resume.3786826342 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 29186844307 ps |
| CPU time | 36.7 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-ca3d9984-ff82-4310-af9c-a189b148e7da |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3786826342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_a on_wake_resume.3786826342 |
| Directory | /workspace/42.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/42.usbdev_av_buffer.3986544318 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 151336327 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-e938ec2b-5f09-40b2-a687-1ddd778ac3cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39865 44318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_av_buffer.3986544318 |
| Directory | /workspace/42.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/42.usbdev_bitstuff_err.1262055560 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 144019678 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:02 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a23c67d6-9507-4096-a2f8-4e8eddd53a85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12620 55560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_bitstuff_err.1262055560 |
| Directory | /workspace/42.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_data_toggle_clear.4293492042 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 421057947 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-ba4383c1-f88e-47a9-bf2f-e53a861db7e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42934 92042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_clear.4293492042 |
| Directory | /workspace/42.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/42.usbdev_data_toggle_restore.83602990 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 449999923 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:12 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-14deddea-862e-48c7-8ef2-bb5bd3ebb548 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=83602990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm line +cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.83602990 |
| Directory | /workspace/42.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/42.usbdev_device_address.1492311558 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 23190423894 ps |
| CPU time | 37.51 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:36:27 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-711df2f0-9043-4595-93c4-43a63f51af33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14923 11558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.1492311558 |
| Directory | /workspace/42.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/42.usbdev_device_timeout.4172843550 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 2885416318 ps |
| CPU time | 19.07 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:36:15 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-0b3c8200-322c-475d-b625-631471c6ab43 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4172843550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.4172843550 |
| Directory | /workspace/42.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/42.usbdev_disable_endpoint.2280013788 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 686289826 ps |
| CPU time | 1.84 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:53 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8ade1e77-04b3-49e9-a7aa-185d9aa595e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22800 13788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disable_endpoint.2280013788 |
| Directory | /workspace/42.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/42.usbdev_disconnected.4153051263 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 140129539 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:35:47 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8f5a77d8-cf8d-46d6-9e8b-1e10fb4e62be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41530 51263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disconnected.4153051263 |
| Directory | /workspace/42.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/42.usbdev_enable.829113730 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 36472561 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-26965c2f-67cd-410a-8501-629ee2b258ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82911 3730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_enable.829113730 |
| Directory | /workspace/42.usbdev_enable/latest |
| Test location | /workspace/coverage/default/42.usbdev_endpoint_access.3247359533 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 974163334 ps |
| CPU time | 2.84 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-dca6edc9-6a47-4460-877d-5c6a4e016e17 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32473 59533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.3247359533 |
| Directory | /workspace/42.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/42.usbdev_endpoint_types.2286581526 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 312100005 ps |
| CPU time | 1.37 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:53 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-df4017b4-890c-48a7-8e23-782fe6048bd5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2286581526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.2286581526 |
| Directory | /workspace/42.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/42.usbdev_fifo_rst.542663150 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 197851259 ps |
| CPU time | 2.04 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:53 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-919977de-3f77-4656-b7ee-d3827962e0b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54266 3150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_fifo_rst.542663150 |
| Directory | /workspace/42.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_iso.3630515056 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 157078168 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-fa0d3c45-9fb8-4e4f-b188-5bac646d9fdc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3630515056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.3630515056 |
| Directory | /workspace/42.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_stall.3676225590 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 173220359 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:12 PM PDT 24 |
| Finished | Aug 12 06:36:13 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-45b05195-9dfe-4aa1-a83b-39e2a9fd7390 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36762 25590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_stall.3676225590 |
| Directory | /workspace/42.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_trans.3140538336 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 220983817 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d1bea9ae-5a54-4fa7-b32c-f4acb0aefb47 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31405 38336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_trans.3140538336 |
| Directory | /workspace/42.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_invalid_sync.1998021241 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 2872696841 ps |
| CPU time | 21.75 seconds |
| Started | Aug 12 06:36:02 PM PDT 24 |
| Finished | Aug 12 06:36:24 PM PDT 24 |
| Peak memory | 224036 kb |
| Host | smart-7ecf3fda-43a5-4efd-b218-7a80d48a8b80 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1998021241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.1998021241 |
| Directory | /workspace/42.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/42.usbdev_iso_retraction.2195697322 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 15307899263 ps |
| CPU time | 97.56 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:37:28 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-42b00a2e-c7db-48cc-92ed-9dd481e2b870 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2195697322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.2195697322 |
| Directory | /workspace/42.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_in_err.641257652 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 241532205 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:35:50 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c3ab1265-0169-42c5-acc9-c886076115a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64125 7652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_in_err.641257652 |
| Directory | /workspace/42.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_resume.3925651977 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 14465276317 ps |
| CPU time | 20.62 seconds |
| Started | Aug 12 06:35:52 PM PDT 24 |
| Finished | Aug 12 06:36:13 PM PDT 24 |
| Peak memory | 207848 kb |
| Host | smart-0c861d64-ff6a-4a2d-895f-9f213fcd9499 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39256 51977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_resume.3925651977 |
| Directory | /workspace/42.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_suspend.2642240284 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 10498078635 ps |
| CPU time | 14.31 seconds |
| Started | Aug 12 06:35:57 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-64db5cf8-8ad3-4cf2-b5a5-dffa8c3c023a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26422 40284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_suspend.2642240284 |
| Directory | /workspace/42.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/42.usbdev_low_speed_traffic.3200611947 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 5272012821 ps |
| CPU time | 52.97 seconds |
| Started | Aug 12 06:35:49 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 218008 kb |
| Host | smart-af11c4af-855f-4592-a37a-b5de71efbe65 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3200611947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.3200611947 |
| Directory | /workspace/42.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_inter_pkt_delay.3338776713 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 1713780191 ps |
| CPU time | 14.51 seconds |
| Started | Aug 12 06:35:46 PM PDT 24 |
| Finished | Aug 12 06:36:01 PM PDT 24 |
| Peak memory | 217444 kb |
| Host | smart-99fb0455-0ead-4268-ad65-ad1ff6a98888 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3338776713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.3338776713 |
| Directory | /workspace/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_length_in_transaction.3867030764 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 243273114 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-b6eefd23-256c-4a2a-8e9a-1e24d7bd76a8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3867030764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.3867030764 |
| Directory | /workspace/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_length_out_transaction.1164490972 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 188130607 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:35:52 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-95371f51-5d37-47ca-80fd-14c6a5d4eb52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11644 90972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.1164490972 |
| Directory | /workspace/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_inter_pkt_delay.529739371 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 2323320463 ps |
| CPU time | 64.91 seconds |
| Started | Aug 12 06:36:12 PM PDT 24 |
| Finished | Aug 12 06:37:17 PM PDT 24 |
| Peak memory | 217368 kb |
| Host | smart-e1ecc7e0-7c50-4de4-bb6b-e03dd2049d67 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=529739371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.529739371 |
| Directory | /workspace/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_length_in_transaction.221550194 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 145665516 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7c782c0f-7513-4e5c-8518-f1530bf311c9 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=221550194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.221550194 |
| Directory | /workspace/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_length_out_transaction.2685479525 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 147938630 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-2aea7f05-8e8d-4712-b7b7-84b9554b004a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26854 79525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.2685479525 |
| Directory | /workspace/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_nak_trans.2364326236 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 254228446 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:36:02 PM PDT 24 |
| Finished | Aug 12 06:36:03 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-3b913f65-b27e-4a24-9b58-1568fcbbb116 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23643 26236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_nak_trans.2364326236 |
| Directory | /workspace/42.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_iso.3738125691 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 198101232 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:49 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1f3992a8-d5b7-42bb-ba06-602967660a99 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37381 25691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_iso.3738125691 |
| Directory | /workspace/42.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_stall.727916796 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 198301972 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:35:54 PM PDT 24 |
| Finished | Aug 12 06:35:55 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-8fa4f6ff-53c3-4cca-9ae5-1eee42feaa02 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72791 6796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_stall.727916796 |
| Directory | /workspace/42.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_trans_nak.2238121902 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 171430685 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:36:14 PM PDT 24 |
| Finished | Aug 12 06:36:20 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-8290c71c-6034-4f0e-ad04-4a7b7beacde0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22381 21902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_trans_nak.2238121902 |
| Directory | /workspace/42.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/42.usbdev_pending_in_trans.1566036213 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 186133585 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:35:52 PM PDT 24 |
| Finished | Aug 12 06:35:53 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-1e238cb1-96a7-4b48-96f6-722a3b20de9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15660 36213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pending_in_trans.1566036213 |
| Directory | /workspace/42.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_config_pinflip.2478670344 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 318591384 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-4769ef70-b3a1-4475-af0d-923d3dade7d2 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2478670344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.2478670344 |
| Directory | /workspace/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_config_usb_ref_disable.4109546364 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 150614842 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:35:58 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4c8cf7f2-ed09-4e47-952b-5b091bac309c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41095 46364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.4109546364 |
| Directory | /workspace/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_pins_sense.3709833842 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 61152109 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-f92a29ae-c51d-4524-b8ab-57b3b5b7376a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37098 33842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.3709833842 |
| Directory | /workspace/42.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_buffer.2592053882 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 10230731459 ps |
| CPU time | 26.11 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:36:17 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-917bd470-3462-4057-84c8-301217de1de4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25920 53882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_buffer.2592053882 |
| Directory | /workspace/42.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_received.3222898757 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 202307772 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:36:16 PM PDT 24 |
| Finished | Aug 12 06:36:17 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-bba30cf1-057a-4db7-9cf1-4a45abe1de84 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32228 98757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_received.3222898757 |
| Directory | /workspace/42.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_sent.3002647172 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 233565076 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-33b4473c-5e89-4aa8-9277-9805367cf267 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30026 47172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_sent.3002647172 |
| Directory | /workspace/42.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/42.usbdev_random_length_in_transaction.2844193592 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 176270584 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-8f6e17ce-4eb4-4336-ac76-bbe0b8eeed7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28441 93592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_in_transaction.2844193592 |
| Directory | /workspace/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_random_length_out_transaction.2904198812 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 188061326 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-458ca3b6-b6dd-4521-9c8a-6d8ac85bfc00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29041 98812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.2904198812 |
| Directory | /workspace/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_rx_crc_err.1692207210 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 186996002 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:02 PM PDT 24 |
| Finished | Aug 12 06:36:03 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-250ec3ec-2caa-4045-b362-0cb7515deaa1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16922 07210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_rx_crc_err.1692207210 |
| Directory | /workspace/42.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_rx_full.3329416924 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 318726939 ps |
| CPU time | 1.17 seconds |
| Started | Aug 12 06:36:03 PM PDT 24 |
| Finished | Aug 12 06:36:04 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d934a35e-4fd6-4247-9412-8ab2060c5241 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33294 16924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_rx_full.3329416924 |
| Directory | /workspace/42.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/42.usbdev_setup_stage.610043561 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 164256933 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-303ad0b8-596c-4d46-a8a2-e4c838f585b0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61004 3561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_setup_stage.610043561 |
| Directory | /workspace/42.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/42.usbdev_setup_trans_ignored.2345012491 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 172038601 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:47 PM PDT 24 |
| Finished | Aug 12 06:35:48 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-0d6f6c51-0d40-4aa2-a444-3634aa4157be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23450 12491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_setup_trans_ignored.2345012491 |
| Directory | /workspace/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/42.usbdev_smoke.2279278340 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 243665301 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:35:50 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4294a3fb-8a48-42cb-a307-be16381d3e35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22792 78340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2279278340 |
| Directory | /workspace/42.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/42.usbdev_spurious_pids_ignored.691263637 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 2438683385 ps |
| CPU time | 24.35 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:35 PM PDT 24 |
| Peak memory | 217840 kb |
| Host | smart-8e9f9ca6-f2da-4cdc-b0a5-801aa7fb4894 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=691263637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.691263637 |
| Directory | /workspace/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/42.usbdev_stall_priority_over_nak.2380244322 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 227964268 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:35:52 PM PDT 24 |
| Finished | Aug 12 06:35:53 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-6ca6d79f-805d-4c9a-9510-7f2c9690b9d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23802 44322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.2380244322 |
| Directory | /workspace/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/42.usbdev_stall_trans.1749723984 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 199256198 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:35:57 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-2259587c-94e0-4c9b-9ca6-d662ddc8a111 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17497 23984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_trans.1749723984 |
| Directory | /workspace/42.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_stream_len_max.3678390712 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 1139588147 ps |
| CPU time | 2.66 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:35:51 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-c3672dd5-16a3-41b4-bfff-132a1fd6e363 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36783 90712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.3678390712 |
| Directory | /workspace/42.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/42.usbdev_streaming_out.3051724397 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 2516406179 ps |
| CPU time | 74.77 seconds |
| Started | Aug 12 06:35:48 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-4bbd73d5-2b74-4a21-a9a7-8f4f7900f741 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30517 24397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_streaming_out.3051724397 |
| Directory | /workspace/42.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/42.usbdev_timeout_missing_host_handshake.912108755 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 3923467639 ps |
| CPU time | 32.61 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:37 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-18945ff2-fbb6-4df3-a6fb-44b9e6a014e1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=912108755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host _handshake.912108755 |
| Directory | /workspace/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/42.usbdev_tx_rx_disruption.4171438284 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 486585539 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:36:02 PM PDT 24 |
| Finished | Aug 12 06:36:04 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-1ee592b1-f79b-48f9-bb73-6e0a1eb914ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4171438284 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_tx_rx_disruption.4171438284 |
| Directory | /workspace/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/420.usbdev_tx_rx_disruption.3999568626 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 456830605 ps |
| CPU time | 1.36 seconds |
| Started | Aug 12 06:38:07 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-1cade782-f51f-4c83-9bfa-7f8e1f86652d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3999568626 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 420.usbdev_tx_rx_disruption.3999568626 |
| Directory | /workspace/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/421.usbdev_tx_rx_disruption.3882605435 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 574119961 ps |
| CPU time | 1.73 seconds |
| Started | Aug 12 06:38:24 PM PDT 24 |
| Finished | Aug 12 06:38:26 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3727364e-4dd1-4446-9d57-805d1e397443 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3882605435 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 421.usbdev_tx_rx_disruption.3882605435 |
| Directory | /workspace/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/422.usbdev_tx_rx_disruption.2091551905 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 576839861 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:38:26 PM PDT 24 |
| Finished | Aug 12 06:38:28 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-3d488b6e-75e8-4233-a0d1-3503fa8b1f0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2091551905 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 422.usbdev_tx_rx_disruption.2091551905 |
| Directory | /workspace/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/423.usbdev_tx_rx_disruption.90111946 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 452141341 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:38:26 PM PDT 24 |
| Finished | Aug 12 06:38:28 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bea36241-fd9a-4661-be50-7a860a269275 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90111946 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 423.usbdev_tx_rx_disruption.90111946 |
| Directory | /workspace/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/424.usbdev_tx_rx_disruption.670550838 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 601321880 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:38:12 PM PDT 24 |
| Finished | Aug 12 06:38:14 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-2604acd7-6a3e-4b2a-853d-e32b28ece1b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=670550838 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 424.usbdev_tx_rx_disruption.670550838 |
| Directory | /workspace/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/425.usbdev_tx_rx_disruption.1654069194 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 473410225 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-1b885fb8-7fa8-47f7-bcbb-422bd2280da9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1654069194 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 425.usbdev_tx_rx_disruption.1654069194 |
| Directory | /workspace/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/426.usbdev_tx_rx_disruption.69855118 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 636736214 ps |
| CPU time | 1.8 seconds |
| Started | Aug 12 06:38:02 PM PDT 24 |
| Finished | Aug 12 06:38:04 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-1607937c-84fd-454c-b3fb-c537fefeace8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69855118 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 426.usbdev_tx_rx_disruption.69855118 |
| Directory | /workspace/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/427.usbdev_tx_rx_disruption.2600089596 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 534288631 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:38:20 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-42e171f9-d97d-4a03-92c2-0e3196c231f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2600089596 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 427.usbdev_tx_rx_disruption.2600089596 |
| Directory | /workspace/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/428.usbdev_tx_rx_disruption.3700777988 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 462108327 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-7a4419a6-d10d-4586-a15e-8ad02a6fadf6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3700777988 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 428.usbdev_tx_rx_disruption.3700777988 |
| Directory | /workspace/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/429.usbdev_tx_rx_disruption.1563897096 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 718617887 ps |
| CPU time | 2 seconds |
| Started | Aug 12 06:38:14 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-303f8271-f5fe-41c2-b977-9db987a30c27 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1563897096 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 429.usbdev_tx_rx_disruption.1563897096 |
| Directory | /workspace/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/43.usbdev_alert_test.1248053960 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 56511905 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-63921712-1691-4b54-937a-50c83b66c589 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1248053960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.1248053960 |
| Directory | /workspace/43.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_disconnect.3127245124 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 11555744933 ps |
| CPU time | 14.09 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:24 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-8c462f4e-9f68-439c-8802-a2c614790dca |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3127245124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_a on_wake_disconnect.3127245124 |
| Directory | /workspace/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_reset.115441038 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 20579912898 ps |
| CPU time | 29.95 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:40 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-03954e79-9667-4dbe-ab6b-c46fe47e0c06 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=115441038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.115441038 |
| Directory | /workspace/43.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_resume.295097491 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 29773345695 ps |
| CPU time | 44.66 seconds |
| Started | Aug 12 06:35:51 PM PDT 24 |
| Finished | Aug 12 06:36:36 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-a2662545-2b0e-4fd3-beb5-af071828f9e3 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=295097491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_ao n_wake_resume.295097491 |
| Directory | /workspace/43.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/43.usbdev_av_buffer.2226906615 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 188995777 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:00 PM PDT 24 |
| Finished | Aug 12 06:36:01 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-44a34c1a-2811-4e0b-9b44-75394c98a319 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22269 06615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_av_buffer.2226906615 |
| Directory | /workspace/43.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/43.usbdev_bitstuff_err.2206569198 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 149805045 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7e46da5a-ecf4-4cde-a838-07d54ddfc693 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22065 69198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_bitstuff_err.2206569198 |
| Directory | /workspace/43.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_data_toggle_clear.919722361 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 485220529 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-28a84770-f196-45ea-a383-49b4aed88704 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91972 2361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_clear.919722361 |
| Directory | /workspace/43.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/43.usbdev_data_toggle_restore.2037569129 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 909797307 ps |
| CPU time | 2.41 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:12 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-ace029fa-466f-4ee6-8bef-d75d2151856f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2037569129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.2037569129 |
| Directory | /workspace/43.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/43.usbdev_device_address.2061731171 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 45890588481 ps |
| CPU time | 67.18 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:37:16 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-943a02d2-72af-4514-b1e1-0cd5c5993da7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20617 31171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.2061731171 |
| Directory | /workspace/43.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/43.usbdev_device_timeout.3640047013 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 1559878584 ps |
| CPU time | 13.09 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:28 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-059ff126-96c8-4064-bf87-de8f2da868c5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3640047013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.3640047013 |
| Directory | /workspace/43.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/43.usbdev_disable_endpoint.3287856422 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 479453851 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-710faae3-2ac4-425b-b816-9cdac223e898 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32878 56422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_disable_endpoint.3287856422 |
| Directory | /workspace/43.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/43.usbdev_disconnected.3262651190 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 196386193 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-c0466b7b-a646-42a0-8c13-1f2e34c99f19 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32626 51190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_disconnected.3262651190 |
| Directory | /workspace/43.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/43.usbdev_enable.2105306242 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 66251567 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-8f24037c-e79b-41e3-83ed-07734b7eb8c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21053 06242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_enable.2105306242 |
| Directory | /workspace/43.usbdev_enable/latest |
| Test location | /workspace/coverage/default/43.usbdev_endpoint_access.428755286 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 1074298801 ps |
| CPU time | 2.82 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-3eafa7bf-c074-4349-89ef-59737b101cdc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42875 5286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.428755286 |
| Directory | /workspace/43.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/43.usbdev_endpoint_types.179312504 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 185950970 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:13 PM PDT 24 |
| Finished | Aug 12 06:36:15 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-1826bc9d-8428-4765-8f4e-0883d03eb4c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=179312504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.179312504 |
| Directory | /workspace/43.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/43.usbdev_fifo_rst.1585308963 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 291765945 ps |
| CPU time | 1.8 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-7c6004f3-e171-43cd-a940-9448a3ade66f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15853 08963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_fifo_rst.1585308963 |
| Directory | /workspace/43.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_iso.2758455900 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 235962843 ps |
| CPU time | 1.19 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-4651d250-4177-4cde-b478-baa412353131 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2758455900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.2758455900 |
| Directory | /workspace/43.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_stall.3908301863 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 159951818 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:00 PM PDT 24 |
| Finished | Aug 12 06:36:01 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-5242dd5f-7e5f-46fb-9588-e280133afde0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39083 01863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_stall.3908301863 |
| Directory | /workspace/43.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_trans.194918578 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 190216895 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:36:11 PM PDT 24 |
| Finished | Aug 12 06:36:12 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-86a66517-3340-4596-97b5-4f9c53e5994c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19491 8578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_trans.194918578 |
| Directory | /workspace/43.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_invalid_sync.2013810682 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 2452836703 ps |
| CPU time | 25.45 seconds |
| Started | Aug 12 06:36:22 PM PDT 24 |
| Finished | Aug 12 06:36:47 PM PDT 24 |
| Peak memory | 217860 kb |
| Host | smart-b17e19d4-523a-4b84-98db-ba656a9b2df1 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2013810682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.2013810682 |
| Directory | /workspace/43.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/43.usbdev_iso_retraction.389227984 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 6617023629 ps |
| CPU time | 48.83 seconds |
| Started | Aug 12 06:35:56 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-83efa5a4-bc70-495f-9ce5-aa865c0576bb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=389227984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.389227984 |
| Directory | /workspace/43.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_in_err.4274864150 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 171326417 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-796f9499-cf7a-45e7-8b7d-28047cf1cf07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42748 64150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_in_err.4274864150 |
| Directory | /workspace/43.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_resume.1032009187 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 11448070138 ps |
| CPU time | 15.67 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:26 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-1ac3967a-4306-4446-abe1-0b536d49b941 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10320 09187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_resume.1032009187 |
| Directory | /workspace/43.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_suspend.3272152090 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 10556597591 ps |
| CPU time | 13.77 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:22 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-d6cb92a4-a4c5-4f33-9f55-9d0c3e4e5aa1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32721 52090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_suspend.3272152090 |
| Directory | /workspace/43.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/43.usbdev_low_speed_traffic.2614034599 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 4777557800 ps |
| CPU time | 36.2 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-6bfcd32d-f907-4e7a-9b91-39850a766c26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2614034599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.2614034599 |
| Directory | /workspace/43.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_inter_pkt_delay.2386088321 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 2144347205 ps |
| CPU time | 20.41 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 216584 kb |
| Host | smart-2a3593cd-cee3-4883-a638-622fe63ba556 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2386088321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.2386088321 |
| Directory | /workspace/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_length_in_transaction.914792772 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 243150301 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:35:53 PM PDT 24 |
| Finished | Aug 12 06:35:54 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-4a30bf08-5971-41bd-92c5-09bed3b77b9b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=914792772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.914792772 |
| Directory | /workspace/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_length_out_transaction.2013767027 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 237567580 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-cf344daf-c9cc-4a6a-9f21-801d5435d8fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20137 67027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.2013767027 |
| Directory | /workspace/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_inter_pkt_delay.4220977607 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 2109129721 ps |
| CPU time | 21.51 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:31 PM PDT 24 |
| Peak memory | 224044 kb |
| Host | smart-a6b0066a-ab37-473e-b218-b451efb30e54 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4220977607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.4220977607 |
| Directory | /workspace/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_length_in_transaction.928351918 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 158363211 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c34c0c1e-9675-4d1f-9799-b700bc94a487 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=928351918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.928351918 |
| Directory | /workspace/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_length_out_transaction.1464086674 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 145305328 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-f834d1d9-d270-473f-86f2-5cdbe98820ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14640 86674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.1464086674 |
| Directory | /workspace/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_nak_trans.864914667 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 204378788 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:35:54 PM PDT 24 |
| Finished | Aug 12 06:35:55 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-6a6a4a16-abc7-46c6-9ac6-f780cedc0897 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86491 4667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_nak_trans.864914667 |
| Directory | /workspace/43.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_iso.2413394424 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 210417374 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:19 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-3c291398-c5f7-4998-a883-2aec72376879 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24133 94424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_iso.2413394424 |
| Directory | /workspace/43.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_stall.4216249685 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 156453125 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1c8903de-6708-4e98-9649-127bccb341f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42162 49685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_stall.4216249685 |
| Directory | /workspace/43.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_trans_nak.3690790046 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 198719569 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:15 PM PDT 24 |
| Finished | Aug 12 06:36:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-8f9bc6dd-dd13-4c07-9e7d-2866e6d436c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36907 90046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_trans_nak.3690790046 |
| Directory | /workspace/43.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/43.usbdev_pending_in_trans.1532543081 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 150211127 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:36:18 PM PDT 24 |
| Finished | Aug 12 06:36:19 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-51095a86-3d74-4891-8fbc-ee5043f59bfe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15325 43081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pending_in_trans.1532543081 |
| Directory | /workspace/43.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_config_pinflip.379813922 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 220508858 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e8910dcb-456c-4754-ab1a-351a1288138f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=379813922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.379813922 |
| Directory | /workspace/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_config_usb_ref_disable.2387938346 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 138562423 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-50de1a77-be7a-4495-8fb7-58c5a0bba52b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23879 38346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.2387938346 |
| Directory | /workspace/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_pins_sense.1348297370 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 76958459 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:36:17 PM PDT 24 |
| Finished | Aug 12 06:36:18 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ab502762-731d-419e-9225-fea0306c31ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13482 97370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.1348297370 |
| Directory | /workspace/43.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_buffer.598392490 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 18134971579 ps |
| CPU time | 44.29 seconds |
| Started | Aug 12 06:36:22 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-a2accc67-fb57-46ec-a897-45e14c404f3b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59839 2490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_buffer.598392490 |
| Directory | /workspace/43.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_received.4260620984 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 153824266 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-233719cd-0f45-4de3-938e-f09fba5df3e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42606 20984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_received.4260620984 |
| Directory | /workspace/43.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_sent.3421286498 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 169899869 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-1c01bbe0-e382-444f-9a31-a69d2e35578d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34212 86498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_sent.3421286498 |
| Directory | /workspace/43.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/43.usbdev_random_length_in_transaction.3146045600 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 167319177 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-095edd9b-a121-4c88-9358-9eb8f96542e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31460 45600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_in_transaction.3146045600 |
| Directory | /workspace/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_random_length_out_transaction.4050574565 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 178910256 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:36:21 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-50b3a337-6dce-43c1-b7de-57cdb518f341 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40505 74565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.4050574565 |
| Directory | /workspace/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_rx_crc_err.2738792955 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 148448052 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-496a0e78-d33d-4309-8a64-d998334761b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27387 92955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_rx_crc_err.2738792955 |
| Directory | /workspace/43.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_rx_full.2292773229 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 249643181 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-2f40d87d-aa7e-47ec-a5bd-935bc58372c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22927 73229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_rx_full.2292773229 |
| Directory | /workspace/43.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/43.usbdev_setup_stage.2931782159 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 155858487 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:36:21 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-8855f8df-3619-4e1e-918f-b1f2f2ab4d0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29317 82159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_setup_stage.2931782159 |
| Directory | /workspace/43.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/43.usbdev_setup_trans_ignored.3644425511 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 147633310 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:36:15 PM PDT 24 |
| Finished | Aug 12 06:36:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-0baca8a6-ed10-4028-ba6e-fe886051732f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36444 25511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_setup_trans_ignored.3644425511 |
| Directory | /workspace/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/43.usbdev_smoke.1071415681 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 239279143 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c687ca52-623b-48df-a2c4-29867eb84cb4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10714 15681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.1071415681 |
| Directory | /workspace/43.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/43.usbdev_spurious_pids_ignored.3391232786 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 3422138252 ps |
| CPU time | 33.46 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 224060 kb |
| Host | smart-f5b15958-22cd-46cc-a561-9acb2053073c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3391232786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.3391232786 |
| Directory | /workspace/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/43.usbdev_stall_priority_over_nak.141228649 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 172559881 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-07a4fd8c-2d12-4639-9b92-96899caa77e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14122 8649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.141228649 |
| Directory | /workspace/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/43.usbdev_stall_trans.48997997 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 150894585 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:14 PM PDT 24 |
| Finished | Aug 12 06:36:15 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4160fb28-1a69-48e1-89ff-d43fea6962ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48997 997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_trans.48997997 |
| Directory | /workspace/43.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_stream_len_max.4032077171 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 580637569 ps |
| CPU time | 1.78 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-94111cc6-4082-4382-b928-45c3b09cbb5b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40320 77171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.4032077171 |
| Directory | /workspace/43.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/43.usbdev_streaming_out.1187537501 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 2120182399 ps |
| CPU time | 61.85 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 216928 kb |
| Host | smart-a36b97a2-cbed-4f04-b5d3-1971195ba216 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11875 37501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_streaming_out.1187537501 |
| Directory | /workspace/43.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/43.usbdev_timeout_missing_host_handshake.3296922242 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 4968921770 ps |
| CPU time | 32.31 seconds |
| Started | Aug 12 06:35:53 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-7610da36-d023-4c64-a985-f58799a467be |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3296922242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_hos t_handshake.3296922242 |
| Directory | /workspace/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/43.usbdev_tx_rx_disruption.826629732 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 616084580 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:36:13 PM PDT 24 |
| Finished | Aug 12 06:36:15 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-968e0e8f-84da-4db9-96d6-9bf07908d9ce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=826629732 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 43.usbdev_tx_rx_disruption.826629732 |
| Directory | /workspace/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/430.usbdev_tx_rx_disruption.2505058497 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 501557262 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:38:23 PM PDT 24 |
| Finished | Aug 12 06:38:25 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-73690bcb-28f7-4f96-b92b-4be233dbb883 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2505058497 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 430.usbdev_tx_rx_disruption.2505058497 |
| Directory | /workspace/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/431.usbdev_tx_rx_disruption.3253227411 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 448398891 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:38:07 PM PDT 24 |
| Finished | Aug 12 06:38:08 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-4d29357d-0436-44fe-93a3-3296bb2b1324 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3253227411 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 431.usbdev_tx_rx_disruption.3253227411 |
| Directory | /workspace/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/432.usbdev_tx_rx_disruption.1047066621 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 537341690 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:38:17 PM PDT 24 |
| Finished | Aug 12 06:38:18 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a4d8ed92-2439-47b7-ad67-e737be990722 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1047066621 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 432.usbdev_tx_rx_disruption.1047066621 |
| Directory | /workspace/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/433.usbdev_tx_rx_disruption.1934094403 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 525432805 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:07 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-4bf4da56-9e51-4c89-904a-33bc7468f1b8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1934094403 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 433.usbdev_tx_rx_disruption.1934094403 |
| Directory | /workspace/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/434.usbdev_tx_rx_disruption.2180444090 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 719125414 ps |
| CPU time | 1.9 seconds |
| Started | Aug 12 06:38:20 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-66273d35-8e50-4a3c-a150-50526846d895 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2180444090 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 434.usbdev_tx_rx_disruption.2180444090 |
| Directory | /workspace/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/435.usbdev_tx_rx_disruption.2869600908 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 535902439 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:38:33 PM PDT 24 |
| Finished | Aug 12 06:38:35 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d2188950-cd09-45d6-93e4-9520bae63be3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2869600908 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 435.usbdev_tx_rx_disruption.2869600908 |
| Directory | /workspace/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/436.usbdev_tx_rx_disruption.973289827 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 589738048 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:38:14 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7bbddbac-1aeb-40cc-a27b-0fd6f67500dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=973289827 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 436.usbdev_tx_rx_disruption.973289827 |
| Directory | /workspace/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/437.usbdev_tx_rx_disruption.3155869125 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 429991516 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3d95badd-2c75-4cc6-a841-52547cf49487 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3155869125 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 437.usbdev_tx_rx_disruption.3155869125 |
| Directory | /workspace/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/438.usbdev_tx_rx_disruption.1625551294 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 556623708 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:38:22 PM PDT 24 |
| Finished | Aug 12 06:38:24 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-9b12bf46-f54f-4ce8-9391-e084d8ba17ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1625551294 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 438.usbdev_tx_rx_disruption.1625551294 |
| Directory | /workspace/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/439.usbdev_tx_rx_disruption.1730037321 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 596823230 ps |
| CPU time | 1.75 seconds |
| Started | Aug 12 06:38:12 PM PDT 24 |
| Finished | Aug 12 06:38:14 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-dab7c981-7b6f-4638-ad04-4094c593f61c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1730037321 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 439.usbdev_tx_rx_disruption.1730037321 |
| Directory | /workspace/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/44.usbdev_alert_test.1795182862 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 39596699 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:36:32 PM PDT 24 |
| Finished | Aug 12 06:36:32 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4ab2e0ab-98c6-4c61-bd03-829b5f9491e2 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1795182862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.1795182862 |
| Directory | /workspace/44.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_disconnect.497378701 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 12018757946 ps |
| CPU time | 14.9 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:24 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-d52a8935-e262-456c-8ea2-95475f61b373 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=497378701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_ao n_wake_disconnect.497378701 |
| Directory | /workspace/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_reset.2558038600 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 20123115952 ps |
| CPU time | 23.95 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:36:49 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-26d9d760-a51c-4814-b4de-1ea470e5effe |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2558038600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.2558038600 |
| Directory | /workspace/44.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_resume.2462175827 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 24717416558 ps |
| CPU time | 31.7 seconds |
| Started | Aug 12 06:36:36 PM PDT 24 |
| Finished | Aug 12 06:37:08 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-cde90204-2049-4c52-82bb-c6035191de52 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2462175827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_a on_wake_resume.2462175827 |
| Directory | /workspace/44.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/44.usbdev_av_buffer.106453597 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 173029933 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:24 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d955dcf1-3b6d-4aa6-9266-53567450095a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10645 3597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_av_buffer.106453597 |
| Directory | /workspace/44.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/44.usbdev_bitstuff_err.1597688111 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 167985903 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:26 PM PDT 24 |
| Finished | Aug 12 06:36:27 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3787c987-e892-413b-9c72-cb813aebff87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15976 88111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_bitstuff_err.1597688111 |
| Directory | /workspace/44.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_data_toggle_clear.1595609054 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 501393596 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:36:21 PM PDT 24 |
| Finished | Aug 12 06:36:23 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9ddc52fe-3254-465d-8b30-ff39b00326fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15956 09054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_clear.1595609054 |
| Directory | /workspace/44.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/44.usbdev_data_toggle_restore.3725049624 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 1246854923 ps |
| CPU time | 3.41 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:14 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-eb3fb1f0-ef26-4236-8ad8-74ba534937be |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3725049624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.3725049624 |
| Directory | /workspace/44.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/44.usbdev_device_address.3190556095 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 39393857832 ps |
| CPU time | 56.94 seconds |
| Started | Aug 12 06:36:22 PM PDT 24 |
| Finished | Aug 12 06:37:19 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-64783a83-19df-4c55-a7d5-8a374e29a17b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31905 56095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.3190556095 |
| Directory | /workspace/44.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/44.usbdev_device_timeout.1435380783 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 2506578905 ps |
| CPU time | 20.96 seconds |
| Started | Aug 12 06:36:11 PM PDT 24 |
| Finished | Aug 12 06:36:32 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-a6c8ad5d-255c-48c4-a111-58482a4d6b01 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1435380783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.1435380783 |
| Directory | /workspace/44.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/44.usbdev_disable_endpoint.2789046947 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 717021727 ps |
| CPU time | 1.85 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:36:22 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3d82606a-df04-4ddf-9476-1477b0943349 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27890 46947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_disable_endpoint.2789046947 |
| Directory | /workspace/44.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/44.usbdev_disconnected.3661632700 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 144712595 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-63f84524-4853-40bf-bf76-2928b50b9f98 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36616 32700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_disconnected.3661632700 |
| Directory | /workspace/44.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/44.usbdev_enable.3162800483 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 35511807 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:36:00 PM PDT 24 |
| Finished | Aug 12 06:36:00 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-df012c82-c89d-45f7-8b1c-0499486e1796 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31628 00483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_enable.3162800483 |
| Directory | /workspace/44.usbdev_enable/latest |
| Test location | /workspace/coverage/default/44.usbdev_endpoint_access.2019064375 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 780381042 ps |
| CPU time | 2.05 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-70dc1b96-3990-414b-a5bd-020285135e9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20190 64375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.2019064375 |
| Directory | /workspace/44.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/44.usbdev_endpoint_types.1398190102 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 287344414 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:36:01 PM PDT 24 |
| Finished | Aug 12 06:36:03 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-acc7c3f3-d472-4c17-9117-5222f167f111 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1398190102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.1398190102 |
| Directory | /workspace/44.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/44.usbdev_fifo_rst.141045593 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 220028952 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-58dd7e04-45a5-42e0-a805-694769b1380d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14104 5593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_fifo_rst.141045593 |
| Directory | /workspace/44.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_iso.1651330925 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 160585287 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:24 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-b46a6791-c931-47d4-ba30-543ec4153822 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1651330925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.1651330925 |
| Directory | /workspace/44.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_stall.1525564162 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 142533985 ps |
| CPU time | 0.79 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7f8b0da5-85c9-4059-9f6a-b5c5453942ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15255 64162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_stall.1525564162 |
| Directory | /workspace/44.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_trans.1719560268 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 160587491 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-78467f49-9720-407a-aa20-a1d731082fc1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17195 60268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_trans.1719560268 |
| Directory | /workspace/44.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_invalid_sync.3081580343 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 3394591606 ps |
| CPU time | 27.11 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:35 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-e808facf-3278-428c-9763-cb6c91ec0d6f |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3081580343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.3081580343 |
| Directory | /workspace/44.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/44.usbdev_iso_retraction.1729837890 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 9601683394 ps |
| CPU time | 72.91 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:37:18 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-ad60ecea-978e-4245-ae16-995f2fc0241e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1729837890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.1729837890 |
| Directory | /workspace/44.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_in_err.2631830955 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 196700609 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-0096b8d4-41dd-4fa1-9505-f897900ac766 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26318 30955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_in_err.2631830955 |
| Directory | /workspace/44.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_resume.1613933953 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 13687348610 ps |
| CPU time | 19.74 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:28 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-40df8671-ca69-4d43-9279-f56d83b183b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16139 33953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_resume.1613933953 |
| Directory | /workspace/44.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_suspend.2861700117 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 9073900824 ps |
| CPU time | 11.46 seconds |
| Started | Aug 12 06:36:03 PM PDT 24 |
| Finished | Aug 12 06:36:14 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-de13b66c-96a5-4809-b9a1-de01425945e8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28617 00117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_suspend.2861700117 |
| Directory | /workspace/44.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/44.usbdev_low_speed_traffic.3130873007 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 5005536626 ps |
| CPU time | 52.55 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-329e2ec8-85d4-4844-bfd7-b899c7d9a6db |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3130873007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.3130873007 |
| Directory | /workspace/44.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_inter_pkt_delay.619369068 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 2494012886 ps |
| CPU time | 19.35 seconds |
| Started | Aug 12 06:36:16 PM PDT 24 |
| Finished | Aug 12 06:36:36 PM PDT 24 |
| Peak memory | 217184 kb |
| Host | smart-1c6a9d64-6c14-4614-bcd9-6b5fff42c809 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=619369068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.619369068 |
| Directory | /workspace/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_length_in_transaction.647418466 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 270532147 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:35:57 PM PDT 24 |
| Finished | Aug 12 06:35:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-37da5112-d912-4c36-99e8-c5e352e93cab |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=647418466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.647418466 |
| Directory | /workspace/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_length_out_transaction.4081512981 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 187074892 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-7807eabf-1c7f-4211-a48a-79a43bb0d981 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40815 12981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.4081512981 |
| Directory | /workspace/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_inter_pkt_delay.747552599 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 2730881473 ps |
| CPU time | 79.57 seconds |
| Started | Aug 12 06:36:16 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-f7d1cbb4-e073-47b7-91d4-f86e169f901a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=747552599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.747552599 |
| Directory | /workspace/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_length_in_transaction.4065716089 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 185209347 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:11 PM PDT 24 |
| Finished | Aug 12 06:36:12 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-4e6ac023-87af-4880-be41-bfd38cdc42f7 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4065716089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.4065716089 |
| Directory | /workspace/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_length_out_transaction.4240794855 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 174384645 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-40e4e0e8-ffd0-4038-b0ba-738beb7ad277 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42407 94855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.4240794855 |
| Directory | /workspace/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_nak_trans.2835220042 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 202671734 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:13 PM PDT 24 |
| Finished | Aug 12 06:36:14 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-f4fa5110-94a2-423a-a1e9-eecc3fa844da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28352 20042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_nak_trans.2835220042 |
| Directory | /workspace/44.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_iso.4142700803 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 179993325 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:36:05 PM PDT 24 |
| Finished | Aug 12 06:36:06 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f2102336-ae24-4658-aa81-3b0474a4dae6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41427 00803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_iso.4142700803 |
| Directory | /workspace/44.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_stall.2039676576 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 171293954 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:36 PM PDT 24 |
| Finished | Aug 12 06:36:37 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-28e969c4-c516-4075-9326-7028fb87f449 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20396 76576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_stall.2039676576 |
| Directory | /workspace/44.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_trans_nak.1899291779 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 214601347 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-b0d736e3-138b-413a-99a4-66c427cc81ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18992 91779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_trans_nak.1899291779 |
| Directory | /workspace/44.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/44.usbdev_pending_in_trans.2667785197 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 155219734 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:05 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d15622f6-55fe-4227-baa6-fdc0a410d2f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26677 85197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pending_in_trans.2667785197 |
| Directory | /workspace/44.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_config_pinflip.1733288655 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 250344937 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0d7a5424-7232-47e3-8cf8-fe4cf977de19 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1733288655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.1733288655 |
| Directory | /workspace/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_config_usb_ref_disable.2408329995 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 178306497 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:10 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-49d43500-83f1-4752-8789-aba9d27dfea3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24083 29995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.2408329995 |
| Directory | /workspace/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_pins_sense.478786988 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 49096091 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:35:59 PM PDT 24 |
| Finished | Aug 12 06:36:00 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-906b9404-2a4f-48ac-bea7-380441e2da7c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47878 6988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.478786988 |
| Directory | /workspace/44.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_buffer.2051198803 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 8017719888 ps |
| CPU time | 22.18 seconds |
| Started | Aug 12 06:36:16 PM PDT 24 |
| Finished | Aug 12 06:36:39 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-0df2c80f-675e-4c90-959b-1459b51682a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20511 98803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_buffer.2051198803 |
| Directory | /workspace/44.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_received.2620981235 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 172185256 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ae2f2b82-8a58-4fc8-a251-66e7b648e78a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26209 81235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_received.2620981235 |
| Directory | /workspace/44.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_sent.494447195 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 181670340 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:04 PM PDT 24 |
| Finished | Aug 12 06:36:10 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-5a24f0a3-25ef-4250-abeb-7e07c26dafdf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49444 7195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_sent.494447195 |
| Directory | /workspace/44.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/44.usbdev_random_length_in_transaction.898485257 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 193804217 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:48 PM PDT 24 |
| Finished | Aug 12 06:36:49 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-93d2d1f2-daa3-4b3d-8241-80ee21731c0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89848 5257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_in_transaction.898485257 |
| Directory | /workspace/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_random_length_out_transaction.2748665036 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 152017028 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:35:58 PM PDT 24 |
| Finished | Aug 12 06:35:59 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-11c55b50-8613-4cfb-a55b-12b61d14213e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27486 65036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.2748665036 |
| Directory | /workspace/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_rx_crc_err.994730908 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 192390411 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:39 PM PDT 24 |
| Finished | Aug 12 06:36:40 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-afc77162-5970-429d-8240-1fd48b6eee70 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99473 0908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_rx_crc_err.994730908 |
| Directory | /workspace/44.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_rx_full.2475330951 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 244073793 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:36:06 PM PDT 24 |
| Finished | Aug 12 06:36:07 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ce8d11a2-1685-4da4-adb5-2ba90f794409 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24753 30951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_rx_full.2475330951 |
| Directory | /workspace/44.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/44.usbdev_setup_stage.3567546994 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 147088859 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:36:27 PM PDT 24 |
| Finished | Aug 12 06:36:28 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-8d543105-81d0-4e31-9a89-57d5733ae1f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35675 46994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_setup_stage.3567546994 |
| Directory | /workspace/44.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/44.usbdev_setup_trans_ignored.566697745 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 160224324 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:18 PM PDT 24 |
| Finished | Aug 12 06:36:19 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-1d26f4ff-0931-4d73-8d62-870fe4573f8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56669 7745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_setup_trans_ignored.566697745 |
| Directory | /workspace/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/44.usbdev_smoke.132950571 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 218381784 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:36:13 PM PDT 24 |
| Finished | Aug 12 06:36:20 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-87d1ff3b-38e6-4a99-afea-50ee0f18e55b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13295 0571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.132950571 |
| Directory | /workspace/44.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/44.usbdev_spurious_pids_ignored.2010437569 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 3199072798 ps |
| CPU time | 24.87 seconds |
| Started | Aug 12 06:36:38 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-72f88a8c-cf2a-4957-bef7-0465ce915b60 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2010437569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.2010437569 |
| Directory | /workspace/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/44.usbdev_stall_priority_over_nak.223118450 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 157984843 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:26 PM PDT 24 |
| Finished | Aug 12 06:36:27 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e6797755-d6f8-48a5-8819-f1c6f13d665e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22311 8450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.223118450 |
| Directory | /workspace/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/44.usbdev_stall_trans.2585304718 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 175340740 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:36:00 PM PDT 24 |
| Finished | Aug 12 06:36:01 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-dd5a32d5-80f7-411a-8daf-002ddf95ab6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25853 04718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_trans.2585304718 |
| Directory | /workspace/44.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_stream_len_max.1308298610 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 1106315609 ps |
| CPU time | 2.66 seconds |
| Started | Aug 12 06:36:19 PM PDT 24 |
| Finished | Aug 12 06:36:21 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-36fc8ab4-355e-42f2-acd2-aae125e4a432 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13082 98610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.1308298610 |
| Directory | /workspace/44.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/44.usbdev_streaming_out.1435685916 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 3111318385 ps |
| CPU time | 31.56 seconds |
| Started | Aug 12 06:36:13 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 224104 kb |
| Host | smart-9b73d30b-dc94-4f69-b129-c1b0458ea1a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14356 85916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_streaming_out.1435685916 |
| Directory | /workspace/44.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/44.usbdev_timeout_missing_host_handshake.1544616034 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 873967148 ps |
| CPU time | 5.37 seconds |
| Started | Aug 12 06:36:11 PM PDT 24 |
| Finished | Aug 12 06:36:16 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-54459131-7df1-4465-88a1-c253700d13f2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1544616034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_hos t_handshake.1544616034 |
| Directory | /workspace/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/44.usbdev_tx_rx_disruption.20312467 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 649849255 ps |
| CPU time | 1.78 seconds |
| Started | Aug 12 06:36:23 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3a1d21da-0c31-48fc-8e3b-990a616dc173 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20312467 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_tx_rx_disruption.20312467 |
| Directory | /workspace/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/440.usbdev_tx_rx_disruption.2225136445 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 477360707 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-600894aa-b510-4d44-ba0c-c276dc864cab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2225136445 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 440.usbdev_tx_rx_disruption.2225136445 |
| Directory | /workspace/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/441.usbdev_tx_rx_disruption.301742287 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 540224466 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-29e2800b-dbf8-4e26-a7ef-ed01923e8e7a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=301742287 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 441.usbdev_tx_rx_disruption.301742287 |
| Directory | /workspace/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/442.usbdev_tx_rx_disruption.215872710 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 483139555 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:38:19 PM PDT 24 |
| Finished | Aug 12 06:38:20 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-1518aac8-9904-4b5a-923e-dd6733e71212 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=215872710 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 442.usbdev_tx_rx_disruption.215872710 |
| Directory | /workspace/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/443.usbdev_tx_rx_disruption.955668824 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 600113373 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-922679d5-9b2e-44f4-85dc-75cc8882a2af |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=955668824 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 443.usbdev_tx_rx_disruption.955668824 |
| Directory | /workspace/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/444.usbdev_tx_rx_disruption.3530125894 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 483763200 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:38:25 PM PDT 24 |
| Finished | Aug 12 06:38:27 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-ce28f415-6ada-4bb8-a64c-f381d64187ac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3530125894 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 444.usbdev_tx_rx_disruption.3530125894 |
| Directory | /workspace/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/445.usbdev_tx_rx_disruption.4093727501 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 495079218 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:38:14 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-3c0e057f-1c53-49d9-9d84-2990b418347d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4093727501 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 445.usbdev_tx_rx_disruption.4093727501 |
| Directory | /workspace/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/446.usbdev_tx_rx_disruption.2156923961 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 561798220 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:38:27 PM PDT 24 |
| Finished | Aug 12 06:38:29 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d2cb590b-5d61-4a99-8675-67ecddb28a02 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2156923961 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 446.usbdev_tx_rx_disruption.2156923961 |
| Directory | /workspace/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/447.usbdev_tx_rx_disruption.1291081085 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 599440268 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:38:25 PM PDT 24 |
| Finished | Aug 12 06:38:27 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d10ffe2a-d4b8-4d3b-baea-3c194e5daf19 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1291081085 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 447.usbdev_tx_rx_disruption.1291081085 |
| Directory | /workspace/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/448.usbdev_tx_rx_disruption.234462746 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 500288362 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f58882b3-9b90-4894-9e07-76938998669d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=234462746 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 448.usbdev_tx_rx_disruption.234462746 |
| Directory | /workspace/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/449.usbdev_tx_rx_disruption.3766408524 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 551924640 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-ae66dd26-47aa-40a9-9329-efec472bdd9c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3766408524 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 449.usbdev_tx_rx_disruption.3766408524 |
| Directory | /workspace/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/45.usbdev_alert_test.2867074561 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 45503889 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 06:36:46 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-9a8d3d81-336e-458e-8b25-d5e183ed4263 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2867074561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.2867074561 |
| Directory | /workspace/45.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_disconnect.3764489649 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 4526530560 ps |
| CPU time | 6.54 seconds |
| Started | Aug 12 06:36:32 PM PDT 24 |
| Finished | Aug 12 06:36:38 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-1f2a9369-d14a-4d04-a279-009a9c8f15ba |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3764489649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_a on_wake_disconnect.3764489649 |
| Directory | /workspace/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_reset.1911485763 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 19449945105 ps |
| CPU time | 24.5 seconds |
| Started | Aug 12 06:36:01 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-f685b590-c0bc-44b0-84d4-8054efd15442 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1911485763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.1911485763 |
| Directory | /workspace/45.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_resume.3497547643 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 30289122183 ps |
| CPU time | 41.23 seconds |
| Started | Aug 12 06:36:26 PM PDT 24 |
| Finished | Aug 12 06:37:07 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-6ecd2916-1b4f-4409-a83b-cac9c7dd294c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3497547643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_a on_wake_resume.3497547643 |
| Directory | /workspace/45.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/45.usbdev_av_buffer.144308343 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 173958896 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-26a0a40d-09e8-43b4-8e6b-7158995a2a54 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14430 8343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_av_buffer.144308343 |
| Directory | /workspace/45.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/45.usbdev_bitstuff_err.3358084980 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 149440869 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:13 PM PDT 24 |
| Finished | Aug 12 06:36:14 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-75736c39-c3d8-459f-8c01-e08d186f208b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33580 84980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_bitstuff_err.3358084980 |
| Directory | /workspace/45.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_data_toggle_clear.2221230443 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 227144677 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:09 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-6afb57df-e634-4102-822b-080b1244d0d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22212 30443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_clear.2221230443 |
| Directory | /workspace/45.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/45.usbdev_device_timeout.156756795 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 1015414632 ps |
| CPU time | 22.98 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:36:31 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-c9a06e0d-a3c0-4123-bbae-825c6cb484ab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=156756795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.156756795 |
| Directory | /workspace/45.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/45.usbdev_disable_endpoint.878472178 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 825685850 ps |
| CPU time | 2.02 seconds |
| Started | Aug 12 06:36:22 PM PDT 24 |
| Finished | Aug 12 06:36:24 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-ac5f0b32-768a-40b1-9860-ebddd86377f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87847 2178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disable_endpoint.878472178 |
| Directory | /workspace/45.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/45.usbdev_disconnected.1546415325 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 142410147 ps |
| CPU time | 0.79 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-cd12bfd3-a229-4f8f-8ae4-fd18cdaef541 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15464 15325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disconnected.1546415325 |
| Directory | /workspace/45.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/45.usbdev_enable.1287038480 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 33315382 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:36:11 PM PDT 24 |
| Finished | Aug 12 06:36:11 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-7a55a59a-b292-4c5c-a363-f5c620dd86fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12870 38480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_enable.1287038480 |
| Directory | /workspace/45.usbdev_enable/latest |
| Test location | /workspace/coverage/default/45.usbdev_endpoint_access.2387754498 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 902240068 ps |
| CPU time | 2.41 seconds |
| Started | Aug 12 06:36:14 PM PDT 24 |
| Finished | Aug 12 06:36:17 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-3376c9a8-572c-48ab-b7cf-3d84d3a3967c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23877 54498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.2387754498 |
| Directory | /workspace/45.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/45.usbdev_endpoint_types.1991538826 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 256779609 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:36:40 PM PDT 24 |
| Finished | Aug 12 06:36:41 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ab9f962e-802d-4f2f-b3c4-00aca9b6f4fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1991538826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.1991538826 |
| Directory | /workspace/45.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/45.usbdev_fifo_rst.4190370039 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 225303977 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:36:22 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-723be3f5-229b-4b57-a454-d8ae5f754115 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41903 70039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_fifo_rst.4190370039 |
| Directory | /workspace/45.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_iso.3807230452 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 162324168 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:00 PM PDT 24 |
| Finished | Aug 12 06:36:01 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-4ed5dc8a-d384-4886-98e7-081c646d9676 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3807230452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.3807230452 |
| Directory | /workspace/45.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_stall.2245990220 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 146323844 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:36:22 PM PDT 24 |
| Finished | Aug 12 06:36:23 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-4dff6a95-689b-47a1-bc71-e10e479c4a29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22459 90220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_stall.2245990220 |
| Directory | /workspace/45.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_trans.499825940 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 233268821 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:24 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e93e255d-04ff-48e1-8113-e812dd18bf05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49982 5940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_trans.499825940 |
| Directory | /workspace/45.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_invalid_sync.384513007 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 5143993202 ps |
| CPU time | 53.23 seconds |
| Started | Aug 12 06:36:14 PM PDT 24 |
| Finished | Aug 12 06:37:08 PM PDT 24 |
| Peak memory | 217308 kb |
| Host | smart-cb0d539c-2043-4d38-9b47-2d4d8c92361a |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=384513007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.384513007 |
| Directory | /workspace/45.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/45.usbdev_iso_retraction.204843214 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 3970081504 ps |
| CPU time | 28.04 seconds |
| Started | Aug 12 06:36:17 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-51d3a009-305b-44f6-b72b-a0ea8d2a4570 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=204843214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.204843214 |
| Directory | /workspace/45.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_in_err.1278646498 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 203744157 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:36:07 PM PDT 24 |
| Finished | Aug 12 06:36:08 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-6260ed71-7f1b-4b56-a074-bdfbf842476b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12786 46498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_in_err.1278646498 |
| Directory | /workspace/45.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_resume.802137455 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 5887145807 ps |
| CPU time | 9.84 seconds |
| Started | Aug 12 06:36:23 PM PDT 24 |
| Finished | Aug 12 06:36:32 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-0046d520-a629-4238-9ee2-86f39df344c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80213 7455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_resume.802137455 |
| Directory | /workspace/45.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_suspend.510686636 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 3414081032 ps |
| CPU time | 5.14 seconds |
| Started | Aug 12 06:36:09 PM PDT 24 |
| Finished | Aug 12 06:36:14 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-320217f2-67a5-46b5-a090-85caa117e060 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51068 6636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_suspend.510686636 |
| Directory | /workspace/45.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/45.usbdev_low_speed_traffic.2904589971 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 4301912104 ps |
| CPU time | 129.8 seconds |
| Started | Aug 12 06:36:08 PM PDT 24 |
| Finished | Aug 12 06:38:18 PM PDT 24 |
| Peak memory | 224148 kb |
| Host | smart-d6fc4e98-5aa1-4645-9b84-6c4f1fad81b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2904589971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.2904589971 |
| Directory | /workspace/45.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_inter_pkt_delay.2634480667 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 3050642352 ps |
| CPU time | 90.29 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:37:51 PM PDT 24 |
| Peak memory | 217572 kb |
| Host | smart-b3a8f98a-9122-471a-8ed5-5f2c8c5901f4 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2634480667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.2634480667 |
| Directory | /workspace/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_length_in_transaction.3948862899 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 257722558 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:36:12 PM PDT 24 |
| Finished | Aug 12 06:36:13 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-8d51c043-88f1-4750-83aa-8ceaf01b667d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3948862899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.3948862899 |
| Directory | /workspace/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_length_out_transaction.1919921435 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 206540156 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:29 PM PDT 24 |
| Finished | Aug 12 06:36:30 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a6e2f38b-7881-4550-a4e2-9db4fee30367 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19199 21435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.1919921435 |
| Directory | /workspace/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_inter_pkt_delay.881622228 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 3023224585 ps |
| CPU time | 86.64 seconds |
| Started | Aug 12 06:36:15 PM PDT 24 |
| Finished | Aug 12 06:37:42 PM PDT 24 |
| Peak memory | 217332 kb |
| Host | smart-028282fc-c982-4eaa-98c9-8a5b864fc565 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=881622228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.881622228 |
| Directory | /workspace/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_length_in_transaction.1394762977 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 208389549 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:36:24 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-19a8d9f9-d902-458d-9ba3-805e7d7e6bcb |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1394762977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.1394762977 |
| Directory | /workspace/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_length_out_transaction.1267257530 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 192586124 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:28 PM PDT 24 |
| Finished | Aug 12 06:36:29 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ee98d173-e5e9-4165-859e-b2297ccc8204 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12672 57530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.1267257530 |
| Directory | /workspace/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_nak_trans.2755016088 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 203533322 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:15 PM PDT 24 |
| Finished | Aug 12 06:36:16 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-c918f4aa-b6e3-479f-8cf9-c8185e3a61e8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27550 16088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_nak_trans.2755016088 |
| Directory | /workspace/45.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_iso.1745059478 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 180370155 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:22 PM PDT 24 |
| Finished | Aug 12 06:36:23 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-45151bf1-ab1a-4d3c-b470-dffd18ab68a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17450 59478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_iso.1745059478 |
| Directory | /workspace/45.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_stall.3935911659 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 184637345 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:18 PM PDT 24 |
| Finished | Aug 12 06:36:19 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-85a6ebb0-7387-4652-b552-46ae9c20c13a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39359 11659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_stall.3935911659 |
| Directory | /workspace/45.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_trans_nak.2058090458 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 191335914 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:36:28 PM PDT 24 |
| Finished | Aug 12 06:36:34 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f6b125e0-ede8-4c39-83cb-98d563751ab1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20580 90458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_trans_nak.2058090458 |
| Directory | /workspace/45.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/45.usbdev_pending_in_trans.3592032365 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 154027014 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1c05c877-ea97-481b-96e0-86da0f2b6c83 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35920 32365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pending_in_trans.3592032365 |
| Directory | /workspace/45.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_config_pinflip.3502204099 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 215956551 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:36:51 PM PDT 24 |
| Finished | Aug 12 06:36:52 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-d236720a-0796-445f-92f0-9352462f3810 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3502204099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.3502204099 |
| Directory | /workspace/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_config_usb_ref_disable.1014568283 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 172579434 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:16 PM PDT 24 |
| Finished | Aug 12 06:36:17 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-6f01e7d5-2ac3-410f-a4fe-d3c4868e541a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10145 68283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.1014568283 |
| Directory | /workspace/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_pins_sense.1375457972 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 41724612 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:36:14 PM PDT 24 |
| Finished | Aug 12 06:36:15 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-20de7764-8173-412e-97cc-a2466c2693b0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13754 57972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.1375457972 |
| Directory | /workspace/45.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_buffer.3212175987 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 8000227734 ps |
| CPU time | 22.36 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-ac31f478-202b-4c16-b4f1-6153c151dd5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32121 75987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_buffer.3212175987 |
| Directory | /workspace/45.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_received.1577746330 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 168772583 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:22 PM PDT 24 |
| Finished | Aug 12 06:36:23 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-dc463d6f-d621-4aff-8651-c8c79246be77 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15777 46330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_received.1577746330 |
| Directory | /workspace/45.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_sent.999808985 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 225905026 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:36:19 PM PDT 24 |
| Finished | Aug 12 06:36:20 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-280a8a04-7fd3-45a7-b776-dfe48fcadb5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99980 8985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_sent.999808985 |
| Directory | /workspace/45.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/45.usbdev_random_length_in_transaction.2653964712 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 221634299 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:36:14 PM PDT 24 |
| Finished | Aug 12 06:36:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ba353fc8-b888-4d61-a090-576f25a09931 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26539 64712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_in_transaction.2653964712 |
| Directory | /workspace/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_random_length_out_transaction.1571826165 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 204115040 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:24 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-21a136f9-6548-4e89-bd21-3baf0ac01ecc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15718 26165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.1571826165 |
| Directory | /workspace/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_rx_crc_err.3572168796 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 180643959 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:39 PM PDT 24 |
| Finished | Aug 12 06:36:40 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-75181b4b-ac59-4c20-83e9-a7ef18dd4595 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35721 68796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_rx_crc_err.3572168796 |
| Directory | /workspace/45.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_rx_full.642147205 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 279364534 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:36:29 PM PDT 24 |
| Finished | Aug 12 06:36:31 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-20d106f4-91c6-49f6-866b-2fd63c3b44d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64214 7205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_rx_full.642147205 |
| Directory | /workspace/45.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/45.usbdev_setup_stage.1715575472 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 150162809 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:36:31 PM PDT 24 |
| Finished | Aug 12 06:36:32 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-302716c8-7bbf-4058-86c4-b094700ce00c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17155 75472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_setup_stage.1715575472 |
| Directory | /workspace/45.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/45.usbdev_setup_trans_ignored.376197872 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 185282318 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:37 PM PDT 24 |
| Finished | Aug 12 06:36:38 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-668209a2-5e38-41b0-ab7f-4f405df49d95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37619 7872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_setup_trans_ignored.376197872 |
| Directory | /workspace/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/45.usbdev_smoke.3630409538 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 214660264 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:36:34 PM PDT 24 |
| Finished | Aug 12 06:36:35 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a5399558-0f37-452f-9cb3-5e400e79fda8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36304 09538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.3630409538 |
| Directory | /workspace/45.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/45.usbdev_spurious_pids_ignored.1763890626 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 1954407190 ps |
| CPU time | 14.85 seconds |
| Started | Aug 12 06:36:24 PM PDT 24 |
| Finished | Aug 12 06:36:38 PM PDT 24 |
| Peak memory | 223996 kb |
| Host | smart-a4e0284d-9cca-482f-9aaf-327634eb1799 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1763890626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.1763890626 |
| Directory | /workspace/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/45.usbdev_stall_priority_over_nak.526068753 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 174328385 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:24 PM PDT 24 |
| Finished | Aug 12 06:36:25 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-8a72e479-aadc-4f55-b027-f85a1973b052 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52606 8753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.526068753 |
| Directory | /workspace/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/45.usbdev_stall_trans.3294379184 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 205048533 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:36:36 PM PDT 24 |
| Finished | Aug 12 06:36:38 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-1481674f-ea13-4f7a-8dd0-5609e4e9b432 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32943 79184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_trans.3294379184 |
| Directory | /workspace/45.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_stream_len_max.464971121 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 604406680 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 06:36:38 PM PDT 24 |
| Finished | Aug 12 06:36:40 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-a1764bde-7fcd-486e-9b3a-1222756c7e46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46497 1121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.464971121 |
| Directory | /workspace/45.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/45.usbdev_streaming_out.1782363857 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 2736176362 ps |
| CPU time | 22.51 seconds |
| Started | Aug 12 06:36:34 PM PDT 24 |
| Finished | Aug 12 06:36:57 PM PDT 24 |
| Peak memory | 217776 kb |
| Host | smart-49083e8b-0b43-4381-8f25-0514dec85f46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17823 63857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_streaming_out.1782363857 |
| Directory | /workspace/45.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/45.usbdev_timeout_missing_host_handshake.1661661517 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 3447488164 ps |
| CPU time | 31.1 seconds |
| Started | Aug 12 06:36:17 PM PDT 24 |
| Finished | Aug 12 06:36:48 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-6e12778c-f9da-4c35-bcef-53c7e896ec30 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1661661517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_hos t_handshake.1661661517 |
| Directory | /workspace/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/45.usbdev_tx_rx_disruption.2146759651 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 565624145 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:36:38 PM PDT 24 |
| Finished | Aug 12 06:36:39 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-1195a69d-655b-4baa-a8bd-158c518543ff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2146759651 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_tx_rx_disruption.2146759651 |
| Directory | /workspace/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/450.usbdev_tx_rx_disruption.688181229 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 476642331 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:38:20 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-9260213c-b5cb-4a72-92ad-ba4ea845337c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=688181229 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 450.usbdev_tx_rx_disruption.688181229 |
| Directory | /workspace/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/451.usbdev_tx_rx_disruption.1678755910 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 469683181 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-68ec180f-6231-4d43-bf9d-8899eb220c3d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1678755910 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 451.usbdev_tx_rx_disruption.1678755910 |
| Directory | /workspace/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/452.usbdev_tx_rx_disruption.2461156083 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 631910998 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:38:00 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-5d57a8e6-d412-4c4c-9926-0c6a4e5e3f2f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2461156083 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 452.usbdev_tx_rx_disruption.2461156083 |
| Directory | /workspace/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/453.usbdev_tx_rx_disruption.720823206 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 641550046 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:38:33 PM PDT 24 |
| Finished | Aug 12 06:38:35 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-b7b1d6c0-d36f-4825-bb58-8838f8edd0ff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=720823206 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 453.usbdev_tx_rx_disruption.720823206 |
| Directory | /workspace/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/454.usbdev_tx_rx_disruption.210680347 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 493055703 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:38:16 PM PDT 24 |
| Finished | Aug 12 06:38:18 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-13ffda18-ce57-4ca6-849a-9481f0e02964 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=210680347 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 454.usbdev_tx_rx_disruption.210680347 |
| Directory | /workspace/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/455.usbdev_tx_rx_disruption.739425133 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 445916620 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:38:13 PM PDT 24 |
| Finished | Aug 12 06:38:15 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-64c4a68f-787e-4309-aedd-f48428704b45 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=739425133 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 455.usbdev_tx_rx_disruption.739425133 |
| Directory | /workspace/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/456.usbdev_tx_rx_disruption.3151267780 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 629998124 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-bdd67c37-ebab-412d-a304-293f8c9773af |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3151267780 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 456.usbdev_tx_rx_disruption.3151267780 |
| Directory | /workspace/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/457.usbdev_tx_rx_disruption.24536220 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 533754652 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:08 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e012f2b8-feaa-4f57-8500-2ed57e9ebffd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24536220 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 457.usbdev_tx_rx_disruption.24536220 |
| Directory | /workspace/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/458.usbdev_tx_rx_disruption.35089226 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 628576037 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:38:15 PM PDT 24 |
| Finished | Aug 12 06:38:17 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d0a8b718-1f60-4dab-885b-99c612e6fb28 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35089226 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 458.usbdev_tx_rx_disruption.35089226 |
| Directory | /workspace/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/459.usbdev_tx_rx_disruption.4292986822 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 514611610 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-57ccb7c3-e685-45f4-948d-779d6f5c93e4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4292986822 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 459.usbdev_tx_rx_disruption.4292986822 |
| Directory | /workspace/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/46.usbdev_alert_test.2839973381 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 95578126 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:36:38 PM PDT 24 |
| Finished | Aug 12 06:36:39 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4599ffa6-b3cd-47a7-af3e-163fd9dfa014 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2839973381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.2839973381 |
| Directory | /workspace/46.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_disconnect.1887512412 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 6287321704 ps |
| CPU time | 8.74 seconds |
| Started | Aug 12 06:36:39 PM PDT 24 |
| Finished | Aug 12 06:36:48 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-5b90b140-fb65-4ab8-9d93-fa6da24e3819 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1887512412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_a on_wake_disconnect.1887512412 |
| Directory | /workspace/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_reset.186075023 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 20614243937 ps |
| CPU time | 24.31 seconds |
| Started | Aug 12 06:36:27 PM PDT 24 |
| Finished | Aug 12 06:36:51 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-b84fcb9f-e8aa-4fb0-9dd0-c60859e50289 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=186075023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.186075023 |
| Directory | /workspace/46.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_resume.580171808 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 31354810889 ps |
| CPU time | 37.93 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:37:20 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-dc5dcf94-7eb6-487b-8837-4519f137dbc5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=580171808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_ao n_wake_resume.580171808 |
| Directory | /workspace/46.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/46.usbdev_av_buffer.1187939196 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 163638806 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:36 PM PDT 24 |
| Finished | Aug 12 06:36:37 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-aeeb85e7-5bb9-445f-a54c-8911ed2e3240 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11879 39196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_av_buffer.1187939196 |
| Directory | /workspace/46.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/46.usbdev_bitstuff_err.1483697112 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 144464374 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:36:28 PM PDT 24 |
| Finished | Aug 12 06:36:29 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7232428d-d967-4fac-885b-584d60c649f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14836 97112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_bitstuff_err.1483697112 |
| Directory | /workspace/46.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_data_toggle_clear.2838442474 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 260851702 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:36:32 PM PDT 24 |
| Finished | Aug 12 06:36:33 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-075de324-25df-4549-a517-fb132df43049 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28384 42474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_clear.2838442474 |
| Directory | /workspace/46.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/46.usbdev_data_toggle_restore.3859288549 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 549595496 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:36:30 PM PDT 24 |
| Finished | Aug 12 06:36:32 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bb08d9c0-b8af-4d6b-90f8-75380917983f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3859288549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.3859288549 |
| Directory | /workspace/46.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/46.usbdev_device_address.12302426 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 15909611214 ps |
| CPU time | 26.98 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:37:08 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-02e81a93-73bc-4e6f-89bb-e23328b5234a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12302 426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.12302426 |
| Directory | /workspace/46.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/46.usbdev_device_timeout.497488780 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 2527071621 ps |
| CPU time | 17.66 seconds |
| Started | Aug 12 06:36:36 PM PDT 24 |
| Finished | Aug 12 06:36:54 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-7491d039-90dc-46dd-9e89-be21d393d7d0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=497488780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.497488780 |
| Directory | /workspace/46.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/46.usbdev_disable_endpoint.1283888464 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 869861877 ps |
| CPU time | 1.94 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:36:22 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e50561ef-a705-4bb6-bb46-22e4ae720fba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12838 88464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disable_endpoint.1283888464 |
| Directory | /workspace/46.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/46.usbdev_disconnected.2724121158 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 144504585 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:33 PM PDT 24 |
| Finished | Aug 12 06:36:34 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4488b7fd-d2e7-4b2a-aa3a-1113052288aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27241 21158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disconnected.2724121158 |
| Directory | /workspace/46.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/46.usbdev_enable.3765113786 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 87389007 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-580aa761-832a-4dcc-b7c8-680cc6f62653 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37651 13786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_enable.3765113786 |
| Directory | /workspace/46.usbdev_enable/latest |
| Test location | /workspace/coverage/default/46.usbdev_endpoint_access.1929981553 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 867873540 ps |
| CPU time | 2.51 seconds |
| Started | Aug 12 06:36:31 PM PDT 24 |
| Finished | Aug 12 06:36:33 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-8ed11178-9491-480d-988d-76cec049c8d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19299 81553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.1929981553 |
| Directory | /workspace/46.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/46.usbdev_fifo_rst.512259547 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 214599780 ps |
| CPU time | 1.94 seconds |
| Started | Aug 12 06:36:27 PM PDT 24 |
| Finished | Aug 12 06:36:29 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-66379156-b0b6-4d5f-a2e6-631579c9dfa7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51225 9547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_fifo_rst.512259547 |
| Directory | /workspace/46.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_iso.1303175159 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 182029947 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:36:37 PM PDT 24 |
| Finished | Aug 12 06:36:38 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-5c44c233-c99c-4542-95ed-79ffe2303a11 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1303175159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.1303175159 |
| Directory | /workspace/46.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_stall.826006579 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 144653512 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:37 PM PDT 24 |
| Finished | Aug 12 06:36:38 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-52c946d2-6b85-406c-bf30-28f42e988193 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82600 6579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_stall.826006579 |
| Directory | /workspace/46.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_trans.3933887621 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 151719733 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:54 PM PDT 24 |
| Finished | Aug 12 06:36:55 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-50cb6b5b-f100-4c00-8fd8-bf1d40e53211 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39338 87621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_trans.3933887621 |
| Directory | /workspace/46.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_invalid_sync.1945038869 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 4565070696 ps |
| CPU time | 34.58 seconds |
| Started | Aug 12 06:36:40 PM PDT 24 |
| Finished | Aug 12 06:37:14 PM PDT 24 |
| Peak memory | 218164 kb |
| Host | smart-30afeb20-9cd9-42ec-92f9-5d3590577b75 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1945038869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.1945038869 |
| Directory | /workspace/46.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/46.usbdev_iso_retraction.1797638223 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 12774772021 ps |
| CPU time | 159.43 seconds |
| Started | Aug 12 06:36:20 PM PDT 24 |
| Finished | Aug 12 06:39:00 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-6799b263-c1fb-4fd0-b1e7-110c59381ab1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1797638223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.1797638223 |
| Directory | /workspace/46.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_in_err.3308273598 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 174954691 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:40 PM PDT 24 |
| Finished | Aug 12 06:36:41 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-61d822a9-c3fd-45a1-8d5e-ad665233fed9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33082 73598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_in_err.3308273598 |
| Directory | /workspace/46.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_resume.3048379307 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 32269688502 ps |
| CPU time | 46.34 seconds |
| Started | Aug 12 06:36:26 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-1fe6ebdb-409c-4937-bae6-63a0a4bc2622 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30483 79307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_resume.3048379307 |
| Directory | /workspace/46.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_suspend.3432915132 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 9855696325 ps |
| CPU time | 13.11 seconds |
| Started | Aug 12 06:36:34 PM PDT 24 |
| Finished | Aug 12 06:36:47 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-445ca077-8595-44aa-a8b1-d0230d5b47b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34329 15132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_suspend.3432915132 |
| Directory | /workspace/46.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/46.usbdev_low_speed_traffic.16982315 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 4316743578 ps |
| CPU time | 125.34 seconds |
| Started | Aug 12 06:36:47 PM PDT 24 |
| Finished | Aug 12 06:38:53 PM PDT 24 |
| Peak memory | 223996 kb |
| Host | smart-89b2a406-0a74-44a6-a5c5-29f7048f5ec0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=16982315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.16982315 |
| Directory | /workspace/46.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_inter_pkt_delay.1521763043 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 1889043562 ps |
| CPU time | 53.37 seconds |
| Started | Aug 12 06:36:32 PM PDT 24 |
| Finished | Aug 12 06:37:26 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-1915c144-9cc9-4a51-8b73-05dea3be86bd |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1521763043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.1521763043 |
| Directory | /workspace/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_length_in_transaction.3862366600 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 281331317 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:36:26 PM PDT 24 |
| Finished | Aug 12 06:36:27 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-28904e5e-a237-41df-a6ec-caafa557fedb |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3862366600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.3862366600 |
| Directory | /workspace/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_length_out_transaction.2026992087 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 241304223 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-abeecb11-5537-4e6e-8e84-b7572fe7363e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20269 92087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.2026992087 |
| Directory | /workspace/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_inter_pkt_delay.4280102592 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 2302440576 ps |
| CPU time | 63.16 seconds |
| Started | Aug 12 06:36:30 PM PDT 24 |
| Finished | Aug 12 06:37:33 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-4081c5ed-8cb5-473b-b548-36cc23d3738b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4280102592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.4280102592 |
| Directory | /workspace/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_length_in_transaction.1953520543 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 166955330 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:39 PM PDT 24 |
| Finished | Aug 12 06:36:39 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-5e131239-4a95-4acb-a2b7-ba449c0e42ca |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1953520543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.1953520543 |
| Directory | /workspace/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_length_out_transaction.3668622985 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 150099850 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:26 PM PDT 24 |
| Finished | Aug 12 06:36:27 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-7dd3e56c-5c61-4685-9a8c-3a8b978e21c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36686 22985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.3668622985 |
| Directory | /workspace/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_nak_trans.1237797001 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 248764163 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:36:25 PM PDT 24 |
| Finished | Aug 12 06:36:26 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a556e91d-abb1-4378-87c3-867c73b7077d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12377 97001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_nak_trans.1237797001 |
| Directory | /workspace/46.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_iso.1357325957 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 179841510 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:36:33 PM PDT 24 |
| Finished | Aug 12 06:36:34 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-0ceb1dca-73bf-4ea8-958e-7a2ff94aeb2c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13573 25957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_iso.1357325957 |
| Directory | /workspace/46.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_stall.2795859847 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 169408495 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:35 PM PDT 24 |
| Finished | Aug 12 06:36:36 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-81680198-b0f6-4550-9d00-f68b77c0a892 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27958 59847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_stall.2795859847 |
| Directory | /workspace/46.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_trans_nak.523896240 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 167456634 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:33 PM PDT 24 |
| Finished | Aug 12 06:36:34 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-047bdee6-8391-4d1c-8366-0ca48a687604 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52389 6240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_trans_nak.523896240 |
| Directory | /workspace/46.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/46.usbdev_pending_in_trans.1281352629 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 157232610 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:27 PM PDT 24 |
| Finished | Aug 12 06:36:28 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-05217939-8b0b-4b8b-be41-3d41cbc17d62 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12813 52629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pending_in_trans.1281352629 |
| Directory | /workspace/46.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_config_pinflip.3473024804 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 229984031 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:36:29 PM PDT 24 |
| Finished | Aug 12 06:36:30 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1716746f-3c99-466e-868a-207bdb3d5cf7 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3473024804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.3473024804 |
| Directory | /workspace/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_config_usb_ref_disable.855019585 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 174427157 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:39 PM PDT 24 |
| Finished | Aug 12 06:36:40 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-942d1ebd-d1b1-4d4c-962e-ab91c295e563 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85501 9585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.855019585 |
| Directory | /workspace/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_pins_sense.649532465 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 47562111 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:36:54 PM PDT 24 |
| Finished | Aug 12 06:36:55 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e18fa8e3-00bf-4c60-bcee-4c8c11796e49 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64953 2465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.649532465 |
| Directory | /workspace/46.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_buffer.835144747 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 14992279981 ps |
| CPU time | 36.51 seconds |
| Started | Aug 12 06:36:29 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-39654c93-cd87-4f8c-b87d-84f7acb266b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83514 4747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_buffer.835144747 |
| Directory | /workspace/46.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_received.2696779650 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 144868789 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:36:44 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-5319450d-63f7-43f8-9384-3a6187215304 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26967 79650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_received.2696779650 |
| Directory | /workspace/46.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_sent.3912706041 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 233033989 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-3f9ed24c-f693-4266-a10c-0907237e2d07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39127 06041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_sent.3912706041 |
| Directory | /workspace/46.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/46.usbdev_random_length_in_transaction.1001069982 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 222813996 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:36:34 PM PDT 24 |
| Finished | Aug 12 06:36:35 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-62a05c91-d7f2-4cbc-be84-4b1c0328a9ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10010 69982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_in_transaction.1001069982 |
| Directory | /workspace/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_random_length_out_transaction.3354046306 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 171657419 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-10e2604a-a324-416c-b5d1-e2143890dafb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33540 46306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.3354046306 |
| Directory | /workspace/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_rx_crc_err.4071361600 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 172776131 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:31 PM PDT 24 |
| Finished | Aug 12 06:36:32 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-1d7d1b84-52c0-4d12-a50c-cba166c151a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40713 61600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_rx_crc_err.4071361600 |
| Directory | /workspace/46.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_rx_full.1454301150 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 286784069 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-355c136a-c9be-4e7c-be02-b66e64a0e973 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14543 01150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_rx_full.1454301150 |
| Directory | /workspace/46.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/46.usbdev_setup_stage.613103458 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 182369310 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-cbb59d07-a1d1-45e0-a3bc-361bd3d5d4e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61310 3458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_setup_stage.613103458 |
| Directory | /workspace/46.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/46.usbdev_setup_trans_ignored.3247151598 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 170850191 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-07d32d7b-18d8-4535-96e8-b59181d04464 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32471 51598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_setup_trans_ignored.3247151598 |
| Directory | /workspace/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/46.usbdev_smoke.3254302251 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 204151128 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5c9126a8-0f6b-4f8e-8e6a-20f8d1e33aa6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32543 02251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.3254302251 |
| Directory | /workspace/46.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/46.usbdev_spurious_pids_ignored.3926266277 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 3306550603 ps |
| CPU time | 94.27 seconds |
| Started | Aug 12 06:36:31 PM PDT 24 |
| Finished | Aug 12 06:38:06 PM PDT 24 |
| Peak memory | 217504 kb |
| Host | smart-883286d0-fdfd-4493-bcdc-df86d4014154 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3926266277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.3926266277 |
| Directory | /workspace/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/46.usbdev_stall_priority_over_nak.3280521932 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 182610367 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:46 PM PDT 24 |
| Finished | Aug 12 06:36:47 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-916984bd-01e4-4d87-80d0-8e6f11df338e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32805 21932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.3280521932 |
| Directory | /workspace/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/46.usbdev_stall_trans.197932090 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 199820983 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:53 PM PDT 24 |
| Finished | Aug 12 06:36:54 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-5b31481e-87cf-4ca6-ba41-0e977ecea940 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19793 2090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_trans.197932090 |
| Directory | /workspace/46.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_stream_len_max.2756754545 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 1203978834 ps |
| CPU time | 2.91 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:44 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-5728311b-4763-47a0-ab7a-4236d7c7db7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27567 54545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.2756754545 |
| Directory | /workspace/46.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/46.usbdev_streaming_out.566847431 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 3561715963 ps |
| CPU time | 106.57 seconds |
| Started | Aug 12 06:36:34 PM PDT 24 |
| Finished | Aug 12 06:38:20 PM PDT 24 |
| Peak memory | 217484 kb |
| Host | smart-7b0bd233-9698-4f1d-9d3f-4ae52ac63cfd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56684 7431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_streaming_out.566847431 |
| Directory | /workspace/46.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/46.usbdev_timeout_missing_host_handshake.222979975 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 580536691 ps |
| CPU time | 11.24 seconds |
| Started | Aug 12 06:36:30 PM PDT 24 |
| Finished | Aug 12 06:36:41 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-ce8f78c1-5b16-4cb0-b15d-7948e3328de7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=222979975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host _handshake.222979975 |
| Directory | /workspace/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/46.usbdev_tx_rx_disruption.1092546809 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 678890386 ps |
| CPU time | 1.94 seconds |
| Started | Aug 12 06:36:40 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-9ed9194f-c55c-4330-9693-e8b43e862ef3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1092546809 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_tx_rx_disruption.1092546809 |
| Directory | /workspace/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/460.usbdev_tx_rx_disruption.1461378980 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 432649367 ps |
| CPU time | 1.36 seconds |
| Started | Aug 12 06:38:11 PM PDT 24 |
| Finished | Aug 12 06:38:13 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-b9f1c9f1-311b-4719-b42c-e6b820e1f00d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1461378980 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 460.usbdev_tx_rx_disruption.1461378980 |
| Directory | /workspace/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/461.usbdev_tx_rx_disruption.929731620 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 471853882 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:38:19 PM PDT 24 |
| Finished | Aug 12 06:38:21 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-a1070670-4349-4262-9395-067b4942c48f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=929731620 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 461.usbdev_tx_rx_disruption.929731620 |
| Directory | /workspace/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/462.usbdev_tx_rx_disruption.2324952303 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 603524868 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:38:19 PM PDT 24 |
| Finished | Aug 12 06:38:21 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-298caebe-0324-4a8d-8340-53a1953171f7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2324952303 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 462.usbdev_tx_rx_disruption.2324952303 |
| Directory | /workspace/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/463.usbdev_tx_rx_disruption.2646476176 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 495981981 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-da61fdb7-310a-4f5c-b183-3dba8b623ff9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2646476176 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 463.usbdev_tx_rx_disruption.2646476176 |
| Directory | /workspace/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/464.usbdev_tx_rx_disruption.3157869416 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 653670077 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:38:07 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-7af6fd6a-ab70-4cb6-a9e5-f316f0356498 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3157869416 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 464.usbdev_tx_rx_disruption.3157869416 |
| Directory | /workspace/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/465.usbdev_tx_rx_disruption.3772769994 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 511339936 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:38:31 PM PDT 24 |
| Finished | Aug 12 06:38:33 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-c217f5a4-8958-4026-a211-7d3a1582e901 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3772769994 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 465.usbdev_tx_rx_disruption.3772769994 |
| Directory | /workspace/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/466.usbdev_tx_rx_disruption.4121637331 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 605367145 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:38:26 PM PDT 24 |
| Finished | Aug 12 06:38:28 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-1c713bbb-843b-477e-91f0-38d69f8c282d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4121637331 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 466.usbdev_tx_rx_disruption.4121637331 |
| Directory | /workspace/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/467.usbdev_tx_rx_disruption.3326464939 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 588115714 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:38:16 PM PDT 24 |
| Finished | Aug 12 06:38:18 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-236f7306-9e61-42a6-8336-4bde737fb678 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3326464939 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 467.usbdev_tx_rx_disruption.3326464939 |
| Directory | /workspace/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/468.usbdev_tx_rx_disruption.2208337532 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 624112341 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-c71a9ae2-2941-4e8e-8722-243bdc072696 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2208337532 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 468.usbdev_tx_rx_disruption.2208337532 |
| Directory | /workspace/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/469.usbdev_tx_rx_disruption.1443848774 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 549267581 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:38:06 PM PDT 24 |
| Finished | Aug 12 06:38:08 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-1593f3fd-0cf6-4a0a-9f81-1abfb3de6c03 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1443848774 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 469.usbdev_tx_rx_disruption.1443848774 |
| Directory | /workspace/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/47.usbdev_alert_test.865893947 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 38278851 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-631dfed7-c4ec-4857-844f-5a7a0d201fc0 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=865893947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.865893947 |
| Directory | /workspace/47.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_disconnect.1193606846 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 9723472490 ps |
| CPU time | 14.48 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:57 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-75a45f48-1ce5-4cb2-ac81-e3712f6b5ab7 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1193606846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_a on_wake_disconnect.1193606846 |
| Directory | /workspace/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_reset.479640056 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 19828761939 ps |
| CPU time | 21.41 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:37:05 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-a30f39ac-4f35-4870-8b8c-7eb497c80e3e |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=479640056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.479640056 |
| Directory | /workspace/47.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_resume.3608994149 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 23667380349 ps |
| CPU time | 28.77 seconds |
| Started | Aug 12 06:36:57 PM PDT 24 |
| Finished | Aug 12 06:37:26 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-6472a5fc-79e2-4a93-9df7-e897fd30a491 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3608994149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_a on_wake_resume.3608994149 |
| Directory | /workspace/47.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/47.usbdev_av_buffer.1226361766 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 160762185 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:38 PM PDT 24 |
| Finished | Aug 12 06:36:39 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-5ed47a89-e081-4e30-b699-979a0f7edbc3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12263 61766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_av_buffer.1226361766 |
| Directory | /workspace/47.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/47.usbdev_bitstuff_err.2740585817 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 145226197 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:39 PM PDT 24 |
| Finished | Aug 12 06:36:40 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-bb34c2e3-5bb2-4b11-b66f-62234e8be105 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27405 85817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_bitstuff_err.2740585817 |
| Directory | /workspace/47.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_data_toggle_clear.682877992 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 460820477 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:36:40 PM PDT 24 |
| Finished | Aug 12 06:36:41 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-a2cbcaef-b61c-4eda-ac43-28bb7013f835 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68287 7992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_clear.682877992 |
| Directory | /workspace/47.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/47.usbdev_data_toggle_restore.572260209 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 723542807 ps |
| CPU time | 2.13 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:44 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-678e3586-d92d-4397-bc8d-4958724eea58 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=572260209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.572260209 |
| Directory | /workspace/47.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/47.usbdev_device_address.2897592106 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 22140621585 ps |
| CPU time | 37.95 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:37:34 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-fc14b1e9-8869-48fc-9cb9-b97de9810f6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28975 92106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.2897592106 |
| Directory | /workspace/47.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/47.usbdev_device_timeout.3727202048 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 2537611425 ps |
| CPU time | 17.15 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-67028db0-2f9f-411c-a4d0-90a526a69925 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3727202048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.3727202048 |
| Directory | /workspace/47.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/47.usbdev_disable_endpoint.2584586502 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 929397988 ps |
| CPU time | 1.99 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-2e6f04f7-6fb4-46ee-976c-391a87690c73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25845 86502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_disable_endpoint.2584586502 |
| Directory | /workspace/47.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/47.usbdev_disconnected.1186315211 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 148074013 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-92aa0e81-b057-4b93-a3f3-388242868413 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11863 15211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_disconnected.1186315211 |
| Directory | /workspace/47.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/47.usbdev_enable.3339120424 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 113095120 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:36:52 PM PDT 24 |
| Finished | Aug 12 06:36:53 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b390341f-7a25-4d2f-938c-eddee7ec66fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33391 20424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_enable.3339120424 |
| Directory | /workspace/47.usbdev_enable/latest |
| Test location | /workspace/coverage/default/47.usbdev_endpoint_access.784908684 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 871249442 ps |
| CPU time | 2.36 seconds |
| Started | Aug 12 06:36:46 PM PDT 24 |
| Finished | Aug 12 06:36:49 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-c036cc81-5f9a-4881-bd57-1d842e0cab6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78490 8684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.784908684 |
| Directory | /workspace/47.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/47.usbdev_endpoint_types.905955871 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 461574051 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:36:47 PM PDT 24 |
| Finished | Aug 12 06:36:49 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-cbf3a68b-9a58-4939-b12b-62ff730f664e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=905955871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.905955871 |
| Directory | /workspace/47.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/47.usbdev_fifo_rst.317756262 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 212164733 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:36:51 PM PDT 24 |
| Finished | Aug 12 06:36:53 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-192d9874-6f0a-4042-8518-60a2403d6dcf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31775 6262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_fifo_rst.317756262 |
| Directory | /workspace/47.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_iso.3224212690 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 182333260 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:57 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-e8d676d8-b964-430d-9f71-5397c4c58f53 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3224212690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.3224212690 |
| Directory | /workspace/47.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_stall.4245041477 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 166636859 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:36:44 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-65fe5c7d-35c7-4749-aee8-639f0bcea62c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42450 41477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_stall.4245041477 |
| Directory | /workspace/47.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_trans.1213352508 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 202914303 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:35 PM PDT 24 |
| Finished | Aug 12 06:36:36 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-801ce895-186f-4a1e-8acd-73e859713ce8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12133 52508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_trans.1213352508 |
| Directory | /workspace/47.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_invalid_sync.1557375595 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 3637834096 ps |
| CPU time | 34.09 seconds |
| Started | Aug 12 06:36:48 PM PDT 24 |
| Finished | Aug 12 06:37:22 PM PDT 24 |
| Peak memory | 217412 kb |
| Host | smart-bd7129ba-7666-4aa4-9aac-da3b7de7fda7 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1557375595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.1557375595 |
| Directory | /workspace/47.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/47.usbdev_iso_retraction.1975423183 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 12324687592 ps |
| CPU time | 88.88 seconds |
| Started | Aug 12 06:36:46 PM PDT 24 |
| Finished | Aug 12 06:38:15 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-253b3e73-4ff3-4f83-9788-d2bc2857eac4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1975423183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.1975423183 |
| Directory | /workspace/47.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_in_err.4064626848 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 244636712 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6ef201cc-314a-4c3a-9468-078f3b5f8bc0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40646 26848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_in_err.4064626848 |
| Directory | /workspace/47.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_resume.1241341764 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 29605995126 ps |
| CPU time | 46.54 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:37:27 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-66e5e73a-5d3b-4aca-b271-928f3befa5ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12413 41764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_resume.1241341764 |
| Directory | /workspace/47.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_suspend.3639575494 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 4359616282 ps |
| CPU time | 6.31 seconds |
| Started | Aug 12 06:36:47 PM PDT 24 |
| Finished | Aug 12 06:36:53 PM PDT 24 |
| Peak memory | 216756 kb |
| Host | smart-a8fead5d-7cb7-4fe4-80b8-83a66d8b03da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36395 75494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_suspend.3639575494 |
| Directory | /workspace/47.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/47.usbdev_low_speed_traffic.2566014045 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 5742817944 ps |
| CPU time | 56.34 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:37:41 PM PDT 24 |
| Peak memory | 218548 kb |
| Host | smart-e38fa1f8-6eb4-4a19-b79a-a58c110e8d5f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2566014045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.2566014045 |
| Directory | /workspace/47.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_inter_pkt_delay.1946398368 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 3072851779 ps |
| CPU time | 92.21 seconds |
| Started | Aug 12 06:36:48 PM PDT 24 |
| Finished | Aug 12 06:38:20 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-9bed86e7-2b74-4f43-a6f0-ed27e166ac2a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1946398368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.1946398368 |
| Directory | /workspace/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_length_in_transaction.556849982 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 258792407 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:36:48 PM PDT 24 |
| Finished | Aug 12 06:36:49 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-2822e1e5-9578-4ce8-9c54-40750c36b762 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=556849982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.556849982 |
| Directory | /workspace/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_length_out_transaction.2530435939 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 191341096 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-37597025-2298-47d8-aac8-03255150e002 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25304 35939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.2530435939 |
| Directory | /workspace/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_inter_pkt_delay.1307578271 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 2858694247 ps |
| CPU time | 21.63 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:21 PM PDT 24 |
| Peak memory | 217680 kb |
| Host | smart-6eaf1315-5a7c-4853-9603-8d55d986587c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1307578271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.1307578271 |
| Directory | /workspace/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_length_in_transaction.3650891372 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 182715469 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:55 PM PDT 24 |
| Finished | Aug 12 06:36:56 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6428e26e-8642-4d4e-ae0b-577103ab9b09 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3650891372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.3650891372 |
| Directory | /workspace/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_length_out_transaction.3829906974 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 201284381 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:58 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-eac5aab4-6da8-4fc3-bf54-e225347e5873 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38299 06974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.3829906974 |
| Directory | /workspace/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_nak_trans.4020938150 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 209752595 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-72fcaabd-08b9-4dec-b32b-4ba209f2e5dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40209 38150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_nak_trans.4020938150 |
| Directory | /workspace/47.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_iso.465934570 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 234412781 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-92dab51f-5b97-4fca-8350-b9eb4dd38b01 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46593 4570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_iso.465934570 |
| Directory | /workspace/47.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_stall.2571499554 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 182792012 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-32affb6f-8bda-4d82-a8cb-228cab4bfbf6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25714 99554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_stall.2571499554 |
| Directory | /workspace/47.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_trans_nak.1018708910 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 178954923 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-0b181027-a7c6-4887-871c-51fce6c945e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10187 08910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_trans_nak.1018708910 |
| Directory | /workspace/47.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/47.usbdev_pending_in_trans.1565283653 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 205044023 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:37:06 PM PDT 24 |
| Finished | Aug 12 06:37:07 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-889c62ff-2fbb-437f-b1e0-f6e29c879128 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15652 83653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pending_in_trans.1565283653 |
| Directory | /workspace/47.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_config_pinflip.4283480335 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 192007286 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-a9d786f9-af3b-4c01-8b1a-5a4fe9175017 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4283480335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.4283480335 |
| Directory | /workspace/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_config_usb_ref_disable.2642280776 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 181159300 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:36:44 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3a8669e3-a714-4a75-8661-1d781b390a8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26422 80776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.2642280776 |
| Directory | /workspace/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_pins_sense.147997637 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 39662492 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-a0ffec41-d794-4404-9a6d-4c86166588cf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14799 7637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.147997637 |
| Directory | /workspace/47.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_buffer.447027062 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 14904662940 ps |
| CPU time | 40.24 seconds |
| Started | Aug 12 06:36:51 PM PDT 24 |
| Finished | Aug 12 06:37:31 PM PDT 24 |
| Peak memory | 220596 kb |
| Host | smart-164985b5-79bb-4447-98cc-8edf2f5bf40f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44702 7062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_buffer.447027062 |
| Directory | /workspace/47.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_received.3282426155 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 159772240 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:52 PM PDT 24 |
| Finished | Aug 12 06:36:53 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-0cc6ea03-2e4c-4579-863a-9921e5e4a93c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32824 26155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_received.3282426155 |
| Directory | /workspace/47.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_sent.747095031 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 235583148 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:36:47 PM PDT 24 |
| Finished | Aug 12 06:36:48 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-d1a6c7b1-97a6-4f2d-8ed4-a9183d8dd9f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74709 5031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_sent.747095031 |
| Directory | /workspace/47.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/47.usbdev_random_length_in_transaction.3537777368 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 194392588 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:39 PM PDT 24 |
| Finished | Aug 12 06:36:40 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-fa4ffc0d-d9fc-470e-913f-157b04c76b3c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35377 77368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_in_transaction.3537777368 |
| Directory | /workspace/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_random_length_out_transaction.3131625679 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 238742844 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-2c148d1b-6386-47b8-814d-0f3e19b1227d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31316 25679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.3131625679 |
| Directory | /workspace/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_rx_crc_err.990826848 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 148212792 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:48 PM PDT 24 |
| Finished | Aug 12 06:36:49 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-84d19c23-bb78-48fe-a844-0cfd83ce0266 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99082 6848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_rx_crc_err.990826848 |
| Directory | /workspace/47.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_setup_stage.3983791834 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 235051626 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b56b48a5-fdc7-4fa1-aa88-0ae96bf20f27 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39837 91834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_setup_stage.3983791834 |
| Directory | /workspace/47.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/47.usbdev_setup_trans_ignored.623028057 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 162306821 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-140d1578-59cc-4450-b41a-156f904c4c79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62302 8057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_setup_trans_ignored.623028057 |
| Directory | /workspace/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/47.usbdev_smoke.2472019198 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 244650270 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-5ed0cbe8-5f9d-4d0f-b6dd-7ba9eebae673 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24720 19198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.2472019198 |
| Directory | /workspace/47.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/47.usbdev_spurious_pids_ignored.684166464 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 3173550566 ps |
| CPU time | 94.83 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:38:17 PM PDT 24 |
| Peak memory | 217560 kb |
| Host | smart-640d4265-aa6a-4715-8d2b-fff0598eee4e |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=684166464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.684166464 |
| Directory | /workspace/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/47.usbdev_stall_priority_over_nak.3189016374 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 171091787 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4a723233-d1cb-42aa-aeed-9625fea955ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31890 16374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.3189016374 |
| Directory | /workspace/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/47.usbdev_stall_trans.2101734638 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 254662330 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:57 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-2dfc1401-6ad0-44f3-be62-a3fc38434934 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21017 34638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_trans.2101734638 |
| Directory | /workspace/47.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_stream_len_max.1900134395 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 880352627 ps |
| CPU time | 2.27 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-91014766-f3e1-4552-86d6-93c87f070549 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19001 34395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.1900134395 |
| Directory | /workspace/47.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/47.usbdev_streaming_out.519164609 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 2123364892 ps |
| CPU time | 19.79 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 215624 kb |
| Host | smart-9917b224-6ae6-49ff-b2b4-a7db956b23ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51916 4609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_streaming_out.519164609 |
| Directory | /workspace/47.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/47.usbdev_timeout_missing_host_handshake.1876196864 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 3032482114 ps |
| CPU time | 27.53 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:37:10 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-d391bbc4-334a-4630-a958-2c7c616c49f6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1876196864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_hos t_handshake.1876196864 |
| Directory | /workspace/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/47.usbdev_tx_rx_disruption.596647059 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 643665192 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:36:52 PM PDT 24 |
| Finished | Aug 12 06:36:54 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-dfa5e7a6-a5d6-48b7-878a-a90cee2cec96 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=596647059 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_tx_rx_disruption.596647059 |
| Directory | /workspace/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/470.usbdev_tx_rx_disruption.2258168561 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 410764148 ps |
| CPU time | 1.33 seconds |
| Started | Aug 12 06:38:18 PM PDT 24 |
| Finished | Aug 12 06:38:20 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-a0cb83ea-6efa-4da8-81c3-f4e5bc786893 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2258168561 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 470.usbdev_tx_rx_disruption.2258168561 |
| Directory | /workspace/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/471.usbdev_tx_rx_disruption.3748311330 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 597101393 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:23 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-352b6bc4-2ec9-4a7e-a015-b9cdcdff8d06 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3748311330 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 471.usbdev_tx_rx_disruption.3748311330 |
| Directory | /workspace/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/472.usbdev_tx_rx_disruption.1173690982 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 613672805 ps |
| CPU time | 1.93 seconds |
| Started | Aug 12 06:38:25 PM PDT 24 |
| Finished | Aug 12 06:38:27 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-07f3c23a-033e-4be9-b30b-6b24ca2bb353 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1173690982 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 472.usbdev_tx_rx_disruption.1173690982 |
| Directory | /workspace/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/473.usbdev_tx_rx_disruption.1191061830 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 495925303 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:38:25 PM PDT 24 |
| Finished | Aug 12 06:38:27 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-374004cd-1c01-419f-be27-95de788ac713 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1191061830 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 473.usbdev_tx_rx_disruption.1191061830 |
| Directory | /workspace/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/474.usbdev_tx_rx_disruption.3702641564 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 459200882 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-7976502f-528e-4241-a83d-e9a3f96f4db7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3702641564 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 474.usbdev_tx_rx_disruption.3702641564 |
| Directory | /workspace/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/475.usbdev_tx_rx_disruption.2166916970 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 531746823 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:38:19 PM PDT 24 |
| Finished | Aug 12 06:38:20 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-909be30e-360b-4d94-abf3-47ec0fef9544 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2166916970 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 475.usbdev_tx_rx_disruption.2166916970 |
| Directory | /workspace/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/476.usbdev_tx_rx_disruption.2244811168 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 531957114 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:38:30 PM PDT 24 |
| Finished | Aug 12 06:38:31 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-f3ff99a4-b37b-4b98-a0f1-f47eacdf1044 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2244811168 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 476.usbdev_tx_rx_disruption.2244811168 |
| Directory | /workspace/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/477.usbdev_tx_rx_disruption.3555416067 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 608621054 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:38:30 PM PDT 24 |
| Finished | Aug 12 06:38:32 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-4d5bb899-acbe-4369-a16f-087596331647 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3555416067 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 477.usbdev_tx_rx_disruption.3555416067 |
| Directory | /workspace/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/478.usbdev_tx_rx_disruption.2276455846 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 582998370 ps |
| CPU time | 1.6 seconds |
| Started | Aug 12 06:38:24 PM PDT 24 |
| Finished | Aug 12 06:38:26 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-c5e809fc-b06b-4c54-907c-7ebe01227dcd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2276455846 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 478.usbdev_tx_rx_disruption.2276455846 |
| Directory | /workspace/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/479.usbdev_tx_rx_disruption.2263098335 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 611645246 ps |
| CPU time | 1.69 seconds |
| Started | Aug 12 06:38:25 PM PDT 24 |
| Finished | Aug 12 06:38:27 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4d79afbc-2808-4912-bdfd-db7ff0b8c497 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2263098335 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 479.usbdev_tx_rx_disruption.2263098335 |
| Directory | /workspace/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/48.usbdev_alert_test.406063225 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 31337692 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-1e758434-ec7a-4779-b6ec-39068a004cb4 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=406063225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.406063225 |
| Directory | /workspace/48.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_disconnect.2990902574 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 9909271726 ps |
| CPU time | 12.56 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:54 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-7ce0148c-b11c-4322-aa22-7ede4ff94b17 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2990902574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_a on_wake_disconnect.2990902574 |
| Directory | /workspace/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_reset.83524009 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 13879713611 ps |
| CPU time | 17.08 seconds |
| Started | Aug 12 06:36:52 PM PDT 24 |
| Finished | Aug 12 06:37:09 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-f4e47b82-24ed-4a7d-a8c8-b00d4fb2a4c1 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=83524009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.83524009 |
| Directory | /workspace/48.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_resume.2500438697 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 26435754447 ps |
| CPU time | 36.41 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-bb9158a2-4dbe-43ce-87f9-e4d57445b250 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2500438697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_a on_wake_resume.2500438697 |
| Directory | /workspace/48.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/48.usbdev_av_buffer.482485317 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 143836068 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:36:55 PM PDT 24 |
| Finished | Aug 12 06:36:56 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-c4f48aec-e604-4a35-9079-31f433607652 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48248 5317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_av_buffer.482485317 |
| Directory | /workspace/48.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/48.usbdev_bitstuff_err.2472660634 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 144802735 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:42 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-dbb92359-f971-4c01-890d-eb1f36cf4bc9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24726 60634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_bitstuff_err.2472660634 |
| Directory | /workspace/48.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_data_toggle_clear.678605835 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 172318619 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:54 PM PDT 24 |
| Finished | Aug 12 06:36:55 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-b8ce7900-cf83-46cf-93fe-659b1f92ab45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67860 5835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_clear.678605835 |
| Directory | /workspace/48.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/48.usbdev_data_toggle_restore.4261141735 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 1028543719 ps |
| CPU time | 2.56 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:48 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-0a5189dc-f6cf-4714-a851-fe24066e0f09 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4261141735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.4261141735 |
| Directory | /workspace/48.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/48.usbdev_device_address.396996897 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 19558961403 ps |
| CPU time | 33.39 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:37:14 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-686db5e1-fb4a-4e4d-9401-2284a437d5c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39699 6897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.396996897 |
| Directory | /workspace/48.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/48.usbdev_device_timeout.1197075485 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 4340737890 ps |
| CPU time | 38.36 seconds |
| Started | Aug 12 06:36:55 PM PDT 24 |
| Finished | Aug 12 06:37:33 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-407bb855-cef1-423a-a511-8e69c391728d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1197075485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.1197075485 |
| Directory | /workspace/48.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/48.usbdev_disable_endpoint.1056949193 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 670152265 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-37059a46-51e5-4cb8-a47f-99b163daa8b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10569 49193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.1056949193 |
| Directory | /workspace/48.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/48.usbdev_disconnected.1050328415 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 134509200 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:50 PM PDT 24 |
| Finished | Aug 12 06:36:51 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-de620eca-9323-4eb0-ae45-1aef2b678cab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10503 28415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disconnected.1050328415 |
| Directory | /workspace/48.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/48.usbdev_enable.3518092259 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 43980105 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:36:58 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-127db6b6-da5a-4160-83d3-112756c55c6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35180 92259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_enable.3518092259 |
| Directory | /workspace/48.usbdev_enable/latest |
| Test location | /workspace/coverage/default/48.usbdev_endpoint_access.3358638964 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 884157545 ps |
| CPU time | 2.43 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:47 PM PDT 24 |
| Peak memory | 207108 kb |
| Host | smart-28e00278-6602-425e-9fa8-88b0a7194abf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33586 38964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.3358638964 |
| Directory | /workspace/48.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/48.usbdev_endpoint_types.1095378344 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 191503228 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-149d02eb-98ae-4fc2-8a61-065a5c63204d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1095378344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.1095378344 |
| Directory | /workspace/48.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/48.usbdev_fifo_rst.3962923608 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 182582248 ps |
| CPU time | 2.12 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-ce35d019-7908-4f70-bc62-12868f53275f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39629 23608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_fifo_rst.3962923608 |
| Directory | /workspace/48.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_iso.3766234345 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 190117852 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-df346893-1dec-46b6-a5c0-7c74fac8b94b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3766234345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3766234345 |
| Directory | /workspace/48.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_stall.3002081025 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 149826324 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-af06f509-ece4-4a76-a320-0dc5196df2bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30020 81025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_stall.3002081025 |
| Directory | /workspace/48.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_trans.2240536272 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 188348630 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:36:57 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-2570ebdd-7378-4d0b-ae53-129629822c25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22405 36272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_trans.2240536272 |
| Directory | /workspace/48.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_invalid_sync.4284094166 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 3395552203 ps |
| CPU time | 96.89 seconds |
| Started | Aug 12 06:36:51 PM PDT 24 |
| Finished | Aug 12 06:38:28 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-6b01b292-c935-446f-8aca-d2b01504621d |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4284094166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.4284094166 |
| Directory | /workspace/48.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/48.usbdev_iso_retraction.3683209969 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 5127345725 ps |
| CPU time | 58.82 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:38:01 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-7c304135-0d12-4c46-821b-15914d144853 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3683209969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.3683209969 |
| Directory | /workspace/48.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_in_err.565001197 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 251571594 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-cf71e3b8-10ff-4220-867f-c257a0a485a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56500 1197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_in_err.565001197 |
| Directory | /workspace/48.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_resume.343418385 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 24645855760 ps |
| CPU time | 37.94 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:37:34 PM PDT 24 |
| Peak memory | 216020 kb |
| Host | smart-d5d7ff3f-6849-4b67-962e-82293fe9f1b7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34341 8385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_resume.343418385 |
| Directory | /workspace/48.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_suspend.1493302489 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 8626689521 ps |
| CPU time | 11.96 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-4cb6b1e6-b1fb-46e1-8ac1-169d421280c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14933 02489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_suspend.1493302489 |
| Directory | /workspace/48.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/48.usbdev_low_speed_traffic.3915679829 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 4018449706 ps |
| CPU time | 32.21 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:37:17 PM PDT 24 |
| Peak memory | 224132 kb |
| Host | smart-e6f06dba-a6d7-43dc-82f7-9418c38f9201 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3915679829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.3915679829 |
| Directory | /workspace/48.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_inter_pkt_delay.2730623628 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 1962418968 ps |
| CPU time | 20.59 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:37:17 PM PDT 24 |
| Peak memory | 216456 kb |
| Host | smart-c586bff4-9881-4f69-b1d0-17ac52886008 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2730623628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.2730623628 |
| Directory | /workspace/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_length_in_transaction.1775833652 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 239716055 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-a8e9be88-ce36-4f29-acdb-04c19c40f6c0 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1775833652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.1775833652 |
| Directory | /workspace/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_length_out_transaction.2292620379 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 183249995 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:47 PM PDT 24 |
| Finished | Aug 12 06:36:48 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-98329c31-ac27-49e6-bae7-5d13929304a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22926 20379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.2292620379 |
| Directory | /workspace/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_inter_pkt_delay.1180289726 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 1800547171 ps |
| CPU time | 14.02 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 217036 kb |
| Host | smart-55aa2ad6-4380-4c98-80e4-df5d4ebfa5d1 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1180289726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.1180289726 |
| Directory | /workspace/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_length_in_transaction.2123733915 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 206194381 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-12b2fa9c-c7ab-4595-9a11-19caee89224c |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2123733915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.2123733915 |
| Directory | /workspace/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_length_out_transaction.105331918 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 147622067 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-5e88ebbb-e5e3-489c-9090-8a03f7fe6113 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10533 1918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.105331918 |
| Directory | /workspace/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_nak_trans.318508994 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 215698594 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:36:44 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2bd75b9f-5580-475d-aad5-c94b52bb3cd5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31850 8994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_nak_trans.318508994 |
| Directory | /workspace/48.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_iso.3472837678 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 173103832 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5e156ace-8f2e-435d-99a0-0d0e6a002e24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34728 37678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_iso.3472837678 |
| Directory | /workspace/48.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_stall.118547965 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 153182030 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:53 PM PDT 24 |
| Finished | Aug 12 06:36:54 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-6f89b223-f8a5-4c56-81db-c78767b759ed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11854 7965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_stall.118547965 |
| Directory | /workspace/48.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_trans_nak.532135893 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 185951652 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:51 PM PDT 24 |
| Finished | Aug 12 06:36:52 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f79f904e-234e-402d-87db-11d78a456bcf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53213 5893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_trans_nak.532135893 |
| Directory | /workspace/48.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/48.usbdev_pending_in_trans.277691512 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 165360158 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:36:50 PM PDT 24 |
| Finished | Aug 12 06:36:51 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-1922cd3f-70fa-46c2-9b8d-d0004803b00c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27769 1512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pending_in_trans.277691512 |
| Directory | /workspace/48.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_config_pinflip.1004074703 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 228458605 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:05 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-edfb5115-5546-4e15-9653-e2ea2fc4558a |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1004074703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.1004074703 |
| Directory | /workspace/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_config_usb_ref_disable.2038097853 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 157387267 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:36:50 PM PDT 24 |
| Peak memory | 207196 kb |
| Host | smart-da94222a-909f-47d8-8c30-e3d17a94d802 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20380 97853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.2038097853 |
| Directory | /workspace/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_pins_sense.3627202001 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 52044109 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-7da92c98-947e-4ef6-9783-9d4b30d20c81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36272 02001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.3627202001 |
| Directory | /workspace/48.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_buffer.3849929637 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 20859650350 ps |
| CPU time | 52.77 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:37:35 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-e7a6d32b-1b3d-4ca4-9554-032f920ef721 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38499 29637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_buffer.3849929637 |
| Directory | /workspace/48.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_received.2172166563 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 194073729 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:58 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0a856f9a-323c-492c-8330-b802c53e8e23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21721 66563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_received.2172166563 |
| Directory | /workspace/48.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_sent.2037323985 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 234406909 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:36:57 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e3ed96cd-94bc-40a0-8748-68cd59a2bd63 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20373 23985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_sent.2037323985 |
| Directory | /workspace/48.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/48.usbdev_random_length_in_transaction.2201618201 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 220664966 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:51 PM PDT 24 |
| Finished | Aug 12 06:36:52 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-50353414-b69a-42b5-9695-1fe97ac12ed6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22016 18201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_in_transaction.2201618201 |
| Directory | /workspace/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_random_length_out_transaction.3567416846 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 225029211 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-cb2ff696-0f97-41d8-bdea-848f66d38654 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35674 16846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.3567416846 |
| Directory | /workspace/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_rx_crc_err.360063804 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 148278918 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:36:44 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-3c175f12-40d5-4baa-8f65-6a46afcc0b6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36006 3804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_rx_crc_err.360063804 |
| Directory | /workspace/48.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_rx_full.2970451212 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 376892279 ps |
| CPU time | 1.37 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:36:44 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9b0a2195-a451-4170-8349-bb35fd973d98 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29704 51212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_rx_full.2970451212 |
| Directory | /workspace/48.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/48.usbdev_setup_stage.2358229643 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 179089648 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-153041fd-9054-4663-9455-3a5df75cd5b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23582 29643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_setup_stage.2358229643 |
| Directory | /workspace/48.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/48.usbdev_setup_trans_ignored.3853118736 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 163243006 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-04296af0-f35a-49cc-ad4f-30b93ebbd196 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38531 18736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_setup_trans_ignored.3853118736 |
| Directory | /workspace/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/48.usbdev_smoke.1605139849 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 218951334 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-a54afecd-5c41-4799-856b-16964c9e7359 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16051 39849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.1605139849 |
| Directory | /workspace/48.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/48.usbdev_spurious_pids_ignored.2001805444 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 2321150510 ps |
| CPU time | 17.58 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 224104 kb |
| Host | smart-04fe883a-975c-4e29-990f-786c3fba7542 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2001805444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.2001805444 |
| Directory | /workspace/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/48.usbdev_stall_priority_over_nak.1836487933 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 179598017 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:55 PM PDT 24 |
| Finished | Aug 12 06:36:56 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-592b16c0-cb98-45bc-918a-0f771473e43e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18364 87933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.1836487933 |
| Directory | /workspace/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/48.usbdev_stall_trans.482986235 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 181671275 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c47b3f2f-210c-4274-9102-39a3af1d5371 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48298 6235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_trans.482986235 |
| Directory | /workspace/48.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_stream_len_max.771370564 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 487085979 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:36:50 PM PDT 24 |
| Finished | Aug 12 06:36:52 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-9535b2ce-def6-45e5-b6d4-d8c856311792 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77137 0564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.771370564 |
| Directory | /workspace/48.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/48.usbdev_streaming_out.2036285306 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 2191607420 ps |
| CPU time | 63.16 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:37:47 PM PDT 24 |
| Peak memory | 217192 kb |
| Host | smart-f47d52c2-a02e-4083-ac64-1996e02e8496 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20362 85306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_streaming_out.2036285306 |
| Directory | /workspace/48.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/48.usbdev_timeout_missing_host_handshake.2204988589 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 3969872879 ps |
| CPU time | 34.64 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:37:19 PM PDT 24 |
| Peak memory | 207068 kb |
| Host | smart-15b8e6ed-d97e-4cb8-a794-ea8825e7b87c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2204988589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_hos t_handshake.2204988589 |
| Directory | /workspace/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/48.usbdev_tx_rx_disruption.3029644928 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 637937767 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:36:46 PM PDT 24 |
| Finished | Aug 12 06:36:48 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-66b27f0a-30ac-4759-ae6e-2429d41442c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3029644928 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_tx_rx_disruption.3029644928 |
| Directory | /workspace/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/480.usbdev_tx_rx_disruption.1037228936 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 500617681 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:38:22 PM PDT 24 |
| Finished | Aug 12 06:38:24 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-f6072405-9f45-4025-9f2d-bb2993e8b819 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1037228936 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 480.usbdev_tx_rx_disruption.1037228936 |
| Directory | /workspace/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/481.usbdev_tx_rx_disruption.3390467508 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 461234947 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:38:17 PM PDT 24 |
| Finished | Aug 12 06:38:19 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a4c6b822-cd9a-4678-9a37-dbd36fd52511 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3390467508 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 481.usbdev_tx_rx_disruption.3390467508 |
| Directory | /workspace/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/482.usbdev_tx_rx_disruption.1686874032 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 574270218 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:38:07 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-54279ad4-92ef-4140-ae33-aa86486e3017 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1686874032 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 482.usbdev_tx_rx_disruption.1686874032 |
| Directory | /workspace/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/483.usbdev_tx_rx_disruption.65521929 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 526693346 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:22 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-38e6761f-5dc0-4ce5-af0c-c981901afb62 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65521929 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 483.usbdev_tx_rx_disruption.65521929 |
| Directory | /workspace/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/484.usbdev_tx_rx_disruption.2678162544 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 476196063 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:38:39 PM PDT 24 |
| Finished | Aug 12 06:38:41 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-245a4b3b-43cb-47db-933d-68399d577f72 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2678162544 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 484.usbdev_tx_rx_disruption.2678162544 |
| Directory | /workspace/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/485.usbdev_tx_rx_disruption.809152434 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 487666705 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:38:05 PM PDT 24 |
| Finished | Aug 12 06:38:07 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-288dfa56-c0ce-4374-b968-dd02f44527a5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=809152434 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 485.usbdev_tx_rx_disruption.809152434 |
| Directory | /workspace/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/486.usbdev_tx_rx_disruption.4153245559 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 648429226 ps |
| CPU time | 1.61 seconds |
| Started | Aug 12 06:38:09 PM PDT 24 |
| Finished | Aug 12 06:38:11 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-cf5259dd-1a03-42c8-859a-e176baa38f83 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4153245559 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 486.usbdev_tx_rx_disruption.4153245559 |
| Directory | /workspace/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/487.usbdev_tx_rx_disruption.2484934626 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 555405224 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:38:19 PM PDT 24 |
| Finished | Aug 12 06:38:21 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-cfa54bbe-98e3-46d6-a882-2797cbc869b5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2484934626 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 487.usbdev_tx_rx_disruption.2484934626 |
| Directory | /workspace/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/488.usbdev_tx_rx_disruption.2402820740 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 403202082 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:38:30 PM PDT 24 |
| Finished | Aug 12 06:38:32 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-893b8446-d403-46ad-a28e-7043d0e06994 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2402820740 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 488.usbdev_tx_rx_disruption.2402820740 |
| Directory | /workspace/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/489.usbdev_tx_rx_disruption.600337299 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 467493255 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:38:36 PM PDT 24 |
| Finished | Aug 12 06:38:38 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-d1b9bcc2-b7a8-4a32-b5f8-0a53aa0b4888 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=600337299 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 489.usbdev_tx_rx_disruption.600337299 |
| Directory | /workspace/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/49.usbdev_alert_test.2007953791 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 39297979 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:37:07 PM PDT 24 |
| Finished | Aug 12 06:37:08 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-4c1460c3-c830-4a76-bdfb-0e5d07c15b00 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2007953791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.2007953791 |
| Directory | /workspace/49.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_disconnect.697382895 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 10285770989 ps |
| CPU time | 13.34 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:14 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-187bec3c-a23f-42cd-affd-57ba762c252b |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=697382895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_ao n_wake_disconnect.697382895 |
| Directory | /workspace/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_reset.3185592202 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 20612006723 ps |
| CPU time | 23.98 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:32 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-29fb165d-4132-4c1f-a373-3bc932dd144d |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3185592202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.3185592202 |
| Directory | /workspace/49.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_resume.5705483 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 31420270114 ps |
| CPU time | 43.63 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:37:25 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-1bc19d61-7bc2-4541-a31d-73c87de672e9 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=5705483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_ wake_resume.5705483 |
| Directory | /workspace/49.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/49.usbdev_av_buffer.1139666406 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 151536249 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:36:49 PM PDT 24 |
| Finished | Aug 12 06:36:50 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-0dd5f404-22c6-4153-9455-ba22035c07c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11396 66406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_av_buffer.1139666406 |
| Directory | /workspace/49.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/49.usbdev_bitstuff_err.1232189182 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 145175628 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-5237db0b-7bbc-477a-aa8d-afc01fca90de |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12321 89182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_bitstuff_err.1232189182 |
| Directory | /workspace/49.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_data_toggle_clear.693006988 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 504437228 ps |
| CPU time | 1.81 seconds |
| Started | Aug 12 06:37:19 PM PDT 24 |
| Finished | Aug 12 06:37:21 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-7c8cb5ae-f8df-4094-a021-31f3b3481e4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69300 6988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_clear.693006988 |
| Directory | /workspace/49.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/49.usbdev_data_toggle_restore.3421363990 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 291220484 ps |
| CPU time | 1.13 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-e5dd80c1-644e-43c1-a5c4-13d2c8c39c09 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3421363990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.3421363990 |
| Directory | /workspace/49.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/49.usbdev_device_address.478857991 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 36039916250 ps |
| CPU time | 54.12 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:54 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-9f4cb6b3-2ad0-4439-a474-e835fa0d8bac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47885 7991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.478857991 |
| Directory | /workspace/49.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/49.usbdev_device_timeout.2403441789 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 1442681768 ps |
| CPU time | 31.61 seconds |
| Started | Aug 12 06:36:41 PM PDT 24 |
| Finished | Aug 12 06:37:13 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-f8b2e612-23f4-48cb-b18d-eafd90a0834a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2403441789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.2403441789 |
| Directory | /workspace/49.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/49.usbdev_disable_endpoint.545024999 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 1036876637 ps |
| CPU time | 2.29 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-2bfda61b-cec4-4fbc-8526-ac45c37f7f8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54502 4999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_disable_endpoint.545024999 |
| Directory | /workspace/49.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/49.usbdev_disconnected.3284034439 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 148487948 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:10 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-feafde9b-010d-4dca-8a78-6ec40de5905d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32840 34439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_disconnected.3284034439 |
| Directory | /workspace/49.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/49.usbdev_enable.1877529161 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 61494148 ps |
| CPU time | 0.72 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-c931ebe6-e69c-4a4b-9204-6658c1bd1566 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18775 29161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_enable.1877529161 |
| Directory | /workspace/49.usbdev_enable/latest |
| Test location | /workspace/coverage/default/49.usbdev_endpoint_access.3851138388 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 868171614 ps |
| CPU time | 2.32 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:47 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-5f75baa1-64cb-494d-8fe9-6209d5c4e7c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38511 38388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3851138388 |
| Directory | /workspace/49.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/49.usbdev_endpoint_types.3876514240 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 530430344 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:37:21 PM PDT 24 |
| Finished | Aug 12 06:37:22 PM PDT 24 |
| Peak memory | 206404 kb |
| Host | smart-cb1b11b8-5568-42cd-9a01-27d67fb16347 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3876514240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.3876514240 |
| Directory | /workspace/49.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/49.usbdev_fifo_rst.3986753016 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 208542305 ps |
| CPU time | 2.08 seconds |
| Started | Aug 12 06:36:49 PM PDT 24 |
| Finished | Aug 12 06:36:51 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-edddc32f-ba83-4eb7-a373-a4cbe553c185 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39867 53016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_fifo_rst.3986753016 |
| Directory | /workspace/49.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_iso.2761102909 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 159938216 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-cd1de6ea-6a33-43ac-9fc1-0537add391e4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2761102909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.2761102909 |
| Directory | /workspace/49.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_stall.1257215269 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 148955852 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:36:47 PM PDT 24 |
| Finished | Aug 12 06:36:48 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-1524991c-9ba5-4a7f-8157-1b0981345cfe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12572 15269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_stall.1257215269 |
| Directory | /workspace/49.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_trans.497811596 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 187926396 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:37:05 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-569435e1-78df-4fb1-9d28-5a03efd44a58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49781 1596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_trans.497811596 |
| Directory | /workspace/49.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_invalid_sync.2756114645 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 4353418128 ps |
| CPU time | 44.7 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:37:29 PM PDT 24 |
| Peak memory | 218336 kb |
| Host | smart-9e8f8ef2-29a3-43b1-85ba-ed5557e5177a |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2756114645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.2756114645 |
| Directory | /workspace/49.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/49.usbdev_iso_retraction.346748831 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 4366096226 ps |
| CPU time | 52.03 seconds |
| Started | Aug 12 06:36:47 PM PDT 24 |
| Finished | Aug 12 06:37:39 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-062aa0e3-cfff-4af9-a5dd-b59897c18e2c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=346748831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.346748831 |
| Directory | /workspace/49.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_in_err.2352826622 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 195623319 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9fecd497-60ad-4262-840a-44ae179fe7f5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23528 26622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_in_err.2352826622 |
| Directory | /workspace/49.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_resume.3980875614 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 9348731807 ps |
| CPU time | 12.78 seconds |
| Started | Aug 12 06:36:46 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-27c3544d-0473-47a4-944d-3780b1b47cb7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39808 75614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_resume.3980875614 |
| Directory | /workspace/49.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_suspend.81046414 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 4097160436 ps |
| CPU time | 5.58 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-da604c6f-6e1e-4de8-b08c-7ce9ed981fb1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81046 414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_suspend.81046414 |
| Directory | /workspace/49.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/49.usbdev_low_speed_traffic.2571120952 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 3831282239 ps |
| CPU time | 33.25 seconds |
| Started | Aug 12 06:36:43 PM PDT 24 |
| Finished | Aug 12 06:37:16 PM PDT 24 |
| Peak memory | 219500 kb |
| Host | smart-4e64f61b-056b-419d-973c-84bd2dad3a2a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2571120952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.2571120952 |
| Directory | /workspace/49.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_inter_pkt_delay.1562117298 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 2638726595 ps |
| CPU time | 76.95 seconds |
| Started | Aug 12 06:36:48 PM PDT 24 |
| Finished | Aug 12 06:38:05 PM PDT 24 |
| Peak memory | 215908 kb |
| Host | smart-3b937e75-3793-4de0-bc9d-77393ac2f4e1 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1562117298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.1562117298 |
| Directory | /workspace/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_length_in_transaction.1746699397 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 230000789 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-fe9b8ea4-b512-4899-a262-55f2c25dc15b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1746699397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.1746699397 |
| Directory | /workspace/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_length_out_transaction.1991053063 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 201042105 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:36:46 PM PDT 24 |
| Finished | Aug 12 06:36:47 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-7d452e24-76d1-4ffa-9f7e-335057f511bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19910 53063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.1991053063 |
| Directory | /workspace/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_inter_pkt_delay.2915468501 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 2390552545 ps |
| CPU time | 17.96 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:37 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-474955b8-79aa-4ce1-8577-2492d03e2138 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2915468501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.2915468501 |
| Directory | /workspace/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_length_in_transaction.3305375484 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 154863216 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:36:48 PM PDT 24 |
| Finished | Aug 12 06:36:59 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e13c52de-7033-47c9-a724-4aa8ff208e3c |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3305375484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.3305375484 |
| Directory | /workspace/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_length_out_transaction.1193710168 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 227949937 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:36:49 PM PDT 24 |
| Finished | Aug 12 06:36:51 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f3d0d979-25be-4690-8287-cbe7b6202b29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11937 10168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.1193710168 |
| Directory | /workspace/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_nak_trans.1017167346 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 167571767 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7c49286c-0b31-4e73-bb67-a2dca095a84c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10171 67346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_nak_trans.1017167346 |
| Directory | /workspace/49.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_iso.3271518442 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 167565284 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:36:45 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6a4ab23a-8883-4c86-ac65-821b731bbc8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32715 18442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_iso.3271518442 |
| Directory | /workspace/49.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_stall.2253606088 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 240410321 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a1be3266-c385-43ef-a0fe-799325947ef4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22536 06088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_stall.2253606088 |
| Directory | /workspace/49.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_trans_nak.719494402 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 172671573 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:36:56 PM PDT 24 |
| Finished | Aug 12 06:36:57 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-4da85d3a-2bbb-46a2-8da9-63c7d42eabdb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71949 4402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_trans_nak.719494402 |
| Directory | /workspace/49.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/49.usbdev_pending_in_trans.233445381 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 164132773 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-00217b26-ed3b-4cc0-a28a-e2e4083df233 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23344 5381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pending_in_trans.233445381 |
| Directory | /workspace/49.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_config_pinflip.3822029687 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 221889208 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-444f40e9-3dca-4128-ba3e-19f7e9477e5b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3822029687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.3822029687 |
| Directory | /workspace/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_config_usb_ref_disable.249509020 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 147567037 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:42 PM PDT 24 |
| Finished | Aug 12 06:36:43 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-c8f8eb26-646d-47a4-9bf8-f3d3f3634f99 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24950 9020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.249509020 |
| Directory | /workspace/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_pins_sense.2285557845 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 76562821 ps |
| CPU time | 0.73 seconds |
| Started | Aug 12 06:37:13 PM PDT 24 |
| Finished | Aug 12 06:37:14 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-97ad62b9-8a9d-4fc3-80ce-47c996561b94 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22855 57845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.2285557845 |
| Directory | /workspace/49.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_buffer.350238701 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 11363823698 ps |
| CPU time | 29.9 seconds |
| Started | Aug 12 06:37:06 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 214868 kb |
| Host | smart-a75f9ca7-e4e4-4cb3-b04b-045c62aa7cfd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35023 8701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_buffer.350238701 |
| Directory | /workspace/49.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_received.1818791056 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 216422641 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:36:54 PM PDT 24 |
| Finished | Aug 12 06:36:55 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-eb74e59d-d054-4677-8f3f-17e88ff8456d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18187 91056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_received.1818791056 |
| Directory | /workspace/49.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_sent.3675054227 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 230574793 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:36:57 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ecf08037-4c29-4e83-ad00-48dbb4268f43 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36750 54227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_sent.3675054227 |
| Directory | /workspace/49.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/49.usbdev_random_length_in_transaction.2958025521 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 222941349 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:36:49 PM PDT 24 |
| Finished | Aug 12 06:36:50 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4b90bff1-ac43-405e-b3ef-b3d704200b5e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29580 25521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_in_transaction.2958025521 |
| Directory | /workspace/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_random_length_out_transaction.967981022 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 144419786 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:37:15 PM PDT 24 |
| Finished | Aug 12 06:37:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-25a91d14-7ec2-44dc-95f0-1f8c9ca84de9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96798 1022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.967981022 |
| Directory | /workspace/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_rx_crc_err.2032197186 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 176701009 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d4013f41-c6b9-400f-a796-36b8c0104f27 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20321 97186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_rx_crc_err.2032197186 |
| Directory | /workspace/49.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_rx_full.1796859068 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 252848401 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-12038dae-44bc-4767-8f19-5c13d06471af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17968 59068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_rx_full.1796859068 |
| Directory | /workspace/49.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/49.usbdev_setup_stage.2952372382 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 142171983 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:36:49 PM PDT 24 |
| Finished | Aug 12 06:36:50 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-196c1705-8182-454d-a743-3e3934d762a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29523 72382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_setup_stage.2952372382 |
| Directory | /workspace/49.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/49.usbdev_setup_trans_ignored.1694693151 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 147361720 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:37:12 PM PDT 24 |
| Finished | Aug 12 06:37:13 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-baa0d3e7-0b2c-4c2a-840d-5c7e3b9f1c2d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16946 93151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_setup_trans_ignored.1694693151 |
| Directory | /workspace/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/49.usbdev_smoke.2949471959 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 223291412 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:36:45 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-430fc327-bb0e-4426-a5f8-18f7349391eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29494 71959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.2949471959 |
| Directory | /workspace/49.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/49.usbdev_spurious_pids_ignored.3523509501 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 2926102338 ps |
| CPU time | 29.81 seconds |
| Started | Aug 12 06:37:22 PM PDT 24 |
| Finished | Aug 12 06:37:52 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-0599c0a1-17d5-4fa0-8dd4-2fad115f034f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3523509501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.3523509501 |
| Directory | /workspace/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/49.usbdev_stall_priority_over_nak.1531779539 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 145499829 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-725f6359-7700-48ae-b2a2-cab47cf50729 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15317 79539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.1531779539 |
| Directory | /workspace/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/49.usbdev_stall_trans.4204065339 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 216545699 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:36:44 PM PDT 24 |
| Finished | Aug 12 06:36:46 PM PDT 24 |
| Peak memory | 207232 kb |
| Host | smart-fb1aaf74-9bff-4661-9e44-533918ed3daa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42040 65339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_trans.4204065339 |
| Directory | /workspace/49.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_stream_len_max.3184217966 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 564976348 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b0598924-a6c4-454b-949a-b0c7618763d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31842 17966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.3184217966 |
| Directory | /workspace/49.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/49.usbdev_streaming_out.2294355711 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 2993741446 ps |
| CPU time | 89.03 seconds |
| Started | Aug 12 06:37:19 PM PDT 24 |
| Finished | Aug 12 06:38:48 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-cccb8c32-a823-4d57-808d-0cd53709355e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22943 55711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_streaming_out.2294355711 |
| Directory | /workspace/49.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/49.usbdev_timeout_missing_host_handshake.3952598112 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 920609832 ps |
| CPU time | 19.95 seconds |
| Started | Aug 12 06:37:10 PM PDT 24 |
| Finished | Aug 12 06:37:30 PM PDT 24 |
| Peak memory | 206620 kb |
| Host | smart-cb8f9c3b-9bd1-4720-99f8-0d3a84f290ae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3952598112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_hos t_handshake.3952598112 |
| Directory | /workspace/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/49.usbdev_tx_rx_disruption.2256723221 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 693797490 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:37:28 PM PDT 24 |
| Finished | Aug 12 06:37:30 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-804f8132-e81f-4314-bb50-b78a877587a0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2256723221 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_tx_rx_disruption.2256723221 |
| Directory | /workspace/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/490.usbdev_tx_rx_disruption.651510083 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 520480714 ps |
| CPU time | 1.42 seconds |
| Started | Aug 12 06:38:19 PM PDT 24 |
| Finished | Aug 12 06:38:21 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-73b43547-538e-4d2f-9254-c81a2b848005 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=651510083 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 490.usbdev_tx_rx_disruption.651510083 |
| Directory | /workspace/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/491.usbdev_tx_rx_disruption.123500399 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 522511682 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:38:14 PM PDT 24 |
| Finished | Aug 12 06:38:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-eacb9734-a1ea-4c7e-bf93-0455ac09cdb3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=123500399 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 491.usbdev_tx_rx_disruption.123500399 |
| Directory | /workspace/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/492.usbdev_tx_rx_disruption.2379646366 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 610461941 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:38:18 PM PDT 24 |
| Finished | Aug 12 06:38:19 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-70676776-3130-4d84-8feb-fcb35158006c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2379646366 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 492.usbdev_tx_rx_disruption.2379646366 |
| Directory | /workspace/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/493.usbdev_tx_rx_disruption.3732424181 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 472129889 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:38:29 PM PDT 24 |
| Finished | Aug 12 06:38:31 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-fc744867-15d6-441d-98e2-59f429fed129 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3732424181 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 493.usbdev_tx_rx_disruption.3732424181 |
| Directory | /workspace/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/494.usbdev_tx_rx_disruption.1708190703 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 686703894 ps |
| CPU time | 1.9 seconds |
| Started | Aug 12 06:38:08 PM PDT 24 |
| Finished | Aug 12 06:38:10 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a0b76a69-33db-4262-8285-71dbd1493b0d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1708190703 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 494.usbdev_tx_rx_disruption.1708190703 |
| Directory | /workspace/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/495.usbdev_tx_rx_disruption.3184472038 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 530986065 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:38:10 PM PDT 24 |
| Finished | Aug 12 06:38:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-548d0427-42ff-43d6-9981-114791cbb256 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3184472038 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 495.usbdev_tx_rx_disruption.3184472038 |
| Directory | /workspace/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/496.usbdev_tx_rx_disruption.372914390 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 571199626 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:38:07 PM PDT 24 |
| Finished | Aug 12 06:38:09 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-7082261f-b1a1-442e-bbf9-b2e76074a65a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=372914390 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 496.usbdev_tx_rx_disruption.372914390 |
| Directory | /workspace/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/497.usbdev_tx_rx_disruption.3343875060 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 586035850 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:23 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8c03c6db-474a-40af-bcea-e3ed61b1e656 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3343875060 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 497.usbdev_tx_rx_disruption.3343875060 |
| Directory | /workspace/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/498.usbdev_tx_rx_disruption.739990558 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 479655710 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:38:23 PM PDT 24 |
| Finished | Aug 12 06:38:24 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-b07aefca-fad2-4821-a90f-3f96e0a71d86 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=739990558 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 498.usbdev_tx_rx_disruption.739990558 |
| Directory | /workspace/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/499.usbdev_tx_rx_disruption.847924580 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 586866995 ps |
| CPU time | 1.74 seconds |
| Started | Aug 12 06:38:21 PM PDT 24 |
| Finished | Aug 12 06:38:23 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-d2c5cbc2-93f9-4dfe-b4a8-495c2b022b92 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=847924580 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 499.usbdev_tx_rx_disruption.847924580 |
| Directory | /workspace/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/5.usbdev_alert_test.3708967520 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 33429646 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:30:16 PM PDT 24 |
| Finished | Aug 12 06:30:17 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-6220fa25-7c5d-40e5-b759-7cc403bdeef6 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3708967520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.3708967520 |
| Directory | /workspace/5.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_disconnect.383503664 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 9172095174 ps |
| CPU time | 14.66 seconds |
| Started | Aug 12 06:30:09 PM PDT 24 |
| Finished | Aug 12 06:30:24 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-3ab384e2-dbd4-49ed-a64b-aeef5b3409b9 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=383503664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon _wake_disconnect.383503664 |
| Directory | /workspace/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_reset.801364438 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 14230750095 ps |
| CPU time | 16.48 seconds |
| Started | Aug 12 06:30:12 PM PDT 24 |
| Finished | Aug 12 06:30:29 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-132a10bf-f7f6-4a37-8371-c3079c8d3e88 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=801364438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.801364438 |
| Directory | /workspace/5.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_resume.161483549 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 25520058610 ps |
| CPU time | 28.48 seconds |
| Started | Aug 12 06:30:10 PM PDT 24 |
| Finished | Aug 12 06:30:38 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-7af4bdc8-b6dc-43fc-b8d0-2f4c9b005ae7 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=161483549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon _wake_resume.161483549 |
| Directory | /workspace/5.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/5.usbdev_av_buffer.1233203127 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 177818902 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-00955a92-0df4-4eb6-90a2-53799468a28a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12332 03127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_av_buffer.1233203127 |
| Directory | /workspace/5.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/5.usbdev_bitstuff_err.1958063536 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 145205563 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:30:09 PM PDT 24 |
| Finished | Aug 12 06:30:10 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-bee0db4b-57eb-4850-8a96-26588aed249a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19580 63536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_bitstuff_err.1958063536 |
| Directory | /workspace/5.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_data_toggle_clear.2352588556 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 213105360 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-b964603c-4573-4660-ae5a-6cab4eda7d23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23525 88556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_clear.2352588556 |
| Directory | /workspace/5.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/5.usbdev_data_toggle_restore.192567519 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 461467802 ps |
| CPU time | 1.33 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-b6c85742-057d-406a-892d-07341f8baa6c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=192567519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.192567519 |
| Directory | /workspace/5.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/5.usbdev_device_address.2908988050 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 45982045473 ps |
| CPU time | 79.11 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:31:27 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-83cfbace-fa4f-4f1b-908b-c12d994fe3a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29089 88050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.2908988050 |
| Directory | /workspace/5.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/5.usbdev_device_timeout.1244534247 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 740749940 ps |
| CPU time | 15.41 seconds |
| Started | Aug 12 06:30:06 PM PDT 24 |
| Finished | Aug 12 06:30:22 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-62c83d19-f1c5-4591-b817-662dbc8ab073 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1244534247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.1244534247 |
| Directory | /workspace/5.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/5.usbdev_disable_endpoint.1651295513 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 844659436 ps |
| CPU time | 1.86 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-8d70bc5b-2a11-4f68-9a74-6185af1f4bc0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16512 95513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_disable_endpoint.1651295513 |
| Directory | /workspace/5.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/5.usbdev_disconnected.1174890805 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 181100663 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:08 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-96589a92-22ae-400c-8a15-f5fc776c9849 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11748 90805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_disconnected.1174890805 |
| Directory | /workspace/5.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/5.usbdev_enable.3566078949 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 60089597 ps |
| CPU time | 0.75 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:08 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-54145eb9-f645-4895-92d1-ecc3a54e8010 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35660 78949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_enable.3566078949 |
| Directory | /workspace/5.usbdev_enable/latest |
| Test location | /workspace/coverage/default/5.usbdev_endpoint_access.1046970984 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 893956331 ps |
| CPU time | 2.45 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:10 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-0a4d8401-f76e-49f7-81c2-87562b79c830 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10469 70984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.1046970984 |
| Directory | /workspace/5.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/5.usbdev_endpoint_types.3668252419 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 988924072 ps |
| CPU time | 2.43 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:11 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-1ceeaadb-9fe7-4658-9a49-41c11f7c844f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3668252419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.3668252419 |
| Directory | /workspace/5.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/5.usbdev_fifo_rst.983382582 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 178585730 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:30:10 PM PDT 24 |
| Finished | Aug 12 06:30:12 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-95bd432b-adb6-4391-a207-891e659008d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98338 2582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_fifo_rst.983382582 |
| Directory | /workspace/5.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_iso.2908644687 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 212969459 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-c3e548cd-7974-4c9c-9b54-ceae7add49d9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2908644687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.2908644687 |
| Directory | /workspace/5.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_stall.159248337 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 144936700 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:30:06 PM PDT 24 |
| Finished | Aug 12 06:30:07 PM PDT 24 |
| Peak memory | 207328 kb |
| Host | smart-e25e6c4b-ef12-45b7-8dd5-8a958edd9e5e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15924 8337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_stall.159248337 |
| Directory | /workspace/5.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_trans.4058298832 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 215317839 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-3cd9f4ba-ca10-4961-a165-074387b9b100 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40582 98832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_trans.4058298832 |
| Directory | /workspace/5.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_invalid_sync.676328394 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 4191941308 ps |
| CPU time | 33.3 seconds |
| Started | Aug 12 06:30:09 PM PDT 24 |
| Finished | Aug 12 06:30:43 PM PDT 24 |
| Peak memory | 224092 kb |
| Host | smart-b6b2d9cf-e95a-4ee3-a0d1-6596986eb45f |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=676328394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.676328394 |
| Directory | /workspace/5.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/5.usbdev_iso_retraction.2943104887 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 8120758952 ps |
| CPU time | 52.18 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-5774b12d-1897-4a46-879b-0cffaab2ff30 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2943104887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.2943104887 |
| Directory | /workspace/5.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_in_err.2960368902 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 245757591 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-79248c6b-ad12-4831-a087-b596a349e36f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29603 68902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_in_err.2960368902 |
| Directory | /workspace/5.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_resume.2868924274 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 11535389653 ps |
| CPU time | 17.14 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:25 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-a67cf17f-ad3b-4d00-a3e7-3b8241e5b3ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28689 24274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_resume.2868924274 |
| Directory | /workspace/5.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_suspend.2485191872 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 6227015970 ps |
| CPU time | 9.28 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:16 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-0376aaee-3664-4510-b9f4-34bfd9bd6f96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24851 91872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_suspend.2485191872 |
| Directory | /workspace/5.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/5.usbdev_low_speed_traffic.3887509443 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 4176261602 ps |
| CPU time | 126.42 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:32:13 PM PDT 24 |
| Peak memory | 218536 kb |
| Host | smart-24a1616f-2dd4-4e93-b3bf-c8ebc25fba1e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3887509443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.3887509443 |
| Directory | /workspace/5.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_inter_pkt_delay.3980770350 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 2580377183 ps |
| CPU time | 26.6 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:35 PM PDT 24 |
| Peak memory | 217648 kb |
| Host | smart-86ce87d2-1182-41fd-b608-882ccc0d7a82 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3980770350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.3980770350 |
| Directory | /workspace/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_length_in_transaction.1573702524 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 251525395 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-0bb70181-2d9e-45bf-9bac-f2cb38d035de |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1573702524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.1573702524 |
| Directory | /workspace/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_length_out_transaction.2648699826 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 193649818 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-da39f7a1-bfd1-4f7e-801a-6cbca9b1f5ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26486 99826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.2648699826 |
| Directory | /workspace/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_non_iso_usb_traffic.3810820994 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 3474772566 ps |
| CPU time | 28.67 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:35 PM PDT 24 |
| Peak memory | 217180 kb |
| Host | smart-89c6acd4-1b65-4e93-9c33-be96bacd9387 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38108 20994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.3810820994 |
| Directory | /workspace/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_usb_traffic.2612584969 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 2458458065 ps |
| CPU time | 22.6 seconds |
| Started | Aug 12 06:30:09 PM PDT 24 |
| Finished | Aug 12 06:30:32 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-b6f8c190-011a-4e55-99ec-b99da1a88c4a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2612584969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.2612584969 |
| Directory | /workspace/5.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_inter_pkt_delay.4051321174 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 1928426471 ps |
| CPU time | 54.27 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:31:02 PM PDT 24 |
| Peak memory | 217388 kb |
| Host | smart-af17b758-155b-425f-8fa8-89c432d02e5c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4051321174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.4051321174 |
| Directory | /workspace/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_length_in_transaction.1992352040 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 152780420 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:09 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-18dce0e2-e368-45f3-b951-e67b9ad03816 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1992352040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.1992352040 |
| Directory | /workspace/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_length_out_transaction.4047361524 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 174057363 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:30:07 PM PDT 24 |
| Finished | Aug 12 06:30:08 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-40dd0299-d4d7-4c0b-8948-3c40c9d47648 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40473 61524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.4047361524 |
| Directory | /workspace/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_nak_trans.768729939 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 216903005 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:30:08 PM PDT 24 |
| Finished | Aug 12 06:30:10 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e50dca26-9769-46cb-a4a6-f8b0418c7b06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76872 9939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_nak_trans.768729939 |
| Directory | /workspace/5.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_iso.631135299 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 222880671 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:09 PM PDT 24 |
| Finished | Aug 12 06:30:10 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-65cfe7a0-a910-4642-8a41-ce8d715ff2ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63113 5299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_iso.631135299 |
| Directory | /workspace/5.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_stall.1624541300 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 159440199 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:27 PM PDT 24 |
| Finished | Aug 12 06:30:28 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-ccdfb4c4-30f1-4dfb-aad0-04adf2c11db4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16245 41300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_stall.1624541300 |
| Directory | /workspace/5.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_trans_nak.2778064074 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 198418336 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-4ed89158-0577-42a7-aefe-b9ef11bb438b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27780 64074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_trans_nak.2778064074 |
| Directory | /workspace/5.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/5.usbdev_pending_in_trans.4114725485 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 165781409 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:30:17 PM PDT 24 |
| Finished | Aug 12 06:30:18 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-479a6b51-ea13-49d0-bd4b-cdab2d59cdfa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41147 25485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pending_in_trans.4114725485 |
| Directory | /workspace/5.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_config_pinflip.1737298064 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 177876443 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:15 PM PDT 24 |
| Finished | Aug 12 06:30:16 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-42daf9b0-27b5-45f6-bb85-cbf7ed2da8a7 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1737298064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.1737298064 |
| Directory | /workspace/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_config_usb_ref_disable.4026559617 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 147147269 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:30:28 PM PDT 24 |
| Finished | Aug 12 06:30:29 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-74ea18a3-c737-4bd2-b561-5fb78958fdfb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40265 59617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.4026559617 |
| Directory | /workspace/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_pins_sense.112505590 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 46045456 ps |
| CPU time | 0.71 seconds |
| Started | Aug 12 06:30:18 PM PDT 24 |
| Finished | Aug 12 06:30:19 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-d962b9b6-1df5-41ba-a727-8c0d9a3a94c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11250 5590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.112505590 |
| Directory | /workspace/5.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_buffer.82202261 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 17829679734 ps |
| CPU time | 43.54 seconds |
| Started | Aug 12 06:30:17 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-b9a6f75b-3dc5-458c-a3bf-77859455f7eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82202 261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_buffer.82202261 |
| Directory | /workspace/5.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_received.4001237511 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 162759597 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:30:14 PM PDT 24 |
| Finished | Aug 12 06:30:15 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-9dbf360f-3b14-44e5-b634-2320ad3c46ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40012 37511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_received.4001237511 |
| Directory | /workspace/5.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_sent.3775027232 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 238617132 ps |
| CPU time | 1.08 seconds |
| Started | Aug 12 06:30:15 PM PDT 24 |
| Finished | Aug 12 06:30:17 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-ce8e804c-2694-4af4-9b23-652bb0ea5878 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37750 27232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_sent.3775027232 |
| Directory | /workspace/5.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_bus_resets.3966516748 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 6845267431 ps |
| CPU time | 90.11 seconds |
| Started | Aug 12 06:30:16 PM PDT 24 |
| Finished | Aug 12 06:31:46 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-f221e990-2be4-4453-80f5-7ac41544600f |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3966516748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.3966516748 |
| Directory | /workspace/5.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_suspends.756833639 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 11186835400 ps |
| CPU time | 57.37 seconds |
| Started | Aug 12 06:30:28 PM PDT 24 |
| Finished | Aug 12 06:31:26 PM PDT 24 |
| Peak memory | 224116 kb |
| Host | smart-eb69f574-eb16-41b8-86b7-b5e11745d660 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=756833639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.756833639 |
| Directory | /workspace/5.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/5.usbdev_random_length_in_transaction.447385553 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 190420101 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:30:18 PM PDT 24 |
| Finished | Aug 12 06:30:19 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-150e2f1b-4877-4205-8d63-27a028f65706 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44738 5553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_in_transaction.447385553 |
| Directory | /workspace/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_random_length_out_transaction.4282704386 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 167897028 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-510acb3b-043c-424f-81e4-e2041aeac280 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42827 04386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.4282704386 |
| Directory | /workspace/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_resume_link_active.2709801756 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 20170901386 ps |
| CPU time | 22.31 seconds |
| Started | Aug 12 06:30:16 PM PDT 24 |
| Finished | Aug 12 06:30:38 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-7998a984-24f8-49e6-86d7-ae33fa101485 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27098 01756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_resume_link_active.2709801756 |
| Directory | /workspace/5.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/5.usbdev_rx_crc_err.3546602967 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 167548162 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:30:16 PM PDT 24 |
| Finished | Aug 12 06:30:17 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-e5c7e87a-3ba1-4fe2-8873-f369b1c80282 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35466 02967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rx_crc_err.3546602967 |
| Directory | /workspace/5.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_rx_full.3327173400 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 403414361 ps |
| CPU time | 1.39 seconds |
| Started | Aug 12 06:30:15 PM PDT 24 |
| Finished | Aug 12 06:30:17 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8f1e65f7-bcb3-4f87-9407-16917d57e1e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33271 73400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rx_full.3327173400 |
| Directory | /workspace/5.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/5.usbdev_setup_stage.952197555 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 196127604 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:17 PM PDT 24 |
| Finished | Aug 12 06:30:18 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-ded4dc52-ec04-446a-9366-7a397c87bd36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95219 7555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_setup_stage.952197555 |
| Directory | /workspace/5.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/5.usbdev_setup_trans_ignored.4048547437 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 152458726 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:30:15 PM PDT 24 |
| Finished | Aug 12 06:30:16 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-9c896786-ede3-4397-9c33-852d4e984eae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40485 47437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_setup_trans_ignored.4048547437 |
| Directory | /workspace/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/5.usbdev_smoke.2427946518 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 229966879 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:30:15 PM PDT 24 |
| Finished | Aug 12 06:30:16 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-5a8a4938-d70a-4dcd-b650-65c7584a6ecf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24279 46518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.2427946518 |
| Directory | /workspace/5.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/5.usbdev_spurious_pids_ignored.3052248141 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 3316237243 ps |
| CPU time | 34.67 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:54 PM PDT 24 |
| Peak memory | 217820 kb |
| Host | smart-be371e90-dc9a-4c96-b994-94fa8434a7c8 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3052248141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.3052248141 |
| Directory | /workspace/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/5.usbdev_stall_priority_over_nak.2087894095 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 187712438 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:20 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-651bb033-addd-4341-8703-5a2876bcfa91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20878 94095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.2087894095 |
| Directory | /workspace/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/5.usbdev_stall_trans.4097638314 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 156536131 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:17 PM PDT 24 |
| Finished | Aug 12 06:30:18 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-5936af5d-0fbf-448c-a7c8-4cdfd4b8675d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40976 38314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_trans.4097638314 |
| Directory | /workspace/5.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_stream_len_max.2612880301 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 1111899976 ps |
| CPU time | 2.86 seconds |
| Started | Aug 12 06:30:16 PM PDT 24 |
| Finished | Aug 12 06:30:19 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-92f6248f-9b10-43b6-8cb9-f802ff6373be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26128 80301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.2612880301 |
| Directory | /workspace/5.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/5.usbdev_streaming_out.3756247216 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 2831308131 ps |
| CPU time | 80.12 seconds |
| Started | Aug 12 06:30:16 PM PDT 24 |
| Finished | Aug 12 06:31:36 PM PDT 24 |
| Peak memory | 224052 kb |
| Host | smart-cecf2c61-147e-4ba0-872e-5351ab6c7462 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37562 47216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_streaming_out.3756247216 |
| Directory | /workspace/5.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/5.usbdev_timeout_missing_host_handshake.3574228806 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 744043550 ps |
| CPU time | 15.67 seconds |
| Started | Aug 12 06:30:10 PM PDT 24 |
| Finished | Aug 12 06:30:26 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-205de5ac-b5ed-4870-a847-6834bfa97615 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3574228806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host _handshake.3574228806 |
| Directory | /workspace/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/5.usbdev_tx_rx_disruption.1163236684 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 536336502 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:30:28 PM PDT 24 |
| Finished | Aug 12 06:30:29 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-fa92c1ed-3568-43e6-8a49-2a47106ffa99 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1163236684 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_tx_rx_disruption.1163236684 |
| Directory | /workspace/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/50.usbdev_tx_rx_disruption.1533593401 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 550988865 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:36:50 PM PDT 24 |
| Finished | Aug 12 06:36:51 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-1c4d7cac-a6db-405d-912d-e3b161b09f1b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1533593401 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 50.usbdev_tx_rx_disruption.1533593401 |
| Directory | /workspace/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/51.usbdev_endpoint_types.3548026343 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 178449329 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:10 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-71cf7d5c-b72b-4239-b72f-769a261d759f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3548026343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.3548026343 |
| Directory | /workspace/51.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/51.usbdev_tx_rx_disruption.409395467 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 543811265 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e9c2a092-0991-47fc-8870-903deee02275 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=409395467 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 51.usbdev_tx_rx_disruption.409395467 |
| Directory | /workspace/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/52.usbdev_tx_rx_disruption.2983885080 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 576339504 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-78f90bc3-f019-473b-be80-57dda5691e5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2983885080 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 52.usbdev_tx_rx_disruption.2983885080 |
| Directory | /workspace/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/53.usbdev_endpoint_types.3602666685 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 418097597 ps |
| CPU time | 1.27 seconds |
| Started | Aug 12 06:36:52 PM PDT 24 |
| Finished | Aug 12 06:36:54 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-9690cea1-dc4a-49e6-8dc8-f1cf029ddd52 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3602666685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.3602666685 |
| Directory | /workspace/53.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/53.usbdev_tx_rx_disruption.2539443222 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 477734599 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:37:11 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-f2c861f8-f859-4afb-88bd-9ba0cf368e14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2539443222 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 53.usbdev_tx_rx_disruption.2539443222 |
| Directory | /workspace/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/54.usbdev_endpoint_types.4066127814 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 451900951 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:16 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-cf759766-5a33-4d60-9174-bf5e6918994c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4066127814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.4066127814 |
| Directory | /workspace/54.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/54.usbdev_tx_rx_disruption.58162117 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 507687973 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-d0b23d13-598d-4336-9385-3f9bd884458a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58162117 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 54.usbdev_tx_rx_disruption.58162117 |
| Directory | /workspace/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/55.usbdev_endpoint_types.2614279652 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 503607877 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:37:05 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f1680406-ae0a-46fe-967a-9fae3385cd59 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2614279652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.2614279652 |
| Directory | /workspace/55.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/55.usbdev_tx_rx_disruption.72162803 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 484963071 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:22 PM PDT 24 |
| Finished | Aug 12 06:37:23 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7f025b70-f8b3-4188-b6d5-46630a6caaf0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72162803 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 55.usbdev_tx_rx_disruption.72162803 |
| Directory | /workspace/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/56.usbdev_endpoint_types.2895007636 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 223591652 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:37:06 PM PDT 24 |
| Finished | Aug 12 06:37:07 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-37c4637f-1a5b-4e31-979c-8f0e058c36fe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2895007636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.2895007636 |
| Directory | /workspace/56.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/56.usbdev_tx_rx_disruption.1064187873 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 571100210 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:05 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-18cc01f0-be52-436c-80cf-2be75f635215 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1064187873 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 56.usbdev_tx_rx_disruption.1064187873 |
| Directory | /workspace/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/57.usbdev_endpoint_types.2474640585 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 368278516 ps |
| CPU time | 1.2 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-375084a0-8591-4bf7-ade2-fabd6776afbb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2474640585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.2474640585 |
| Directory | /workspace/57.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/57.usbdev_tx_rx_disruption.3191480635 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 456877350 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-195bfe00-c8f6-439a-b6fb-2ac36177797d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3191480635 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 57.usbdev_tx_rx_disruption.3191480635 |
| Directory | /workspace/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/58.usbdev_endpoint_types.2665758504 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 337468083 ps |
| CPU time | 1.27 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-8d78374a-b862-4d72-8cdb-5bc789395dd7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2665758504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.2665758504 |
| Directory | /workspace/58.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/58.usbdev_tx_rx_disruption.1438795040 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 644139645 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:36:51 PM PDT 24 |
| Finished | Aug 12 06:36:52 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-8b709858-51ae-4372-a18c-2de5616924ab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1438795040 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 58.usbdev_tx_rx_disruption.1438795040 |
| Directory | /workspace/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/59.usbdev_endpoint_types.1034395410 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 499468587 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:37:08 PM PDT 24 |
| Finished | Aug 12 06:37:10 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a55ca023-4120-4843-95aa-c44269d50c0c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1034395410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.1034395410 |
| Directory | /workspace/59.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/59.usbdev_tx_rx_disruption.2484928623 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 512190144 ps |
| CPU time | 1.51 seconds |
| Started | Aug 12 06:37:08 PM PDT 24 |
| Finished | Aug 12 06:37:10 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e49ec5cd-fcaf-40b0-83b5-5b53a00dd240 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2484928623 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 59.usbdev_tx_rx_disruption.2484928623 |
| Directory | /workspace/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/6.usbdev_alert_test.2120822214 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 41417852 ps |
| CPU time | 0.67 seconds |
| Started | Aug 12 06:30:34 PM PDT 24 |
| Finished | Aug 12 06:30:35 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-8155666d-eafd-4999-9a47-8095aac3e9d9 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2120822214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.2120822214 |
| Directory | /workspace/6.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_disconnect.3945640652 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 5069613497 ps |
| CPU time | 6.58 seconds |
| Started | Aug 12 06:30:17 PM PDT 24 |
| Finished | Aug 12 06:30:23 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-edc7802c-f4d7-430b-b768-31902e99bf6a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3945640652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_ao n_wake_disconnect.3945640652 |
| Directory | /workspace/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_reset.954392729 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 20209479154 ps |
| CPU time | 22.55 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:42 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-87913013-a151-45e6-bf4b-8b35fb3247f6 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=954392729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.954392729 |
| Directory | /workspace/6.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_resume.1379484791 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 25600651625 ps |
| CPU time | 28.77 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:48 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-9682397e-6c72-4cd5-af24-8af644598503 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1379484791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_ao n_wake_resume.1379484791 |
| Directory | /workspace/6.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/6.usbdev_av_buffer.4132917958 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 183543992 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:18 PM PDT 24 |
| Finished | Aug 12 06:30:19 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-7f2ac81c-e5e4-4b8a-9293-9d942f51ff29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41329 17958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_av_buffer.4132917958 |
| Directory | /workspace/6.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/6.usbdev_bitstuff_err.2277412778 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 143220290 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:30:15 PM PDT 24 |
| Finished | Aug 12 06:30:16 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d299d298-e801-4bc9-9ed3-d0fab03d01ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22774 12778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_bitstuff_err.2277412778 |
| Directory | /workspace/6.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_data_toggle_clear.969974443 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 156173213 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:20 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-b7e983b6-8728-4f9a-b3de-fd0aadd41c40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96997 4443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_clear.969974443 |
| Directory | /workspace/6.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/6.usbdev_data_toggle_restore.2520200156 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 1111471654 ps |
| CPU time | 2.94 seconds |
| Started | Aug 12 06:30:17 PM PDT 24 |
| Finished | Aug 12 06:30:20 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-62484c8a-acc4-4917-a2e9-9764d9e2afb6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2520200156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.2520200156 |
| Directory | /workspace/6.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/6.usbdev_device_address.2323518161 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 30309936589 ps |
| CPU time | 52.24 seconds |
| Started | Aug 12 06:30:17 PM PDT 24 |
| Finished | Aug 12 06:31:10 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-b2a4afcb-95d8-4cd7-9402-4659dd4ec8e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23235 18161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.2323518161 |
| Directory | /workspace/6.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/6.usbdev_device_timeout.358057789 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 1420949643 ps |
| CPU time | 32.9 seconds |
| Started | Aug 12 06:30:19 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-3609a2b2-867e-495d-8d6a-e9122f635765 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=358057789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.358057789 |
| Directory | /workspace/6.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/6.usbdev_disable_endpoint.4185824561 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 959706487 ps |
| CPU time | 2.2 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:25 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-997e386e-b3eb-4866-9959-e9f0e658bc2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41858 24561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disable_endpoint.4185824561 |
| Directory | /workspace/6.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/6.usbdev_disconnected.207172592 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 170243801 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:27 PM PDT 24 |
| Finished | Aug 12 06:30:28 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-17a7f9e8-11f9-43bb-954f-af4646827bf1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20717 2592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disconnected.207172592 |
| Directory | /workspace/6.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/6.usbdev_enable.2337511926 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 37750847 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:24 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-1b0e14b7-839a-4deb-adc1-9e4171f4b53b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23375 11926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_enable.2337511926 |
| Directory | /workspace/6.usbdev_enable/latest |
| Test location | /workspace/coverage/default/6.usbdev_endpoint_access.3926154899 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 816013425 ps |
| CPU time | 2.27 seconds |
| Started | Aug 12 06:30:21 PM PDT 24 |
| Finished | Aug 12 06:30:23 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-1aaa8986-ec2a-484e-a7f4-d59bc311f07c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39261 54899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.3926154899 |
| Directory | /workspace/6.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/6.usbdev_fifo_rst.4142500092 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 181281501 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:30:24 PM PDT 24 |
| Finished | Aug 12 06:30:26 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-bb79c255-525b-4a61-95bb-86a6581af19c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41425 00092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_fifo_rst.4142500092 |
| Directory | /workspace/6.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_iso.388044476 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 230471808 ps |
| CPU time | 1.15 seconds |
| Started | Aug 12 06:30:24 PM PDT 24 |
| Finished | Aug 12 06:30:25 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-1bc2cab3-e495-4861-a5b4-eb22fa8eaf21 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=388044476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.388044476 |
| Directory | /workspace/6.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_stall.1978532703 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 135637153 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:30:22 PM PDT 24 |
| Finished | Aug 12 06:30:23 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-42c1917d-6b96-4ded-8ee9-ac1f279324fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19785 32703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_stall.1978532703 |
| Directory | /workspace/6.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_trans.2398285078 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 170656065 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:30:24 PM PDT 24 |
| Finished | Aug 12 06:30:25 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a6395483-fdbb-4e76-8123-768f29265706 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23982 85078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_trans.2398285078 |
| Directory | /workspace/6.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_invalid_sync.434443634 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 4702712131 ps |
| CPU time | 139.57 seconds |
| Started | Aug 12 06:30:22 PM PDT 24 |
| Finished | Aug 12 06:32:42 PM PDT 24 |
| Peak memory | 217648 kb |
| Host | smart-60137b17-285c-4072-b6da-68dee77d5cf1 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=434443634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.434443634 |
| Directory | /workspace/6.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/6.usbdev_iso_retraction.137608057 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 7884326793 ps |
| CPU time | 99.12 seconds |
| Started | Aug 12 06:30:24 PM PDT 24 |
| Finished | Aug 12 06:32:03 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-018659c2-18ad-40a0-b583-742e81ffc5c6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=137608057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.137608057 |
| Directory | /workspace/6.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_in_err.747828470 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 234756484 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:30:29 PM PDT 24 |
| Finished | Aug 12 06:30:31 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-de164a02-efe6-4044-9b36-93547229b014 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74782 8470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_in_err.747828470 |
| Directory | /workspace/6.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_resume.1624287349 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 23551421531 ps |
| CPU time | 28.29 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-16c8b32b-3bd0-4e4f-a9e5-bbfa5ecfbd8d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16242 87349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_resume.1624287349 |
| Directory | /workspace/6.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_suspend.341053339 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 4287868217 ps |
| CPU time | 6.11 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:30 PM PDT 24 |
| Peak memory | 216116 kb |
| Host | smart-1f530cfd-c365-4a44-865e-3bf2b3eec49c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34105 3339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_suspend.341053339 |
| Directory | /workspace/6.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/6.usbdev_low_speed_traffic.343716779 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 5305089239 ps |
| CPU time | 52.14 seconds |
| Started | Aug 12 06:30:21 PM PDT 24 |
| Finished | Aug 12 06:31:14 PM PDT 24 |
| Peak memory | 219400 kb |
| Host | smart-5639ab88-279d-45d5-9211-5cb063fad1db |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=343716779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.343716779 |
| Directory | /workspace/6.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_inter_pkt_delay.3802223422 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 2235463685 ps |
| CPU time | 21.69 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:45 PM PDT 24 |
| Peak memory | 217444 kb |
| Host | smart-68c40a5c-a27f-429b-b0fe-4c8ad785130e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3802223422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.3802223422 |
| Directory | /workspace/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_length_in_transaction.1950649499 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 250030557 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:30:21 PM PDT 24 |
| Finished | Aug 12 06:30:22 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ccd20b50-ee6f-4e95-a5ff-11b4e971822d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1950649499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.1950649499 |
| Directory | /workspace/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_length_out_transaction.1237000415 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 193630653 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:30:29 PM PDT 24 |
| Finished | Aug 12 06:30:30 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-72a1457c-bbe3-4d43-a92c-28cd0de7d76a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12370 00415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.1237000415 |
| Directory | /workspace/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_non_iso_usb_traffic.2780935114 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 1796445283 ps |
| CPU time | 17.85 seconds |
| Started | Aug 12 06:30:22 PM PDT 24 |
| Finished | Aug 12 06:30:40 PM PDT 24 |
| Peak memory | 224020 kb |
| Host | smart-fff2e56e-e124-4e2f-a00b-3a7ce2b2d40d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27809 35114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.2780935114 |
| Directory | /workspace/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_usb_traffic.253000491 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 2702916793 ps |
| CPU time | 29.58 seconds |
| Started | Aug 12 06:30:27 PM PDT 24 |
| Finished | Aug 12 06:30:56 PM PDT 24 |
| Peak memory | 219396 kb |
| Host | smart-6f8aa8c1-4a2f-4109-a09d-254e644aa560 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=253000491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.253000491 |
| Directory | /workspace/6.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_inter_pkt_delay.1320555713 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 2773539093 ps |
| CPU time | 25.73 seconds |
| Started | Aug 12 06:30:22 PM PDT 24 |
| Finished | Aug 12 06:30:47 PM PDT 24 |
| Peak memory | 217644 kb |
| Host | smart-c9d14f48-0d54-43c3-8e24-5caebb56f681 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1320555713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.1320555713 |
| Directory | /workspace/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_length_in_transaction.4224797235 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 159207303 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:30:29 PM PDT 24 |
| Finished | Aug 12 06:30:30 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-6e9a2661-a5d1-4c1c-9d28-566ceed36908 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4224797235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.4224797235 |
| Directory | /workspace/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_length_out_transaction.1051397576 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 190211050 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:24 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ff4c5b38-449f-4920-8656-15288540e832 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10513 97576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.1051397576 |
| Directory | /workspace/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_nak_trans.2361630978 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 162206089 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:30:22 PM PDT 24 |
| Finished | Aug 12 06:30:23 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-cab6c9e0-0681-424a-9cd0-6b67f923122b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23616 30978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_nak_trans.2361630978 |
| Directory | /workspace/6.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_iso.4213947946 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 160567129 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:30:28 PM PDT 24 |
| Finished | Aug 12 06:30:29 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e4281d45-d213-46dd-8079-f2f99d63f23b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42139 47946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_iso.4213947946 |
| Directory | /workspace/6.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_stall.2777253652 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 165587181 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:30:21 PM PDT 24 |
| Finished | Aug 12 06:30:22 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-b00cc7d7-bdc3-4f5b-aaf0-95e1f11c7190 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27772 53652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_stall.2777253652 |
| Directory | /workspace/6.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_trans_nak.11609558 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 186212981 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:30:21 PM PDT 24 |
| Finished | Aug 12 06:30:22 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-27a9e6f5-375d-4eb8-9fe5-11e99527fe33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11609 558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_trans_nak.11609558 |
| Directory | /workspace/6.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/6.usbdev_pending_in_trans.2066918690 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 158927999 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:30:29 PM PDT 24 |
| Finished | Aug 12 06:30:30 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-43be2cd7-fd10-417b-9327-4615b976ad43 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20669 18690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pending_in_trans.2066918690 |
| Directory | /workspace/6.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_config_pinflip.3505011686 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 232746463 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:30:21 PM PDT 24 |
| Finished | Aug 12 06:30:22 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-2a64ac16-2df9-4d4e-b5fc-d9bf400a5f08 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3505011686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.3505011686 |
| Directory | /workspace/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_config_usb_ref_disable.1955702866 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 189579479 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:29 PM PDT 24 |
| Finished | Aug 12 06:30:31 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e39c2602-6ff4-4cc2-aeb6-cc8df6ae39c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19557 02866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.1955702866 |
| Directory | /workspace/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_pins_sense.535745471 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 37323046 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:30:21 PM PDT 24 |
| Finished | Aug 12 06:30:22 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-37139c62-c7d8-404f-a129-aeabb3c38fd1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53574 5471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.535745471 |
| Directory | /workspace/6.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_buffer.3052834144 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 5813247779 ps |
| CPU time | 15.36 seconds |
| Started | Aug 12 06:30:22 PM PDT 24 |
| Finished | Aug 12 06:30:38 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-18779acc-f4d8-4cef-981a-a625b24f7509 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30528 34144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_buffer.3052834144 |
| Directory | /workspace/6.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_received.4041733409 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 189331838 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:24 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-65c71e89-d0f7-44e0-86f2-4b8b71954eec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40417 33409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_received.4041733409 |
| Directory | /workspace/6.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_sent.2984579106 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 253054328 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:30:21 PM PDT 24 |
| Finished | Aug 12 06:30:22 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-630b283a-3858-4847-bca8-a53174b6db72 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29845 79106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_sent.2984579106 |
| Directory | /workspace/6.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_bus_disconnects.3696488938 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 10103510848 ps |
| CPU time | 56.55 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:31:20 PM PDT 24 |
| Peak memory | 224060 kb |
| Host | smart-28255a64-3b1e-4f53-8d03-e4aa6c76d809 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3696488938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.3696488938 |
| Directory | /workspace/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_bus_resets.3384995795 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 3654056664 ps |
| CPU time | 26.51 seconds |
| Started | Aug 12 06:30:22 PM PDT 24 |
| Finished | Aug 12 06:30:49 PM PDT 24 |
| Peak memory | 218408 kb |
| Host | smart-abaa28fe-e333-4841-9fa0-133c87c3dac3 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3384995795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.3384995795 |
| Directory | /workspace/6.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_suspends.934324157 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 10306779812 ps |
| CPU time | 198.64 seconds |
| Started | Aug 12 06:30:30 PM PDT 24 |
| Finished | Aug 12 06:33:49 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-bfda3b2f-8680-4f34-b517-456aa2257c01 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=934324157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.934324157 |
| Directory | /workspace/6.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/6.usbdev_random_length_in_transaction.2027873598 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 285555815 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:30:30 PM PDT 24 |
| Finished | Aug 12 06:30:31 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-7943ec98-36d8-4c3d-b099-23dd1562cbba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20278 73598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_in_transaction.2027873598 |
| Directory | /workspace/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_random_length_out_transaction.4272923197 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 155101018 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:30:23 PM PDT 24 |
| Finished | Aug 12 06:30:24 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-97e9a38c-5983-4735-9111-29ad9f8920fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42729 23197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.4272923197 |
| Directory | /workspace/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_resume_link_active.3201309958 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 20203440371 ps |
| CPU time | 24.15 seconds |
| Started | Aug 12 06:30:39 PM PDT 24 |
| Finished | Aug 12 06:31:03 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-438a8ff5-20e6-4f65-87e3-cc17d3001864 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32013 09958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_resume_link_active.3201309958 |
| Directory | /workspace/6.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/6.usbdev_rx_crc_err.344717666 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 206777252 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:30:34 PM PDT 24 |
| Finished | Aug 12 06:30:35 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c8642631-5c62-4be4-b8e8-3d08d1f89dec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34471 7666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rx_crc_err.344717666 |
| Directory | /workspace/6.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_rx_full.1217052718 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 376528599 ps |
| CPU time | 1.3 seconds |
| Started | Aug 12 06:30:31 PM PDT 24 |
| Finished | Aug 12 06:30:32 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0e5910a5-0ace-4444-9d0a-e8d7fafbb9af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12170 52718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rx_full.1217052718 |
| Directory | /workspace/6.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/6.usbdev_setup_stage.2611203043 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 146188796 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:31 PM PDT 24 |
| Finished | Aug 12 06:30:32 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-92afbf90-6a4e-48da-9727-54513a6a6519 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26112 03043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_setup_stage.2611203043 |
| Directory | /workspace/6.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/6.usbdev_setup_trans_ignored.4063673306 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 149255203 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:29 PM PDT 24 |
| Finished | Aug 12 06:30:30 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-c2462763-33da-40b8-9065-807b620bdcc5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40636 73306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_setup_trans_ignored.4063673306 |
| Directory | /workspace/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/6.usbdev_smoke.2032262246 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 246572991 ps |
| CPU time | 1.01 seconds |
| Started | Aug 12 06:30:29 PM PDT 24 |
| Finished | Aug 12 06:30:30 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-cc0577cc-157d-48ff-8414-b2d234763b2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20322 62246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.2032262246 |
| Directory | /workspace/6.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/6.usbdev_spurious_pids_ignored.3319403081 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 3187704788 ps |
| CPU time | 24.71 seconds |
| Started | Aug 12 06:30:27 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 217964 kb |
| Host | smart-b5533f1c-ace9-4a6e-8928-32a8fe97fc03 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3319403081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.3319403081 |
| Directory | /workspace/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/6.usbdev_stall_priority_over_nak.3271765985 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 175220228 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:30:38 PM PDT 24 |
| Finished | Aug 12 06:30:39 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-8406dbf9-c555-4a25-aefc-8b5f3cdb577a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32717 65985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.3271765985 |
| Directory | /workspace/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/6.usbdev_stall_trans.2122400589 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 159239396 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:32 PM PDT 24 |
| Finished | Aug 12 06:30:33 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-8d9ec797-1077-431f-9499-5a23f4b2f1ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21224 00589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_trans.2122400589 |
| Directory | /workspace/6.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_stream_len_max.1394839376 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 1188850961 ps |
| CPU time | 2.81 seconds |
| Started | Aug 12 06:30:31 PM PDT 24 |
| Finished | Aug 12 06:30:34 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-1231a9cd-6806-46de-aac5-2ff241e1fd58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13948 39376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.1394839376 |
| Directory | /workspace/6.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/6.usbdev_streaming_out.714800117 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 2888551477 ps |
| CPU time | 28.78 seconds |
| Started | Aug 12 06:30:31 PM PDT 24 |
| Finished | Aug 12 06:31:00 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-f1fd6a30-5657-40c9-8914-efeeb43fccba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71480 0117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_streaming_out.714800117 |
| Directory | /workspace/6.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/6.usbdev_timeout_missing_host_handshake.4125941654 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 1067070541 ps |
| CPU time | 9.32 seconds |
| Started | Aug 12 06:30:18 PM PDT 24 |
| Finished | Aug 12 06:30:27 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-bd19aa8f-6167-4ce1-bb9c-10b45effcf0a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4125941654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host _handshake.4125941654 |
| Directory | /workspace/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/6.usbdev_tx_rx_disruption.236734212 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 442822437 ps |
| CPU time | 1.43 seconds |
| Started | Aug 12 06:30:32 PM PDT 24 |
| Finished | Aug 12 06:30:34 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-5a5bba8d-8bd1-48df-89ba-4fe55b9ee944 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=236734212 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 6.usbdev_tx_rx_disruption.236734212 |
| Directory | /workspace/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/60.usbdev_endpoint_types.1509615484 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 476696570 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 06:36:49 PM PDT 24 |
| Finished | Aug 12 06:36:51 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-818cda8a-44b3-4ef3-b88e-e12351974a10 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1509615484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.1509615484 |
| Directory | /workspace/60.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/60.usbdev_tx_rx_disruption.362315461 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 562481161 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:36:50 PM PDT 24 |
| Finished | Aug 12 06:36:52 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-2fca3dbb-1a2c-4d58-9df3-f7776ca028b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=362315461 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 60.usbdev_tx_rx_disruption.362315461 |
| Directory | /workspace/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/61.usbdev_tx_rx_disruption.3508766112 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 565690933 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3a0d6cd7-7776-4868-ba9e-0bc3369d18c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3508766112 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 61.usbdev_tx_rx_disruption.3508766112 |
| Directory | /workspace/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/62.usbdev_endpoint_types.2014886856 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 379270676 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 06:37:10 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-661e39b4-074c-43eb-a18e-635a57b38288 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2014886856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.2014886856 |
| Directory | /workspace/62.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/62.usbdev_tx_rx_disruption.1299969348 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 656358831 ps |
| CPU time | 1.8 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-11caf9fa-e9d3-41ea-9dec-8f522de3679a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1299969348 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 62.usbdev_tx_rx_disruption.1299969348 |
| Directory | /workspace/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/63.usbdev_endpoint_types.182968000 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 330254412 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 06:36:57 PM PDT 24 |
| Finished | Aug 12 06:36:58 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-3701eb68-dced-479e-b26b-81c8d4164b5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=182968000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.182968000 |
| Directory | /workspace/63.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/63.usbdev_tx_rx_disruption.2172377925 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 614832307 ps |
| CPU time | 1.8 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-4a9f1345-7cda-4d01-925f-fe28699785d6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2172377925 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 63.usbdev_tx_rx_disruption.2172377925 |
| Directory | /workspace/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/64.usbdev_endpoint_types.1741022421 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 550457086 ps |
| CPU time | 1.44 seconds |
| Started | Aug 12 06:36:55 PM PDT 24 |
| Finished | Aug 12 06:36:57 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-6d2d9ac8-0c02-4997-8cb6-7f93cba16ef0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1741022421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.1741022421 |
| Directory | /workspace/64.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/64.usbdev_tx_rx_disruption.1619976349 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 501476100 ps |
| CPU time | 1.52 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-01ba0986-5ceb-4fc0-b415-86ec7939bda4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1619976349 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 64.usbdev_tx_rx_disruption.1619976349 |
| Directory | /workspace/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/65.usbdev_endpoint_types.1333344431 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 233592602 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:37:05 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d5dea1ce-c792-4b94-a6b7-d759a9d88b63 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1333344431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.1333344431 |
| Directory | /workspace/65.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/65.usbdev_tx_rx_disruption.3292100966 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 584895096 ps |
| CPU time | 1.68 seconds |
| Started | Aug 12 06:37:10 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-22dc41af-4a64-4e3f-b093-e5899ae399bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3292100966 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 65.usbdev_tx_rx_disruption.3292100966 |
| Directory | /workspace/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/66.usbdev_endpoint_types.3345081974 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 206574298 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-93bad834-3c43-44f0-a72f-1c08666a07ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3345081974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.3345081974 |
| Directory | /workspace/66.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/66.usbdev_tx_rx_disruption.3040057018 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 590764068 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a19cdd58-13de-48de-9253-8fe366d911e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3040057018 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 66.usbdev_tx_rx_disruption.3040057018 |
| Directory | /workspace/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/67.usbdev_endpoint_types.135091538 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 446046241 ps |
| CPU time | 1.28 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-2cfeb710-a6af-474f-8616-427fd0bef1c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=135091538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.135091538 |
| Directory | /workspace/67.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/67.usbdev_tx_rx_disruption.987362978 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 491009659 ps |
| CPU time | 1.48 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ad761655-862a-4497-9270-d6c98eaae44d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=987362978 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 67.usbdev_tx_rx_disruption.987362978 |
| Directory | /workspace/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/68.usbdev_tx_rx_disruption.3363359313 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 583955543 ps |
| CPU time | 1.49 seconds |
| Started | Aug 12 06:37:13 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c8770beb-0ffb-4050-bec6-160a55e80d5c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3363359313 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 68.usbdev_tx_rx_disruption.3363359313 |
| Directory | /workspace/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/69.usbdev_endpoint_types.3438955233 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 569194428 ps |
| CPU time | 1.41 seconds |
| Started | Aug 12 06:36:54 PM PDT 24 |
| Finished | Aug 12 06:36:56 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-2856285d-e40c-4df4-a5ce-508ede9425d3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3438955233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.3438955233 |
| Directory | /workspace/69.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/69.usbdev_tx_rx_disruption.277977339 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 471705176 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6e661d0d-945d-49b1-86fb-66e7c2361fda |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=277977339 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 69.usbdev_tx_rx_disruption.277977339 |
| Directory | /workspace/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/7.usbdev_alert_test.1328567379 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 35603179 ps |
| CPU time | 0.66 seconds |
| Started | Aug 12 06:30:49 PM PDT 24 |
| Finished | Aug 12 06:30:50 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-d0f57ea6-61ee-45c8-996b-8adf9d3aa511 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1328567379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.1328567379 |
| Directory | /workspace/7.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_disconnect.3715716219 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 11815768264 ps |
| CPU time | 15.38 seconds |
| Started | Aug 12 06:30:30 PM PDT 24 |
| Finished | Aug 12 06:30:46 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-972ca09b-5c5c-46b7-b163-a2e5bc9a3b09 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3715716219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_ao n_wake_disconnect.3715716219 |
| Directory | /workspace/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_reset.3333389255 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 15048591035 ps |
| CPU time | 17.18 seconds |
| Started | Aug 12 06:30:34 PM PDT 24 |
| Finished | Aug 12 06:30:51 PM PDT 24 |
| Peak memory | 215908 kb |
| Host | smart-474b5a37-3f6b-40a4-aa75-29ccfa7ec6f8 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3333389255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.3333389255 |
| Directory | /workspace/7.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_resume.3214535624 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 28356562387 ps |
| CPU time | 34.84 seconds |
| Started | Aug 12 06:30:29 PM PDT 24 |
| Finished | Aug 12 06:31:04 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-7f2adfc8-e162-45c3-aef6-7a3b5ec2ed1a |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3214535624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_ao n_wake_resume.3214535624 |
| Directory | /workspace/7.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/7.usbdev_av_buffer.1975883817 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 172367906 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:34 PM PDT 24 |
| Finished | Aug 12 06:30:35 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9e435164-6879-4c91-bc70-6bad708f516b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19758 83817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_av_buffer.1975883817 |
| Directory | /workspace/7.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/7.usbdev_bitstuff_err.507857275 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 156388025 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3f50e18a-1185-42f7-980a-651f7b5ce636 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50785 7275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_bitstuff_err.507857275 |
| Directory | /workspace/7.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_data_toggle_clear.2641414251 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 417897399 ps |
| CPU time | 1.5 seconds |
| Started | Aug 12 06:30:41 PM PDT 24 |
| Finished | Aug 12 06:30:43 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-37ed76d9-1a64-4735-8ef3-a5f9139c5d13 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26414 14251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_clear.2641414251 |
| Directory | /workspace/7.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/7.usbdev_data_toggle_restore.3275653932 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 401515715 ps |
| CPU time | 1.3 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:42 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-c14662ff-1261-448a-bcc9-55d18b71fde3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3275653932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.3275653932 |
| Directory | /workspace/7.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/7.usbdev_device_address.3409085178 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 15386718927 ps |
| CPU time | 25.7 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-33ea1971-62b9-4bd8-bd54-094575932c67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34090 85178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.3409085178 |
| Directory | /workspace/7.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/7.usbdev_device_timeout.3931068955 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 169251924 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:41 PM PDT 24 |
| Finished | Aug 12 06:30:42 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-1b97a97d-44fa-4701-804b-f7137f2a37e0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3931068955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.3931068955 |
| Directory | /workspace/7.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/7.usbdev_disable_endpoint.2137550206 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 632471614 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:30:38 PM PDT 24 |
| Finished | Aug 12 06:30:40 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3cd72497-966e-4860-8a01-eca398496a96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21375 50206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disable_endpoint.2137550206 |
| Directory | /workspace/7.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/7.usbdev_disconnected.3133094624 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 147543071 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:30:41 PM PDT 24 |
| Finished | Aug 12 06:30:42 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-1be99936-8a74-478a-9625-a761f71be612 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31330 94624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disconnected.3133094624 |
| Directory | /workspace/7.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/7.usbdev_enable.171608975 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 116297233 ps |
| CPU time | 0.79 seconds |
| Started | Aug 12 06:30:41 PM PDT 24 |
| Finished | Aug 12 06:30:42 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ef453d90-53a0-4a60-b536-500b2aab1746 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17160 8975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_enable.171608975 |
| Directory | /workspace/7.usbdev_enable/latest |
| Test location | /workspace/coverage/default/7.usbdev_endpoint_access.1537498036 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 892067833 ps |
| CPU time | 2.4 seconds |
| Started | Aug 12 06:30:38 PM PDT 24 |
| Finished | Aug 12 06:30:40 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-736f2d66-b802-4e0d-82f8-92b674d1466d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15374 98036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.1537498036 |
| Directory | /workspace/7.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/7.usbdev_endpoint_types.2697586944 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 332320433 ps |
| CPU time | 1.23 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:30:44 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-b4caf88f-0baa-4348-9d59-c47aa8f950e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2697586944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.2697586944 |
| Directory | /workspace/7.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/7.usbdev_fifo_rst.1070093668 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 189811851 ps |
| CPU time | 2.51 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:30:46 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-cdee76db-4d4d-4554-9882-ce10072adb14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10700 93668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_fifo_rst.1070093668 |
| Directory | /workspace/7.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_iso.703661886 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 247520979 ps |
| CPU time | 1.21 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 215868 kb |
| Host | smart-eaaeaa83-832b-42c6-ac58-56701945d30a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=703661886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.703661886 |
| Directory | /workspace/7.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_stall.2719627959 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 149348108 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:30:42 PM PDT 24 |
| Finished | Aug 12 06:30:43 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-1cd496e4-628a-4694-b592-698e13d4f8a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27196 27959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_stall.2719627959 |
| Directory | /workspace/7.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_trans.882537933 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 198509693 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:30:38 PM PDT 24 |
| Finished | Aug 12 06:30:40 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-4b7c2ef0-fef4-46d0-a0fb-5b15db044d95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88253 7933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_trans.882537933 |
| Directory | /workspace/7.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_invalid_sync.1312630521 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 5842871569 ps |
| CPU time | 57.13 seconds |
| Started | Aug 12 06:30:38 PM PDT 24 |
| Finished | Aug 12 06:31:36 PM PDT 24 |
| Peak memory | 217832 kb |
| Host | smart-03544d41-f718-4ae3-afcc-ea608740fd1c |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1312630521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.1312630521 |
| Directory | /workspace/7.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/7.usbdev_iso_retraction.1405691595 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 5356765810 ps |
| CPU time | 67.77 seconds |
| Started | Aug 12 06:30:45 PM PDT 24 |
| Finished | Aug 12 06:31:53 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-322df332-06b8-44d0-acc6-92ab7b60b48c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1405691595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.1405691595 |
| Directory | /workspace/7.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_in_err.2231098897 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 183667348 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:30:38 PM PDT 24 |
| Finished | Aug 12 06:30:39 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-fe08e445-6534-4062-a2a4-ecc7abbe46d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22310 98897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_in_err.2231098897 |
| Directory | /workspace/7.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_resume.1192869087 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 8555180840 ps |
| CPU time | 15.93 seconds |
| Started | Aug 12 06:30:39 PM PDT 24 |
| Finished | Aug 12 06:30:55 PM PDT 24 |
| Peak memory | 216048 kb |
| Host | smart-b6ddf8ad-41cd-4176-9c53-07f616781e4f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11928 69087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_resume.1192869087 |
| Directory | /workspace/7.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_suspend.3170336161 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 10784221316 ps |
| CPU time | 14.98 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:56 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-3db6bc11-4971-4f5a-9800-223605260276 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31703 36161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_suspend.3170336161 |
| Directory | /workspace/7.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/7.usbdev_low_speed_traffic.2783889975 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 4862179500 ps |
| CPU time | 146.32 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:33:10 PM PDT 24 |
| Peak memory | 218264 kb |
| Host | smart-e2a86d8c-c20a-45d4-9131-b051ff69a0c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2783889975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.2783889975 |
| Directory | /workspace/7.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_inter_pkt_delay.1648338095 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 3247820388 ps |
| CPU time | 91.47 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:32:14 PM PDT 24 |
| Peak memory | 217520 kb |
| Host | smart-8d0938ae-be98-47dd-9f8e-3ea8c5bb7073 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1648338095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.1648338095 |
| Directory | /workspace/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_length_in_transaction.1123832269 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 263727967 ps |
| CPU time | 1.16 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6ccb5a04-2dfe-4c09-8418-4365972d2c3f |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1123832269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.1123832269 |
| Directory | /workspace/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_length_out_transaction.4205823042 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 199087874 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:30:39 PM PDT 24 |
| Finished | Aug 12 06:30:40 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-c85bbac3-16a1-4394-ba07-d54bd353b21b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42058 23042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.4205823042 |
| Directory | /workspace/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_non_iso_usb_traffic.1755419600 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 2538960327 ps |
| CPU time | 77.63 seconds |
| Started | Aug 12 06:30:41 PM PDT 24 |
| Finished | Aug 12 06:31:59 PM PDT 24 |
| Peak memory | 217552 kb |
| Host | smart-5b5338da-e7fb-425e-9027-1a7f8b6132d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17554 19600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.1755419600 |
| Directory | /workspace/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_usb_traffic.2644481234 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 3825890016 ps |
| CPU time | 41.29 seconds |
| Started | Aug 12 06:30:39 PM PDT 24 |
| Finished | Aug 12 06:31:20 PM PDT 24 |
| Peak memory | 224052 kb |
| Host | smart-2913d20b-2c10-41fe-b04e-2220396f8f06 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2644481234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.2644481234 |
| Directory | /workspace/7.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_inter_pkt_delay.1087828136 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 2363141411 ps |
| CPU time | 23.87 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:31:04 PM PDT 24 |
| Peak memory | 217600 kb |
| Host | smart-e2f16c1f-781b-40d3-a1f5-a1d42534e624 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1087828136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.1087828136 |
| Directory | /workspace/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_length_in_transaction.2401739944 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 151974980 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-37be744c-d80e-4d81-80f5-001673fea605 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2401739944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.2401739944 |
| Directory | /workspace/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_length_out_transaction.2377819768 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 146515697 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2ce958dc-3779-4bc0-b5e6-7cc741d67b15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23778 19768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.2377819768 |
| Directory | /workspace/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_iso.938717074 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 159634233 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:30:39 PM PDT 24 |
| Finished | Aug 12 06:30:40 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-200236ff-8d98-44f2-b797-01ffeb30d156 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93871 7074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_iso.938717074 |
| Directory | /workspace/7.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_stall.2330735278 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 176669259 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a60465bd-240f-4793-a239-fef374ed534a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23307 35278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_stall.2330735278 |
| Directory | /workspace/7.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_trans_nak.1564881324 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 166976040 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:39 PM PDT 24 |
| Finished | Aug 12 06:30:40 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9e12af4c-bc0d-43c8-896b-75c7a39e726d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15648 81324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_trans_nak.1564881324 |
| Directory | /workspace/7.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/7.usbdev_pending_in_trans.926604816 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 199637742 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:30:41 PM PDT 24 |
| Finished | Aug 12 06:30:42 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-95c52d41-bdd1-4375-aa7f-0f8bc031f428 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92660 4816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pending_in_trans.926604816 |
| Directory | /workspace/7.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_config_pinflip.1739312272 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 265258010 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:30:39 PM PDT 24 |
| Finished | Aug 12 06:30:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-bfb0b345-3b6c-464f-bdb3-51d887a81d13 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1739312272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.1739312272 |
| Directory | /workspace/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_config_usb_ref_disable.2762877231 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 160444073 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:30:42 PM PDT 24 |
| Finished | Aug 12 06:30:43 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-dde92736-eb18-46e1-94e8-21af64ada142 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27628 77231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.2762877231 |
| Directory | /workspace/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_pins_sense.1414876035 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 41431427 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-9feb3bca-ba4e-4b72-9b00-16e416d6f185 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14148 76035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.1414876035 |
| Directory | /workspace/7.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_buffer.547210329 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 20453228599 ps |
| CPU time | 57.76 seconds |
| Started | Aug 12 06:30:41 PM PDT 24 |
| Finished | Aug 12 06:31:39 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-e8565bea-604b-423c-84d9-630c6a54d64e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54721 0329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_buffer.547210329 |
| Directory | /workspace/7.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_received.2523261809 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 180667353 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:30:39 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-306c4ae9-dbe4-48d1-97ea-bf3fa450fbb2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25232 61809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_received.2523261809 |
| Directory | /workspace/7.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_sent.1613264453 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 188181445 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:30:44 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-c2274481-7049-4592-9fb7-119483752be9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16132 64453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_sent.1613264453 |
| Directory | /workspace/7.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_bus_disconnects.858232777 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 3648325499 ps |
| CPU time | 77.37 seconds |
| Started | Aug 12 06:30:46 PM PDT 24 |
| Finished | Aug 12 06:32:04 PM PDT 24 |
| Peak memory | 224108 kb |
| Host | smart-51f8e68c-73f3-4364-9421-9973e7fcbf40 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=858232777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.858232777 |
| Directory | /workspace/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_bus_resets.3102270900 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 3618590488 ps |
| CPU time | 24.71 seconds |
| Started | Aug 12 06:30:46 PM PDT 24 |
| Finished | Aug 12 06:31:11 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-7c048a69-dc11-40b4-a8dd-ecd4eb992831 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3102270900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.3102270900 |
| Directory | /workspace/7.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_suspends.2803980767 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 15219412043 ps |
| CPU time | 83.6 seconds |
| Started | Aug 12 06:30:49 PM PDT 24 |
| Finished | Aug 12 06:32:13 PM PDT 24 |
| Peak memory | 218912 kb |
| Host | smart-51c1530d-347e-4444-87e7-d57665c40624 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2803980767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.2803980767 |
| Directory | /workspace/7.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/7.usbdev_random_length_in_transaction.1654948840 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 233814175 ps |
| CPU time | 1.11 seconds |
| Started | Aug 12 06:30:40 PM PDT 24 |
| Finished | Aug 12 06:30:41 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-41ccdf1f-aefe-4d38-ab20-17c2d640624d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16549 48840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_in_transaction.1654948840 |
| Directory | /workspace/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_random_length_out_transaction.3229638076 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 188311674 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:30:46 PM PDT 24 |
| Finished | Aug 12 06:30:47 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3684d599-df3e-403d-817b-74a352491b76 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32296 38076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.3229638076 |
| Directory | /workspace/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_resume_link_active.107368856 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 20168059963 ps |
| CPU time | 23.48 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:31:07 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-6a0ae562-2f6e-4112-ae20-bd22ed0fc587 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10736 8856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_resume_link_active.107368856 |
| Directory | /workspace/7.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/7.usbdev_rx_crc_err.763411461 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 167206759 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:30:44 PM PDT 24 |
| Finished | Aug 12 06:30:45 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-a4745f43-97f5-4a62-a023-a966c1225c7d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76341 1461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rx_crc_err.763411461 |
| Directory | /workspace/7.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_rx_full.444445594 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 411400093 ps |
| CPU time | 1.4 seconds |
| Started | Aug 12 06:30:44 PM PDT 24 |
| Finished | Aug 12 06:30:46 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-388be190-978e-4ec9-8206-df3fcfda7373 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44444 5594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rx_full.444445594 |
| Directory | /workspace/7.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/7.usbdev_setup_stage.3527028499 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 143977394 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:30:45 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-201693fa-328c-49a5-b618-e023b3877121 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35270 28499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_setup_stage.3527028499 |
| Directory | /workspace/7.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/7.usbdev_setup_trans_ignored.3138844610 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 159810041 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:30:44 PM PDT 24 |
| Finished | Aug 12 06:30:44 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-68e61a3c-db23-43cb-a28e-bd08149d4f09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31388 44610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_setup_trans_ignored.3138844610 |
| Directory | /workspace/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/7.usbdev_smoke.2044931206 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 243908657 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:30:43 PM PDT 24 |
| Finished | Aug 12 06:30:44 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4db24170-32db-4a68-b86e-f3f4857ff343 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20449 31206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.2044931206 |
| Directory | /workspace/7.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/7.usbdev_spurious_pids_ignored.690672002 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 2277338116 ps |
| CPU time | 61.26 seconds |
| Started | Aug 12 06:30:45 PM PDT 24 |
| Finished | Aug 12 06:31:47 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-1e4fa7ad-4510-4d1a-a2cf-85eafa23eb2f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=690672002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.690672002 |
| Directory | /workspace/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/7.usbdev_stall_priority_over_nak.2422945143 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 183371644 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:30:44 PM PDT 24 |
| Finished | Aug 12 06:30:45 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-3e6d8d2f-aa8d-4dff-b75a-865c5511c254 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24229 45143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.2422945143 |
| Directory | /workspace/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/7.usbdev_stall_trans.851402199 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 202958026 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:44 PM PDT 24 |
| Finished | Aug 12 06:30:45 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-6d5df9ae-ad61-479a-ae93-6dd5a948ba23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85140 2199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_trans.851402199 |
| Directory | /workspace/7.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_stream_len_max.2073509255 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 286787335 ps |
| CPU time | 1.09 seconds |
| Started | Aug 12 06:30:49 PM PDT 24 |
| Finished | Aug 12 06:30:50 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a1ac6d14-4689-4c88-9c98-8e610ee32e50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20735 09255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.2073509255 |
| Directory | /workspace/7.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/7.usbdev_streaming_out.3039774613 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 1911038469 ps |
| CPU time | 18.03 seconds |
| Started | Aug 12 06:30:49 PM PDT 24 |
| Finished | Aug 12 06:31:07 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-dd4f916c-9a17-4d3a-8f77-4116d4de2e7c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30397 74613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_streaming_out.3039774613 |
| Directory | /workspace/7.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/7.usbdev_timeout_missing_host_handshake.857393687 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 1093440847 ps |
| CPU time | 26.89 seconds |
| Started | Aug 12 06:30:41 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-321088aa-1fb3-4afc-a7ff-e40f939e1651 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=857393687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_ handshake.857393687 |
| Directory | /workspace/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/7.usbdev_tx_rx_disruption.2335333134 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 683278314 ps |
| CPU time | 1.83 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:30:54 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-db81c9e1-8f76-47b0-8361-5fbad6fbfe56 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2335333134 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_tx_rx_disruption.2335333134 |
| Directory | /workspace/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/70.usbdev_endpoint_types.1345674837 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 419033967 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:05 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2f0dcfad-d68b-4544-8bb0-f8876a34fc54 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1345674837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.1345674837 |
| Directory | /workspace/70.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/70.usbdev_tx_rx_disruption.345288902 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 600631086 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-26a39211-dd16-455c-a61a-7c0d09b195a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=345288902 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 70.usbdev_tx_rx_disruption.345288902 |
| Directory | /workspace/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/71.usbdev_endpoint_types.435599989 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 524941755 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:36:51 PM PDT 24 |
| Finished | Aug 12 06:36:52 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-84da2167-80ee-4192-9238-e66641c33260 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=435599989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.435599989 |
| Directory | /workspace/71.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/71.usbdev_tx_rx_disruption.1779866045 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 542332536 ps |
| CPU time | 1.8 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-dba89c45-727e-49cf-b998-afc092894835 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1779866045 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 71.usbdev_tx_rx_disruption.1779866045 |
| Directory | /workspace/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/72.usbdev_endpoint_types.3090393847 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 477952475 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 06:37:15 PM PDT 24 |
| Finished | Aug 12 06:37:17 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-5609542a-915e-4423-af5e-0482b9943a6f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3090393847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.3090393847 |
| Directory | /workspace/72.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/72.usbdev_tx_rx_disruption.2915571623 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 504204151 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:08 PM PDT 24 |
| Finished | Aug 12 06:37:10 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-5b8d97df-5556-4972-beb3-9d00fd4d1488 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2915571623 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 72.usbdev_tx_rx_disruption.2915571623 |
| Directory | /workspace/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/73.usbdev_endpoint_types.1460791377 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 433481590 ps |
| CPU time | 1.35 seconds |
| Started | Aug 12 06:37:05 PM PDT 24 |
| Finished | Aug 12 06:37:07 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-dc0b4618-e049-482d-a37c-5ce9f2a8ab53 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1460791377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.1460791377 |
| Directory | /workspace/73.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/73.usbdev_tx_rx_disruption.683306196 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 520870263 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d8962785-82be-4f3c-a7f7-8d32d5cec0a0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=683306196 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 73.usbdev_tx_rx_disruption.683306196 |
| Directory | /workspace/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/74.usbdev_endpoint_types.1445471987 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 217034470 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-58e9fb3f-d629-4245-9dc1-f9328e3fb6fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1445471987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.1445471987 |
| Directory | /workspace/74.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/74.usbdev_tx_rx_disruption.4103322199 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 610562280 ps |
| CPU time | 1.7 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6795cbe3-f548-4307-aa96-9b9e7608c27b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4103322199 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 74.usbdev_tx_rx_disruption.4103322199 |
| Directory | /workspace/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/75.usbdev_endpoint_types.1656785990 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 565377008 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:08 PM PDT 24 |
| Finished | Aug 12 06:37:09 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-ff392bce-4338-441f-9d7c-52bf56985bc4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1656785990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.1656785990 |
| Directory | /workspace/75.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/75.usbdev_tx_rx_disruption.1449492832 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 647848271 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ad00e785-3cd9-45df-b135-d3059013e3ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1449492832 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 75.usbdev_tx_rx_disruption.1449492832 |
| Directory | /workspace/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/77.usbdev_endpoint_types.4078218984 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 298888207 ps |
| CPU time | 1.14 seconds |
| Started | Aug 12 06:37:10 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-fa8826a7-7379-405b-b8e8-4320a6126fb2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4078218984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.4078218984 |
| Directory | /workspace/77.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/77.usbdev_tx_rx_disruption.2101491093 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 488696483 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:36:58 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c6aef161-7e6d-49a9-87ea-01082ccbb144 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2101491093 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 77.usbdev_tx_rx_disruption.2101491093 |
| Directory | /workspace/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/78.usbdev_tx_rx_disruption.17931019 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 473252035 ps |
| CPU time | 1.77 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:03 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-1b1400b7-2142-440d-b282-6ee097537b2a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17931019 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 78.usbdev_tx_rx_disruption.17931019 |
| Directory | /workspace/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/79.usbdev_tx_rx_disruption.3753357637 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 521120366 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:36:48 PM PDT 24 |
| Finished | Aug 12 06:36:50 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-7d4ddf9e-fc12-4ac3-bd71-0d77abbabb68 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3753357637 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 79.usbdev_tx_rx_disruption.3753357637 |
| Directory | /workspace/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/8.usbdev_alert_test.334935850 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 34395631 ps |
| CPU time | 0.68 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-779bf934-ebc0-4c54-8282-43f32f303fee |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=334935850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.334935850 |
| Directory | /workspace/8.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_disconnect.3211168647 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 11634997749 ps |
| CPU time | 15.8 seconds |
| Started | Aug 12 06:30:42 PM PDT 24 |
| Finished | Aug 12 06:30:58 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-d49e477a-582e-4bcc-9f7b-a53eb4b8b573 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3211168647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_ao n_wake_disconnect.3211168647 |
| Directory | /workspace/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_reset.4192801688 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 18554953117 ps |
| CPU time | 21.33 seconds |
| Started | Aug 12 06:30:49 PM PDT 24 |
| Finished | Aug 12 06:31:11 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-2de27a03-d5b4-4281-82f2-30cf269aacf9 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4192801688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.4192801688 |
| Directory | /workspace/8.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_resume.1618283864 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 31410757123 ps |
| CPU time | 38.5 seconds |
| Started | Aug 12 06:30:45 PM PDT 24 |
| Finished | Aug 12 06:31:23 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-1d3f1bda-383f-4016-9e29-2fe748c167b4 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1618283864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_ao n_wake_resume.1618283864 |
| Directory | /workspace/8.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/8.usbdev_av_buffer.408506188 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 202149721 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:30:45 PM PDT 24 |
| Finished | Aug 12 06:30:46 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-08ea8b36-6ed1-4df8-9a6a-cbc45167cba0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40850 6188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_av_buffer.408506188 |
| Directory | /workspace/8.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/8.usbdev_bitstuff_err.4135614735 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 140431765 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:30:46 PM PDT 24 |
| Finished | Aug 12 06:30:47 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-ccb6ea17-6734-4114-8fde-03c19ad74542 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41356 14735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_bitstuff_err.4135614735 |
| Directory | /workspace/8.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_data_toggle_clear.295212653 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 437890998 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:30:46 PM PDT 24 |
| Finished | Aug 12 06:30:48 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-853b69f6-ea80-4482-8d05-445dffad6e02 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29521 2653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_clear.295212653 |
| Directory | /workspace/8.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/8.usbdev_device_address.1333869587 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 43472106779 ps |
| CPU time | 73.23 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:32:05 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-d3ed9a09-fabd-4528-b248-1db26de64ffd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13338 69587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.1333869587 |
| Directory | /workspace/8.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/8.usbdev_device_timeout.2639379767 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 3782790139 ps |
| CPU time | 27.01 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:31:19 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-a76060bd-c2fe-4936-bd02-343c9d7e2ebb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2639379767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.2639379767 |
| Directory | /workspace/8.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/8.usbdev_disable_endpoint.907771186 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 600550108 ps |
| CPU time | 1.76 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:30:53 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a3df2443-30c6-4230-a815-0692cde5cb76 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90777 1186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disable_endpoint.907771186 |
| Directory | /workspace/8.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/8.usbdev_disconnected.3429327073 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 141252957 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:30:53 PM PDT 24 |
| Finished | Aug 12 06:30:54 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-03e9788b-a603-4b67-84fa-f5984437f901 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34293 27073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disconnected.3429327073 |
| Directory | /workspace/8.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/8.usbdev_enable.3771222480 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 34762217 ps |
| CPU time | 0.7 seconds |
| Started | Aug 12 06:30:55 PM PDT 24 |
| Finished | Aug 12 06:30:55 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e33b93a2-d106-4a00-8778-5de0971def91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37712 22480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_enable.3771222480 |
| Directory | /workspace/8.usbdev_enable/latest |
| Test location | /workspace/coverage/default/8.usbdev_endpoint_access.2894234283 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 1046077784 ps |
| CPU time | 2.73 seconds |
| Started | Aug 12 06:30:53 PM PDT 24 |
| Finished | Aug 12 06:30:56 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-4f7d7ee6-510c-4cf9-a67d-3b2c1d4e0a25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28942 34283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.2894234283 |
| Directory | /workspace/8.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/8.usbdev_endpoint_types.84971916 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 188616535 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:30:54 PM PDT 24 |
| Finished | Aug 12 06:30:55 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b6570b1a-1bd5-44b7-a8b0-ad190defbb4b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=84971916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.84971916 |
| Directory | /workspace/8.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/8.usbdev_fifo_rst.2415977536 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 158289579 ps |
| CPU time | 1.47 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:30:58 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-17697d5c-137d-499d-b0cf-88e391ff00e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24159 77536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_fifo_rst.2415977536 |
| Directory | /workspace/8.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_iso.1146025551 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 169710444 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:30:51 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-3959560c-1060-49ec-9f62-368cf575aefe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1146025551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.1146025551 |
| Directory | /workspace/8.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_stall.418480156 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 171541472 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-ae5bb8d2-2720-4d1b-9401-038d66c2d4b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41848 0156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_stall.418480156 |
| Directory | /workspace/8.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_trans.3403942755 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 183100045 ps |
| CPU time | 1.03 seconds |
| Started | Aug 12 06:30:50 PM PDT 24 |
| Finished | Aug 12 06:30:51 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-218ef6ef-d54c-4e62-b834-eff39d048a89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34039 42755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_trans.3403942755 |
| Directory | /workspace/8.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_invalid_sync.2618028245 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 4210805994 ps |
| CPU time | 35.27 seconds |
| Started | Aug 12 06:30:56 PM PDT 24 |
| Finished | Aug 12 06:31:31 PM PDT 24 |
| Peak memory | 218340 kb |
| Host | smart-2eb49b5b-f994-4077-a7b6-1cd9f39526fa |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2618028245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.2618028245 |
| Directory | /workspace/8.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/8.usbdev_iso_retraction.1712638183 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 3810246050 ps |
| CPU time | 42.65 seconds |
| Started | Aug 12 06:30:55 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-21a2b8f5-0750-4fbe-a971-783e6b59a910 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1712638183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.1712638183 |
| Directory | /workspace/8.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_in_err.944242968 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 217840028 ps |
| CPU time | 0.95 seconds |
| Started | Aug 12 06:30:51 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-fe85faf7-5633-4bbc-9bdd-0e11013ccde3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94424 2968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_in_err.944242968 |
| Directory | /workspace/8.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_resume.1625401771 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 9016720602 ps |
| CPU time | 15.23 seconds |
| Started | Aug 12 06:30:53 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-c6093a2b-44de-4aeb-93fb-b7abc670bf26 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16254 01771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_resume.1625401771 |
| Directory | /workspace/8.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_suspend.715939984 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 11188027785 ps |
| CPU time | 15.2 seconds |
| Started | Aug 12 06:30:53 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-988c8cfc-489d-4357-92d0-0c8d0496478c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71593 9984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_suspend.715939984 |
| Directory | /workspace/8.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/8.usbdev_low_speed_traffic.1155078448 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 5923403968 ps |
| CPU time | 45.67 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:31:38 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-e1605dec-4e65-4a03-861a-668ff4ea3d8f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1155078448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.1155078448 |
| Directory | /workspace/8.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_inter_pkt_delay.3543294983 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 4259289165 ps |
| CPU time | 43.25 seconds |
| Started | Aug 12 06:30:53 PM PDT 24 |
| Finished | Aug 12 06:31:36 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-80e0c2a7-aa50-4199-a52c-59f4982ad5a4 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3543294983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.3543294983 |
| Directory | /workspace/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_length_in_transaction.1939610285 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 253066723 ps |
| CPU time | 1.07 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:30:58 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-746e073e-002c-4ab4-aafd-680e89b3ea3c |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1939610285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.1939610285 |
| Directory | /workspace/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_length_out_transaction.278613521 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 191332243 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:30:53 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6815e034-3822-4ed9-bd20-b3a28d85c010 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27861 3521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.278613521 |
| Directory | /workspace/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_non_iso_usb_traffic.1177441536 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 3704219562 ps |
| CPU time | 41.09 seconds |
| Started | Aug 12 06:30:54 PM PDT 24 |
| Finished | Aug 12 06:31:35 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-23bb9913-d616-4c92-b5f1-907ba9425ecd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11774 41536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.1177441536 |
| Directory | /workspace/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_usb_traffic.3438382760 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 1816870605 ps |
| CPU time | 19.84 seconds |
| Started | Aug 12 06:30:51 PM PDT 24 |
| Finished | Aug 12 06:31:11 PM PDT 24 |
| Peak memory | 217956 kb |
| Host | smart-2ff28c54-bc98-4bb2-9000-245f33336802 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3438382760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.3438382760 |
| Directory | /workspace/8.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_inter_pkt_delay.3818332351 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 3938367969 ps |
| CPU time | 117.76 seconds |
| Started | Aug 12 06:30:53 PM PDT 24 |
| Finished | Aug 12 06:32:51 PM PDT 24 |
| Peak memory | 217352 kb |
| Host | smart-ba3f4d57-1cc9-4837-8fd8-478efae212b9 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3818332351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.3818332351 |
| Directory | /workspace/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_length_in_transaction.3350267851 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 193119888 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:30:53 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-3a8c351b-cd25-4140-b59c-97a949bff947 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3350267851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.3350267851 |
| Directory | /workspace/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_length_out_transaction.1563464086 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 145967684 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-a397d4f9-cbaa-4cb3-ab40-8ebacd4750e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15634 64086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.1563464086 |
| Directory | /workspace/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_nak_trans.3795331943 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 223957439 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-37b9ab0a-5724-4ece-9eb7-91200a4ccde6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37953 31943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_nak_trans.3795331943 |
| Directory | /workspace/8.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_iso.1850734465 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 167247982 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:30:54 PM PDT 24 |
| Finished | Aug 12 06:30:55 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-341340c7-7aa7-4c24-b054-d641509924a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18507 34465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_iso.1850734465 |
| Directory | /workspace/8.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_stall.852595958 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 152004934 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:30:51 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-c83309c8-dd33-4bfd-9ec7-af1c8b5eaad5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85259 5958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_stall.852595958 |
| Directory | /workspace/8.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_trans_nak.3763232791 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 174215710 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:30:53 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-cdbe6546-032c-45f7-9e42-02bd81557961 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37632 32791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_trans_nak.3763232791 |
| Directory | /workspace/8.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/8.usbdev_pending_in_trans.450037213 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 163792369 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:30:53 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-5afff1d8-30cf-4c44-93e7-04ce66d24cf5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45003 7213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pending_in_trans.450037213 |
| Directory | /workspace/8.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_config_pinflip.4165422308 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 235756563 ps |
| CPU time | 1.04 seconds |
| Started | Aug 12 06:30:53 PM PDT 24 |
| Finished | Aug 12 06:30:55 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-8a31be98-eb46-4f53-85b7-8b38a2250f5b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4165422308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.4165422308 |
| Directory | /workspace/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_config_usb_ref_disable.4214529179 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 147450077 ps |
| CPU time | 0.85 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:30:53 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-09052702-e5de-4a66-89a2-e19ae75f89d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42145 29179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.4214529179 |
| Directory | /workspace/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_pins_sense.2296496057 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 59672803 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:30:56 PM PDT 24 |
| Finished | Aug 12 06:30:57 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-2a0e6110-4892-4e4c-89a2-857e893cf4ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22964 96057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.2296496057 |
| Directory | /workspace/8.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_buffer.3395679605 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 12446964609 ps |
| CPU time | 34.78 seconds |
| Started | Aug 12 06:30:56 PM PDT 24 |
| Finished | Aug 12 06:31:31 PM PDT 24 |
| Peak memory | 224168 kb |
| Host | smart-4e3b4dea-c998-4124-bb08-068f40c33452 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33956 79605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_buffer.3395679605 |
| Directory | /workspace/8.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_received.4153676612 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 221416134 ps |
| CPU time | 1.06 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-3c13997c-042c-44a6-9fe0-f4c81f34cb4a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41536 76612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_received.4153676612 |
| Directory | /workspace/8.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_sent.535432480 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 197458570 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:30:51 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-85d252e7-976e-422f-b3fc-ee43bd2f46f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53543 2480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_sent.535432480 |
| Directory | /workspace/8.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_bus_disconnects.2908476966 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 6836339242 ps |
| CPU time | 37.54 seconds |
| Started | Aug 12 06:30:56 PM PDT 24 |
| Finished | Aug 12 06:31:34 PM PDT 24 |
| Peak memory | 219240 kb |
| Host | smart-41b71d66-ac0d-4a22-8501-4937494818e3 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2908476966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.2908476966 |
| Directory | /workspace/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_bus_resets.3771008064 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 2813957259 ps |
| CPU time | 75.25 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:32:08 PM PDT 24 |
| Peak memory | 218332 kb |
| Host | smart-de7febca-8e63-41b2-b6ce-f3746031fba6 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3771008064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.3771008064 |
| Directory | /workspace/8.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_suspends.3153661079 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 10934329869 ps |
| CPU time | 61.17 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:59 PM PDT 24 |
| Peak memory | 224008 kb |
| Host | smart-7d6819bf-85ab-4e4a-9c3b-a05699291cff |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3153661079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.3153661079 |
| Directory | /workspace/8.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/8.usbdev_random_length_in_transaction.519633363 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 225639211 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:30:50 PM PDT 24 |
| Finished | Aug 12 06:30:51 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-7578b417-b0cd-4199-90d0-7088311ec337 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51963 3363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_in_transaction.519633363 |
| Directory | /workspace/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_random_length_out_transaction.442042038 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 169881688 ps |
| CPU time | 0.91 seconds |
| Started | Aug 12 06:30:51 PM PDT 24 |
| Finished | Aug 12 06:30:52 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-3f6734a4-285f-4632-9622-2cb00d7df21c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44204 2038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.442042038 |
| Directory | /workspace/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_resume_link_active.3421601988 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 20161200881 ps |
| CPU time | 24.27 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-916125fc-e9b9-4207-ac5d-75b6d08628f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34216 01988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_resume_link_active.3421601988 |
| Directory | /workspace/8.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/8.usbdev_rx_crc_err.2986469285 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 165099737 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:31:02 PM PDT 24 |
| Finished | Aug 12 06:31:02 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-b0db60a5-9a1c-433b-95a6-5392b9a90fd1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29864 69285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rx_crc_err.2986469285 |
| Directory | /workspace/8.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_rx_full.1018554147 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 421796535 ps |
| CPU time | 1.3 seconds |
| Started | Aug 12 06:30:59 PM PDT 24 |
| Finished | Aug 12 06:31:00 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d30d7bef-f4a2-42c7-9905-7ef619b2a149 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10185 54147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rx_full.1018554147 |
| Directory | /workspace/8.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/8.usbdev_setup_stage.3257781428 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 152111788 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-699ab76d-0933-4c79-ac3c-d8f4b3bb13f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32577 81428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_setup_stage.3257781428 |
| Directory | /workspace/8.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/8.usbdev_setup_trans_ignored.4087165575 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 170043808 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:00 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b9e991ab-1de4-4333-8db0-f774af9c7e48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40871 65575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_setup_trans_ignored.4087165575 |
| Directory | /workspace/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/8.usbdev_smoke.3775520717 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 198283506 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-3369c819-cfe9-4b7e-99f0-6533e4d3d1e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37755 20717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.3775520717 |
| Directory | /workspace/8.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/8.usbdev_spurious_pids_ignored.45646593 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 2375284503 ps |
| CPU time | 19.09 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:18 PM PDT 24 |
| Peak memory | 217724 kb |
| Host | smart-c2437a84-3fd5-4f22-99de-f4b76e22c34f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=45646593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.45646593 |
| Directory | /workspace/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/8.usbdev_stall_priority_over_nak.443942826 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 198785991 ps |
| CPU time | 0.88 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-8933dc45-86bd-468e-9550-eed6c161b64e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44394 2826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.443942826 |
| Directory | /workspace/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/8.usbdev_stall_trans.2406740650 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 147669737 ps |
| CPU time | 0.81 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-924e4e53-e00e-4e5d-b4e7-e5ece84e20b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24067 40650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_trans.2406740650 |
| Directory | /workspace/8.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_stream_len_max.3868300697 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 1137233574 ps |
| CPU time | 2.88 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-d6d2afd8-7574-48f7-94dd-ecb0dee1ace5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38683 00697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.3868300697 |
| Directory | /workspace/8.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/8.usbdev_streaming_out.236531989 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 2231444745 ps |
| CPU time | 23.09 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:21 PM PDT 24 |
| Peak memory | 217436 kb |
| Host | smart-31b2ba89-cb9f-4776-b197-decdf8520b10 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23653 1989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_streaming_out.236531989 |
| Directory | /workspace/8.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/8.usbdev_timeout_missing_host_handshake.3775860838 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 1442178944 ps |
| CPU time | 35.11 seconds |
| Started | Aug 12 06:30:52 PM PDT 24 |
| Finished | Aug 12 06:31:27 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-59a94dd0-8eb4-4193-b5a9-2480a5acac3d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3775860838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host _handshake.3775860838 |
| Directory | /workspace/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/8.usbdev_tx_rx_disruption.3914913127 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 648275744 ps |
| CPU time | 1.65 seconds |
| Started | Aug 12 06:30:59 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5c85c085-14d5-43bc-b9c3-395b6448fedb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3914913127 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_tx_rx_disruption.3914913127 |
| Directory | /workspace/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/80.usbdev_endpoint_types.1030612329 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 431682250 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:37:12 PM PDT 24 |
| Finished | Aug 12 06:37:18 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-9f9980dc-c7bb-474d-84a4-9d3ff5734d71 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1030612329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.1030612329 |
| Directory | /workspace/80.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/80.usbdev_tx_rx_disruption.1698513530 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 650165404 ps |
| CPU time | 1.71 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5e56660a-813d-4149-bb3d-327ed0becb68 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1698513530 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 80.usbdev_tx_rx_disruption.1698513530 |
| Directory | /workspace/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/81.usbdev_endpoint_types.1789872245 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 371401936 ps |
| CPU time | 1.2 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:00 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-887704d6-4ad9-403a-a48c-e757427c00ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1789872245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.1789872245 |
| Directory | /workspace/81.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/81.usbdev_tx_rx_disruption.2926709690 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 521406359 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:37:13 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-63fbed34-281f-47dc-8e49-212a202e4f85 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2926709690 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 81.usbdev_tx_rx_disruption.2926709690 |
| Directory | /workspace/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/82.usbdev_endpoint_types.4128191636 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 230654374 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:37:39 PM PDT 24 |
| Finished | Aug 12 06:37:40 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c5d545c7-3d55-49b1-b67d-7f875889352a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4128191636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.4128191636 |
| Directory | /workspace/82.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/82.usbdev_tx_rx_disruption.3271989531 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 528002807 ps |
| CPU time | 1.53 seconds |
| Started | Aug 12 06:37:17 PM PDT 24 |
| Finished | Aug 12 06:37:19 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b34e17bc-9d5e-4ce5-931a-de20cf89dede |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3271989531 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 82.usbdev_tx_rx_disruption.3271989531 |
| Directory | /workspace/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/83.usbdev_endpoint_types.584078282 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 798301092 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-07ce9371-93cf-41eb-8d79-14fa6aca7065 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=584078282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.584078282 |
| Directory | /workspace/83.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/83.usbdev_tx_rx_disruption.3012033530 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 541096291 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:15 PM PDT 24 |
| Finished | Aug 12 06:37:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-ffae1882-ebc3-47da-8c74-e9b3521829aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3012033530 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 83.usbdev_tx_rx_disruption.3012033530 |
| Directory | /workspace/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/84.usbdev_endpoint_types.3601849041 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 729521424 ps |
| CPU time | 1.79 seconds |
| Started | Aug 12 06:37:08 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-62f89720-91d1-49d3-9b16-9d3c8814d268 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3601849041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.3601849041 |
| Directory | /workspace/84.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/84.usbdev_tx_rx_disruption.3452142374 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 474608931 ps |
| CPU time | 1.46 seconds |
| Started | Aug 12 06:37:00 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-d2ed561b-7dd3-4586-a796-657810f8c393 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3452142374 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 84.usbdev_tx_rx_disruption.3452142374 |
| Directory | /workspace/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/85.usbdev_endpoint_types.4287849609 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 328690076 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9579d577-153e-4b1a-a98f-4164783adb88 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4287849609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.4287849609 |
| Directory | /workspace/85.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/85.usbdev_tx_rx_disruption.3203216276 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 532903366 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:06 PM PDT 24 |
| Finished | Aug 12 06:37:08 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6d896d2e-205e-4b1d-89e0-b1a8a4651477 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3203216276 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 85.usbdev_tx_rx_disruption.3203216276 |
| Directory | /workspace/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/86.usbdev_endpoint_types.695062348 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 604633743 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:06 PM PDT 24 |
| Finished | Aug 12 06:37:08 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4dafedb7-b10d-4f2d-8b60-c502d8b37567 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=695062348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.695062348 |
| Directory | /workspace/86.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/86.usbdev_tx_rx_disruption.1528390214 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 476711401 ps |
| CPU time | 1.56 seconds |
| Started | Aug 12 06:37:05 PM PDT 24 |
| Finished | Aug 12 06:37:07 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ddcf6ebe-5587-40f4-8d7e-18cc7c4933fb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1528390214 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 86.usbdev_tx_rx_disruption.1528390214 |
| Directory | /workspace/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/87.usbdev_tx_rx_disruption.3962337002 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 458850332 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:07 PM PDT 24 |
| Finished | Aug 12 06:37:14 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-f75c1106-8750-42a1-99e4-a4ef84b99c7e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3962337002 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 87.usbdev_tx_rx_disruption.3962337002 |
| Directory | /workspace/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/88.usbdev_tx_rx_disruption.312484820 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 523339311 ps |
| CPU time | 1.64 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:25 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7ff4c382-0780-4dc5-b415-ceb2bf1ad41b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=312484820 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 88.usbdev_tx_rx_disruption.312484820 |
| Directory | /workspace/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/89.usbdev_endpoint_types.3312858764 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 354392504 ps |
| CPU time | 1.17 seconds |
| Started | Aug 12 06:37:01 PM PDT 24 |
| Finished | Aug 12 06:37:02 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-969c8bff-814b-46a7-be23-8b0c72f17804 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3312858764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.3312858764 |
| Directory | /workspace/89.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/89.usbdev_tx_rx_disruption.2968581071 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 545433396 ps |
| CPU time | 1.62 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-49f21131-b21d-4841-8026-951789b9ce64 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2968581071 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 89.usbdev_tx_rx_disruption.2968581071 |
| Directory | /workspace/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/9.usbdev_alert_test.3434480047 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 71071434 ps |
| CPU time | 0.74 seconds |
| Started | Aug 12 06:31:12 PM PDT 24 |
| Finished | Aug 12 06:31:13 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-050fb982-6e56-4a58-b954-26acd4e570ff |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3434480047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.3434480047 |
| Directory | /workspace/9.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_disconnect.2309094111 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 6865392357 ps |
| CPU time | 9.29 seconds |
| Started | Aug 12 06:30:59 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-b3822e73-8aaa-452a-8f04-16eb25a45823 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2309094111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_ao n_wake_disconnect.2309094111 |
| Directory | /workspace/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_reset.3257040678 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 15496041150 ps |
| CPU time | 19.63 seconds |
| Started | Aug 12 06:30:56 PM PDT 24 |
| Finished | Aug 12 06:31:16 PM PDT 24 |
| Peak memory | 215868 kb |
| Host | smart-8bb3bb2b-a485-471d-a84a-9e1ca8919ae1 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3257040678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.3257040678 |
| Directory | /workspace/9.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_resume.1403910199 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 24648025787 ps |
| CPU time | 32.06 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:32 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-032e095b-3574-4fcf-a911-e31f6d848241 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1403910199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_ao n_wake_resume.1403910199 |
| Directory | /workspace/9.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/9.usbdev_av_buffer.1582194635 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 175689712 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-1ffe1961-5cac-4681-ab79-2867c2be5297 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15821 94635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_av_buffer.1582194635 |
| Directory | /workspace/9.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/9.usbdev_bitstuff_err.2096286082 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 148954662 ps |
| CPU time | 0.8 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-6ecf3026-208e-4b5c-91d9-65651a936a71 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20962 86082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_bitstuff_err.2096286082 |
| Directory | /workspace/9.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_data_toggle_clear.2456660987 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 482180568 ps |
| CPU time | 1.67 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:00 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-22ef4ae2-8f15-4dfc-aab1-a06664db0ff1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24566 60987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_clear.2456660987 |
| Directory | /workspace/9.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/9.usbdev_data_toggle_restore.2332859906 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 1121075897 ps |
| CPU time | 3.02 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:03 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-745ee298-6a60-4583-b193-97d0dec1e3ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2332859906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.2332859906 |
| Directory | /workspace/9.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/9.usbdev_device_address.671761884 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 23371356875 ps |
| CPU time | 38.52 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:37 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-b38f193f-158e-4436-b5a3-e33acbff4300 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67176 1884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.671761884 |
| Directory | /workspace/9.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/9.usbdev_device_timeout.2257386974 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 610219673 ps |
| CPU time | 4.82 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:31:03 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-85ce40b9-6c0d-4ae6-b88a-5b232a63c26b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2257386974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.2257386974 |
| Directory | /workspace/9.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/9.usbdev_disable_endpoint.3411040439 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 416637470 ps |
| CPU time | 1.36 seconds |
| Started | Aug 12 06:30:59 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-9a23676c-bd63-47f0-a656-fd6eb498a84f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34110 40439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_disable_endpoint.3411040439 |
| Directory | /workspace/9.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/9.usbdev_disconnected.2326383585 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 166412822 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:30:58 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-cb01d3b2-a94c-478a-986b-47a488014d2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23263 83585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_disconnected.2326383585 |
| Directory | /workspace/9.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/9.usbdev_enable.2568902691 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 38166170 ps |
| CPU time | 0.69 seconds |
| Started | Aug 12 06:31:02 PM PDT 24 |
| Finished | Aug 12 06:31:03 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-594d85ed-ba9b-43d6-8bff-9ff2f07adb33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25689 02691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_enable.2568902691 |
| Directory | /workspace/9.usbdev_enable/latest |
| Test location | /workspace/coverage/default/9.usbdev_endpoint_access.2618471834 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 878729452 ps |
| CPU time | 2.68 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:03 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-d9db19aa-18a1-4582-91c1-12694eb793dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26184 71834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.2618471834 |
| Directory | /workspace/9.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/9.usbdev_endpoint_types.1545643650 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 581162563 ps |
| CPU time | 1.59 seconds |
| Started | Aug 12 06:31:01 PM PDT 24 |
| Finished | Aug 12 06:31:02 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-31d95134-48f8-473d-b727-65e78478f8e0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1545643650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.1545643650 |
| Directory | /workspace/9.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/9.usbdev_fifo_rst.281956190 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 223302473 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-bedc7199-a09a-4407-9d3d-2c2df0f912ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28195 6190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_fifo_rst.281956190 |
| Directory | /workspace/9.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_iso.337722756 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 216609049 ps |
| CPU time | 1.3 seconds |
| Started | Aug 12 06:30:59 PM PDT 24 |
| Finished | Aug 12 06:31:00 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-f5a623bc-a975-4b58-b313-93420bc62cfd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=337722756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.337722756 |
| Directory | /workspace/9.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_stall.3137645902 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 145483787 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:30:59 PM PDT 24 |
| Finished | Aug 12 06:31:00 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-25672ea3-3c08-4a5a-84b1-99b4f9bbd23a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31376 45902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_stall.3137645902 |
| Directory | /workspace/9.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_trans.590040541 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 277499174 ps |
| CPU time | 1.02 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:30:59 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-18401713-9594-4843-baf3-ca0a96f382bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59004 0541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_trans.590040541 |
| Directory | /workspace/9.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_invalid_sync.3093897531 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 3073179787 ps |
| CPU time | 88.86 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:32:29 PM PDT 24 |
| Peak memory | 224156 kb |
| Host | smart-377b27cb-6312-4c5f-9dc4-5b0f0db9f15e |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3093897531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.3093897531 |
| Directory | /workspace/9.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/9.usbdev_iso_retraction.3724239436 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 14343914317 ps |
| CPU time | 95.84 seconds |
| Started | Aug 12 06:30:57 PM PDT 24 |
| Finished | Aug 12 06:32:33 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-08510305-f436-4280-9f0f-8dd67fb6d294 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3724239436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.3724239436 |
| Directory | /workspace/9.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_in_err.4166135178 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 182712094 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:01 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-938d104b-552d-4737-8c0a-7660ef0cca9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41661 35178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_in_err.4166135178 |
| Directory | /workspace/9.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_resume.3893401841 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 24639309444 ps |
| CPU time | 42.37 seconds |
| Started | Aug 12 06:31:02 PM PDT 24 |
| Finished | Aug 12 06:31:44 PM PDT 24 |
| Peak memory | 216028 kb |
| Host | smart-38ae3a1f-a6a4-4357-b818-8ef551587ea2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38934 01841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_resume.3893401841 |
| Directory | /workspace/9.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_suspend.1810298073 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 11397776605 ps |
| CPU time | 15.33 seconds |
| Started | Aug 12 06:31:01 PM PDT 24 |
| Finished | Aug 12 06:31:17 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-92936bf8-33a6-4230-acf2-13b264842037 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18102 98073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_suspend.1810298073 |
| Directory | /workspace/9.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/9.usbdev_low_speed_traffic.1755701502 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 3924410220 ps |
| CPU time | 45.47 seconds |
| Started | Aug 12 06:30:59 PM PDT 24 |
| Finished | Aug 12 06:31:45 PM PDT 24 |
| Peak memory | 219332 kb |
| Host | smart-e1e4b2d0-03c4-406c-9bf2-df26058d671c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1755701502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.1755701502 |
| Directory | /workspace/9.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_inter_pkt_delay.1200008249 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 1709872170 ps |
| CPU time | 12.98 seconds |
| Started | Aug 12 06:31:09 PM PDT 24 |
| Finished | Aug 12 06:31:22 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-afb83b7a-7967-4db6-8c39-c793844ffffe |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1200008249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.1200008249 |
| Directory | /workspace/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_length_in_transaction.830940092 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 252418968 ps |
| CPU time | 1.12 seconds |
| Started | Aug 12 06:31:12 PM PDT 24 |
| Finished | Aug 12 06:31:13 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-1b468f65-af61-41eb-9a22-efde84363436 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=830940092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.830940092 |
| Directory | /workspace/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_length_out_transaction.2313859367 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 190869900 ps |
| CPU time | 0.98 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-2b2458bd-595a-4fc7-9007-1d4da741cb89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23138 59367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.2313859367 |
| Directory | /workspace/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_non_iso_usb_traffic.3434210820 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 2845667879 ps |
| CPU time | 29.92 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:37 PM PDT 24 |
| Peak memory | 217788 kb |
| Host | smart-d72934e4-ac14-435c-baf3-044918f19c72 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34342 10820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.3434210820 |
| Directory | /workspace/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_usb_traffic.2849829091 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 2532365233 ps |
| CPU time | 26.35 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:33 PM PDT 24 |
| Peak memory | 218800 kb |
| Host | smart-42d4a53f-bfcb-4658-88f8-0affd9e17b90 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2849829091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.2849829091 |
| Directory | /workspace/9.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_inter_pkt_delay.1169924279 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 4048591724 ps |
| CPU time | 118.85 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:33:06 PM PDT 24 |
| Peak memory | 217268 kb |
| Host | smart-3acd2747-10e9-476b-b70a-de3fd7368082 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1169924279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.1169924279 |
| Directory | /workspace/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_length_in_transaction.4214556158 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 150073842 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:31:09 PM PDT 24 |
| Finished | Aug 12 06:31:10 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-6a72404e-dca5-4c4d-912c-34435593f9cf |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4214556158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.4214556158 |
| Directory | /workspace/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_length_out_transaction.2659258062 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 147097796 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:11 PM PDT 24 |
| Finished | Aug 12 06:31:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-47b94941-3171-42ba-9b53-dc8cc85ec392 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26592 58062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.2659258062 |
| Directory | /workspace/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_nak_trans.1253545319 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 216404891 ps |
| CPU time | 0.99 seconds |
| Started | Aug 12 06:31:08 PM PDT 24 |
| Finished | Aug 12 06:31:10 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-3576104b-0ab0-45ac-96ca-901fc08dc67e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12535 45319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_nak_trans.1253545319 |
| Directory | /workspace/9.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_iso.1811928580 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 178021341 ps |
| CPU time | 0.94 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-c9971e22-7c3d-4d51-87d5-0aef373ca1ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18119 28580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_iso.1811928580 |
| Directory | /workspace/9.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_stall.3255758505 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 174700785 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:31:08 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-c9095a03-8f91-41f2-9efa-9a8fbb3e23c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32557 58505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_stall.3255758505 |
| Directory | /workspace/9.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_trans_nak.2692562217 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 168688767 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:31:06 PM PDT 24 |
| Finished | Aug 12 06:31:07 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-de5d3941-e003-4bdd-a00b-baa4cf021713 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26925 62217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_trans_nak.2692562217 |
| Directory | /workspace/9.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/9.usbdev_pending_in_trans.2815024799 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 155760938 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ea7b1a4d-4ebf-4810-ba36-513f57dd117f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28150 24799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pending_in_trans.2815024799 |
| Directory | /workspace/9.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_config_pinflip.560733553 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 257260033 ps |
| CPU time | 1.05 seconds |
| Started | Aug 12 06:31:11 PM PDT 24 |
| Finished | Aug 12 06:31:13 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-95d1f0d1-07ca-4103-bbea-fc489a1d388b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=560733553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.560733553 |
| Directory | /workspace/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_config_usb_ref_disable.4156643684 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 163425807 ps |
| CPU time | 0.89 seconds |
| Started | Aug 12 06:31:09 PM PDT 24 |
| Finished | Aug 12 06:31:10 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-9a803676-9118-4561-9ff8-b3cd3382f869 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41566 43684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.4156643684 |
| Directory | /workspace/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_pins_sense.3707487982 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 74593703 ps |
| CPU time | 0.78 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6bfeabc2-f116-4fc5-991c-ebf1a412551a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37074 87982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.3707487982 |
| Directory | /workspace/9.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_buffer.2170721259 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 15656055860 ps |
| CPU time | 38.42 seconds |
| Started | Aug 12 06:31:06 PM PDT 24 |
| Finished | Aug 12 06:31:45 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-ca463890-9ba0-45e2-93c5-03cc48d0d916 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21707 21259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_buffer.2170721259 |
| Directory | /workspace/9.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_received.857012285 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 216163916 ps |
| CPU time | 1 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-adde8741-057b-45dc-ad96-5f007d2fe4fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85701 2285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_received.857012285 |
| Directory | /workspace/9.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_sent.1155530265 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 173906233 ps |
| CPU time | 0.9 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-9e5c9fbd-8e8d-4f2a-abaf-6caf1b32852d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11555 30265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_sent.1155530265 |
| Directory | /workspace/9.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_bus_disconnects.455763200 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 3194262981 ps |
| CPU time | 77.04 seconds |
| Started | Aug 12 06:31:10 PM PDT 24 |
| Finished | Aug 12 06:32:27 PM PDT 24 |
| Peak memory | 218480 kb |
| Host | smart-7058306f-c612-4b5c-a7af-a953166cb444 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=455763200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.455763200 |
| Directory | /workspace/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_bus_resets.3664261322 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 5858414067 ps |
| CPU time | 27.51 seconds |
| Started | Aug 12 06:31:09 PM PDT 24 |
| Finished | Aug 12 06:31:37 PM PDT 24 |
| Peak memory | 219264 kb |
| Host | smart-87ca9a3c-86aa-4891-b60b-e95fcac2f2b7 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3664261322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.3664261322 |
| Directory | /workspace/9.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_suspends.255041351 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 6018759596 ps |
| CPU time | 25.08 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:32 PM PDT 24 |
| Peak memory | 219364 kb |
| Host | smart-29349cb1-6ffd-45dc-9065-74b0150404c6 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=255041351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.255041351 |
| Directory | /workspace/9.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/9.usbdev_random_length_in_transaction.695556 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 232599348 ps |
| CPU time | 0.97 seconds |
| Started | Aug 12 06:31:08 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-2b238794-8228-4c33-96b2-e6101c8fcb30 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69555 6 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_in_transaction.695556 |
| Directory | /workspace/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_random_length_out_transaction.3173937684 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 204046167 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-992dfdfb-b1c7-435a-9cd9-ab4af2ba038e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31739 37684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.3173937684 |
| Directory | /workspace/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_resume_link_active.1795960309 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 20165432310 ps |
| CPU time | 26.34 seconds |
| Started | Aug 12 06:31:09 PM PDT 24 |
| Finished | Aug 12 06:31:35 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-961259cb-b7d6-4130-932b-3d0ebb730e59 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17959 60309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_resume_link_active.1795960309 |
| Directory | /workspace/9.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/9.usbdev_rx_crc_err.1945892964 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 182201041 ps |
| CPU time | 0.83 seconds |
| Started | Aug 12 06:31:04 PM PDT 24 |
| Finished | Aug 12 06:31:05 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c80d7a49-1539-4931-9bce-26aa05bc2d5d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19458 92964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rx_crc_err.1945892964 |
| Directory | /workspace/9.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_rx_full.1454826301 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 242842915 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:31:08 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-7ae7d997-4954-455b-8b8b-4cdbf1ef73d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14548 26301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rx_full.1454826301 |
| Directory | /workspace/9.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/9.usbdev_setup_stage.2473857344 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 161409284 ps |
| CPU time | 0.84 seconds |
| Started | Aug 12 06:31:08 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-666510ef-e226-47e7-8310-8269041623ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24738 57344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_setup_stage.2473857344 |
| Directory | /workspace/9.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/9.usbdev_setup_trans_ignored.3099137271 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 169791352 ps |
| CPU time | 0.87 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:08 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-523f502a-e2cb-4d67-b7ca-47935f8dd686 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30991 37271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_setup_trans_ignored.3099137271 |
| Directory | /workspace/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/9.usbdev_smoke.1024391618 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 315375386 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a3668b42-c891-4050-9001-0f97f3d6662a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10243 91618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.1024391618 |
| Directory | /workspace/9.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/9.usbdev_spurious_pids_ignored.571280947 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 3451391917 ps |
| CPU time | 99.92 seconds |
| Started | Aug 12 06:31:07 PM PDT 24 |
| Finished | Aug 12 06:32:47 PM PDT 24 |
| Peak memory | 217836 kb |
| Host | smart-f82c5ab5-3a31-44c3-878b-7fdd1e5381c1 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=571280947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.571280947 |
| Directory | /workspace/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/9.usbdev_stall_priority_over_nak.1993834032 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 140199410 ps |
| CPU time | 0.82 seconds |
| Started | Aug 12 06:31:09 PM PDT 24 |
| Finished | Aug 12 06:31:10 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-bab87fc1-7a7e-42d4-9bfe-8d07fa276f5b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19938 34032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.1993834032 |
| Directory | /workspace/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/9.usbdev_stall_trans.433269572 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 164806168 ps |
| CPU time | 0.93 seconds |
| Started | Aug 12 06:31:12 PM PDT 24 |
| Finished | Aug 12 06:31:13 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-262349df-bb13-4e41-a74a-f933e5b0e72d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43326 9572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_trans.433269572 |
| Directory | /workspace/9.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_stream_len_max.3226984038 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 1392393734 ps |
| CPU time | 3.38 seconds |
| Started | Aug 12 06:31:06 PM PDT 24 |
| Finished | Aug 12 06:31:09 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-be3f8e89-1577-479f-a845-e10055e8b7b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32269 84038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.3226984038 |
| Directory | /workspace/9.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/9.usbdev_streaming_out.1178527881 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 2151122751 ps |
| CPU time | 16.45 seconds |
| Started | Aug 12 06:31:08 PM PDT 24 |
| Finished | Aug 12 06:31:24 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-8fc67e74-e7cf-4a31-90f7-e11244cdc0f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11785 27881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_streaming_out.1178527881 |
| Directory | /workspace/9.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/9.usbdev_timeout_missing_host_handshake.4088706095 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 1267111888 ps |
| CPU time | 30.22 seconds |
| Started | Aug 12 06:31:00 PM PDT 24 |
| Finished | Aug 12 06:31:30 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-065cdd1b-4a41-43bd-9a28-59a447186a36 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4088706095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host _handshake.4088706095 |
| Directory | /workspace/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/90.usbdev_endpoint_types.1920351409 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 403045103 ps |
| CPU time | 1.26 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4d57ba55-73b6-4110-a85b-110b0bb9988d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1920351409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.1920351409 |
| Directory | /workspace/90.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/90.usbdev_tx_rx_disruption.2135295561 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 463927183 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:36:55 PM PDT 24 |
| Finished | Aug 12 06:36:57 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-030578ea-7fd1-4967-9c5a-8c799fa5ccce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2135295561 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 90.usbdev_tx_rx_disruption.2135295561 |
| Directory | /workspace/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/91.usbdev_endpoint_types.1081731115 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 296911745 ps |
| CPU time | 1.18 seconds |
| Started | Aug 12 06:37:04 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4cdfc1ae-ad9c-445e-8dde-65b364b939f9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1081731115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.1081731115 |
| Directory | /workspace/91.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/91.usbdev_tx_rx_disruption.586604924 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 436652710 ps |
| CPU time | 1.38 seconds |
| Started | Aug 12 06:37:35 PM PDT 24 |
| Finished | Aug 12 06:37:36 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-70be88e1-b445-4273-b089-45c789656be9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=586604924 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 91.usbdev_tx_rx_disruption.586604924 |
| Directory | /workspace/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/92.usbdev_endpoint_types.377138523 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 227771939 ps |
| CPU time | 0.96 seconds |
| Started | Aug 12 06:37:14 PM PDT 24 |
| Finished | Aug 12 06:37:15 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ef9a9085-ec4f-4493-8435-4c4d8566ee76 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=377138523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.377138523 |
| Directory | /workspace/92.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/92.usbdev_tx_rx_disruption.330358444 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 536531573 ps |
| CPU time | 1.63 seconds |
| Started | Aug 12 06:37:03 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-1bd427ca-9e29-4fe6-ab8c-718c11ef1bbc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=330358444 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 92.usbdev_tx_rx_disruption.330358444 |
| Directory | /workspace/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/93.usbdev_endpoint_types.1753665064 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 622393239 ps |
| CPU time | 1.54 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-2397c8a4-5cb0-4f94-a053-e6249af00440 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1753665064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.1753665064 |
| Directory | /workspace/93.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/93.usbdev_tx_rx_disruption.518419596 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 599850038 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:37:02 PM PDT 24 |
| Finished | Aug 12 06:37:04 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-2f2288b6-08b5-4abf-bde6-d33242e59460 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=518419596 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 93.usbdev_tx_rx_disruption.518419596 |
| Directory | /workspace/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/94.usbdev_tx_rx_disruption.2382959659 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 479240666 ps |
| CPU time | 1.55 seconds |
| Started | Aug 12 06:37:11 PM PDT 24 |
| Finished | Aug 12 06:37:13 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-298d1775-a44d-4dc4-b395-84b821a41b9d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2382959659 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 94.usbdev_tx_rx_disruption.2382959659 |
| Directory | /workspace/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/95.usbdev_endpoint_types.1693635593 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 161870950 ps |
| CPU time | 0.86 seconds |
| Started | Aug 12 06:37:27 PM PDT 24 |
| Finished | Aug 12 06:37:28 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-28d924b7-6397-413e-8dd3-e20a328cf642 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1693635593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.1693635593 |
| Directory | /workspace/95.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/95.usbdev_tx_rx_disruption.1303723488 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 497105050 ps |
| CPU time | 1.58 seconds |
| Started | Aug 12 06:37:09 PM PDT 24 |
| Finished | Aug 12 06:37:11 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-4df2abb1-cdf4-43f4-a827-27b51297294f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1303723488 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 95.usbdev_tx_rx_disruption.1303723488 |
| Directory | /workspace/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/96.usbdev_endpoint_types.4075034396 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 428791515 ps |
| CPU time | 1.32 seconds |
| Started | Aug 12 06:37:07 PM PDT 24 |
| Finished | Aug 12 06:37:14 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-87132840-26c5-410a-8c73-fd26ecf072b4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4075034396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.4075034396 |
| Directory | /workspace/96.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/96.usbdev_tx_rx_disruption.4049449635 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 570265478 ps |
| CPU time | 1.66 seconds |
| Started | Aug 12 06:36:59 PM PDT 24 |
| Finished | Aug 12 06:37:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-bb0a02af-ded3-4ccc-98a2-0db230fc2e49 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4049449635 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 96.usbdev_tx_rx_disruption.4049449635 |
| Directory | /workspace/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/97.usbdev_endpoint_types.1356885425 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 338208552 ps |
| CPU time | 1.2 seconds |
| Started | Aug 12 06:37:05 PM PDT 24 |
| Finished | Aug 12 06:37:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7903467d-d668-4c27-a555-bbfa687f471e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1356885425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.1356885425 |
| Directory | /workspace/97.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/97.usbdev_tx_rx_disruption.1223707283 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 568204131 ps |
| CPU time | 1.72 seconds |
| Started | Aug 12 06:37:22 PM PDT 24 |
| Finished | Aug 12 06:37:24 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-223ec3f9-6b3a-41a5-b716-1157bfe00d37 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1223707283 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 97.usbdev_tx_rx_disruption.1223707283 |
| Directory | /workspace/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/98.usbdev_endpoint_types.46448191 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 246853547 ps |
| CPU time | 0.92 seconds |
| Started | Aug 12 06:37:16 PM PDT 24 |
| Finished | Aug 12 06:37:17 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-49feff46-96dc-46c6-b037-b55243d09130 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=46448191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.46448191 |
| Directory | /workspace/98.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/98.usbdev_tx_rx_disruption.1296800306 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 519508193 ps |
| CPU time | 1.45 seconds |
| Started | Aug 12 06:37:05 PM PDT 24 |
| Finished | Aug 12 06:37:06 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a04184b3-0c83-4f5c-b888-ccbfe7249a3c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1296800306 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 98.usbdev_tx_rx_disruption.1296800306 |
| Directory | /workspace/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/99.usbdev_endpoint_types.1441113299 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 347980384 ps |
| CPU time | 1.1 seconds |
| Started | Aug 12 06:37:16 PM PDT 24 |
| Finished | Aug 12 06:37:17 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-64170112-f95d-41f6-8f27-c4743b2d0947 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1441113299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.1441113299 |
| Directory | /workspace/99.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/99.usbdev_tx_rx_disruption.1358422122 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 533546710 ps |
| CPU time | 1.57 seconds |
| Started | Aug 12 06:37:21 PM PDT 24 |
| Finished | Aug 12 06:37:23 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-2de2c3f0-4f1c-4bf6-af94-2d10fdc251e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1358422122 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 99.usbdev_tx_rx_disruption.1358422122 |
| Directory | /workspace/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |