| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 96.55 | 98.11 | 95.96 | 97.44 | 94.92 | 98.30 | 98.17 | 92.94 |
| T3567 | /workspace/coverage/default/26.usbdev_smoke.763834770 | Aug 15 05:31:22 PM PDT 24 | Aug 15 05:31:23 PM PDT 24 | 238630890 ps | ||
| T3568 | /workspace/coverage/default/48.usbdev_nak_trans.754937007 | Aug 15 05:34:35 PM PDT 24 | Aug 15 05:34:36 PM PDT 24 | 250235731 ps | ||
| T3569 | /workspace/coverage/default/11.usbdev_streaming_out.2057143160 | Aug 15 05:29:29 PM PDT 24 | Aug 15 05:30:30 PM PDT 24 | 2171343841 ps | ||
| T3570 | /workspace/coverage/default/16.usbdev_device_timeout.606898530 | Aug 15 05:30:13 PM PDT 24 | Aug 15 05:30:43 PM PDT 24 | 1249517249 ps | ||
| T3571 | /workspace/coverage/default/37.usbdev_setup_stage.1458854051 | Aug 15 05:33:02 PM PDT 24 | Aug 15 05:33:03 PM PDT 24 | 148625105 ps | ||
| T3572 | /workspace/coverage/default/0.usbdev_device_address.1943164573 | Aug 15 05:27:28 PM PDT 24 | Aug 15 05:28:34 PM PDT 24 | 37013851189 ps | ||
| T3573 | /workspace/coverage/default/28.usbdev_max_length_in_transaction.3615028211 | Aug 15 05:31:42 PM PDT 24 | Aug 15 05:31:44 PM PDT 24 | 247958844 ps | ||
| T3574 | /workspace/coverage/default/28.usbdev_device_timeout.4083880778 | Aug 15 05:31:37 PM PDT 24 | Aug 15 05:31:43 PM PDT 24 | 836969612 ps | ||
| T3575 | /workspace/coverage/default/4.usbdev_enable.3742287982 | Aug 15 05:27:56 PM PDT 24 | Aug 15 05:27:56 PM PDT 24 | 37574553 ps | ||
| T3576 | /workspace/coverage/default/16.usbdev_fifo_rst.1895152736 | Aug 15 05:30:08 PM PDT 24 | Aug 15 05:30:09 PM PDT 24 | 158309743 ps | ||
| T3577 | /workspace/coverage/default/34.usbdev_pkt_sent.2781616710 | Aug 15 05:32:30 PM PDT 24 | Aug 15 05:32:31 PM PDT 24 | 204050557 ps | ||
| T3578 | /workspace/coverage/default/7.usbdev_max_length_in_transaction.721868582 | Aug 15 05:28:40 PM PDT 24 | Aug 15 05:28:41 PM PDT 24 | 259147605 ps | ||
| T3579 | /workspace/coverage/default/45.usbdev_invalid_sync.2210538701 | Aug 15 05:34:01 PM PDT 24 | Aug 15 05:35:16 PM PDT 24 | 2575722891 ps | ||
| T3580 | /workspace/coverage/default/8.usbdev_min_length_out_transaction.2667061042 | Aug 15 05:28:46 PM PDT 24 | Aug 15 05:28:47 PM PDT 24 | 144206716 ps | ||
| T3581 | /workspace/coverage/default/45.usbdev_aon_wake_disconnect.1862054205 | Aug 15 05:33:57 PM PDT 24 | Aug 15 05:34:04 PM PDT 24 | 4360927694 ps | ||
| T3582 | /workspace/coverage/default/333.usbdev_tx_rx_disruption.1770575179 | Aug 15 05:35:39 PM PDT 24 | Aug 15 05:35:41 PM PDT 24 | 555907540 ps | ||
| T3583 | /workspace/coverage/default/32.usbdev_stream_len_max.2409294323 | Aug 15 05:32:42 PM PDT 24 | Aug 15 05:32:46 PM PDT 24 | 1116227102 ps | ||
| T3584 | /workspace/coverage/default/9.usbdev_av_buffer.3226801116 | Aug 15 05:28:59 PM PDT 24 | Aug 15 05:29:00 PM PDT 24 | 158247406 ps | ||
| T3585 | /workspace/coverage/default/46.usbdev_pkt_received.2859786831 | Aug 15 05:34:20 PM PDT 24 | Aug 15 05:34:21 PM PDT 24 | 194924456 ps | ||
| T3586 | /workspace/coverage/default/16.usbdev_max_length_in_transaction.494113926 | Aug 15 05:30:08 PM PDT 24 | Aug 15 05:30:10 PM PDT 24 | 246210313 ps | ||
| T3587 | /workspace/coverage/default/36.usbdev_phy_pins_sense.3750514042 | Aug 15 05:32:49 PM PDT 24 | Aug 15 05:32:50 PM PDT 24 | 57436959 ps | ||
| T3588 | /workspace/coverage/default/175.usbdev_tx_rx_disruption.2034633158 | Aug 15 05:35:20 PM PDT 24 | Aug 15 05:35:22 PM PDT 24 | 634125792 ps | ||
| T3589 | /workspace/coverage/default/131.usbdev_endpoint_types.3939222822 | Aug 15 05:35:17 PM PDT 24 | Aug 15 05:35:18 PM PDT 24 | 270239482 ps | ||
| T3590 | /workspace/coverage/default/20.usbdev_aon_wake_resume.3052720005 | Aug 15 05:30:28 PM PDT 24 | Aug 15 05:30:57 PM PDT 24 | 23880693406 ps | ||
| T3591 | /workspace/coverage/default/20.usbdev_link_suspend.789005321 | Aug 15 05:30:53 PM PDT 24 | Aug 15 05:31:01 PM PDT 24 | 4834097275 ps | ||
| T3592 | /workspace/coverage/default/10.usbdev_device_timeout.1153274800 | Aug 15 05:29:15 PM PDT 24 | Aug 15 05:29:29 PM PDT 24 | 1540191379 ps | ||
| T3593 | /workspace/coverage/default/29.usbdev_stall_priority_over_nak.669719980 | Aug 15 05:31:56 PM PDT 24 | Aug 15 05:31:57 PM PDT 24 | 187565772 ps | ||
| T3594 | /workspace/coverage/default/9.usbdev_data_toggle_restore.753784274 | Aug 15 05:28:55 PM PDT 24 | Aug 15 05:28:56 PM PDT 24 | 397747990 ps | ||
| T3595 | /workspace/coverage/default/40.usbdev_pkt_sent.4257869267 | Aug 15 05:33:07 PM PDT 24 | Aug 15 05:33:08 PM PDT 24 | 240697731 ps | ||
| T3596 | /workspace/coverage/default/6.usbdev_aon_wake_disconnect.879298804 | Aug 15 05:28:28 PM PDT 24 | Aug 15 05:28:35 PM PDT 24 | 4259708955 ps | ||
| T3597 | /workspace/coverage/default/49.usbdev_enable.609347313 | Aug 15 05:34:33 PM PDT 24 | Aug 15 05:34:34 PM PDT 24 | 72486595 ps | ||
| T3598 | /workspace/coverage/default/2.usbdev_phy_pins_sense.4272447924 | Aug 15 05:27:46 PM PDT 24 | Aug 15 05:27:47 PM PDT 24 | 92809201 ps | ||
| T3599 | /workspace/coverage/default/451.usbdev_tx_rx_disruption.1458293642 | Aug 15 05:35:46 PM PDT 24 | Aug 15 05:35:48 PM PDT 24 | 422502131 ps | ||
| T3600 | /workspace/coverage/default/430.usbdev_tx_rx_disruption.3448201823 | Aug 15 05:36:08 PM PDT 24 | Aug 15 05:36:10 PM PDT 24 | 641576624 ps | ||
| T3601 | /workspace/coverage/default/3.usbdev_max_length_in_transaction.2898171968 | Aug 15 05:27:51 PM PDT 24 | Aug 15 05:27:57 PM PDT 24 | 285082590 ps | ||
| T3602 | /workspace/coverage/default/161.usbdev_endpoint_types.3350366759 | Aug 15 05:35:31 PM PDT 24 | Aug 15 05:35:32 PM PDT 24 | 621522373 ps | ||
| T3603 | /workspace/coverage/default/45.usbdev_max_inter_pkt_delay.4056794848 | Aug 15 05:33:59 PM PDT 24 | Aug 15 05:35:53 PM PDT 24 | 3844893643 ps | ||
| T3604 | /workspace/coverage/default/6.usbdev_min_inter_pkt_delay.3411077306 | Aug 15 05:28:31 PM PDT 24 | Aug 15 05:28:52 PM PDT 24 | 2104089307 ps | ||
| T3605 | /workspace/coverage/default/9.usbdev_invalid_sync.941576463 | Aug 15 05:28:56 PM PDT 24 | Aug 15 05:29:14 PM PDT 24 | 2284177599 ps | ||
| T3606 | /workspace/coverage/default/31.usbdev_stall_priority_over_nak.3635370809 | Aug 15 05:32:09 PM PDT 24 | Aug 15 05:32:10 PM PDT 24 | 175285417 ps | ||
| T397 | /workspace/coverage/default/49.usbdev_endpoint_types.3082655724 | Aug 15 05:34:35 PM PDT 24 | Aug 15 05:34:36 PM PDT 24 | 380360013 ps | ||
| T3607 | /workspace/coverage/default/36.usbdev_timeout_missing_host_handshake.217950777 | Aug 15 05:32:54 PM PDT 24 | Aug 15 05:33:23 PM PDT 24 | 3444998089 ps | ||
| T3608 | /workspace/coverage/default/20.usbdev_out_stall.105151563 | Aug 15 05:30:24 PM PDT 24 | Aug 15 05:30:25 PM PDT 24 | 226521625 ps | ||
| T3609 | /workspace/coverage/default/3.usbdev_endpoint_access.1147658921 | Aug 15 05:28:02 PM PDT 24 | Aug 15 05:28:04 PM PDT 24 | 861485654 ps | ||
| T3610 | /workspace/coverage/default/33.usbdev_in_iso.3013584123 | Aug 15 05:32:47 PM PDT 24 | Aug 15 05:32:49 PM PDT 24 | 184861290 ps | ||
| T3611 | /workspace/coverage/default/12.usbdev_link_suspend.823223734 | Aug 15 05:29:28 PM PDT 24 | Aug 15 05:29:45 PM PDT 24 | 11213113556 ps | ||
| T3612 | /workspace/coverage/default/18.usbdev_resume_link_active.3129337383 | Aug 15 05:30:19 PM PDT 24 | Aug 15 05:30:41 PM PDT 24 | 20166163314 ps | ||
| T3613 | /workspace/coverage/default/253.usbdev_tx_rx_disruption.2372793440 | Aug 15 05:35:29 PM PDT 24 | Aug 15 05:35:30 PM PDT 24 | 622554269 ps | ||
| T3614 | /workspace/coverage/default/30.usbdev_pkt_received.1487509182 | Aug 15 05:32:36 PM PDT 24 | Aug 15 05:32:37 PM PDT 24 | 176097110 ps | ||
| T3615 | /workspace/coverage/default/368.usbdev_tx_rx_disruption.1684912764 | Aug 15 05:36:30 PM PDT 24 | Aug 15 05:36:32 PM PDT 24 | 536756492 ps | ||
| T3616 | /workspace/coverage/default/2.usbdev_max_non_iso_usb_traffic.1589459353 | Aug 15 05:27:47 PM PDT 24 | Aug 15 05:28:10 PM PDT 24 | 2175951063 ps | ||
| T3617 | /workspace/coverage/default/11.usbdev_phy_pins_sense.1046095912 | Aug 15 05:29:33 PM PDT 24 | Aug 15 05:29:34 PM PDT 24 | 100683124 ps | ||
| T3618 | /workspace/coverage/default/4.usbdev_max_inter_pkt_delay.294412171 | Aug 15 05:28:33 PM PDT 24 | Aug 15 05:29:13 PM PDT 24 | 1470847737 ps | ||
| T3619 | /workspace/coverage/default/49.usbdev_streaming_out.2521849988 | Aug 15 05:34:46 PM PDT 24 | Aug 15 05:36:27 PM PDT 24 | 3892239248 ps | ||
| T3620 | /workspace/coverage/default/11.usbdev_spurious_pids_ignored.818239674 | Aug 15 05:29:31 PM PDT 24 | Aug 15 05:29:50 PM PDT 24 | 2573329337 ps | ||
| T3621 | /workspace/coverage/default/431.usbdev_tx_rx_disruption.4219712110 | Aug 15 05:35:49 PM PDT 24 | Aug 15 05:35:50 PM PDT 24 | 531641810 ps | ||
| T3622 | /workspace/coverage/default/30.usbdev_rx_full.3951689731 | Aug 15 05:32:06 PM PDT 24 | Aug 15 05:32:07 PM PDT 24 | 342543942 ps | ||
| T3623 | /workspace/coverage/default/252.usbdev_tx_rx_disruption.1056886537 | Aug 15 05:35:24 PM PDT 24 | Aug 15 05:35:26 PM PDT 24 | 626705198 ps | ||
| T3624 | /workspace/coverage/default/18.usbdev_enable.747750077 | Aug 15 05:30:22 PM PDT 24 | Aug 15 05:30:23 PM PDT 24 | 64302011 ps | ||
| T3625 | /workspace/coverage/default/36.usbdev_in_trans.2834268051 | Aug 15 05:32:38 PM PDT 24 | Aug 15 05:32:39 PM PDT 24 | 168821930 ps | ||
| T3626 | /workspace/coverage/default/327.usbdev_tx_rx_disruption.3777898849 | Aug 15 05:35:43 PM PDT 24 | Aug 15 05:35:45 PM PDT 24 | 482764299 ps | ||
| T3627 | /workspace/coverage/default/36.usbdev_aon_wake_resume.4247053880 | Aug 15 05:32:45 PM PDT 24 | Aug 15 05:33:23 PM PDT 24 | 29575395451 ps | ||
| T3628 | /workspace/coverage/default/419.usbdev_tx_rx_disruption.3059806083 | Aug 15 05:36:00 PM PDT 24 | Aug 15 05:36:01 PM PDT 24 | 572980046 ps | ||
| T3629 | /workspace/coverage/default/36.usbdev_low_speed_traffic.697928652 | Aug 15 05:32:38 PM PDT 24 | Aug 15 05:34:03 PM PDT 24 | 2885487867 ps | ||
| T270 | /workspace/coverage/cover_reg_top/12.usbdev_csr_rw.634065825 | Aug 15 06:09:29 PM PDT 24 | Aug 15 06:09:30 PM PDT 24 | 92773294 ps | ||
| T233 | /workspace/coverage/cover_reg_top/8.usbdev_intr_test.1791953913 | Aug 15 06:09:25 PM PDT 24 | Aug 15 06:09:26 PM PDT 24 | 47584146 ps | ||
| T271 | /workspace/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1583900377 | Aug 15 06:09:43 PM PDT 24 | Aug 15 06:09:44 PM PDT 24 | 108102144 ps | ||
| T230 | /workspace/coverage/cover_reg_top/18.usbdev_intr_test.466204868 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 34739013 ps | ||
| T224 | /workspace/coverage/cover_reg_top/15.usbdev_tl_errors.446624304 | Aug 15 06:09:35 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 290570346 ps | ||
| T272 | /workspace/coverage/cover_reg_top/8.usbdev_csr_rw.522917967 | Aug 15 06:09:21 PM PDT 24 | Aug 15 06:09:22 PM PDT 24 | 75163622 ps | ||
| T325 | /workspace/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1458181448 | Aug 15 06:09:19 PM PDT 24 | Aug 15 06:09:24 PM PDT 24 | 1088850889 ps | ||
| T302 | /workspace/coverage/cover_reg_top/0.usbdev_csr_aliasing.1282438144 | Aug 15 06:09:00 PM PDT 24 | Aug 15 06:09:02 PM PDT 24 | 212163653 ps | ||
| T315 | /workspace/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.3365460320 | Aug 15 06:09:28 PM PDT 24 | Aug 15 06:09:30 PM PDT 24 | 123746842 ps | ||
| T225 | /workspace/coverage/cover_reg_top/10.usbdev_tl_errors.2834985518 | Aug 15 06:09:31 PM PDT 24 | Aug 15 06:09:34 PM PDT 24 | 260301481 ps | ||
| T316 | /workspace/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3969518383 | Aug 15 06:09:35 PM PDT 24 | Aug 15 06:09:36 PM PDT 24 | 107432944 ps | ||
| T317 | /workspace/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2050940422 | Aug 15 06:09:01 PM PDT 24 | Aug 15 06:09:03 PM PDT 24 | 198567231 ps | ||
| T303 | /workspace/coverage/cover_reg_top/1.usbdev_mem_partial_access.657087919 | Aug 15 06:09:01 PM PDT 24 | Aug 15 06:09:02 PM PDT 24 | 118720567 ps | ||
| T304 | /workspace/coverage/cover_reg_top/2.usbdev_csr_bit_bash.360208986 | Aug 15 06:09:05 PM PDT 24 | Aug 15 06:09:10 PM PDT 24 | 894861540 ps | ||
| T234 | /workspace/coverage/cover_reg_top/14.usbdev_intr_test.1898127021 | Aug 15 06:09:47 PM PDT 24 | Aug 15 06:09:48 PM PDT 24 | 52411400 ps | ||
| T231 | /workspace/coverage/cover_reg_top/36.usbdev_intr_test.1616691646 | Aug 15 06:09:46 PM PDT 24 | Aug 15 06:09:47 PM PDT 24 | 48206224 ps | ||
| T318 | /workspace/coverage/cover_reg_top/13.usbdev_csr_rw.1303529638 | Aug 15 06:09:36 PM PDT 24 | Aug 15 06:09:37 PM PDT 24 | 48743573 ps | ||
| T305 | /workspace/coverage/cover_reg_top/9.usbdev_csr_rw.795414354 | Aug 15 06:09:25 PM PDT 24 | Aug 15 06:09:26 PM PDT 24 | 92749011 ps | ||
| T326 | /workspace/coverage/cover_reg_top/2.usbdev_csr_aliasing.3422483786 | Aug 15 06:09:05 PM PDT 24 | Aug 15 06:09:09 PM PDT 24 | 357506444 ps | ||
| T232 | /workspace/coverage/cover_reg_top/38.usbdev_intr_test.3442933383 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 59036781 ps | ||
| T226 | /workspace/coverage/cover_reg_top/12.usbdev_tl_errors.3220780146 | Aug 15 06:09:34 PM PDT 24 | Aug 15 06:09:37 PM PDT 24 | 217643573 ps | ||
| T3630 | /workspace/coverage/cover_reg_top/1.usbdev_mem_walk.756925021 | Aug 15 06:09:02 PM PDT 24 | Aug 15 06:09:05 PM PDT 24 | 324774383 ps | ||
| T319 | /workspace/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.4175642691 | Aug 15 06:09:11 PM PDT 24 | Aug 15 06:09:13 PM PDT 24 | 284128395 ps | ||
| T331 | /workspace/coverage/cover_reg_top/9.usbdev_intr_test.469804868 | Aug 15 06:09:25 PM PDT 24 | Aug 15 06:09:26 PM PDT 24 | 50215812 ps | ||
| T3631 | /workspace/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3051846026 | Aug 15 06:09:14 PM PDT 24 | Aug 15 06:09:15 PM PDT 24 | 67671055 ps | ||
| T353 | /workspace/coverage/cover_reg_top/40.usbdev_intr_test.3286859222 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 71311666 ps | ||
| T275 | /workspace/coverage/cover_reg_top/10.usbdev_tl_intg_err.2140605910 | Aug 15 06:09:36 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 533881450 ps | ||
| T283 | /workspace/coverage/cover_reg_top/1.usbdev_tl_errors.3908747495 | Aug 15 06:08:54 PM PDT 24 | Aug 15 06:08:57 PM PDT 24 | 122938919 ps | ||
| T289 | /workspace/coverage/cover_reg_top/13.usbdev_tl_errors.2438891701 | Aug 15 06:09:28 PM PDT 24 | Aug 15 06:09:30 PM PDT 24 | 63416827 ps | ||
| T3632 | /workspace/coverage/cover_reg_top/4.usbdev_mem_walk.1084220659 | Aug 15 06:09:14 PM PDT 24 | Aug 15 06:09:19 PM PDT 24 | 476669177 ps | ||
| T332 | /workspace/coverage/cover_reg_top/44.usbdev_intr_test.2291344891 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 99415182 ps | ||
| T277 | /workspace/coverage/cover_reg_top/5.usbdev_tl_intg_err.849687869 | Aug 15 06:09:10 PM PDT 24 | Aug 15 06:09:15 PM PDT 24 | 754841886 ps | ||
| T306 | /workspace/coverage/cover_reg_top/1.usbdev_csr_rw.2960907154 | Aug 15 06:08:55 PM PDT 24 | Aug 15 06:08:56 PM PDT 24 | 51074617 ps | ||
| T278 | /workspace/coverage/cover_reg_top/4.usbdev_tl_intg_err.860505021 | Aug 15 06:09:12 PM PDT 24 | Aug 15 06:09:17 PM PDT 24 | 753152142 ps | ||
| T290 | /workspace/coverage/cover_reg_top/6.usbdev_tl_intg_err.732234442 | Aug 15 06:09:24 PM PDT 24 | Aug 15 06:09:28 PM PDT 24 | 752533748 ps | ||
| T307 | /workspace/coverage/cover_reg_top/3.usbdev_mem_partial_access.1460574709 | Aug 15 06:09:08 PM PDT 24 | Aug 15 06:09:10 PM PDT 24 | 98007078 ps | ||
| T3633 | /workspace/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.3858097521 | Aug 15 06:09:27 PM PDT 24 | Aug 15 06:09:29 PM PDT 24 | 97194851 ps | ||
| T354 | /workspace/coverage/cover_reg_top/26.usbdev_intr_test.3263005585 | Aug 15 06:09:47 PM PDT 24 | Aug 15 06:09:48 PM PDT 24 | 39075913 ps | ||
| T355 | /workspace/coverage/cover_reg_top/2.usbdev_intr_test.3382248158 | Aug 15 06:08:59 PM PDT 24 | Aug 15 06:09:00 PM PDT 24 | 52093749 ps | ||
| T356 | /workspace/coverage/cover_reg_top/39.usbdev_intr_test.3007932877 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 45977644 ps | ||
| T3634 | /workspace/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.2584310747 | Aug 15 06:09:00 PM PDT 24 | Aug 15 06:09:02 PM PDT 24 | 98012344 ps | ||
| T308 | /workspace/coverage/cover_reg_top/16.usbdev_csr_rw.3983609336 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 47141583 ps | ||
| T291 | /workspace/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.1001132498 | Aug 15 06:09:22 PM PDT 24 | Aug 15 06:09:25 PM PDT 24 | 111857220 ps | ||
| T357 | /workspace/coverage/cover_reg_top/5.usbdev_intr_test.4130023755 | Aug 15 06:09:19 PM PDT 24 | Aug 15 06:09:20 PM PDT 24 | 61907649 ps | ||
| T333 | /workspace/coverage/cover_reg_top/31.usbdev_intr_test.2879117639 | Aug 15 06:09:36 PM PDT 24 | Aug 15 06:09:37 PM PDT 24 | 51246577 ps | ||
| T3635 | /workspace/coverage/cover_reg_top/24.usbdev_intr_test.1760872741 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 103496396 ps | ||
| T327 | /workspace/coverage/cover_reg_top/11.usbdev_csr_rw.1534768089 | Aug 15 06:09:30 PM PDT 24 | Aug 15 06:09:31 PM PDT 24 | 61416114 ps | ||
| T3636 | /workspace/coverage/cover_reg_top/3.usbdev_mem_walk.489983368 | Aug 15 06:09:07 PM PDT 24 | Aug 15 06:09:11 PM PDT 24 | 706991578 ps | ||
| T3637 | /workspace/coverage/cover_reg_top/0.usbdev_intr_test.3801858627 | Aug 15 06:08:55 PM PDT 24 | Aug 15 06:08:55 PM PDT 24 | 83806011 ps | ||
| T328 | /workspace/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.574785169 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 182719995 ps | ||
| T284 | /workspace/coverage/cover_reg_top/18.usbdev_tl_errors.2293584798 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 178598766 ps | ||
| T292 | /workspace/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.3483759858 | Aug 15 06:09:10 PM PDT 24 | Aug 15 06:09:13 PM PDT 24 | 233848009 ps | ||
| T3638 | /workspace/coverage/cover_reg_top/42.usbdev_intr_test.1695197351 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 84084362 ps | ||
| T329 | /workspace/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3927519906 | Aug 15 06:09:05 PM PDT 24 | Aug 15 06:09:06 PM PDT 24 | 74789982 ps | ||
| T309 | /workspace/coverage/cover_reg_top/4.usbdev_mem_partial_access.3138623524 | Aug 15 06:09:18 PM PDT 24 | Aug 15 06:09:21 PM PDT 24 | 99245069 ps | ||
| T293 | /workspace/coverage/cover_reg_top/1.usbdev_tl_intg_err.3226021422 | Aug 15 06:09:06 PM PDT 24 | Aug 15 06:09:11 PM PDT 24 | 773697439 ps | ||
| T3639 | /workspace/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.2068027906 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 150479453 ps | ||
| T3640 | /workspace/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.3193505169 | Aug 15 06:09:24 PM PDT 24 | Aug 15 06:09:25 PM PDT 24 | 120108715 ps | ||
| T330 | /workspace/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.2243356350 | Aug 15 06:09:18 PM PDT 24 | Aug 15 06:09:20 PM PDT 24 | 102899838 ps | ||
| T310 | /workspace/coverage/cover_reg_top/0.usbdev_csr_bit_bash.1445737240 | Aug 15 06:09:01 PM PDT 24 | Aug 15 06:09:10 PM PDT 24 | 1406435127 ps | ||
| T287 | /workspace/coverage/cover_reg_top/4.usbdev_tl_errors.4122242670 | Aug 15 06:09:19 PM PDT 24 | Aug 15 06:09:23 PM PDT 24 | 251999663 ps | ||
| T512 | /workspace/coverage/cover_reg_top/7.usbdev_tl_intg_err.768251003 | Aug 15 06:09:24 PM PDT 24 | Aug 15 06:09:27 PM PDT 24 | 465845150 ps | ||
| T3641 | /workspace/coverage/cover_reg_top/7.usbdev_csr_rw.528071171 | Aug 15 06:09:29 PM PDT 24 | Aug 15 06:09:30 PM PDT 24 | 63704369 ps | ||
| T311 | /workspace/coverage/cover_reg_top/0.usbdev_mem_partial_access.3150510865 | Aug 15 06:08:56 PM PDT 24 | Aug 15 06:08:58 PM PDT 24 | 164426540 ps | ||
| T509 | /workspace/coverage/cover_reg_top/16.usbdev_tl_intg_err.1061612440 | Aug 15 06:09:34 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 824154733 ps | ||
| T3642 | /workspace/coverage/cover_reg_top/34.usbdev_intr_test.1982132517 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 34351009 ps | ||
| T510 | /workspace/coverage/cover_reg_top/8.usbdev_tl_intg_err.3021802508 | Aug 15 06:09:29 PM PDT 24 | Aug 15 06:09:32 PM PDT 24 | 403284107 ps | ||
| T3643 | /workspace/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2234953948 | Aug 15 06:09:29 PM PDT 24 | Aug 15 06:09:31 PM PDT 24 | 66106286 ps | ||
| T3644 | /workspace/coverage/cover_reg_top/3.usbdev_tl_errors.4181866258 | Aug 15 06:09:07 PM PDT 24 | Aug 15 06:09:10 PM PDT 24 | 259804613 ps | ||
| T3645 | /workspace/coverage/cover_reg_top/5.usbdev_tl_errors.3719422154 | Aug 15 06:09:18 PM PDT 24 | Aug 15 06:09:21 PM PDT 24 | 280094744 ps | ||
| T3646 | /workspace/coverage/cover_reg_top/25.usbdev_intr_test.3539285543 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 61003520 ps | ||
| T3647 | /workspace/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1736891436 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:42 PM PDT 24 | 104843005 ps | ||
| T312 | /workspace/coverage/cover_reg_top/5.usbdev_csr_rw.2033951563 | Aug 15 06:09:10 PM PDT 24 | Aug 15 06:09:11 PM PDT 24 | 47642926 ps | ||
| T3648 | /workspace/coverage/cover_reg_top/1.usbdev_csr_aliasing.3133203773 | Aug 15 06:08:59 PM PDT 24 | Aug 15 06:09:02 PM PDT 24 | 167018457 ps | ||
| T3649 | /workspace/coverage/cover_reg_top/22.usbdev_intr_test.3130790041 | Aug 15 06:09:35 PM PDT 24 | Aug 15 06:09:35 PM PDT 24 | 51611052 ps | ||
| T3650 | /workspace/coverage/cover_reg_top/17.usbdev_intr_test.989146781 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 38861910 ps | ||
| T3651 | /workspace/coverage/cover_reg_top/19.usbdev_intr_test.3293800348 | Aug 15 06:09:36 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 77007871 ps | ||
| T314 | /workspace/coverage/cover_reg_top/19.usbdev_csr_rw.1641709019 | Aug 15 06:09:35 PM PDT 24 | Aug 15 06:09:36 PM PDT 24 | 83598888 ps | ||
| T3652 | /workspace/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.1970725640 | Aug 15 06:09:12 PM PDT 24 | Aug 15 06:09:14 PM PDT 24 | 179803128 ps | ||
| T3653 | /workspace/coverage/cover_reg_top/43.usbdev_intr_test.1830896205 | Aug 15 06:09:46 PM PDT 24 | Aug 15 06:09:47 PM PDT 24 | 62602618 ps | ||
| T3654 | /workspace/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.2378278373 | Aug 15 06:09:30 PM PDT 24 | Aug 15 06:09:32 PM PDT 24 | 90777842 ps | ||
| T3655 | /workspace/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.4024994354 | Aug 15 06:09:00 PM PDT 24 | Aug 15 06:09:02 PM PDT 24 | 53849675 ps | ||
| T3656 | /workspace/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.1758614082 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 227259802 ps | ||
| T3657 | /workspace/coverage/cover_reg_top/15.usbdev_csr_rw.2227101472 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 58471944 ps | ||
| T3658 | /workspace/coverage/cover_reg_top/3.usbdev_csr_hw_reset.170595865 | Aug 15 06:09:08 PM PDT 24 | Aug 15 06:09:09 PM PDT 24 | 61770464 ps | ||
| T3659 | /workspace/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3878754797 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 115491711 ps | ||
| T3660 | /workspace/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.942802748 | Aug 15 06:09:29 PM PDT 24 | Aug 15 06:09:31 PM PDT 24 | 102940871 ps | ||
| T3661 | /workspace/coverage/cover_reg_top/10.usbdev_csr_rw.4090923772 | Aug 15 06:09:27 PM PDT 24 | Aug 15 06:09:28 PM PDT 24 | 68561575 ps | ||
| T313 | /workspace/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1514063942 | Aug 15 06:09:12 PM PDT 24 | Aug 15 06:09:19 PM PDT 24 | 1677770596 ps | ||
| T3662 | /workspace/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1972037585 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 65696903 ps | ||
| T3663 | /workspace/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2634469830 | Aug 15 06:09:06 PM PDT 24 | Aug 15 06:09:08 PM PDT 24 | 77452804 ps | ||
| T3664 | /workspace/coverage/cover_reg_top/0.usbdev_csr_rw.2406040430 | Aug 15 06:09:03 PM PDT 24 | Aug 15 06:09:04 PM PDT 24 | 103998366 ps | ||
| T3665 | /workspace/coverage/cover_reg_top/11.usbdev_tl_errors.4282284358 | Aug 15 06:09:31 PM PDT 24 | Aug 15 06:09:35 PM PDT 24 | 352730972 ps | ||
| T3666 | /workspace/coverage/cover_reg_top/21.usbdev_intr_test.673025699 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 37195212 ps | ||
| T3667 | /workspace/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1516315015 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 119389261 ps | ||
| T3668 | /workspace/coverage/cover_reg_top/23.usbdev_intr_test.1762109832 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 84433684 ps | ||
| T3669 | /workspace/coverage/cover_reg_top/14.usbdev_csr_rw.2374988424 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 75486506 ps | ||
| T3670 | /workspace/coverage/cover_reg_top/9.usbdev_tl_errors.747695272 | Aug 15 06:09:21 PM PDT 24 | Aug 15 06:09:25 PM PDT 24 | 323989155 ps | ||
| T3671 | /workspace/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1465233048 | Aug 15 06:09:47 PM PDT 24 | Aug 15 06:09:48 PM PDT 24 | 76345830 ps | ||
| T3672 | /workspace/coverage/cover_reg_top/18.usbdev_csr_rw.899659273 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 41570022 ps | ||
| T3673 | /workspace/coverage/cover_reg_top/4.usbdev_csr_hw_reset.3429079840 | Aug 15 06:09:19 PM PDT 24 | Aug 15 06:09:20 PM PDT 24 | 132099363 ps | ||
| T3674 | /workspace/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.4115714298 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 90680803 ps | ||
| T3675 | /workspace/coverage/cover_reg_top/16.usbdev_intr_test.2278453010 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 51733677 ps | ||
| T3676 | /workspace/coverage/cover_reg_top/27.usbdev_intr_test.3958579510 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 38355665 ps | ||
| T3677 | /workspace/coverage/cover_reg_top/6.usbdev_tl_errors.1853700857 | Aug 15 06:09:22 PM PDT 24 | Aug 15 06:09:24 PM PDT 24 | 106264097 ps | ||
| T3678 | /workspace/coverage/cover_reg_top/11.usbdev_intr_test.1604324948 | Aug 15 06:09:29 PM PDT 24 | Aug 15 06:09:30 PM PDT 24 | 59597779 ps | ||
| T3679 | /workspace/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3095948045 | Aug 15 06:09:28 PM PDT 24 | Aug 15 06:09:31 PM PDT 24 | 71267161 ps | ||
| T3680 | /workspace/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2934090829 | Aug 15 06:09:04 PM PDT 24 | Aug 15 06:09:05 PM PDT 24 | 74037643 ps | ||
| T3681 | /workspace/coverage/cover_reg_top/17.usbdev_tl_intg_err.2536241804 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 277265975 ps | ||
| T3682 | /workspace/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2790542608 | Aug 15 06:09:25 PM PDT 24 | Aug 15 06:09:26 PM PDT 24 | 116144345 ps | ||
| T3683 | /workspace/coverage/cover_reg_top/0.usbdev_csr_hw_reset.3495719311 | Aug 15 06:08:59 PM PDT 24 | Aug 15 06:09:01 PM PDT 24 | 127050646 ps | ||
| T3684 | /workspace/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1935277223 | Aug 15 06:09:24 PM PDT 24 | Aug 15 06:09:26 PM PDT 24 | 274677782 ps | ||
| T3685 | /workspace/coverage/cover_reg_top/37.usbdev_intr_test.4148992023 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 75944323 ps | ||
| T3686 | /workspace/coverage/cover_reg_top/2.usbdev_mem_walk.3719017027 | Aug 15 06:08:59 PM PDT 24 | Aug 15 06:09:02 PM PDT 24 | 261796542 ps | ||
| T3687 | /workspace/coverage/cover_reg_top/7.usbdev_intr_test.3678742948 | Aug 15 06:09:28 PM PDT 24 | Aug 15 06:09:29 PM PDT 24 | 30011767 ps | ||
| T3688 | /workspace/coverage/cover_reg_top/41.usbdev_intr_test.785853752 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 33444032 ps | ||
| T513 | /workspace/coverage/cover_reg_top/14.usbdev_tl_intg_err.416031824 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 425702022 ps | ||
| T3689 | /workspace/coverage/cover_reg_top/7.usbdev_tl_errors.2754234950 | Aug 15 06:09:24 PM PDT 24 | Aug 15 06:09:27 PM PDT 24 | 227051543 ps | ||
| T3690 | /workspace/coverage/cover_reg_top/49.usbdev_intr_test.907846029 | Aug 15 06:09:40 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 39762742 ps | ||
| T3691 | /workspace/coverage/cover_reg_top/28.usbdev_intr_test.1189159330 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:38 PM PDT 24 | 43029832 ps | ||
| T3692 | /workspace/coverage/cover_reg_top/33.usbdev_intr_test.49946532 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 72256149 ps | ||
| T3693 | /workspace/coverage/cover_reg_top/19.usbdev_tl_errors.2158369725 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 158552218 ps | ||
| T3694 | /workspace/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1088074022 | Aug 15 06:09:23 PM PDT 24 | Aug 15 06:09:25 PM PDT 24 | 152131787 ps | ||
| T3695 | /workspace/coverage/cover_reg_top/2.usbdev_tl_intg_err.2045943902 | Aug 15 06:08:59 PM PDT 24 | Aug 15 06:09:02 PM PDT 24 | 404152037 ps | ||
| T519 | /workspace/coverage/cover_reg_top/13.usbdev_tl_intg_err.2104557559 | Aug 15 06:09:26 PM PDT 24 | Aug 15 06:09:30 PM PDT 24 | 683121093 ps | ||
| T511 | /workspace/coverage/cover_reg_top/3.usbdev_tl_intg_err.4274406435 | Aug 15 06:09:06 PM PDT 24 | Aug 15 06:09:09 PM PDT 24 | 496967915 ps | ||
| T514 | /workspace/coverage/cover_reg_top/12.usbdev_tl_intg_err.3366926118 | Aug 15 06:09:32 PM PDT 24 | Aug 15 06:09:37 PM PDT 24 | 880836216 ps | ||
| T3696 | /workspace/coverage/cover_reg_top/6.usbdev_intr_test.74563914 | Aug 15 06:09:21 PM PDT 24 | Aug 15 06:09:23 PM PDT 24 | 116330458 ps | ||
| T3697 | /workspace/coverage/cover_reg_top/3.usbdev_csr_rw.345389201 | Aug 15 06:09:06 PM PDT 24 | Aug 15 06:09:07 PM PDT 24 | 71810068 ps | ||
| T3698 | /workspace/coverage/cover_reg_top/47.usbdev_intr_test.326007752 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:39 PM PDT 24 | 47553762 ps | ||
| T3699 | /workspace/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2142820642 | Aug 15 06:09:12 PM PDT 24 | Aug 15 06:09:14 PM PDT 24 | 163793608 ps | ||
| T3700 | /workspace/coverage/cover_reg_top/46.usbdev_intr_test.2215448471 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 32140676 ps | ||
| T3701 | /workspace/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.4063280236 | Aug 15 06:09:30 PM PDT 24 | Aug 15 06:09:32 PM PDT 24 | 170036742 ps | ||
| T3702 | /workspace/coverage/cover_reg_top/17.usbdev_tl_errors.662889765 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 213357161 ps | ||
| T3703 | /workspace/coverage/cover_reg_top/0.usbdev_mem_walk.3300469643 | Aug 15 06:08:54 PM PDT 24 | Aug 15 06:08:59 PM PDT 24 | 498970372 ps | ||
| T3704 | /workspace/coverage/cover_reg_top/29.usbdev_intr_test.1683656618 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 47363394 ps | ||
| T3705 | /workspace/coverage/cover_reg_top/6.usbdev_csr_rw.1954106414 | Aug 15 06:09:24 PM PDT 24 | Aug 15 06:09:25 PM PDT 24 | 43221622 ps | ||
| T3706 | /workspace/coverage/cover_reg_top/0.usbdev_tl_errors.2015344480 | Aug 15 06:08:52 PM PDT 24 | Aug 15 06:08:55 PM PDT 24 | 277476878 ps | ||
| T3707 | /workspace/coverage/cover_reg_top/10.usbdev_intr_test.544734539 | Aug 15 06:09:26 PM PDT 24 | Aug 15 06:09:27 PM PDT 24 | 88793249 ps | ||
| T3708 | /workspace/coverage/cover_reg_top/11.usbdev_tl_intg_err.631491662 | Aug 15 06:09:27 PM PDT 24 | Aug 15 06:09:29 PM PDT 24 | 265248024 ps | ||
| T515 | /workspace/coverage/cover_reg_top/15.usbdev_tl_intg_err.1935073758 | Aug 15 06:09:37 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 506608547 ps | ||
| T3709 | /workspace/coverage/cover_reg_top/1.usbdev_intr_test.2821700649 | Aug 15 06:08:54 PM PDT 24 | Aug 15 06:08:55 PM PDT 24 | 35023201 ps | ||
| T3710 | /workspace/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3534570128 | Aug 15 06:09:41 PM PDT 24 | Aug 15 06:09:43 PM PDT 24 | 142727432 ps | ||
| T3711 | /workspace/coverage/cover_reg_top/4.usbdev_csr_rw.2594994082 | Aug 15 06:09:15 PM PDT 24 | Aug 15 06:09:16 PM PDT 24 | 107796609 ps | ||
| T3712 | /workspace/coverage/cover_reg_top/8.usbdev_tl_errors.1892118040 | Aug 15 06:09:22 PM PDT 24 | Aug 15 06:09:24 PM PDT 24 | 111953948 ps | ||
| T3713 | /workspace/coverage/cover_reg_top/35.usbdev_intr_test.3784679960 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 76497318 ps | ||
| T3714 | /workspace/coverage/cover_reg_top/48.usbdev_intr_test.2038735523 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 33339342 ps | ||
| T3715 | /workspace/coverage/cover_reg_top/45.usbdev_intr_test.405055741 | Aug 15 06:09:40 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 53720908 ps | ||
| T3716 | /workspace/coverage/cover_reg_top/3.usbdev_intr_test.557840093 | Aug 15 06:09:05 PM PDT 24 | Aug 15 06:09:06 PM PDT 24 | 39004223 ps | ||
| T3717 | /workspace/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.4273026236 | Aug 15 06:09:21 PM PDT 24 | Aug 15 06:09:23 PM PDT 24 | 183221402 ps | ||
| T517 | /workspace/coverage/cover_reg_top/0.usbdev_tl_intg_err.1248216367 | Aug 15 06:08:50 PM PDT 24 | Aug 15 06:08:55 PM PDT 24 | 1326370767 ps | ||
| T516 | /workspace/coverage/cover_reg_top/18.usbdev_tl_intg_err.3480933600 | Aug 15 06:09:36 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 549505239 ps | ||
| T3718 | /workspace/coverage/cover_reg_top/4.usbdev_intr_test.1767589323 | Aug 15 06:09:13 PM PDT 24 | Aug 15 06:09:14 PM PDT 24 | 38659123 ps | ||
| T3719 | /workspace/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3365504205 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 96981439 ps | ||
| T3720 | /workspace/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1733900422 | Aug 15 06:09:06 PM PDT 24 | Aug 15 06:09:07 PM PDT 24 | 72883319 ps | ||
| T3721 | /workspace/coverage/cover_reg_top/14.usbdev_tl_errors.2842703544 | Aug 15 06:09:39 PM PDT 24 | Aug 15 06:09:43 PM PDT 24 | 254852871 ps | ||
| T3722 | /workspace/coverage/cover_reg_top/3.usbdev_csr_aliasing.2764837476 | Aug 15 06:09:15 PM PDT 24 | Aug 15 06:09:18 PM PDT 24 | 136169550 ps | ||
| T3723 | /workspace/coverage/cover_reg_top/30.usbdev_intr_test.1601996371 | Aug 15 06:09:40 PM PDT 24 | Aug 15 06:09:41 PM PDT 24 | 69202917 ps | ||
| T3724 | /workspace/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.2734939643 | Aug 15 06:09:24 PM PDT 24 | Aug 15 06:09:26 PM PDT 24 | 150997036 ps | ||
| T3725 | /workspace/coverage/cover_reg_top/32.usbdev_intr_test.3360533067 | Aug 15 06:09:47 PM PDT 24 | Aug 15 06:09:48 PM PDT 24 | 35829193 ps | ||
| T3726 | /workspace/coverage/cover_reg_top/4.usbdev_csr_aliasing.3130778069 | Aug 15 06:09:11 PM PDT 24 | Aug 15 06:09:13 PM PDT 24 | 99224957 ps | ||
| T3727 | /workspace/coverage/cover_reg_top/9.usbdev_tl_intg_err.1174566765 | Aug 15 06:09:24 PM PDT 24 | Aug 15 06:09:27 PM PDT 24 | 474481556 ps | ||
| T3728 | /workspace/coverage/cover_reg_top/2.usbdev_csr_rw.3678059463 | Aug 15 06:09:05 PM PDT 24 | Aug 15 06:09:06 PM PDT 24 | 142340889 ps | ||
| T3729 | /workspace/coverage/cover_reg_top/17.usbdev_csr_rw.2701278463 | Aug 15 06:09:35 PM PDT 24 | Aug 15 06:09:36 PM PDT 24 | 131474566 ps | ||
| T518 | /workspace/coverage/cover_reg_top/19.usbdev_tl_intg_err.2699764379 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:43 PM PDT 24 | 467361124 ps | ||
| T3730 | /workspace/coverage/cover_reg_top/2.usbdev_tl_errors.2286470760 | Aug 15 06:09:03 PM PDT 24 | Aug 15 06:09:07 PM PDT 24 | 287395126 ps | ||
| T3731 | /workspace/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2155970874 | Aug 15 06:09:06 PM PDT 24 | Aug 15 06:09:07 PM PDT 24 | 111571370 ps | ||
| T3732 | /workspace/coverage/cover_reg_top/13.usbdev_intr_test.3426133843 | Aug 15 06:09:31 PM PDT 24 | Aug 15 06:09:32 PM PDT 24 | 41056124 ps | ||
| T3733 | /workspace/coverage/cover_reg_top/12.usbdev_intr_test.2550174804 | Aug 15 06:09:36 PM PDT 24 | Aug 15 06:09:36 PM PDT 24 | 44843116 ps | ||
| T3734 | /workspace/coverage/cover_reg_top/15.usbdev_intr_test.2812911306 | Aug 15 06:09:36 PM PDT 24 | Aug 15 06:09:37 PM PDT 24 | 37586676 ps | ||
| T3735 | /workspace/coverage/cover_reg_top/20.usbdev_intr_test.1883267326 | Aug 15 06:09:41 PM PDT 24 | Aug 15 06:09:42 PM PDT 24 | 48167065 ps | ||
| T3736 | /workspace/coverage/cover_reg_top/2.usbdev_mem_partial_access.3341456585 | Aug 15 06:09:04 PM PDT 24 | Aug 15 06:09:06 PM PDT 24 | 112756504 ps | ||
| T3737 | /workspace/coverage/cover_reg_top/16.usbdev_tl_errors.1714253479 | Aug 15 06:09:38 PM PDT 24 | Aug 15 06:09:40 PM PDT 24 | 87253665 ps | ||
| T3738 | /workspace/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2314010048 | Aug 15 06:09:33 PM PDT 24 | Aug 15 06:09:35 PM PDT 24 | 142034147 ps | ||
| T3739 | /workspace/coverage/cover_reg_top/1.usbdev_csr_bit_bash.4193611459 | Aug 15 06:09:00 PM PDT 24 | Aug 15 06:09:05 PM PDT 24 | 708794566 ps |
| Test location | /workspace/coverage/default/35.usbdev_device_address.1610822483 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 29547374282 ps |
| CPU time | 55.75 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-b0924eda-d51c-4b5e-889c-f516dd0515b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16108 22483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.1610822483 |
| Directory | /workspace/35.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_reset.225391975 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 13865738171 ps |
| CPU time | 16.08 seconds |
| Started | Aug 15 05:28:47 PM PDT 24 |
| Finished | Aug 15 05:29:03 PM PDT 24 |
| Peak memory | 215804 kb |
| Host | smart-e78d3aef-7670-453e-990b-60efc43cb65a |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=225391975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.225391975 |
| Directory | /workspace/8.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/36.usbdev_intr_test.1616691646 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 48206224 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 06:09:46 PM PDT 24 |
| Finished | Aug 15 06:09:47 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-a308077a-f4fd-4ea6-ae8d-7e901e06fdd6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1616691646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.1616691646 |
| Directory | /workspace/36.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/48.usbdev_endpoint_access.100657375 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 1036591149 ps |
| CPU time | 2.9 seconds |
| Started | Aug 15 05:34:17 PM PDT 24 |
| Finished | Aug 15 05:34:20 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-317b7770-2150-4399-bdc4-455a4e18a9d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10065 7375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.100657375 |
| Directory | /workspace/48.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_tl_errors.446624304 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 290570346 ps |
| CPU time | 2.92 seconds |
| Started | Aug 15 06:09:35 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 223516 kb |
| Host | smart-f4650657-13f7-421d-9aa2-11a3bcd237ea |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=446624304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.446624304 |
| Directory | /workspace/15.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_disconnect.2303340583 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 10995651392 ps |
| CPU time | 13.35 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:19 PM PDT 24 |
| Peak memory | 206704 kb |
| Host | smart-0876a282-a18a-4a12-a570-310ed2562e98 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2303340583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_a on_wake_disconnect.2303340583 |
| Directory | /workspace/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/31.usbdev_data_toggle_restore.666575150 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 1252953204 ps |
| CPU time | 3.29 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-2eb740af-daf3-4624-9849-b1e796f82d9a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=666575150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.666575150 |
| Directory | /workspace/31.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_resume.3608244720 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 25085573473 ps |
| CPU time | 31.41 seconds |
| Started | Aug 15 05:31:01 PM PDT 24 |
| Finished | Aug 15 05:31:32 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-c8cb174b-df1f-43c7-ab1a-377cdc9d0975 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36082 44720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_resume.3608244720 |
| Directory | /workspace/22.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/10.usbdev_low_speed_traffic.1223988664 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 4286284397 ps |
| CPU time | 129.03 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 218608 kb |
| Host | smart-c61f8197-65dc-470c-9ec4-5b0876d063e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1223988664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.1223988664 |
| Directory | /workspace/10.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/448.usbdev_tx_rx_disruption.754188086 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 536777886 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-33708f75-1019-4fb3-b027-9382a370cc42 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=754188086 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 448.usbdev_tx_rx_disruption.754188086 |
| Directory | /workspace/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/0.usbdev_sec_cm.997235577 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 429140941 ps |
| CPU time | 1.27 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:36 PM PDT 24 |
| Peak memory | 223332 kb |
| Host | smart-0ec71d5a-8a56-4c10-bfa8-1ec92a37fef2 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=997235577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.997235577 |
| Directory | /workspace/0.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.1005685640 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 315864192 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-66c6d377-cf92-4d73-a7fc-7cc909ffd11c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10056 85640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test_mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.1005685640 |
| Directory | /workspace/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspace/coverage/default/26.usbdev_iso_retraction.3885691860 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 6835696771 ps |
| CPU time | 47.36 seconds |
| Started | Aug 15 05:31:28 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-aabeaa03-8a1f-46b4-abd7-83187e29e977 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3885691860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.3885691860 |
| Directory | /workspace/26.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_aliasing.1282438144 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 212163653 ps |
| CPU time | 2.19 seconds |
| Started | Aug 15 06:09:00 PM PDT 24 |
| Finished | Aug 15 06:09:02 PM PDT 24 |
| Peak memory | 207064 kb |
| Host | smart-c6bf6362-1b77-46ae-8ca4-39fdb322c440 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1282438144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.1282438144 |
| Directory | /workspace/0.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_pins_sense.2377901903 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 38213627 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:29:52 PM PDT 24 |
| Finished | Aug 15 05:29:53 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-732190e4-9eb3-48e9-822d-7beb4de8a5f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23779 01903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.2377901903 |
| Directory | /workspace/14.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/cover_reg_top/44.usbdev_intr_test.2291344891 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 99415182 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206912 kb |
| Host | smart-44eb8e16-9168-4060-b4d1-783e2024c82c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2291344891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.2291344891 |
| Directory | /workspace/44.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/10.usbdev_disconnected.3097763734 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 154549438 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:29:04 PM PDT 24 |
| Finished | Aug 15 05:29:05 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c3bbb470-a65d-4882-98ab-b25181055a1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30977 63734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disconnected.3097763734 |
| Directory | /workspace/10.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_buffer.1434549754 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 8313066467 ps |
| CPU time | 21.92 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-d8d0197a-bec8-4763-9151-74bacd5dfa79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14345 49754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_buffer.1434549754 |
| Directory | /workspace/9.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_resume.1743743097 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 25915074431 ps |
| CPU time | 32 seconds |
| Started | Aug 15 05:31:57 PM PDT 24 |
| Finished | Aug 15 05:32:30 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-fb8eb8bc-2e0e-4753-8618-44842d020a9d |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1743743097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_a on_wake_resume.1743743097 |
| Directory | /workspace/31.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/19.usbdev_tx_rx_disruption.2335931583 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 521668806 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-9dd2535f-56d1-4b50-a4a5-6fbdba350f2a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2335931583 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_tx_rx_disruption.2335931583 |
| Directory | /workspace/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_tl_intg_err.1061612440 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 824154733 ps |
| CPU time | 5.11 seconds |
| Started | Aug 15 06:09:34 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 207280 kb |
| Host | smart-6488d65b-cd84-4e9e-9043-03b68fa767ad |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1061612440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.1061612440 |
| Directory | /workspace/16.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_resume.2437262010 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 30668443830 ps |
| CPU time | 39.28 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-f67331dc-4894-46a6-9292-9d11971a3052 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2437262010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_a on_wake_resume.2437262010 |
| Directory | /workspace/40.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/187.usbdev_tx_rx_disruption.2064563750 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 523886496 ps |
| CPU time | 1.88 seconds |
| Started | Aug 15 05:35:14 PM PDT 24 |
| Finished | Aug 15 05:35:16 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-033cef1c-6d8a-4b65-96b3-d5a86af1f3f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2064563750 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 187.usbdev_tx_rx_disruption.2064563750 |
| Directory | /workspace/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/360.usbdev_tx_rx_disruption.906998414 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 463965462 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-a967db1b-f2b1-44b4-86cd-958ad06cca70 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=906998414 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 360.usbdev_tx_rx_disruption.906998414 |
| Directory | /workspace/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/24.usbdev_invalid_sync.2148725073 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 4163148415 ps |
| CPU time | 33.62 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 224108 kb |
| Host | smart-f105cbf9-e404-49eb-b74f-963bfa929fdd |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2148725073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.2148725073 |
| Directory | /workspace/24.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/94.usbdev_endpoint_types.1674350745 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 588782878 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-efd3e2f1-8373-4a09-8a64-8f29f8e94c59 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1674350745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.1674350745 |
| Directory | /workspace/94.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/37.usbdev_bitstuff_err.3633155662 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 143346542 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:32:55 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-a9e5d290-e9e2-4118-bc36-d904ecbba3c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36331 55662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_bitstuff_err.3633155662 |
| Directory | /workspace/37.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_rx_full.549489388 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 264135912 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:31:02 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 206404 kb |
| Host | smart-a0fea54c-4930-447f-9c4f-b69f961d59b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54948 9388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_rx_full.549489388 |
| Directory | /workspace/24.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/31.usbdev_device_address.281854477 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 19547607001 ps |
| CPU time | 29.84 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-278dea99-e554-435d-bd7d-e7b0160ac418 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28185 4477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.281854477 |
| Directory | /workspace/31.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/172.usbdev_endpoint_types.3511372940 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 846318170 ps |
| CPU time | 1.94 seconds |
| Started | Aug 15 05:34:55 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-2501c920-6f96-4ca0-a7c9-bb63e3da39b4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3511372940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.3511372940 |
| Directory | /workspace/172.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/32.usbdev_endpoint_types.3831423238 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 712965216 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6cd67c3d-f0fb-4583-a36b-2dac0ba712e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3831423238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.3831423238 |
| Directory | /workspace/32.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/35.usbdev_rx_crc_err.862838091 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 158851845 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:32:51 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-6ca0efe2-cc93-44c9-8fc7-2da7b8cf2ef5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86283 8091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_rx_crc_err.862838091 |
| Directory | /workspace/35.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/133.usbdev_endpoint_types.690167610 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 584904227 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c09341a2-934f-408c-aa76-8e4e4e9345a0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=690167610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.690167610 |
| Directory | /workspace/133.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/cover_reg_top/39.usbdev_intr_test.3007932877 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 45977644 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206924 kb |
| Host | smart-09979038-9c87-4dd6-92a4-d26cde6703ea |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3007932877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.3007932877 |
| Directory | /workspace/39.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/196.usbdev_endpoint_types.1625928049 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 519881417 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:35:56 PM PDT 24 |
| Finished | Aug 15 05:35:57 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-55d88709-3e5f-4457-aedf-ca300a9f89dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1625928049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.1625928049 |
| Directory | /workspace/196.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/25.usbdev_device_address.2905919642 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 43444360608 ps |
| CPU time | 72.65 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:32:41 PM PDT 24 |
| Peak memory | 207952 kb |
| Host | smart-247d89c5-f105-4587-8fe3-fa7ad31c7078 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29059 19642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.2905919642 |
| Directory | /workspace/25.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/57.usbdev_endpoint_types.4265622995 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 712233907 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-cfc0bf70-2417-4cce-ae73-369735d22a03 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4265622995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.4265622995 |
| Directory | /workspace/57.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/107.usbdev_endpoint_types.3586588592 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 712132554 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:35:05 PM PDT 24 |
| Finished | Aug 15 05:35:06 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-7dcf5472-90a0-4499-a011-43fee9d03a06 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3586588592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.3586588592 |
| Directory | /workspace/107.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/164.usbdev_endpoint_types.1130710336 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 512181176 ps |
| CPU time | 1.43 seconds |
| Started | Aug 15 05:35:04 PM PDT 24 |
| Finished | Aug 15 05:35:05 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-88e2fa90-79d5-4486-9006-a17da299e6a2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1130710336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.1130710336 |
| Directory | /workspace/164.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/44.usbdev_endpoint_types.525571593 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 581866379 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:33:52 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-370b057b-04c6-4af9-9765-69c5113f4741 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=525571593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.525571593 |
| Directory | /workspace/44.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/4.usbdev_stress_usb_traffic.873341814 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 3451752881 ps |
| CPU time | 75.63 seconds |
| Started | Aug 15 05:28:17 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-ebbb4fca-2f99-4890-b1f0-d9d1e596e6a1 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=873341814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.873341814 |
| Directory | /workspace/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/24.usbdev_data_toggle_restore.3912629695 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 1383072924 ps |
| CPU time | 3.44 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-5553f99d-b579-40c0-ad65-d1c55660d855 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3912629695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.3912629695 |
| Directory | /workspace/24.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/106.usbdev_endpoint_types.844416431 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 495687260 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:06 PM PDT 24 |
| Finished | Aug 15 05:35:07 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-5eacbff6-affb-4c88-8b18-88d74ed03c8a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=844416431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.844416431 |
| Directory | /workspace/106.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/11.usbdev_endpoint_types.1453311328 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 461899727 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-b7f9deb9-10d8-47d5-94f6-24cf1f806935 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1453311328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.1453311328 |
| Directory | /workspace/11.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/77.usbdev_endpoint_types.2779983622 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 551909515 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:34:40 PM PDT 24 |
| Finished | Aug 15 05:34:42 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-48717c80-e930-4a8b-b362-3cf54437bc7b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2779983622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.2779983622 |
| Directory | /workspace/77.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/92.usbdev_endpoint_types.2698111136 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 659617295 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-1cfc84b2-87c5-4e8c-ab5f-cc26a569bdca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2698111136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.2698111136 |
| Directory | /workspace/92.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_priority.1202089791 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 472255847 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:27:31 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-d87b0787-f8e2-491a-be42-a30375b03ca5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12020 89791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.1202089791 |
| Directory | /workspace/0.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_tl_intg_err.2699764379 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 467361124 ps |
| CPU time | 4.43 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:43 PM PDT 24 |
| Peak memory | 207320 kb |
| Host | smart-2c3570ab-6ce4-4a50-a32f-bb3361962d7a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2699764379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.2699764379 |
| Directory | /workspace/19.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/111.usbdev_endpoint_types.1294823601 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 496899332 ps |
| CPU time | 1.33 seconds |
| Started | Aug 15 05:35:02 PM PDT 24 |
| Finished | Aug 15 05:35:04 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-26c36ceb-d638-4d4f-8c9d-e81fc777da17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1294823601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.1294823601 |
| Directory | /workspace/111.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/127.usbdev_endpoint_types.3043163484 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 395386206 ps |
| CPU time | 1.43 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:35:05 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d633d754-c6a9-43fc-a1b0-06b3055e05f5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3043163484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.3043163484 |
| Directory | /workspace/127.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/55.usbdev_endpoint_types.2157581364 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 742065983 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-0809b0ba-16ba-43fa-b698-185356153c4f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2157581364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.2157581364 |
| Directory | /workspace/55.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/132.usbdev_tx_rx_disruption.1004516363 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 562841344 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-8c02667c-845b-4c30-ab3c-688a13fe27a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1004516363 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 132.usbdev_tx_rx_disruption.1004516363 |
| Directory | /workspace/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/20.usbdev_alert_test.4232715606 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 51180749 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-2a86a1f8-6f2f-4c4d-ade2-6ff69fca91d3 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4232715606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.4232715606 |
| Directory | /workspace/20.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_received.1233828420 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 178208354 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-521e7b0b-4dc0-4b98-ad2f-a13961921ec3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12338 28420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_received.1233828420 |
| Directory | /workspace/0.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/122.usbdev_endpoint_types.2918283349 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 187061267 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-6f62ca75-cd65-4a6e-b761-f9d113612cb2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2918283349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.2918283349 |
| Directory | /workspace/122.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/136.usbdev_endpoint_types.4043938559 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 396762849 ps |
| CPU time | 1.33 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-0d09fc46-5e24-4140-a667-436049ffdc17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4043938559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.4043938559 |
| Directory | /workspace/136.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/184.usbdev_endpoint_types.2149541546 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 738533306 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:20 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8386984e-00c6-4e69-8903-c9f7ddd4311a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2149541546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2149541546 |
| Directory | /workspace/184.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/33.usbdev_endpoint_types.3425529012 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 719465269 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:20 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-d798a555-2a27-44bd-a191-f26f19d3c158 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3425529012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.3425529012 |
| Directory | /workspace/33.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/58.usbdev_endpoint_types.1661753713 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 415099070 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:34:40 PM PDT 24 |
| Finished | Aug 15 05:34:42 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8b7acb27-4682-4afc-ba6b-d136a60284ce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1661753713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.1661753713 |
| Directory | /workspace/58.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/67.usbdev_endpoint_types.2115135960 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 432067812 ps |
| CPU time | 1.32 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d6770895-4693-4901-9ab0-0d1661a5576b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2115135960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.2115135960 |
| Directory | /workspace/67.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/12.usbdev_device_address.1124510547 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 24025413547 ps |
| CPU time | 42.84 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-273b0183-bcc4-4bb1-b99d-78b4ecad8193 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11245 10547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.1124510547 |
| Directory | /workspace/12.usbdev_device_address/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.3365460320 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 123746842 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 06:09:28 PM PDT 24 |
| Finished | Aug 15 06:09:30 PM PDT 24 |
| Peak memory | 207268 kb |
| Host | smart-5d31ac8e-c28b-48a5-8bcc-7a25208aa9cc |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3365460320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.3365460320 |
| Directory | /workspace/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_bus_resets.247733445 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 7607213727 ps |
| CPU time | 44.48 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:56 PM PDT 24 |
| Peak memory | 224072 kb |
| Host | smart-387a071f-dafb-4097-9a05-c2d8387de956 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=247733445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.247733445 |
| Directory | /workspace/9.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/115.usbdev_tx_rx_disruption.673486255 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 495618022 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-36477b27-01ee-4119-9147-d3bb6bc09fc9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=673486255 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 115.usbdev_tx_rx_disruption.673486255 |
| Directory | /workspace/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_overflow.3905492409 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 180293115 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:27:24 PM PDT 24 |
| Finished | Aug 15 05:27:25 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-10f9ab50-2c59-4219-b932-3d65aed0cda7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39054 92409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_overflow.3905492409 |
| Directory | /workspace/0.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/105.usbdev_endpoint_types.82426977 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 277292511 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-40305f90-af53-41a4-beea-6140141243cc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=82426977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.82426977 |
| Directory | /workspace/105.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/119.usbdev_endpoint_types.308494041 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 447330035 ps |
| CPU time | 1.26 seconds |
| Started | Aug 15 05:35:17 PM PDT 24 |
| Finished | Aug 15 05:35:18 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8492e410-d3ca-4f5c-addf-36e1081d13fa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=308494041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.308494041 |
| Directory | /workspace/119.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/13.usbdev_rx_full.2683561035 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 249768211 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207280 kb |
| Host | smart-acf73a4f-df22-471d-8cdf-30cd5b1eeba5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26835 61035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_rx_full.2683561035 |
| Directory | /workspace/13.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/17.usbdev_endpoint_types.4088065362 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 548980872 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:30:16 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c006adc4-871b-4789-8b0a-d069cf2ace26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4088065362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.4088065362 |
| Directory | /workspace/17.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/178.usbdev_endpoint_types.3529817221 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 662901644 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7274a652-a847-4257-9872-9dc08dad6a42 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3529817221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.3529817221 |
| Directory | /workspace/178.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/183.usbdev_endpoint_types.3939842368 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 568764475 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:34:58 PM PDT 24 |
| Finished | Aug 15 05:35:00 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-df07b092-b250-4ae1-b3ce-a143715f7c86 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3939842368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.3939842368 |
| Directory | /workspace/183.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_loclk_max.61066476 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 97184895793 ps |
| CPU time | 157.97 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-63d7eaac-ae37-48ea-9c2e-cd06da65295d |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61066476 -assert nop ostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace /coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk_max.61066476 |
| Directory | /workspace/2.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/23.usbdev_data_toggle_restore.22555034 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 665268514 ps |
| CPU time | 2.13 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:31:10 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-2493cbc3-d0a2-46dc-ba96-12d4779a7228 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=22555034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm line +cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.22555034 |
| Directory | /workspace/23.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/36.usbdev_endpoint_types.2745587274 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 449098496 ps |
| CPU time | 1.32 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:32:53 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-6508fa21-08ce-4973-9697-f1e03a729c56 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2745587274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.2745587274 |
| Directory | /workspace/36.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/89.usbdev_endpoint_types.1014079874 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 601916803 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:35:11 PM PDT 24 |
| Finished | Aug 15 05:35:12 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-a38253ce-3f02-494e-ae4e-713dee29a909 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1014079874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.1014079874 |
| Directory | /workspace/89.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/11.usbdev_nak_trans.999023987 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 187992247 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:26 PM PDT 24 |
| Finished | Aug 15 05:29:27 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-dac62281-8ad5-483c-82de-f2c9a93f85f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99902 3987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_nak_trans.999023987 |
| Directory | /workspace/11.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_tl_errors.3908747495 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 122938919 ps |
| CPU time | 2.8 seconds |
| Started | Aug 15 06:08:54 PM PDT 24 |
| Finished | Aug 15 06:08:57 PM PDT 24 |
| Peak memory | 223492 kb |
| Host | smart-da961df1-ca02-48df-a74b-2d51e3fb52f9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3908747495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.3908747495 |
| Directory | /workspace/1.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/default/494.usbdev_tx_rx_disruption.2650830758 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 579605236 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:36:07 PM PDT 24 |
| Finished | Aug 15 05:36:09 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-a4c23b31-1d41-4f66-9b8c-a9a1ed18bffc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2650830758 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 494.usbdev_tx_rx_disruption.2650830758 |
| Directory | /workspace/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_bus_resets.2248988767 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 7173473357 ps |
| CPU time | 36.05 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:28:24 PM PDT 24 |
| Peak memory | 219388 kb |
| Host | smart-a881ceb6-0072-4563-841e-6755dec90549 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2248988767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.2248988767 |
| Directory | /workspace/2.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/9.usbdev_low_speed_traffic.4294228687 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 2931068895 ps |
| CPU time | 21.74 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:18 PM PDT 24 |
| Peak memory | 216028 kb |
| Host | smart-b0a1f247-de13-4c79-a803-d8a75223b667 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4294228687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.4294228687 |
| Directory | /workspace/9.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_pins_sense.3506984275 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 38926174 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:32:56 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-dd1711a4-8c1a-4104-b86d-a7b35b506132 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35069 84275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.3506984275 |
| Directory | /workspace/33.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_tl_intg_err.3366926118 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 880836216 ps |
| CPU time | 4.73 seconds |
| Started | Aug 15 06:09:32 PM PDT 24 |
| Finished | Aug 15 06:09:37 PM PDT 24 |
| Peak memory | 207180 kb |
| Host | smart-f3a0ded6-1e22-4ba2-8d57-2e73b27f92eb |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3366926118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.3366926118 |
| Directory | /workspace/12.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_intr_test.1898127021 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 52411400 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 06:09:47 PM PDT 24 |
| Finished | Aug 15 06:09:48 PM PDT 24 |
| Peak memory | 206932 kb |
| Host | smart-a29100bc-e747-4604-a554-61d930dabf30 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1898127021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.1898127021 |
| Directory | /workspace/14.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/1.usbdev_low_speed_traffic.292033057 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 5282989287 ps |
| CPU time | 52.8 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:28:42 PM PDT 24 |
| Peak memory | 219348 kb |
| Host | smart-630a390b-f3c9-4b19-bb42-c5f993dde3ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=292033057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.292033057 |
| Directory | /workspace/1.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/108.usbdev_endpoint_types.2155801482 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 366725036 ps |
| CPU time | 1.2 seconds |
| Started | Aug 15 05:35:01 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-249b41d9-815e-47c0-b556-db603b070f6b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2155801482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.2155801482 |
| Directory | /workspace/108.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/121.usbdev_endpoint_types.1923479061 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 533485802 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:35:15 PM PDT 24 |
| Finished | Aug 15 05:35:17 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-c51b5c01-c3a3-4dfd-9648-7e35bd4afa1a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1923479061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.1923479061 |
| Directory | /workspace/121.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/13.usbdev_data_toggle_restore.3871948044 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 1279462837 ps |
| CPU time | 3.33 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:37 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-0ea56063-7871-44a8-a072-b7881dc55887 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3871948044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.3871948044 |
| Directory | /workspace/13.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_length_in_transaction.1573038384 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 298242644 ps |
| CPU time | 1.14 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-51f17f1f-90f2-407d-ab63-bea34f9d5a41 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1573038384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.1573038384 |
| Directory | /workspace/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/153.usbdev_endpoint_types.2066151631 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 954054458 ps |
| CPU time | 1.95 seconds |
| Started | Aug 15 05:35:18 PM PDT 24 |
| Finished | Aug 15 05:35:20 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-88baa83e-181c-4c6d-af72-731ea87b7abc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2066151631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.2066151631 |
| Directory | /workspace/153.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/18.usbdev_endpoint_types.2375121031 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 470805743 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:30:15 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-7c61c5d6-2e08-4b36-93ec-3718ab265541 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2375121031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.2375121031 |
| Directory | /workspace/18.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_inter_pkt_delay.1170077509 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 2794532012 ps |
| CPU time | 77.16 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:32:33 PM PDT 24 |
| Peak memory | 215908 kb |
| Host | smart-a4e7c7b1-ba08-43e3-b9cb-86a35400d42b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1170077509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.1170077509 |
| Directory | /workspace/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/29.usbdev_rx_full.3130754678 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 352511756 ps |
| CPU time | 1.31 seconds |
| Started | Aug 15 05:31:56 PM PDT 24 |
| Finished | Aug 15 05:31:58 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-981e2106-728e-4560-8419-749459854166 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31307 54678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_rx_full.3130754678 |
| Directory | /workspace/29.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_bus_resets.1206070229 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 2770436065 ps |
| CPU time | 20.77 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 224084 kb |
| Host | smart-4f800a0f-af7c-4fc7-b7e9-b0817a41d762 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1206070229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.1206070229 |
| Directory | /workspace/3.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_suspend.1364570474 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 11399474978 ps |
| CPU time | 14.57 seconds |
| Started | Aug 15 05:32:55 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-5beffa96-467e-4cc3-a524-1f58955fe0d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13645 70474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_suspend.1364570474 |
| Directory | /workspace/36.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/41.usbdev_endpoint_types.2716404654 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 404122639 ps |
| CPU time | 1.27 seconds |
| Started | Aug 15 05:33:26 PM PDT 24 |
| Finished | Aug 15 05:33:28 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-fade4008-7b19-43f0-ae70-827a9bbfab08 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2716404654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.2716404654 |
| Directory | /workspace/41.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_usb_ref_disable.3889270940 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 188155802 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:27:42 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-24a1fd30-dd57-42e4-9c5f-740f63d434e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38892 70940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.3889270940 |
| Directory | /workspace/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_disconnect.862617163 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 6353701278 ps |
| CPU time | 9.31 seconds |
| Started | Aug 15 05:27:14 PM PDT 24 |
| Finished | Aug 15 05:27:23 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-1ee1b117-dda1-4ea9-bc18-bb096c021f73 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=862617163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon _wake_disconnect.862617163 |
| Directory | /workspace/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_overflow.1681668905 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 147171429 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:35 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-b2402401-9108-47ae-b7f2-1e24cde1ed09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16816 68905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_overflow.1681668905 |
| Directory | /workspace/1.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_empty.4042517932 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 181687713 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:29 PM PDT 24 |
| Finished | Aug 15 05:27:30 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-924dedf2-9447-40dc-a401-144a9598a878 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40425 17932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_empty.4042517932 |
| Directory | /workspace/0.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/0.usbdev_host_lost.1950589073 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 4160075189 ps |
| CPU time | 9.78 seconds |
| Started | Aug 15 05:27:26 PM PDT 24 |
| Finished | Aug 15 05:27:36 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-ac961646-ce30-4bc8-bcc7-7904ebb478dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19505 89073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_host_lost.1950589073 |
| Directory | /workspace/0.usbdev_host_lost/latest |
| Test location | /workspace/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1833331453 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 391676047 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:27:45 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-402de95c-01c9-41b2-bbc9-a07c7297ad9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18333 31453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.1833331453 |
| Directory | /workspace/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_reset.571166829 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 193008799 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:27:30 PM PDT 24 |
| Finished | Aug 15 05:27:31 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-4f951da5-8361-42e3-ad1f-dd1747cfc653 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57116 6829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_reset.571166829 |
| Directory | /workspace/0.usbdev_link_reset/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_pid_err.3009798108 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 180955189 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:39 PM PDT 24 |
| Finished | Aug 15 05:27:40 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-ffc24cc9-6112-47f8-9c87-1af41fb45064 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30097 98108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_pid_err.3009798108 |
| Directory | /workspace/0.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_empty.2591052777 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 158408146 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:27:27 PM PDT 24 |
| Finished | Aug 15 05:27:29 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-55dad0f4-ae52-4451-b9c6-212fa327b341 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25910 52777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_empty.2591052777 |
| Directory | /workspace/1.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/3.usbdev_stress_usb_traffic.2863778135 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 7626505086 ps |
| CPU time | 49.55 seconds |
| Started | Aug 15 05:28:12 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 224180 kb |
| Host | smart-954a6308-ba7e-4e02-b18c-80311012c0f0 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2863778135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.2863778135 |
| Directory | /workspace/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_nak_trans.4172394855 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 229529924 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:27:31 PM PDT 24 |
| Finished | Aug 15 05:27:32 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-25f9aae7-462a-43be-9893-6dc067e9aa27 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41723 94855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_nak_trans.4172394855 |
| Directory | /workspace/0.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_bus_resets.4112520394 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 5785370886 ps |
| CPU time | 21.6 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:28:09 PM PDT 24 |
| Peak memory | 224148 kb |
| Host | smart-310170f9-24bc-410b-8681-0f53e7be382d |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4112520394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.4112520394 |
| Directory | /workspace/1.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/10.usbdev_fifo_rst.1849566013 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 309121637 ps |
| CPU time | 2.74 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-6a7fef67-6f48-4169-9e81-f33e71a5a30c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18495 66013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_fifo_rst.1849566013 |
| Directory | /workspace/10.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/10.usbdev_nak_trans.2051254738 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 214086421 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:29:13 PM PDT 24 |
| Finished | Aug 15 05:29:14 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-e3762040-a353-4d8b-8943-cc29bf2ab7e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20512 54738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_nak_trans.2051254738 |
| Directory | /workspace/10.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_nak_trans.2033192631 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 222460113 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:28 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a2caafb7-2486-4da6-a13e-a770519df9ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20331 92631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_nak_trans.2033192631 |
| Directory | /workspace/12.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_iso_retraction.1707257364 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 8332561987 ps |
| CPU time | 56.15 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-d7060029-d22d-4b99-9201-1b70d38b3491 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1707257364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.1707257364 |
| Directory | /workspace/13.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/13.usbdev_nak_trans.2688327201 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 216107437 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-abf87c74-e28c-4d6f-bc36-fd0b4f82f9ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26883 27201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_nak_trans.2688327201 |
| Directory | /workspace/13.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_nak_trans.2890869742 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 208709099 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:29:42 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-06218482-85e0-4eb5-b843-0a1e3f818ebd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28908 69742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_nak_trans.2890869742 |
| Directory | /workspace/14.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_nak_trans.3148357791 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 164818562 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:04 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8ebba49e-b1c9-4964-b4fd-7c059fb20571 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31483 57791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_nak_trans.3148357791 |
| Directory | /workspace/15.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/170.usbdev_tx_rx_disruption.1656044911 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 568840760 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:08 PM PDT 24 |
| Finished | Aug 15 05:35:09 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-11e965e8-f880-4076-b54a-70dd78682c24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1656044911 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 170.usbdev_tx_rx_disruption.1656044911 |
| Directory | /workspace/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/18.usbdev_nak_trans.1522936956 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 182015003 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-e45f88a7-b93a-4dd8-bb6a-782e72330d6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15229 36956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_nak_trans.1522936956 |
| Directory | /workspace/18.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_nak_trans.2301527614 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 218556942 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:32:35 PM PDT 24 |
| Finished | Aug 15 05:32:41 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-63850d7b-ebbd-4c79-96b0-c642d54a2a61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23015 27614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_nak_trans.2301527614 |
| Directory | /workspace/34.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_nak_trans.2383611113 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 233135998 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:28:04 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-cbcde52d-4078-43d5-863d-925f9197c6e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23836 11113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_nak_trans.2383611113 |
| Directory | /workspace/4.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_nak_trans.1940697656 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 181931290 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a418bb4d-34ba-47f2-8f8b-1d46cb153c30 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19406 97656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_nak_trans.1940697656 |
| Directory | /workspace/44.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/62.usbdev_tx_rx_disruption.1060674107 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 608331193 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-1068f447-a276-419b-a055-128abc682dd7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1060674107 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 62.usbdev_tx_rx_disruption.1060674107 |
| Directory | /workspace/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_bit_bash.1445737240 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 1406435127 ps |
| CPU time | 9.05 seconds |
| Started | Aug 15 06:09:01 PM PDT 24 |
| Finished | Aug 15 06:09:10 PM PDT 24 |
| Peak memory | 207224 kb |
| Host | smart-ac8492f6-877e-40ed-8c9d-c0a37eb997a5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1445737240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.1445737240 |
| Directory | /workspace/0.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_hw_reset.3495719311 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 127050646 ps |
| CPU time | 1 seconds |
| Started | Aug 15 06:08:59 PM PDT 24 |
| Finished | Aug 15 06:09:01 PM PDT 24 |
| Peak memory | 206956 kb |
| Host | smart-bb435c20-851f-4008-902d-461900e014a2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3495719311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.3495719311 |
| Directory | /workspace/0.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.4024994354 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 53849675 ps |
| CPU time | 1.31 seconds |
| Started | Aug 15 06:09:00 PM PDT 24 |
| Finished | Aug 15 06:09:02 PM PDT 24 |
| Peak memory | 215528 kb |
| Host | smart-c0875e31-da71-4913-9729-88fa2128bd11 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4024994354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbde v_csr_mem_rw_with_rand_reset.4024994354 |
| Directory | /workspace/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_rw.2406040430 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 103998366 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 06:09:03 PM PDT 24 |
| Finished | Aug 15 06:09:04 PM PDT 24 |
| Peak memory | 206892 kb |
| Host | smart-ae82125e-e00e-42eb-9917-07ec662c4dc3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2406040430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.2406040430 |
| Directory | /workspace/0.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_intr_test.3801858627 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 83806011 ps |
| CPU time | 0.77 seconds |
| Started | Aug 15 06:08:55 PM PDT 24 |
| Finished | Aug 15 06:08:55 PM PDT 24 |
| Peak memory | 206944 kb |
| Host | smart-1d2eab32-34b0-43f7-9155-6c20c0e6b6ce |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3801858627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.3801858627 |
| Directory | /workspace/0.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_mem_partial_access.3150510865 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 164426540 ps |
| CPU time | 2.41 seconds |
| Started | Aug 15 06:08:56 PM PDT 24 |
| Finished | Aug 15 06:08:58 PM PDT 24 |
| Peak memory | 215400 kb |
| Host | smart-eac2bc21-c734-4f3d-80cc-f19c0c68f1fc |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3150510865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.3150510865 |
| Directory | /workspace/0.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_mem_walk.3300469643 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 498970372 ps |
| CPU time | 4.34 seconds |
| Started | Aug 15 06:08:54 PM PDT 24 |
| Finished | Aug 15 06:08:59 PM PDT 24 |
| Peak memory | 207052 kb |
| Host | smart-26224896-bc6e-4c65-b529-67a745ec0f05 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3300469643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.3300469643 |
| Directory | /workspace/0.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2050940422 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 198567231 ps |
| CPU time | 1.33 seconds |
| Started | Aug 15 06:09:01 PM PDT 24 |
| Finished | Aug 15 06:09:03 PM PDT 24 |
| Peak memory | 207292 kb |
| Host | smart-8b3fd15e-cc36-4bd9-854c-1a979c3289ce |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2050940422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.2050940422 |
| Directory | /workspace/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_tl_errors.2015344480 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 277476878 ps |
| CPU time | 2.93 seconds |
| Started | Aug 15 06:08:52 PM PDT 24 |
| Finished | Aug 15 06:08:55 PM PDT 24 |
| Peak memory | 223540 kb |
| Host | smart-b5ae8bd7-880c-4d6a-98cf-89b3b2f2f044 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2015344480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.2015344480 |
| Directory | /workspace/0.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_tl_intg_err.1248216367 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 1326370767 ps |
| CPU time | 5.21 seconds |
| Started | Aug 15 06:08:50 PM PDT 24 |
| Finished | Aug 15 06:08:55 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-3c344d27-9d26-4637-a38c-7fa9da8c1753 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1248216367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.1248216367 |
| Directory | /workspace/0.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_aliasing.3133203773 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 167018457 ps |
| CPU time | 3.36 seconds |
| Started | Aug 15 06:08:59 PM PDT 24 |
| Finished | Aug 15 06:09:02 PM PDT 24 |
| Peak memory | 207148 kb |
| Host | smart-b188e6e0-e6fb-4299-9850-cb2b81275065 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3133203773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.3133203773 |
| Directory | /workspace/1.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_bit_bash.4193611459 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 708794566 ps |
| CPU time | 4.2 seconds |
| Started | Aug 15 06:09:00 PM PDT 24 |
| Finished | Aug 15 06:09:05 PM PDT 24 |
| Peak memory | 207216 kb |
| Host | smart-8aec36bc-5b4f-4840-8a03-88904571bc55 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=4193611459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.4193611459 |
| Directory | /workspace/1.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3927519906 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 74789982 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 06:09:05 PM PDT 24 |
| Finished | Aug 15 06:09:06 PM PDT 24 |
| Peak memory | 206980 kb |
| Host | smart-fae33ac6-8c02-41e8-ab45-d8a162649e7f |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3927519906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.3927519906 |
| Directory | /workspace/1.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2934090829 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 74037643 ps |
| CPU time | 1.23 seconds |
| Started | Aug 15 06:09:04 PM PDT 24 |
| Finished | Aug 15 06:09:05 PM PDT 24 |
| Peak memory | 215516 kb |
| Host | smart-4340f763-7b9d-4075-97b1-b92d47d07f1b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2934090829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbde v_csr_mem_rw_with_rand_reset.2934090829 |
| Directory | /workspace/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_rw.2960907154 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 51074617 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 06:08:55 PM PDT 24 |
| Finished | Aug 15 06:08:56 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-9114e4d6-9db4-4786-af35-0ffece9bed7c |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2960907154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.2960907154 |
| Directory | /workspace/1.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_intr_test.2821700649 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 35023201 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 06:08:54 PM PDT 24 |
| Finished | Aug 15 06:08:55 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-8a2e4714-303e-4809-a8f7-3ea48212d726 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2821700649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.2821700649 |
| Directory | /workspace/1.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_mem_partial_access.657087919 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 118720567 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 06:09:01 PM PDT 24 |
| Finished | Aug 15 06:09:02 PM PDT 24 |
| Peak memory | 207244 kb |
| Host | smart-b97ad208-d58f-428c-a88d-d3cb7ae7fda3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=657087919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line +cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.657087919 |
| Directory | /workspace/1.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_mem_walk.756925021 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 324774383 ps |
| CPU time | 2.65 seconds |
| Started | Aug 15 06:09:02 PM PDT 24 |
| Finished | Aug 15 06:09:05 PM PDT 24 |
| Peak memory | 207052 kb |
| Host | smart-4eb16e61-4ffd-4482-8915-736f0d60f594 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=756925021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.756925021 |
| Directory | /workspace/1.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.2584310747 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 98012344 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 06:09:00 PM PDT 24 |
| Finished | Aug 15 06:09:02 PM PDT 24 |
| Peak memory | 207188 kb |
| Host | smart-082db628-4591-49ec-9c5b-e7b52c7d16b3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2584310747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.2584310747 |
| Directory | /workspace/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_tl_intg_err.3226021422 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 773697439 ps |
| CPU time | 4.43 seconds |
| Started | Aug 15 06:09:06 PM PDT 24 |
| Finished | Aug 15 06:09:11 PM PDT 24 |
| Peak memory | 207244 kb |
| Host | smart-0cc8856d-2a70-4283-916d-4cb486533d59 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3226021422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.3226021422 |
| Directory | /workspace/1.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3095948045 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 71267161 ps |
| CPU time | 2.02 seconds |
| Started | Aug 15 06:09:28 PM PDT 24 |
| Finished | Aug 15 06:09:31 PM PDT 24 |
| Peak memory | 215456 kb |
| Host | smart-900428c7-b070-4f86-b6ae-4aac6666aa8e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3095948045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbd ev_csr_mem_rw_with_rand_reset.3095948045 |
| Directory | /workspace/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_csr_rw.4090923772 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 68561575 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 06:09:27 PM PDT 24 |
| Finished | Aug 15 06:09:28 PM PDT 24 |
| Peak memory | 206984 kb |
| Host | smart-9fd1ba9d-2fe4-4fb5-b1b9-802ebe99cfc5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=4090923772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.4090923772 |
| Directory | /workspace/10.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_intr_test.544734539 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 88793249 ps |
| CPU time | 0.79 seconds |
| Started | Aug 15 06:09:26 PM PDT 24 |
| Finished | Aug 15 06:09:27 PM PDT 24 |
| Peak memory | 206928 kb |
| Host | smart-28b26892-c53d-4771-a612-aa307842a49c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=544734539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.544734539 |
| Directory | /workspace/10.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_tl_errors.2834985518 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 260301481 ps |
| CPU time | 3.4 seconds |
| Started | Aug 15 06:09:31 PM PDT 24 |
| Finished | Aug 15 06:09:34 PM PDT 24 |
| Peak memory | 215356 kb |
| Host | smart-776018e8-22b8-4dd5-bc48-5b7800eb4c2a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2834985518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.2834985518 |
| Directory | /workspace/10.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_tl_intg_err.2140605910 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 533881450 ps |
| CPU time | 4.04 seconds |
| Started | Aug 15 06:09:36 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 207280 kb |
| Host | smart-2518ba8d-4b9a-4580-800d-2a45020ec3c8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2140605910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.2140605910 |
| Directory | /workspace/10.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.4063280236 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 170036742 ps |
| CPU time | 1.89 seconds |
| Started | Aug 15 06:09:30 PM PDT 24 |
| Finished | Aug 15 06:09:32 PM PDT 24 |
| Peak memory | 215544 kb |
| Host | smart-a2b49efb-b25f-4bfc-90f8-756e939ad485 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4063280236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbd ev_csr_mem_rw_with_rand_reset.4063280236 |
| Directory | /workspace/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_csr_rw.1534768089 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 61416114 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 06:09:30 PM PDT 24 |
| Finished | Aug 15 06:09:31 PM PDT 24 |
| Peak memory | 206864 kb |
| Host | smart-3e826c61-df5b-43f1-972b-9eddb00de3aa |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1534768089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.1534768089 |
| Directory | /workspace/11.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_intr_test.1604324948 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 59597779 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 06:09:29 PM PDT 24 |
| Finished | Aug 15 06:09:30 PM PDT 24 |
| Peak memory | 206872 kb |
| Host | smart-ccbe0252-3d82-4ff7-aa97-8c869d6cf5a3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1604324948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.1604324948 |
| Directory | /workspace/11.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2314010048 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 142034147 ps |
| CPU time | 1.29 seconds |
| Started | Aug 15 06:09:33 PM PDT 24 |
| Finished | Aug 15 06:09:35 PM PDT 24 |
| Peak memory | 207140 kb |
| Host | smart-50d1b714-e337-4dac-ae05-af7a33dd7f14 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2314010048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.2314010048 |
| Directory | /workspace/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_tl_errors.4282284358 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 352730972 ps |
| CPU time | 3.61 seconds |
| Started | Aug 15 06:09:31 PM PDT 24 |
| Finished | Aug 15 06:09:35 PM PDT 24 |
| Peak memory | 223508 kb |
| Host | smart-662394b0-a023-412d-abfd-d1b7c1b0d5f5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4282284358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.4282284358 |
| Directory | /workspace/11.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_tl_intg_err.631491662 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 265248024 ps |
| CPU time | 2.25 seconds |
| Started | Aug 15 06:09:27 PM PDT 24 |
| Finished | Aug 15 06:09:29 PM PDT 24 |
| Peak memory | 207280 kb |
| Host | smart-c9cbe2ee-efef-4b57-b899-a4e4a9801bf5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=631491662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.631491662 |
| Directory | /workspace/11.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2234953948 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 66106286 ps |
| CPU time | 1.8 seconds |
| Started | Aug 15 06:09:29 PM PDT 24 |
| Finished | Aug 15 06:09:31 PM PDT 24 |
| Peak memory | 215456 kb |
| Host | smart-8dcbb36e-bcda-4f72-8a8a-cc770f558b28 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2234953948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbd ev_csr_mem_rw_with_rand_reset.2234953948 |
| Directory | /workspace/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_csr_rw.634065825 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 92773294 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 06:09:29 PM PDT 24 |
| Finished | Aug 15 06:09:30 PM PDT 24 |
| Peak memory | 206968 kb |
| Host | smart-13903606-e257-42ed-a31a-a0338f6efe81 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=634065825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.634065825 |
| Directory | /workspace/12.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_intr_test.2550174804 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 44843116 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 06:09:36 PM PDT 24 |
| Finished | Aug 15 06:09:36 PM PDT 24 |
| Peak memory | 206904 kb |
| Host | smart-14100f4b-9084-4522-ab8e-501ba7dc9597 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2550174804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.2550174804 |
| Directory | /workspace/12.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.3858097521 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 97194851 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 06:09:27 PM PDT 24 |
| Finished | Aug 15 06:09:29 PM PDT 24 |
| Peak memory | 207232 kb |
| Host | smart-62e57ee7-247d-4ffa-951d-3bac0383dc65 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3858097521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.3858097521 |
| Directory | /workspace/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_tl_errors.3220780146 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 217643573 ps |
| CPU time | 2.85 seconds |
| Started | Aug 15 06:09:34 PM PDT 24 |
| Finished | Aug 15 06:09:37 PM PDT 24 |
| Peak memory | 207212 kb |
| Host | smart-89fc614b-e555-4764-b11c-f071be52e1c7 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3220780146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.3220780146 |
| Directory | /workspace/12.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1972037585 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 65696903 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 215504 kb |
| Host | smart-4df839dc-164e-432c-b8e0-4883ec2281fa |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1972037585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbd ev_csr_mem_rw_with_rand_reset.1972037585 |
| Directory | /workspace/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_csr_rw.1303529638 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 48743573 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 06:09:36 PM PDT 24 |
| Finished | Aug 15 06:09:37 PM PDT 24 |
| Peak memory | 206992 kb |
| Host | smart-b5e1188c-1ee9-4330-a372-f91607e1857a |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1303529638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.1303529638 |
| Directory | /workspace/13.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_intr_test.3426133843 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 41056124 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 06:09:31 PM PDT 24 |
| Finished | Aug 15 06:09:32 PM PDT 24 |
| Peak memory | 206832 kb |
| Host | smart-54dafcd0-416a-4ad6-8a63-8f9564390ba4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3426133843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.3426133843 |
| Directory | /workspace/13.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.2378278373 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 90777842 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 06:09:30 PM PDT 24 |
| Finished | Aug 15 06:09:32 PM PDT 24 |
| Peak memory | 207256 kb |
| Host | smart-e8b9655a-476e-4675-a74d-b9c13fefb600 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2378278373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.2378278373 |
| Directory | /workspace/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_tl_errors.2438891701 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 63416827 ps |
| CPU time | 1.77 seconds |
| Started | Aug 15 06:09:28 PM PDT 24 |
| Finished | Aug 15 06:09:30 PM PDT 24 |
| Peak memory | 207236 kb |
| Host | smart-30beeddf-ef83-4287-a0ff-962c69163775 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2438891701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.2438891701 |
| Directory | /workspace/13.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_tl_intg_err.2104557559 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 683121093 ps |
| CPU time | 3.83 seconds |
| Started | Aug 15 06:09:26 PM PDT 24 |
| Finished | Aug 15 06:09:30 PM PDT 24 |
| Peak memory | 207212 kb |
| Host | smart-b26885ee-e214-4fa4-9717-08531ffbe722 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2104557559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.2104557559 |
| Directory | /workspace/13.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.2068027906 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 150479453 ps |
| CPU time | 2.07 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 215416 kb |
| Host | smart-9682a50e-a9f4-4007-a3b4-793c355b4592 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2068027906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbd ev_csr_mem_rw_with_rand_reset.2068027906 |
| Directory | /workspace/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_csr_rw.2374988424 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 75486506 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 206956 kb |
| Host | smart-ee8875e0-dac7-4036-bdc8-b15f899c14b0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2374988424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2374988424 |
| Directory | /workspace/14.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3969518383 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 107432944 ps |
| CPU time | 1.22 seconds |
| Started | Aug 15 06:09:35 PM PDT 24 |
| Finished | Aug 15 06:09:36 PM PDT 24 |
| Peak memory | 207192 kb |
| Host | smart-340e8ef0-b162-491a-9b17-11b7be464c60 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3969518383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.3969518383 |
| Directory | /workspace/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_tl_errors.2842703544 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 254852871 ps |
| CPU time | 3.38 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:43 PM PDT 24 |
| Peak memory | 215480 kb |
| Host | smart-a766ff60-bffd-4acf-b8c5-8247accfd8d8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2842703544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.2842703544 |
| Directory | /workspace/14.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_tl_intg_err.416031824 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 425702022 ps |
| CPU time | 2.61 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 207172 kb |
| Host | smart-8c54af00-982c-4215-b541-d83bee549641 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=416031824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.416031824 |
| Directory | /workspace/14.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1516315015 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 119389261 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 215236 kb |
| Host | smart-2657ff6e-f512-40af-a5b9-f6c423099859 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1516315015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbd ev_csr_mem_rw_with_rand_reset.1516315015 |
| Directory | /workspace/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_csr_rw.2227101472 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 58471944 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206860 kb |
| Host | smart-6ae7988b-dba5-47e2-8312-5832bb0859ef |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2227101472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.2227101472 |
| Directory | /workspace/15.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_intr_test.2812911306 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 37586676 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 06:09:36 PM PDT 24 |
| Finished | Aug 15 06:09:37 PM PDT 24 |
| Peak memory | 206900 kb |
| Host | smart-5a9eabd0-3a57-4eeb-8fef-1101d2953cf5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2812911306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.2812911306 |
| Directory | /workspace/15.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1583900377 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 108102144 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 06:09:43 PM PDT 24 |
| Finished | Aug 15 06:09:44 PM PDT 24 |
| Peak memory | 207264 kb |
| Host | smart-aeae4d48-2f3f-408d-87b4-7916ede06eb2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1583900377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.1583900377 |
| Directory | /workspace/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_tl_intg_err.1935073758 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 506608547 ps |
| CPU time | 3.03 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 207240 kb |
| Host | smart-886e233a-d4df-4207-b4d1-51de03f1882b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1935073758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.1935073758 |
| Directory | /workspace/15.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1736891436 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 104843005 ps |
| CPU time | 2.44 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:42 PM PDT 24 |
| Peak memory | 215416 kb |
| Host | smart-02734695-8d1a-45d0-8f0e-3d40ff6a3ef5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1736891436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbd ev_csr_mem_rw_with_rand_reset.1736891436 |
| Directory | /workspace/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_csr_rw.3983609336 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 47141583 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 206876 kb |
| Host | smart-61c8a889-4e24-4bc2-8b64-df5297cead5d |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3983609336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.3983609336 |
| Directory | /workspace/16.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_intr_test.2278453010 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 51733677 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206836 kb |
| Host | smart-0a80f27f-80b6-4a12-be40-0fa93de51f8b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2278453010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.2278453010 |
| Directory | /workspace/16.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.1758614082 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 227259802 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 207212 kb |
| Host | smart-dc37b6dd-0ef7-4475-ad23-55fa383b510e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1758614082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.1758614082 |
| Directory | /workspace/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_tl_errors.1714253479 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 87253665 ps |
| CPU time | 2.11 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 207228 kb |
| Host | smart-9132f409-18ea-40cc-801f-56fa85160d53 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1714253479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.1714253479 |
| Directory | /workspace/16.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3878754797 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 115491711 ps |
| CPU time | 1.26 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 215300 kb |
| Host | smart-d2576799-583b-49d1-94b3-f12bef38ae30 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3878754797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbd ev_csr_mem_rw_with_rand_reset.3878754797 |
| Directory | /workspace/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_csr_rw.2701278463 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 131474566 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 06:09:35 PM PDT 24 |
| Finished | Aug 15 06:09:36 PM PDT 24 |
| Peak memory | 207000 kb |
| Host | smart-b3297265-598a-45dc-a835-47ae84364720 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2701278463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.2701278463 |
| Directory | /workspace/17.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_intr_test.989146781 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 38861910 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206896 kb |
| Host | smart-d7a5d4d6-368b-4f86-861b-33408ff46e7d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=989146781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.989146781 |
| Directory | /workspace/17.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1465233048 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 76345830 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 06:09:47 PM PDT 24 |
| Finished | Aug 15 06:09:48 PM PDT 24 |
| Peak memory | 207304 kb |
| Host | smart-2a73e225-bbe8-4062-b8ec-7f2bd6b3936c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1465233048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.1465233048 |
| Directory | /workspace/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_tl_errors.662889765 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 213357161 ps |
| CPU time | 2.18 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 207288 kb |
| Host | smart-75475b78-6076-4662-a494-424f63321cf8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=662889765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.662889765 |
| Directory | /workspace/17.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_tl_intg_err.2536241804 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 277265975 ps |
| CPU time | 2.27 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 207184 kb |
| Host | smart-686f5efb-a940-4ca8-a841-762b4f187500 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2536241804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.2536241804 |
| Directory | /workspace/17.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3534570128 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 142727432 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 06:09:41 PM PDT 24 |
| Finished | Aug 15 06:09:43 PM PDT 24 |
| Peak memory | 215476 kb |
| Host | smart-e3731ee0-3a8e-4444-a84b-2a607eaac0a9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3534570128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbd ev_csr_mem_rw_with_rand_reset.3534570128 |
| Directory | /workspace/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_csr_rw.899659273 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 41570022 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 207040 kb |
| Host | smart-0e893db8-8a90-42af-8ed6-d37deee8de9c |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=899659273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.899659273 |
| Directory | /workspace/18.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_intr_test.466204868 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 34739013 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 206932 kb |
| Host | smart-715bd772-a8a2-4e40-9cb7-325c746a1197 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=466204868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.466204868 |
| Directory | /workspace/18.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.574785169 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 182719995 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 207248 kb |
| Host | smart-d0308521-91d1-43dd-a2ec-e88f68af8be5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=574785169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.574785169 |
| Directory | /workspace/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_tl_errors.2293584798 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 178598766 ps |
| CPU time | 2.14 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 222904 kb |
| Host | smart-ebd8d7b5-0547-4b35-ac6b-626e47693894 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2293584798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.2293584798 |
| Directory | /workspace/18.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_tl_intg_err.3480933600 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 549505239 ps |
| CPU time | 4.16 seconds |
| Started | Aug 15 06:09:36 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 207268 kb |
| Host | smart-78545e66-046f-419c-9894-bbd8fa3fdd89 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3480933600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.3480933600 |
| Directory | /workspace/18.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.4115714298 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 90680803 ps |
| CPU time | 2.11 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 215532 kb |
| Host | smart-1761f518-86c6-4499-be2d-2d25a16eef3a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4115714298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbd ev_csr_mem_rw_with_rand_reset.4115714298 |
| Directory | /workspace/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_csr_rw.1641709019 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 83598888 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 06:09:35 PM PDT 24 |
| Finished | Aug 15 06:09:36 PM PDT 24 |
| Peak memory | 206908 kb |
| Host | smart-d4257a02-e192-4c13-9340-70a127ae92f8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1641709019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.1641709019 |
| Directory | /workspace/19.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_intr_test.3293800348 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 77007871 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 06:09:36 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206868 kb |
| Host | smart-7263fde5-f38b-49e4-a73b-30f8bbea27f4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3293800348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.3293800348 |
| Directory | /workspace/19.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3365504205 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 96981439 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 207212 kb |
| Host | smart-d3f612d7-e12d-4660-a36d-cb62e211b423 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3365504205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.3365504205 |
| Directory | /workspace/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_tl_errors.2158369725 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 158552218 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 207248 kb |
| Host | smart-b2348153-7931-4e95-8b96-60367dafdc6d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2158369725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.2158369725 |
| Directory | /workspace/19.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_aliasing.3422483786 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 357506444 ps |
| CPU time | 3.68 seconds |
| Started | Aug 15 06:09:05 PM PDT 24 |
| Finished | Aug 15 06:09:09 PM PDT 24 |
| Peak memory | 207168 kb |
| Host | smart-d00404b2-7871-452e-9677-d7e5af369881 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3422483786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.3422483786 |
| Directory | /workspace/2.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_bit_bash.360208986 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 894861540 ps |
| CPU time | 4.18 seconds |
| Started | Aug 15 06:09:05 PM PDT 24 |
| Finished | Aug 15 06:09:10 PM PDT 24 |
| Peak memory | 207200 kb |
| Host | smart-10d4811f-a4be-43df-a7dc-3833d7b71f62 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=360208986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.360208986 |
| Directory | /workspace/2.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2155970874 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 111571370 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 06:09:06 PM PDT 24 |
| Finished | Aug 15 06:09:07 PM PDT 24 |
| Peak memory | 206972 kb |
| Host | smart-ddcf3378-1b76-4295-87e0-4feb6b2f35eb |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2155970874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.2155970874 |
| Directory | /workspace/2.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2634469830 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 77452804 ps |
| CPU time | 1.89 seconds |
| Started | Aug 15 06:09:06 PM PDT 24 |
| Finished | Aug 15 06:09:08 PM PDT 24 |
| Peak memory | 215524 kb |
| Host | smart-ebe0c5d7-a75d-4a37-b7c3-c3d60b6aeebf |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2634469830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbde v_csr_mem_rw_with_rand_reset.2634469830 |
| Directory | /workspace/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_rw.3678059463 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 142340889 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 06:09:05 PM PDT 24 |
| Finished | Aug 15 06:09:06 PM PDT 24 |
| Peak memory | 206892 kb |
| Host | smart-1cd3ade4-ed87-421e-bf29-74ef49ca93d4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3678059463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.3678059463 |
| Directory | /workspace/2.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_intr_test.3382248158 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 52093749 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 06:08:59 PM PDT 24 |
| Finished | Aug 15 06:09:00 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-13fc73e6-e974-4d37-868e-9808845c0452 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3382248158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.3382248158 |
| Directory | /workspace/2.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_mem_partial_access.3341456585 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 112756504 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 06:09:04 PM PDT 24 |
| Finished | Aug 15 06:09:06 PM PDT 24 |
| Peak memory | 207156 kb |
| Host | smart-e28d4053-8c99-49eb-bc6c-54fff36530b8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3341456585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.3341456585 |
| Directory | /workspace/2.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_mem_walk.3719017027 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 261796542 ps |
| CPU time | 2.52 seconds |
| Started | Aug 15 06:08:59 PM PDT 24 |
| Finished | Aug 15 06:09:02 PM PDT 24 |
| Peak memory | 207088 kb |
| Host | smart-539bc632-75a4-497b-8b08-3ba5a25790dd |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3719017027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.3719017027 |
| Directory | /workspace/2.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1733900422 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 72883319 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 06:09:06 PM PDT 24 |
| Finished | Aug 15 06:09:07 PM PDT 24 |
| Peak memory | 207188 kb |
| Host | smart-eb00c819-6f5e-48e6-9097-28367c90b73d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1733900422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.1733900422 |
| Directory | /workspace/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_tl_errors.2286470760 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 287395126 ps |
| CPU time | 3.36 seconds |
| Started | Aug 15 06:09:03 PM PDT 24 |
| Finished | Aug 15 06:09:07 PM PDT 24 |
| Peak memory | 207200 kb |
| Host | smart-36cf515f-c412-4542-9604-767b82c697bc |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2286470760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.2286470760 |
| Directory | /workspace/2.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_tl_intg_err.2045943902 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 404152037 ps |
| CPU time | 2.53 seconds |
| Started | Aug 15 06:08:59 PM PDT 24 |
| Finished | Aug 15 06:09:02 PM PDT 24 |
| Peak memory | 207228 kb |
| Host | smart-b91f3872-c56e-4f83-8eb5-6b8d81de512d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2045943902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.2045943902 |
| Directory | /workspace/2.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/20.usbdev_intr_test.1883267326 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 48167065 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 06:09:41 PM PDT 24 |
| Finished | Aug 15 06:09:42 PM PDT 24 |
| Peak memory | 206856 kb |
| Host | smart-a31e12e8-bedf-497d-84e4-4e78f5650de6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1883267326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.1883267326 |
| Directory | /workspace/20.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/21.usbdev_intr_test.673025699 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 37195212 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206868 kb |
| Host | smart-793816ae-8310-4031-bd98-53d7d702637e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=673025699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.673025699 |
| Directory | /workspace/21.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/22.usbdev_intr_test.3130790041 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 51611052 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 06:09:35 PM PDT 24 |
| Finished | Aug 15 06:09:35 PM PDT 24 |
| Peak memory | 206924 kb |
| Host | smart-d8b85349-8d00-41b1-8fad-c96989cf2e53 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3130790041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.3130790041 |
| Directory | /workspace/22.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/23.usbdev_intr_test.1762109832 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 84433684 ps |
| CPU time | 0.77 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206880 kb |
| Host | smart-353ce9d9-1dcd-46ba-9832-5546ce0d358d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1762109832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.1762109832 |
| Directory | /workspace/23.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/24.usbdev_intr_test.1760872741 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 103496396 ps |
| CPU time | 0.77 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 206940 kb |
| Host | smart-e1f07ff3-a6ea-4cfe-976c-452136c05807 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1760872741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.1760872741 |
| Directory | /workspace/24.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/25.usbdev_intr_test.3539285543 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 61003520 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206952 kb |
| Host | smart-e2d9e2d1-5626-4cda-a83d-335c0304f093 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3539285543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.3539285543 |
| Directory | /workspace/25.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/26.usbdev_intr_test.3263005585 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 39075913 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 06:09:47 PM PDT 24 |
| Finished | Aug 15 06:09:48 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-aa3a1520-7419-498e-94f6-ff74c38035f0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3263005585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.3263005585 |
| Directory | /workspace/26.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/27.usbdev_intr_test.3958579510 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 38355665 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 206900 kb |
| Host | smart-3860f6bb-e807-4d94-9872-3761c158df5c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3958579510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.3958579510 |
| Directory | /workspace/27.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/28.usbdev_intr_test.1189159330 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 43029832 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206864 kb |
| Host | smart-a6b34b47-b0c8-4a78-962c-afda4f6e6aa6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1189159330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.1189159330 |
| Directory | /workspace/28.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/29.usbdev_intr_test.1683656618 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 47363394 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206804 kb |
| Host | smart-54d8cd52-0854-42fd-848f-1fe2b4c17c1e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1683656618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.1683656618 |
| Directory | /workspace/29.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_aliasing.2764837476 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 136169550 ps |
| CPU time | 3.19 seconds |
| Started | Aug 15 06:09:15 PM PDT 24 |
| Finished | Aug 15 06:09:18 PM PDT 24 |
| Peak memory | 207224 kb |
| Host | smart-73bf14be-a1e5-4b35-bcc5-538478d42940 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2764837476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.2764837476 |
| Directory | /workspace/3.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1458181448 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 1088850889 ps |
| CPU time | 4.99 seconds |
| Started | Aug 15 06:09:19 PM PDT 24 |
| Finished | Aug 15 06:09:24 PM PDT 24 |
| Peak memory | 207136 kb |
| Host | smart-51cce773-ebe0-4ae3-a583-50eaa283bbae |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1458181448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.1458181448 |
| Directory | /workspace/3.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_hw_reset.170595865 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 61770464 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 06:09:08 PM PDT 24 |
| Finished | Aug 15 06:09:09 PM PDT 24 |
| Peak memory | 206888 kb |
| Host | smart-c06e1625-c79d-4b3f-96b0-587c4523cab9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=170595865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.170595865 |
| Directory | /workspace/3.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.1970725640 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 179803128 ps |
| CPU time | 1.99 seconds |
| Started | Aug 15 06:09:12 PM PDT 24 |
| Finished | Aug 15 06:09:14 PM PDT 24 |
| Peak memory | 215440 kb |
| Host | smart-33858fd0-8806-4219-af2d-0b684eedb2b6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1970725640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbde v_csr_mem_rw_with_rand_reset.1970725640 |
| Directory | /workspace/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_rw.345389201 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 71810068 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 06:09:06 PM PDT 24 |
| Finished | Aug 15 06:09:07 PM PDT 24 |
| Peak memory | 207016 kb |
| Host | smart-7f5cdb67-fe78-404f-84fa-2072b188e5a5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=345389201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.345389201 |
| Directory | /workspace/3.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_intr_test.557840093 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 39004223 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 06:09:05 PM PDT 24 |
| Finished | Aug 15 06:09:06 PM PDT 24 |
| Peak memory | 206900 kb |
| Host | smart-1695319c-2cd1-477e-8b86-a54514ae63a6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=557840093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.557840093 |
| Directory | /workspace/3.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_mem_partial_access.1460574709 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 98007078 ps |
| CPU time | 2.15 seconds |
| Started | Aug 15 06:09:08 PM PDT 24 |
| Finished | Aug 15 06:09:10 PM PDT 24 |
| Peak memory | 215412 kb |
| Host | smart-5ac1986d-43a0-45ee-bc7e-aa51933b95d5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1460574709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.1460574709 |
| Directory | /workspace/3.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_mem_walk.489983368 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 706991578 ps |
| CPU time | 4.45 seconds |
| Started | Aug 15 06:09:07 PM PDT 24 |
| Finished | Aug 15 06:09:11 PM PDT 24 |
| Peak memory | 206980 kb |
| Host | smart-6bbfafb9-4929-46a2-b624-e3a59bb5527f |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=489983368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.489983368 |
| Directory | /workspace/3.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.2243356350 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 102899838 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 06:09:18 PM PDT 24 |
| Finished | Aug 15 06:09:20 PM PDT 24 |
| Peak memory | 207104 kb |
| Host | smart-494f08e7-273d-4331-9531-b1fe914f89a8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2243356350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.2243356350 |
| Directory | /workspace/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_tl_errors.4181866258 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 259804613 ps |
| CPU time | 2.74 seconds |
| Started | Aug 15 06:09:07 PM PDT 24 |
| Finished | Aug 15 06:09:10 PM PDT 24 |
| Peak memory | 215460 kb |
| Host | smart-faece833-5d37-44fa-8eb7-01e7eac001bf |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4181866258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.4181866258 |
| Directory | /workspace/3.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_tl_intg_err.4274406435 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 496967915 ps |
| CPU time | 2.73 seconds |
| Started | Aug 15 06:09:06 PM PDT 24 |
| Finished | Aug 15 06:09:09 PM PDT 24 |
| Peak memory | 207228 kb |
| Host | smart-2242b9bf-84c1-4179-9757-885eb3fec10d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=4274406435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.4274406435 |
| Directory | /workspace/3.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/30.usbdev_intr_test.1601996371 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 69202917 ps |
| CPU time | 0.79 seconds |
| Started | Aug 15 06:09:40 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 206888 kb |
| Host | smart-766a0392-2f39-4b74-ae20-a007ff85417f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1601996371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.1601996371 |
| Directory | /workspace/30.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/31.usbdev_intr_test.2879117639 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 51246577 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 06:09:36 PM PDT 24 |
| Finished | Aug 15 06:09:37 PM PDT 24 |
| Peak memory | 206900 kb |
| Host | smart-fbcd445c-8ded-43f7-8a9b-2127b81a5d4b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2879117639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.2879117639 |
| Directory | /workspace/31.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/32.usbdev_intr_test.3360533067 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 35829193 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 06:09:47 PM PDT 24 |
| Finished | Aug 15 06:09:48 PM PDT 24 |
| Peak memory | 206844 kb |
| Host | smart-12ae5f3e-2929-4cdb-b675-a4d173354189 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3360533067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.3360533067 |
| Directory | /workspace/32.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/33.usbdev_intr_test.49946532 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 72256149 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206916 kb |
| Host | smart-93b73c06-4116-4ffa-8cc7-f3cebd3b194c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=49946532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.49946532 |
| Directory | /workspace/33.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/34.usbdev_intr_test.1982132517 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 34351009 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206896 kb |
| Host | smart-8f7deb97-b575-4a5c-b7f1-827b7addb147 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1982132517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.1982132517 |
| Directory | /workspace/34.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/35.usbdev_intr_test.3784679960 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 76497318 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206932 kb |
| Host | smart-c14320aa-ab76-4f1f-bad7-62f7827e3db4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3784679960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.3784679960 |
| Directory | /workspace/35.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/37.usbdev_intr_test.4148992023 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 75944323 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206876 kb |
| Host | smart-5ec82f0f-3ec3-45fe-a029-e2dfb70d656e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4148992023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.4148992023 |
| Directory | /workspace/37.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/38.usbdev_intr_test.3442933383 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 59036781 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 206944 kb |
| Host | smart-43857a20-171e-4423-bd0d-a1cd1e64ca17 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3442933383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.3442933383 |
| Directory | /workspace/38.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_aliasing.3130778069 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 99224957 ps |
| CPU time | 2.02 seconds |
| Started | Aug 15 06:09:11 PM PDT 24 |
| Finished | Aug 15 06:09:13 PM PDT 24 |
| Peak memory | 207120 kb |
| Host | smart-d047aa0a-8992-4970-a9dd-9db0640ddb9b |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3130778069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.3130778069 |
| Directory | /workspace/4.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1514063942 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 1677770596 ps |
| CPU time | 6.8 seconds |
| Started | Aug 15 06:09:12 PM PDT 24 |
| Finished | Aug 15 06:09:19 PM PDT 24 |
| Peak memory | 207252 kb |
| Host | smart-940af8f7-dabf-40c2-a476-6325133f7131 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1514063942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.1514063942 |
| Directory | /workspace/4.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_hw_reset.3429079840 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 132099363 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 06:09:19 PM PDT 24 |
| Finished | Aug 15 06:09:20 PM PDT 24 |
| Peak memory | 206860 kb |
| Host | smart-b2c76175-d3d2-4c58-a76d-d04e571293cc |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3429079840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.3429079840 |
| Directory | /workspace/4.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2142820642 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 163793608 ps |
| CPU time | 2.06 seconds |
| Started | Aug 15 06:09:12 PM PDT 24 |
| Finished | Aug 15 06:09:14 PM PDT 24 |
| Peak memory | 215560 kb |
| Host | smart-14dee0db-67c6-4d96-aea9-4c7f457a953d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2142820642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbde v_csr_mem_rw_with_rand_reset.2142820642 |
| Directory | /workspace/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_rw.2594994082 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 107796609 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 06:09:15 PM PDT 24 |
| Finished | Aug 15 06:09:16 PM PDT 24 |
| Peak memory | 207020 kb |
| Host | smart-5ee2e158-9d56-4db7-9f03-b01d1d81f855 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2594994082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.2594994082 |
| Directory | /workspace/4.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_intr_test.1767589323 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 38659123 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 06:09:13 PM PDT 24 |
| Finished | Aug 15 06:09:14 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-7c3c947c-c363-49ca-81f6-4f641dc76b47 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1767589323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.1767589323 |
| Directory | /workspace/4.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_mem_partial_access.3138623524 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 99245069 ps |
| CPU time | 2.34 seconds |
| Started | Aug 15 06:09:18 PM PDT 24 |
| Finished | Aug 15 06:09:21 PM PDT 24 |
| Peak memory | 215324 kb |
| Host | smart-e4983ca4-aa21-4c60-9df7-a623162138ff |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3138623524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3138623524 |
| Directory | /workspace/4.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_mem_walk.1084220659 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 476669177 ps |
| CPU time | 4.48 seconds |
| Started | Aug 15 06:09:14 PM PDT 24 |
| Finished | Aug 15 06:09:19 PM PDT 24 |
| Peak memory | 207072 kb |
| Host | smart-ea70bb83-7e77-444f-96bb-3c9b458952e5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1084220659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.1084220659 |
| Directory | /workspace/4.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3051846026 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 67671055 ps |
| CPU time | 1 seconds |
| Started | Aug 15 06:09:14 PM PDT 24 |
| Finished | Aug 15 06:09:15 PM PDT 24 |
| Peak memory | 207076 kb |
| Host | smart-79cf8148-2303-4a04-b0d4-dcc3598fb10f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3051846026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.3051846026 |
| Directory | /workspace/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_tl_errors.4122242670 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 251999663 ps |
| CPU time | 2.87 seconds |
| Started | Aug 15 06:09:19 PM PDT 24 |
| Finished | Aug 15 06:09:23 PM PDT 24 |
| Peak memory | 223524 kb |
| Host | smart-c3bff638-348f-4745-a8c0-228106ede38e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4122242670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.4122242670 |
| Directory | /workspace/4.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_tl_intg_err.860505021 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 753152142 ps |
| CPU time | 4.5 seconds |
| Started | Aug 15 06:09:12 PM PDT 24 |
| Finished | Aug 15 06:09:17 PM PDT 24 |
| Peak memory | 207272 kb |
| Host | smart-dcf903ca-5dd2-4cce-a607-778d0be1b64f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=860505021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.860505021 |
| Directory | /workspace/4.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/40.usbdev_intr_test.3286859222 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 71311666 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 06:09:39 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206936 kb |
| Host | smart-dea78c26-d357-4d86-967f-b3b595d48df8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3286859222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.3286859222 |
| Directory | /workspace/40.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/41.usbdev_intr_test.785853752 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 33444032 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206900 kb |
| Host | smart-330fd261-3beb-4ac3-b3f5-9e845afb9d0d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=785853752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.785853752 |
| Directory | /workspace/41.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/42.usbdev_intr_test.1695197351 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 84084362 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 06:09:37 PM PDT 24 |
| Finished | Aug 15 06:09:38 PM PDT 24 |
| Peak memory | 206864 kb |
| Host | smart-e04c7a5e-5cc8-4969-9325-b548da4c3b0d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1695197351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.1695197351 |
| Directory | /workspace/42.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/43.usbdev_intr_test.1830896205 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 62602618 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 06:09:46 PM PDT 24 |
| Finished | Aug 15 06:09:47 PM PDT 24 |
| Peak memory | 206932 kb |
| Host | smart-830340f3-ca5e-40af-9fb7-6930f3e14381 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1830896205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.1830896205 |
| Directory | /workspace/43.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/45.usbdev_intr_test.405055741 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 53720908 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 06:09:40 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 206912 kb |
| Host | smart-118c6a30-50ca-43c7-a412-d09044723b5a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=405055741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.405055741 |
| Directory | /workspace/45.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/46.usbdev_intr_test.2215448471 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 32140676 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206908 kb |
| Host | smart-570cb287-3b5b-4828-8565-2329c3f151e2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2215448471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.2215448471 |
| Directory | /workspace/46.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/47.usbdev_intr_test.326007752 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 47553762 ps |
| CPU time | 0.79 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:39 PM PDT 24 |
| Peak memory | 206916 kb |
| Host | smart-023fd4c5-d6d5-45a4-846f-4ada2d6ea1db |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=326007752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.326007752 |
| Directory | /workspace/47.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/48.usbdev_intr_test.2038735523 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 33339342 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 06:09:38 PM PDT 24 |
| Finished | Aug 15 06:09:40 PM PDT 24 |
| Peak memory | 206908 kb |
| Host | smart-1f459d85-e501-4adb-a1a2-a805edbfda2d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2038735523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.2038735523 |
| Directory | /workspace/48.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/49.usbdev_intr_test.907846029 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 39762742 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 06:09:40 PM PDT 24 |
| Finished | Aug 15 06:09:41 PM PDT 24 |
| Peak memory | 206912 kb |
| Host | smart-3501ecbd-20d6-4ba2-91fa-28c5c838ca1b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=907846029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.907846029 |
| Directory | /workspace/49.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.3483759858 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 233848009 ps |
| CPU time | 1.98 seconds |
| Started | Aug 15 06:09:10 PM PDT 24 |
| Finished | Aug 15 06:09:13 PM PDT 24 |
| Peak memory | 215572 kb |
| Host | smart-68e70f91-ff39-4b60-9f92-d30534d9d1ac |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3483759858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbde v_csr_mem_rw_with_rand_reset.3483759858 |
| Directory | /workspace/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_csr_rw.2033951563 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 47642926 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 06:09:10 PM PDT 24 |
| Finished | Aug 15 06:09:11 PM PDT 24 |
| Peak memory | 206888 kb |
| Host | smart-45ef82fa-0841-44a7-93e2-df4f23f1b7e3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2033951563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.2033951563 |
| Directory | /workspace/5.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_intr_test.4130023755 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 61907649 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 06:09:19 PM PDT 24 |
| Finished | Aug 15 06:09:20 PM PDT 24 |
| Peak memory | 206868 kb |
| Host | smart-75e38741-e29e-4dbf-9c5a-195897e41c1b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4130023755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.4130023755 |
| Directory | /workspace/5.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.4175642691 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 284128395 ps |
| CPU time | 1.84 seconds |
| Started | Aug 15 06:09:11 PM PDT 24 |
| Finished | Aug 15 06:09:13 PM PDT 24 |
| Peak memory | 207304 kb |
| Host | smart-50ef0686-1398-43bb-ae7a-4c82c7e8681d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=4175642691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.4175642691 |
| Directory | /workspace/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_tl_errors.3719422154 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 280094744 ps |
| CPU time | 3.13 seconds |
| Started | Aug 15 06:09:18 PM PDT 24 |
| Finished | Aug 15 06:09:21 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-7a20c251-4ddf-43b1-87f4-682566433295 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3719422154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.3719422154 |
| Directory | /workspace/5.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_tl_intg_err.849687869 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 754841886 ps |
| CPU time | 4.5 seconds |
| Started | Aug 15 06:09:10 PM PDT 24 |
| Finished | Aug 15 06:09:15 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-4df4211c-36bc-4a07-a56d-2024c6f2f04f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=849687869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.849687869 |
| Directory | /workspace/5.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1088074022 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 152131787 ps |
| CPU time | 1.89 seconds |
| Started | Aug 15 06:09:23 PM PDT 24 |
| Finished | Aug 15 06:09:25 PM PDT 24 |
| Peak memory | 215492 kb |
| Host | smart-9f22835b-bef7-41cd-b4c9-02cc1eae51ba |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1088074022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbde v_csr_mem_rw_with_rand_reset.1088074022 |
| Directory | /workspace/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_csr_rw.1954106414 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 43221622 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 06:09:24 PM PDT 24 |
| Finished | Aug 15 06:09:25 PM PDT 24 |
| Peak memory | 206860 kb |
| Host | smart-d3240dc3-53f4-4a61-8e13-8cadcb52348f |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1954106414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.1954106414 |
| Directory | /workspace/6.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_intr_test.74563914 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 116330458 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 06:09:21 PM PDT 24 |
| Finished | Aug 15 06:09:23 PM PDT 24 |
| Peak memory | 206920 kb |
| Host | smart-ad2763a0-aae6-42b4-b921-c4ee2cfc9ec2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=74563914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.74563914 |
| Directory | /workspace/6.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.3193505169 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 120108715 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 06:09:24 PM PDT 24 |
| Finished | Aug 15 06:09:25 PM PDT 24 |
| Peak memory | 207064 kb |
| Host | smart-30e20d61-ef64-43ea-a2a6-df451ad7512c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3193505169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.3193505169 |
| Directory | /workspace/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_tl_errors.1853700857 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 106264097 ps |
| CPU time | 2.44 seconds |
| Started | Aug 15 06:09:22 PM PDT 24 |
| Finished | Aug 15 06:09:24 PM PDT 24 |
| Peak memory | 215460 kb |
| Host | smart-e3992f59-80ec-41fa-a179-40ef641c464c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1853700857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.1853700857 |
| Directory | /workspace/6.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_tl_intg_err.732234442 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 752533748 ps |
| CPU time | 4.5 seconds |
| Started | Aug 15 06:09:24 PM PDT 24 |
| Finished | Aug 15 06:09:28 PM PDT 24 |
| Peak memory | 207244 kb |
| Host | smart-b20f7a5b-e7d3-421a-be70-fa7123c2e435 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=732234442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.732234442 |
| Directory | /workspace/6.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.2734939643 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 150997036 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 06:09:24 PM PDT 24 |
| Finished | Aug 15 06:09:26 PM PDT 24 |
| Peak memory | 215480 kb |
| Host | smart-1bbc0607-13a8-434c-9e51-92d9da7cc976 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2734939643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbde v_csr_mem_rw_with_rand_reset.2734939643 |
| Directory | /workspace/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_csr_rw.528071171 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 63704369 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 06:09:29 PM PDT 24 |
| Finished | Aug 15 06:09:30 PM PDT 24 |
| Peak memory | 206972 kb |
| Host | smart-7ea61a27-2aa7-453a-a81f-05110e313516 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=528071171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.528071171 |
| Directory | /workspace/7.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_intr_test.3678742948 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 30011767 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 06:09:28 PM PDT 24 |
| Finished | Aug 15 06:09:29 PM PDT 24 |
| Peak memory | 206868 kb |
| Host | smart-494b8f16-3743-4c5e-bf3a-933ca5f0eac5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3678742948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.3678742948 |
| Directory | /workspace/7.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.4273026236 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 183221402 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 06:09:21 PM PDT 24 |
| Finished | Aug 15 06:09:23 PM PDT 24 |
| Peak memory | 207224 kb |
| Host | smart-6643867f-7f21-46c6-bc0b-be467e39f1b6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=4273026236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.4273026236 |
| Directory | /workspace/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_tl_errors.2754234950 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 227051543 ps |
| CPU time | 2.96 seconds |
| Started | Aug 15 06:09:24 PM PDT 24 |
| Finished | Aug 15 06:09:27 PM PDT 24 |
| Peak memory | 223536 kb |
| Host | smart-7d3d98d1-affb-4115-b13a-1bdb350733f9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2754234950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.2754234950 |
| Directory | /workspace/7.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_tl_intg_err.768251003 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 465845150 ps |
| CPU time | 2.66 seconds |
| Started | Aug 15 06:09:24 PM PDT 24 |
| Finished | Aug 15 06:09:27 PM PDT 24 |
| Peak memory | 207320 kb |
| Host | smart-308556a8-cf9d-42f4-9fb6-20b61361541b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=768251003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.768251003 |
| Directory | /workspace/7.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.1001132498 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 111857220 ps |
| CPU time | 2.12 seconds |
| Started | Aug 15 06:09:22 PM PDT 24 |
| Finished | Aug 15 06:09:25 PM PDT 24 |
| Peak memory | 215452 kb |
| Host | smart-df802b39-b76f-4e8d-9046-01d800291cd9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1001132498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbde v_csr_mem_rw_with_rand_reset.1001132498 |
| Directory | /workspace/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_csr_rw.522917967 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 75163622 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 06:09:21 PM PDT 24 |
| Finished | Aug 15 06:09:22 PM PDT 24 |
| Peak memory | 207024 kb |
| Host | smart-a2648c88-996f-4265-bf63-d5efc437a549 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=522917967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.522917967 |
| Directory | /workspace/8.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_intr_test.1791953913 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 47584146 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 06:09:25 PM PDT 24 |
| Finished | Aug 15 06:09:26 PM PDT 24 |
| Peak memory | 206872 kb |
| Host | smart-624382b3-1092-4872-b1de-06a62ae9378c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1791953913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.1791953913 |
| Directory | /workspace/8.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1935277223 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 274677782 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 06:09:24 PM PDT 24 |
| Finished | Aug 15 06:09:26 PM PDT 24 |
| Peak memory | 207304 kb |
| Host | smart-206a277d-0b8d-4615-9903-5b4d55822687 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1935277223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.1935277223 |
| Directory | /workspace/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_tl_errors.1892118040 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 111953948 ps |
| CPU time | 2.26 seconds |
| Started | Aug 15 06:09:22 PM PDT 24 |
| Finished | Aug 15 06:09:24 PM PDT 24 |
| Peak memory | 223560 kb |
| Host | smart-b984dab7-b0f0-4416-924e-5091d7ab2272 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1892118040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.1892118040 |
| Directory | /workspace/8.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_tl_intg_err.3021802508 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 403284107 ps |
| CPU time | 2.76 seconds |
| Started | Aug 15 06:09:29 PM PDT 24 |
| Finished | Aug 15 06:09:32 PM PDT 24 |
| Peak memory | 207248 kb |
| Host | smart-7635bff9-facf-4b7c-a878-d472f3cf87cb |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3021802508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.3021802508 |
| Directory | /workspace/8.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.942802748 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 102940871 ps |
| CPU time | 1.96 seconds |
| Started | Aug 15 06:09:29 PM PDT 24 |
| Finished | Aug 15 06:09:31 PM PDT 24 |
| Peak memory | 215412 kb |
| Host | smart-4125bc67-403d-45dd-9ea1-98cedcc34ec2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=942802748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev _csr_mem_rw_with_rand_reset.942802748 |
| Directory | /workspace/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_csr_rw.795414354 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 92749011 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 06:09:25 PM PDT 24 |
| Finished | Aug 15 06:09:26 PM PDT 24 |
| Peak memory | 206920 kb |
| Host | smart-1014c49a-497b-470e-a117-8f5a97691e3e |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=795414354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.795414354 |
| Directory | /workspace/9.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_intr_test.469804868 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 50215812 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 06:09:25 PM PDT 24 |
| Finished | Aug 15 06:09:26 PM PDT 24 |
| Peak memory | 206664 kb |
| Host | smart-4f990041-1a46-43ee-9e2a-3f4b56b0e2c2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=469804868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.469804868 |
| Directory | /workspace/9.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2790542608 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 116144345 ps |
| CPU time | 1.2 seconds |
| Started | Aug 15 06:09:25 PM PDT 24 |
| Finished | Aug 15 06:09:26 PM PDT 24 |
| Peak memory | 207012 kb |
| Host | smart-9ad53563-31af-4dad-91ab-f735fc2fb821 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2790542608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.2790542608 |
| Directory | /workspace/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_tl_errors.747695272 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 323989155 ps |
| CPU time | 3.5 seconds |
| Started | Aug 15 06:09:21 PM PDT 24 |
| Finished | Aug 15 06:09:25 PM PDT 24 |
| Peak memory | 215504 kb |
| Host | smart-b661f77e-c072-4b74-b0e6-8ae066b1abaa |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=747695272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.747695272 |
| Directory | /workspace/9.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_tl_intg_err.1174566765 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 474481556 ps |
| CPU time | 2.78 seconds |
| Started | Aug 15 06:09:24 PM PDT 24 |
| Finished | Aug 15 06:09:27 PM PDT 24 |
| Peak memory | 207264 kb |
| Host | smart-f0c94abf-6148-4a11-89f9-ede6e4ae36a8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1174566765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.1174566765 |
| Directory | /workspace/9.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_alert_test.2286720578 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 65884460 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:35 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-27a62f64-ad31-4a92-a7c8-c0085118acba |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2286720578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.2286720578 |
| Directory | /workspace/0.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_reset.2281724766 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 18974375934 ps |
| CPU time | 23.69 seconds |
| Started | Aug 15 05:27:23 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-9dd384d8-a566-46b4-a8f4-0600e02b6b34 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2281724766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.2281724766 |
| Directory | /workspace/0.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_resume.95263849 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 26343897957 ps |
| CPU time | 33.75 seconds |
| Started | Aug 15 05:27:16 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 215832 kb |
| Host | smart-3b39cb83-6be6-4c8f-a24b-e67ca9abf527 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95263849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_ wake_resume.95263849 |
| Directory | /workspace/0.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_buffer.1834813280 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 184780915 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:20 PM PDT 24 |
| Finished | Aug 15 05:27:21 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-32ee7524-c25a-4fe3-a9a8-8d8c1c45bdea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18348 13280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_buffer.1834813280 |
| Directory | /workspace/0.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/0.usbdev_bitstuff_err.1433516733 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 154028257 ps |
| CPU time | 0.79 seconds |
| Started | Aug 15 05:27:21 PM PDT 24 |
| Finished | Aug 15 05:27:22 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-f31b1f79-92ec-4ece-870f-f9e20ed7b3db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14335 16733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_bitstuff_err.1433516733 |
| Directory | /workspace/0.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_data_toggle_clear.649451282 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 516600389 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:36 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-147cdc97-9216-440f-97fb-bf55c689801b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64945 1282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_clear.649451282 |
| Directory | /workspace/0.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/0.usbdev_data_toggle_restore.1279978530 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 640942701 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:27:27 PM PDT 24 |
| Finished | Aug 15 05:27:28 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-0cece489-b020-483d-a68c-6e27e9dc7c09 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1279978530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.1279978530 |
| Directory | /workspace/0.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/0.usbdev_device_address.1943164573 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 37013851189 ps |
| CPU time | 66.23 seconds |
| Started | Aug 15 05:27:28 PM PDT 24 |
| Finished | Aug 15 05:28:34 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-3327ee78-7c66-4db1-a3cc-4f8f7636706b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19431 64573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.1943164573 |
| Directory | /workspace/0.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/0.usbdev_device_timeout.391027714 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 4305996358 ps |
| CPU time | 28.93 seconds |
| Started | Aug 15 05:27:27 PM PDT 24 |
| Finished | Aug 15 05:27:56 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-7cece2af-7e8e-4d59-a161-4c7445d2dcda |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=391027714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.391027714 |
| Directory | /workspace/0.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/0.usbdev_disable_endpoint.753798500 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 885573759 ps |
| CPU time | 2.06 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:36 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-59adae7c-78f3-4e24-829b-024459ef7b0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75379 8500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disable_endpoint.753798500 |
| Directory | /workspace/0.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/0.usbdev_disconnected.2612166032 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 138488933 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:39 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-398cdae6-3ec6-4b25-a9d5-9c05df012e0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26121 66032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disconnected.2612166032 |
| Directory | /workspace/0.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/0.usbdev_dpi_config_host.3323244605 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 5135968437 ps |
| CPU time | 37.92 seconds |
| Started | Aug 15 05:27:28 PM PDT 24 |
| Finished | Aug 15 05:28:06 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-0d0b0479-4bd8-4f5b-a43e-53cbfdc4d9cf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33232 44605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.3323244605 |
| Directory | /workspace/0.usbdev_dpi_config_host/latest |
| Test location | /workspace/coverage/default/0.usbdev_enable.3317995856 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 49559743 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:27:36 PM PDT 24 |
| Finished | Aug 15 05:27:37 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-926a940d-3eb3-4769-8374-68467f6e609d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33179 95856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_enable.3317995856 |
| Directory | /workspace/0.usbdev_enable/latest |
| Test location | /workspace/coverage/default/0.usbdev_endpoint_access.1420279419 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 903941479 ps |
| CPU time | 2.38 seconds |
| Started | Aug 15 05:27:26 PM PDT 24 |
| Finished | Aug 15 05:27:29 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-03616cea-52e8-4db9-a5eb-e26d9462e0c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14202 79419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.1420279419 |
| Directory | /workspace/0.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/0.usbdev_endpoint_types.3968324719 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 247707511 ps |
| CPU time | 1.15 seconds |
| Started | Aug 15 05:27:28 PM PDT 24 |
| Finished | Aug 15 05:27:29 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-6f3bce5c-a5fc-4264-b79a-f0116a158e58 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3968324719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.3968324719 |
| Directory | /workspace/0.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/0.usbdev_fifo_rst.2504178289 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 173209290 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:27:30 PM PDT 24 |
| Finished | Aug 15 05:27:31 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-6d4b114f-2b71-45b6-96c7-02c135c2b0dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25041 78289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_fifo_rst.2504178289 |
| Directory | /workspace/0.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_hiclk.3520306772 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 121191178287 ps |
| CPU time | 219.03 seconds |
| Started | Aug 15 05:27:26 PM PDT 24 |
| Finished | Aug 15 05:31:06 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-59738ba3-ca5d-47d6-bda9-955d7a294544 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3520306772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.3520306772 |
| Directory | /workspace/0.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_hiclk_max.2908694012 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 93168254259 ps |
| CPU time | 147.66 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:30:10 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-565dcff7-42f0-4e91-94e0-a73c21b78b08 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2908694012 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk_max.2908694012 |
| Directory | /workspace/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_loclk.1970649443 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 107122871992 ps |
| CPU time | 154.05 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-5b51bab9-69ff-4fb8-a05f-a04b3c0beee4 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1970649443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.1970649443 |
| Directory | /workspace/0.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_loclk_max.2578124015 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 82043366205 ps |
| CPU time | 126.98 seconds |
| Started | Aug 15 05:27:28 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207968 kb |
| Host | smart-59813b7e-80d1-44d7-8995-2fe47e65fa9c |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2578124015 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk_max.2578124015 |
| Directory | /workspace/0.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_phase.1999393143 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 96173608250 ps |
| CPU time | 162.83 seconds |
| Started | Aug 15 05:27:26 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207860 kb |
| Host | smart-2861bf5e-f13e-496e-b840-d503f88ea466 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19993 93143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_phase.1999393143 |
| Directory | /workspace/0.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_iso.464589741 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 203847452 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:27:33 PM PDT 24 |
| Finished | Aug 15 05:27:34 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-457c4f4d-fa23-4ec5-a829-93a674d856d3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=464589741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.464589741 |
| Directory | /workspace/0.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_stall.658353234 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 173349389 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a43db904-8d59-4604-bff5-6b9f99a8c87f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65835 3234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_stall.658353234 |
| Directory | /workspace/0.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_trans.2118877873 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 225201249 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 207328 kb |
| Host | smart-97b7217f-81ba-4268-82c2-fe96ede46496 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21188 77873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_trans.2118877873 |
| Directory | /workspace/0.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_invalid_sync.651162562 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 3994113881 ps |
| CPU time | 30 seconds |
| Started | Aug 15 05:27:26 PM PDT 24 |
| Finished | Aug 15 05:27:56 PM PDT 24 |
| Peak memory | 218016 kb |
| Host | smart-3810b9d1-360c-43a6-b500-470089d96fbe |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=651162562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.651162562 |
| Directory | /workspace/0.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/0.usbdev_iso_retraction.1916021327 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 8047276754 ps |
| CPU time | 58.24 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:28:30 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-c8e1db70-9768-48b4-aec3-451ffa97892c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1916021327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.1916021327 |
| Directory | /workspace/0.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_in_err.4200767418 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 158076968 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:27:31 PM PDT 24 |
| Finished | Aug 15 05:27:32 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cc49d3ce-09c3-4f54-83cd-e92f910d0cc7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42007 67418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_in_err.4200767418 |
| Directory | /workspace/0.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_out_err.3652603064 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 501121404 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:40 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-afb313d0-91f6-44c5-9232-c830f66797fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36526 03064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_out_err.3652603064 |
| Directory | /workspace/0.usbdev_link_out_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_resume.4216851347 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 33418902981 ps |
| CPU time | 49.51 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:28:33 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-2019a58d-b430-4d4e-9e61-5699c78a75ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42168 51347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_resume.4216851347 |
| Directory | /workspace/0.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_suspend.2452165165 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 9245639025 ps |
| CPU time | 12.82 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:51 PM PDT 24 |
| Peak memory | 207840 kb |
| Host | smart-a30374d1-d642-4207-84d4-f0525ce11376 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24521 65165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_suspend.2452165165 |
| Directory | /workspace/0.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/0.usbdev_low_speed_traffic.2991326388 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 5686534917 ps |
| CPU time | 62.71 seconds |
| Started | Aug 15 05:27:27 PM PDT 24 |
| Finished | Aug 15 05:28:30 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-2efded84-3c5b-4300-b70c-b4aecbf8db2e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2991326388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.2991326388 |
| Directory | /workspace/0.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_inter_pkt_delay.2009569509 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 3105125718 ps |
| CPU time | 93.23 seconds |
| Started | Aug 15 05:27:31 PM PDT 24 |
| Finished | Aug 15 05:29:05 PM PDT 24 |
| Peak memory | 217396 kb |
| Host | smart-75482c8e-b369-41a3-9da0-8666820ede44 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2009569509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.2009569509 |
| Directory | /workspace/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_length_in_transaction.444878120 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 259684542 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c0b2810e-08ed-480d-b4a4-36aa268ea98a |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=444878120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.444878120 |
| Directory | /workspace/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_length_out_transaction.3833865592 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 246843969 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:27:44 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-cee10fa6-9ba7-46eb-a9b4-c519a7549205 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38338 65592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.3833865592 |
| Directory | /workspace/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_non_iso_usb_traffic.867246628 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 2270028952 ps |
| CPU time | 64.96 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 217532 kb |
| Host | smart-6386cd98-052f-47a9-8507-b3a5f7c4876f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86724 6628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.867246628 |
| Directory | /workspace/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_usb_traffic.1945360898 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 2390832165 ps |
| CPU time | 26.18 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:28:01 PM PDT 24 |
| Peak memory | 217464 kb |
| Host | smart-f7bcbebb-f251-4bdb-a453-91ff78c06d4b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1945360898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.1945360898 |
| Directory | /workspace/0.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_inter_pkt_delay.1571119510 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 3208205408 ps |
| CPU time | 24.77 seconds |
| Started | Aug 15 05:27:39 PM PDT 24 |
| Finished | Aug 15 05:28:04 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-44eb7266-f31d-424f-a092-9fee0169f147 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1571119510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.1571119510 |
| Directory | /workspace/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_length_in_transaction.232595357 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 166035849 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:27:29 PM PDT 24 |
| Finished | Aug 15 05:27:30 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-b42c26de-f223-47f9-b778-34554c732cc7 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=232595357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.232595357 |
| Directory | /workspace/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_length_out_transaction.3219523814 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 191497294 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:27:31 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-04b09163-21f0-4b63-b632-cc74970b949e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32195 23814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.3219523814 |
| Directory | /workspace/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.650730064 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 483582440 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-303957e1-8c62-4511-808a-866298de2447 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65073 0064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.650730064 |
| Directory | /workspace/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_iso.769802490 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 184068003 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:27 PM PDT 24 |
| Finished | Aug 15 05:27:28 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-6fb9c588-93aa-4e88-92e4-b51dcd2403af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76980 2490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_iso.769802490 |
| Directory | /workspace/0.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_stall.1566303637 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 198598785 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:29 PM PDT 24 |
| Finished | Aug 15 05:27:30 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-7918f4a8-5501-4f9c-a212-9425976bd8b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15663 03637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_stall.1566303637 |
| Directory | /workspace/0.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_trans_nak.4030506823 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 196475663 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-5ff4baaa-df2d-4aa4-abe2-4f08af088f6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40305 06823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_trans_nak.4030506823 |
| Directory | /workspace/0.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/0.usbdev_pending_in_trans.1416717664 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 167707120 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:39 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-0dc9dfc5-c963-42ca-a9f3-388468ba4b3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14167 17664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pending_in_trans.1416717664 |
| Directory | /workspace/0.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.721760088 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 178732604 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-445b68c7-3660-4860-b3ff-03809ae76c80 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72176 0088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tg l+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.721760088 |
| Directory | /workspace/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_pinflip.4208833527 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 222629709 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:27:39 PM PDT 24 |
| Finished | Aug 15 05:27:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-69a1acb6-052b-4b54-9cd2-8dbf95945125 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4208833527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.4208833527 |
| Directory | /workspace/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_rand_bus_type.1931725297 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 208380033 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:27:29 PM PDT 24 |
| Finished | Aug 15 05:27:30 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-eb953d2c-0047-44a3-9fea-5daec7dec68d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19317 25297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.1931725297 |
| Directory | /workspace/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_rx_dp_dn.4014860314 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 217274872 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:27:33 PM PDT 24 |
| Finished | Aug 15 05:27:34 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-64684d0b-4cef-4173-92fd-fcee25789426 |
| User | root |
| Command | /workspace/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4014860314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ass ert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.4014860314 |
| Directory | /workspace/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_tx_use_d_se0.2704974965 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 234568719 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:27:34 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-b2be96b0-5302-4e81-9b05-6f271f0e3893 |
| User | root |
| Command | /workspace/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2704974965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ass ert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.2704974965 |
| Directory | /workspace/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_usb_ref_disable.2762487104 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 169733540 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:29 PM PDT 24 |
| Finished | Aug 15 05:27:30 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-9cbc751c-ee05-4170-9c94-6bad1e811b9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27624 87104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.2762487104 |
| Directory | /workspace/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_pins_sense.2964104796 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 52928478 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:27:25 PM PDT 24 |
| Finished | Aug 15 05:27:26 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e810d7b8-651d-4c6b-bf85-08a6024bb0ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29641 04796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.2964104796 |
| Directory | /workspace/0.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_buffer.2477960212 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 20240201285 ps |
| CPU time | 48.69 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:28:27 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-310d6a15-4915-4301-8849-f85aa009cc08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24779 60212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_buffer.2477960212 |
| Directory | /workspace/0.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_sent.2304449777 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 240633131 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:27:33 PM PDT 24 |
| Finished | Aug 15 05:27:34 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4881a814-79f9-43e1-9a0c-50651fd7fa20 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23044 49777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_sent.2304449777 |
| Directory | /workspace/0.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_bus_disconnects.534575351 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 1941061154 ps |
| CPU time | 12.97 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:51 PM PDT 24 |
| Peak memory | 217968 kb |
| Host | smart-d14263b7-94d1-4ae2-a53e-b79a2d4679d4 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=534575351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.534575351 |
| Directory | /workspace/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_bus_resets.1813146110 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 6834013182 ps |
| CPU time | 36.64 seconds |
| Started | Aug 15 05:27:29 PM PDT 24 |
| Finished | Aug 15 05:28:06 PM PDT 24 |
| Peak memory | 224128 kb |
| Host | smart-90e2a66b-0937-497b-a03d-9de1dae03f20 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1813146110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.1813146110 |
| Directory | /workspace/0.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_suspends.1164689896 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 13066886794 ps |
| CPU time | 78 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 224132 kb |
| Host | smart-4406924b-beaa-4cc5-8ef6-426c1cb47496 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1164689896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.1164689896 |
| Directory | /workspace/0.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/0.usbdev_random_length_in_transaction.2987556644 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 187483570 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:34 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-0aa61743-beef-4529-b1fb-9123a66c1ec5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29875 56644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_in_transaction.2987556644 |
| Directory | /workspace/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_random_length_out_transaction.1397969671 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 236013924 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:35 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-1beeef14-2502-476a-9c12-64b44ae345dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13979 69671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.1397969671 |
| Directory | /workspace/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_resume_link_active.4134515068 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 20155668569 ps |
| CPU time | 25.28 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:28:00 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-511e93cd-603b-4200-8b92-0b355d57ca89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41345 15068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_resume_link_active.4134515068 |
| Directory | /workspace/0.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_crc_err.3178473854 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 142316899 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-3c0fcf3d-5993-4bc7-9bd4-52fa7527a248 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31784 73854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_crc_err.3178473854 |
| Directory | /workspace/0.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_full.1458450446 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 254941847 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d7e23a43-baed-4622-8a8e-886b545fbe91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14584 50446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_full.1458450446 |
| Directory | /workspace/0.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_priority_over_stall_response.4169031819 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 198265136 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:36 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-29dafc13-f78f-4d0a-8f9a-78c271d371bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41690 31819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.4169031819 |
| Directory | /workspace/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_stage.3734077755 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 151664278 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:27:31 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-a98bc05a-8060-48b6-b2a6-a490bd237049 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37340 77755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_stage.3734077755 |
| Directory | /workspace/0.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_trans_ignored.648795241 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 150814737 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:33 PM PDT 24 |
| Finished | Aug 15 05:27:34 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8f6b7c90-afab-4e78-a987-7d043a65068e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64879 5241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_trans_ignored.648795241 |
| Directory | /workspace/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/0.usbdev_smoke.2832872757 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 207045154 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:27:36 PM PDT 24 |
| Finished | Aug 15 05:27:37 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4b212a0e-982e-4cd7-8ce9-4eda4f87351c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28328 72757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.2832872757 |
| Directory | /workspace/0.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/0.usbdev_spurious_pids_ignored.4113327527 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 3625428140 ps |
| CPU time | 29.76 seconds |
| Started | Aug 15 05:27:37 PM PDT 24 |
| Finished | Aug 15 05:28:07 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-9e31b216-09cf-420d-a889-2abeddaa73e9 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4113327527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.4113327527 |
| Directory | /workspace/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/0.usbdev_stall_priority_over_nak.648028257 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 166692306 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:27:39 PM PDT 24 |
| Finished | Aug 15 05:27:40 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-1041d7eb-84ac-405a-a396-7773e46e36b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64802 8257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.648028257 |
| Directory | /workspace/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/0.usbdev_stall_trans.1693311372 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 188827368 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:27:42 PM PDT 24 |
| Finished | Aug 15 05:27:43 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-768c1c6c-9c87-4a7c-89e6-45e0039e1b65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16933 11372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_trans.1693311372 |
| Directory | /workspace/0.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_stream_len_max.2938906429 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 1011999681 ps |
| CPU time | 2.31 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:40 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-50069585-f0f3-4b3c-98d4-3cdb1a70e55d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29389 06429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.2938906429 |
| Directory | /workspace/0.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_streaming_out.3966063028 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 2221801166 ps |
| CPU time | 61.1 seconds |
| Started | Aug 15 05:27:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-b62eaa63-d18b-4748-a188-34468a9fcd25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39660 63028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_streaming_out.3966063028 |
| Directory | /workspace/0.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/0.usbdev_stress_usb_traffic.3051306276 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 11490363666 ps |
| CPU time | 62.04 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-7768df73-ff36-44db-bac9-595c24fea52e |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3051306276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.3051306276 |
| Directory | /workspace/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_timeout_missing_host_handshake.4044753852 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 957192242 ps |
| CPU time | 18.26 seconds |
| Started | Aug 15 05:27:24 PM PDT 24 |
| Finished | Aug 15 05:27:43 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-4a3ef2e1-f843-406c-b572-5423df16b3b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4044753852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host _handshake.4044753852 |
| Directory | /workspace/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/0.usbdev_tx_rx_disruption.3171549099 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 556566468 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:27:43 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-f4eeeeca-5fac-4c05-9f09-03036897b98c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3171549099 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_tx_rx_disruption.3171549099 |
| Directory | /workspace/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/1.usbdev_alert_test.3866005997 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 36699032 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:27:52 PM PDT 24 |
| Finished | Aug 15 05:27:52 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-9603b20c-27b7-4ea5-bbc4-4c28f8ed861a |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3866005997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.3866005997 |
| Directory | /workspace/1.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_disconnect.2394190697 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 11318851194 ps |
| CPU time | 15.33 seconds |
| Started | Aug 15 05:27:37 PM PDT 24 |
| Finished | Aug 15 05:27:52 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-f0d3e9a1-c53f-4b20-89cf-5136eacb6271 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2394190697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_ao n_wake_disconnect.2394190697 |
| Directory | /workspace/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_reset.551234236 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 14758351658 ps |
| CPU time | 17.89 seconds |
| Started | Aug 15 05:27:28 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-95e386df-4ccc-4248-bd4d-f83e9635af41 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=551234236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.551234236 |
| Directory | /workspace/1.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_resume.752173142 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 23604539063 ps |
| CPU time | 37.14 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:28:15 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-a99e9478-287e-4a36-8c7c-6dfba1b08b91 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=752173142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon _wake_resume.752173142 |
| Directory | /workspace/1.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_buffer.3908883503 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 161626157 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:31 PM PDT 24 |
| Finished | Aug 15 05:27:32 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-b9a841c4-0868-4a1a-8780-02eefe86add8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39088 83503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_buffer.3908883503 |
| Directory | /workspace/1.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/1.usbdev_bitstuff_err.532253446 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 146309920 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:27:33 PM PDT 24 |
| Finished | Aug 15 05:27:34 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f5b4b046-2129-4c06-ab1a-c3ae029b848e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53225 3446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_bitstuff_err.532253446 |
| Directory | /workspace/1.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_data_toggle_clear.1944896566 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 242247994 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:27:30 PM PDT 24 |
| Finished | Aug 15 05:27:31 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-2273c634-3dcf-43cb-843c-71a847519c14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19448 96566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_clear.1944896566 |
| Directory | /workspace/1.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/1.usbdev_data_toggle_restore.3015567645 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 727974777 ps |
| CPU time | 2.06 seconds |
| Started | Aug 15 05:27:30 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-60c7f44a-1cb3-43e6-8dd2-b5b07160b7a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3015567645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.3015567645 |
| Directory | /workspace/1.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/1.usbdev_device_address.743711261 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 35624718728 ps |
| CPU time | 55.18 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-c524a743-e4ec-409d-aa0c-56ec7c66bf61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74371 1261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.743711261 |
| Directory | /workspace/1.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/1.usbdev_device_timeout.2305437978 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 665083506 ps |
| CPU time | 5.25 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-436e66cc-6053-4652-a3ed-95b831c563c7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2305437978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.2305437978 |
| Directory | /workspace/1.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/1.usbdev_disable_endpoint.2232711649 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 376437769 ps |
| CPU time | 1.25 seconds |
| Started | Aug 15 05:27:35 PM PDT 24 |
| Finished | Aug 15 05:27:37 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7631864b-2541-4995-bc79-96064b96eb8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22327 11649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disable_endpoint.2232711649 |
| Directory | /workspace/1.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/1.usbdev_disconnected.548401948 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 144573078 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:27:44 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-3c243a27-a0af-4b8e-9ddd-4ed5844a8f32 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54840 1948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disconnected.548401948 |
| Directory | /workspace/1.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/1.usbdev_enable.756186908 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 40583344 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:27:37 PM PDT 24 |
| Finished | Aug 15 05:27:38 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-dc33835d-6c4e-44e5-b074-d1a60b20119e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75618 6908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_enable.756186908 |
| Directory | /workspace/1.usbdev_enable/latest |
| Test location | /workspace/coverage/default/1.usbdev_endpoint_access.697714620 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 903883799 ps |
| CPU time | 2.31 seconds |
| Started | Aug 15 05:27:30 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-ecfa17b9-7507-4faf-b4ad-15daccf6f083 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69771 4620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.697714620 |
| Directory | /workspace/1.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/1.usbdev_endpoint_types.2130901521 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 198118202 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:27:45 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-57bc5f1a-cc00-4c0e-8b7a-ac448109387e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2130901521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.2130901521 |
| Directory | /workspace/1.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/1.usbdev_fifo_rst.4005554035 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 375126287 ps |
| CPU time | 2.55 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:41 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-e50808a6-d662-497e-9adb-c7316239571e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40055 54035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_fifo_rst.4005554035 |
| Directory | /workspace/1.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_hiclk.3971972729 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 107183641796 ps |
| CPU time | 163.23 seconds |
| Started | Aug 15 05:27:35 PM PDT 24 |
| Finished | Aug 15 05:30:18 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-1889e20f-51e7-47b9-bf4d-1ee625105222 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3971972729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.3971972729 |
| Directory | /workspace/1.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_hiclk_max.4289584392 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 97042789747 ps |
| CPU time | 144.8 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-d4cd9daf-5b71-41b7-aa90-a0827d20b2d3 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4289584392 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk_max.4289584392 |
| Directory | /workspace/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_loclk.3252001108 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 98107972248 ps |
| CPU time | 160.29 seconds |
| Started | Aug 15 05:27:30 PM PDT 24 |
| Finished | Aug 15 05:30:10 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-93abf47a-6fe7-4729-9a66-6e7eef268f60 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3252001108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.3252001108 |
| Directory | /workspace/1.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_loclk_max.4218377488 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 120096703228 ps |
| CPU time | 213.48 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-96bd7a4b-d771-4ce5-b728-a5a9684fe03f |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4218377488 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk_max.4218377488 |
| Directory | /workspace/1.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_phase.149579643 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 95173757370 ps |
| CPU time | 152.29 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-581ce58d-91d8-4031-9212-8798fd25c351 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14957 9643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_phase.149579643 |
| Directory | /workspace/1.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_iso.4178806580 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 211383101 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:27:37 PM PDT 24 |
| Finished | Aug 15 05:27:38 PM PDT 24 |
| Peak memory | 215740 kb |
| Host | smart-ada9b80b-aa8e-48fa-82ea-43ad0b169efa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4178806580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.4178806580 |
| Directory | /workspace/1.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_stall.476752258 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 142155185 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:51 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-db2fd6dc-65fe-4676-9656-b926d946432e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47675 2258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_stall.476752258 |
| Directory | /workspace/1.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_trans.1831633201 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 156747901 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:39 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-8087b8a1-5955-41c1-9be2-84b72b9bc73e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18316 33201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_trans.1831633201 |
| Directory | /workspace/1.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_invalid_sync.2734108582 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 3615168548 ps |
| CPU time | 34.54 seconds |
| Started | Aug 15 05:27:35 PM PDT 24 |
| Finished | Aug 15 05:28:10 PM PDT 24 |
| Peak memory | 217072 kb |
| Host | smart-95e0c4ee-22aa-41d7-b783-51dff8a8f333 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2734108582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.2734108582 |
| Directory | /workspace/1.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/1.usbdev_iso_retraction.1130480423 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 7415098264 ps |
| CPU time | 48.96 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-579c54dd-e25b-4c41-9c94-a67a1226fba3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1130480423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.1130480423 |
| Directory | /workspace/1.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_in_err.3899368159 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 182748401 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-580bb55c-ebae-45be-9475-55c52d59651b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38993 68159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_in_err.3899368159 |
| Directory | /workspace/1.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_resume.576885042 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 26702730231 ps |
| CPU time | 31.31 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:28:09 PM PDT 24 |
| Peak memory | 215856 kb |
| Host | smart-66bfa68e-1c6d-4606-aab3-fa42b0e306c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57688 5042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_resume.576885042 |
| Directory | /workspace/1.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_suspend.3514858249 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 5865125149 ps |
| CPU time | 7.9 seconds |
| Started | Aug 15 05:27:37 PM PDT 24 |
| Finished | Aug 15 05:27:45 PM PDT 24 |
| Peak memory | 216772 kb |
| Host | smart-d07cfad4-07b4-4907-8fb5-e6b4162115f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35148 58249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_suspend.3514858249 |
| Directory | /workspace/1.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_inter_pkt_delay.1159673098 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 2147827817 ps |
| CPU time | 63.8 seconds |
| Started | Aug 15 05:27:37 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 217236 kb |
| Host | smart-dd740476-c8f3-46f8-8bc0-76621941c06b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1159673098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1159673098 |
| Directory | /workspace/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_length_in_transaction.1891210899 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 256364400 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:27:33 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-75a8791d-2858-46e0-8610-58efd86de274 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1891210899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.1891210899 |
| Directory | /workspace/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_length_out_transaction.671121990 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 189206452 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:27:42 PM PDT 24 |
| Finished | Aug 15 05:27:43 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-f3e1ed66-f796-4059-8792-414dc883b564 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67112 1990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.671121990 |
| Directory | /workspace/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_non_iso_usb_traffic.2618033403 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 2887362343 ps |
| CPU time | 85.1 seconds |
| Started | Aug 15 05:27:32 PM PDT 24 |
| Finished | Aug 15 05:28:57 PM PDT 24 |
| Peak memory | 224052 kb |
| Host | smart-72ac00f8-6164-477f-a15e-2fa30606efec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26180 33403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.2618033403 |
| Directory | /workspace/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_usb_traffic.2528219969 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 2894708306 ps |
| CPU time | 31.37 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:28:13 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-a94ada23-ee93-44d3-b465-6ec5e825adc8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2528219969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.2528219969 |
| Directory | /workspace/1.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_inter_pkt_delay.1301736867 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 2145990720 ps |
| CPU time | 21.79 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:28:00 PM PDT 24 |
| Peak memory | 217208 kb |
| Host | smart-4face815-fecc-44a1-b9c9-89ccbca2adb2 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1301736867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.1301736867 |
| Directory | /workspace/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_length_in_transaction.972080484 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 166410408 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:27:42 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-59125ece-336e-4c44-8e88-9e681f97bac6 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=972080484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.972080484 |
| Directory | /workspace/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_length_out_transaction.2330383331 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 211733979 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a6708756-a1dc-4d16-b740-aa424aecec5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23303 83331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.2330383331 |
| Directory | /workspace/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_nak_trans.724351067 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 223920552 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:27:31 PM PDT 24 |
| Finished | Aug 15 05:27:32 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-b6f5f220-81ed-4865-abf6-ded846bd1385 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72435 1067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_nak_trans.724351067 |
| Directory | /workspace/1.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_iso.2791559899 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 152226637 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:39 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-d26ec5dc-6c11-4c8f-83e8-abc8f9956c89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27915 59899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_iso.2791559899 |
| Directory | /workspace/1.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_stall.1348419341 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 181146516 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-9fdee28a-a0ea-4cdf-b524-be10e28749a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13484 19341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_stall.1348419341 |
| Directory | /workspace/1.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_trans_nak.1267809972 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 162998114 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:27:35 PM PDT 24 |
| Finished | Aug 15 05:27:37 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-3d0349fd-d48f-49d0-af15-641e6f403043 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12678 09972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_trans_nak.1267809972 |
| Directory | /workspace/1.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/1.usbdev_pending_in_trans.3989966684 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 167384966 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:35 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-6998d791-61f6-430f-95f9-a50ef9ba0e69 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39899 66684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pending_in_trans.3989966684 |
| Directory | /workspace/1.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_pinflip.3663863097 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 289375489 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:39 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-a24d65d5-b037-4896-a91e-ecc42598b02e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3663863097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.3663863097 |
| Directory | /workspace/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_rand_bus_type.1199349043 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 209203941 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:27:45 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6a5ed601-2db5-49de-af32-8b792222eabf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11993 49043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.1199349043 |
| Directory | /workspace/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_pins_sense.1036852063 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 61629967 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:27:42 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c066f7e3-c6cb-4823-ac12-58404794f5fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10368 52063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.1036852063 |
| Directory | /workspace/1.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_buffer.1601692411 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 18767613997 ps |
| CPU time | 45.02 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:28:32 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-dcfd1ea6-9f2d-4855-822a-ecee63a37e88 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16016 92411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_buffer.1601692411 |
| Directory | /workspace/1.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_received.1549528756 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 201262183 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-7dc1600f-4245-4243-81ff-5c91ffbfd806 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15495 28756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_received.1549528756 |
| Directory | /workspace/1.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_sent.2844819587 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 202192408 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-3506a7d5-66bc-4e25-be33-fb2d958a1b74 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28448 19587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_sent.2844819587 |
| Directory | /workspace/1.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_bus_disconnects.3245548196 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 2523406200 ps |
| CPU time | 24.19 seconds |
| Started | Aug 15 05:27:39 PM PDT 24 |
| Finished | Aug 15 05:28:03 PM PDT 24 |
| Peak memory | 224044 kb |
| Host | smart-b3f7b4f1-c10c-4d3b-86fb-1b0d513e12a2 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3245548196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.3245548196 |
| Directory | /workspace/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_suspends.3773774936 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 9154921968 ps |
| CPU time | 45.19 seconds |
| Started | Aug 15 05:27:40 PM PDT 24 |
| Finished | Aug 15 05:28:25 PM PDT 24 |
| Peak memory | 224060 kb |
| Host | smart-872f3960-2689-406b-a0fe-7424914a5697 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3773774936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.3773774936 |
| Directory | /workspace/1.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/1.usbdev_random_length_in_transaction.149754351 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 155746791 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:27:44 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-4c50bd33-55df-4002-9fa6-f9cdc850d1ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14975 4351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_in_transaction.149754351 |
| Directory | /workspace/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_random_length_out_transaction.2109115418 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 153266150 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:27:45 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-6d3605ed-9b7c-4264-aeb2-050c67c2387a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21091 15418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.2109115418 |
| Directory | /workspace/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_resume_link_active.3224022535 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 20187264936 ps |
| CPU time | 25.03 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:28:11 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-43469805-e04c-43ee-834e-063c0ca9e7e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32240 22535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_resume_link_active.3224022535 |
| Directory | /workspace/1.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_crc_err.1542282905 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 176179253 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-c69bf84d-8a4d-42fb-9c8e-ac6de629f1fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15422 82905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_crc_err.1542282905 |
| Directory | /workspace/1.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_full.1318138625 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 265724298 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:27:34 PM PDT 24 |
| Finished | Aug 15 05:27:36 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-8b9351fb-35e2-4225-9e7c-afe5fb2fa82b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13181 38625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_full.1318138625 |
| Directory | /workspace/1.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_pid_err.2396371701 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 154537156 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:27:42 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-e6f00dea-b4f7-4239-b5a9-8c5006cc0440 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23963 71701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_pid_err.2396371701 |
| Directory | /workspace/1.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_sec_cm.1889092028 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 322949464 ps |
| CPU time | 1.16 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 223164 kb |
| Host | smart-c3764080-def0-423b-9059-bb994c0ffac5 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1889092028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.1889092028 |
| Directory | /workspace/1.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_priority.2689824027 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 377598239 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:27:42 PM PDT 24 |
| Finished | Aug 15 05:27:43 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-923ec532-fa51-4fc6-a334-e67458c5bc71 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26898 24027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.2689824027 |
| Directory | /workspace/1.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_priority_over_stall_response.3092283990 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 366928335 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:27:42 PM PDT 24 |
| Peak memory | 207280 kb |
| Host | smart-e071af28-dcc0-4c7c-9280-bdc032df9f17 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30922 83990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.3092283990 |
| Directory | /workspace/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_stage.4199083502 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 150327108 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:27:51 PM PDT 24 |
| Peak memory | 207316 kb |
| Host | smart-514e18c9-67a5-4636-a72d-0d33ddc25238 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41990 83502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_stage.4199083502 |
| Directory | /workspace/1.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_trans_ignored.3206460794 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 154372060 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8ff79afb-fa7d-4fd6-a774-dfa19985b79e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32064 60794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_trans_ignored.3206460794 |
| Directory | /workspace/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/1.usbdev_smoke.2148093545 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 232476924 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-ae1ce6e4-718a-46a5-8057-00e74089b736 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21480 93545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.2148093545 |
| Directory | /workspace/1.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/1.usbdev_spurious_pids_ignored.1815544171 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 2960536275 ps |
| CPU time | 24.55 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:28:08 PM PDT 24 |
| Peak memory | 224012 kb |
| Host | smart-dd00ed2c-1935-4eb6-9d6d-4f58f3e2e31b |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1815544171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.1815544171 |
| Directory | /workspace/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/1.usbdev_stall_priority_over_nak.2534028682 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 152270879 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:42 PM PDT 24 |
| Finished | Aug 15 05:27:43 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-2675beeb-e709-4c9e-8774-623f0d90b356 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25340 28682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.2534028682 |
| Directory | /workspace/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/1.usbdev_stall_trans.1701283563 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 173331311 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:38 PM PDT 24 |
| Finished | Aug 15 05:27:39 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-f16b6461-a2e2-420c-995e-b41c69c147b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17012 83563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_trans.1701283563 |
| Directory | /workspace/1.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_stream_len_max.792976630 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 229269911 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-8ff1ea49-bc55-4a25-b456-7c9b6ea1cf5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79297 6630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.792976630 |
| Directory | /workspace/1.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_streaming_out.1246381834 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 3775850923 ps |
| CPU time | 110.52 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 217184 kb |
| Host | smart-65097c2a-b40c-4a66-beb1-ec5459cbaec3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12463 81834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_streaming_out.1246381834 |
| Directory | /workspace/1.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/1.usbdev_stress_usb_traffic.894072845 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 6734058844 ps |
| CPU time | 33.89 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 219136 kb |
| Host | smart-37b9ff9d-ea8a-411c-a23c-7b1798b03c66 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=894072845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.894072845 |
| Directory | /workspace/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_timeout_missing_host_handshake.2391692395 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 839960792 ps |
| CPU time | 5.49 seconds |
| Started | Aug 15 05:27:35 PM PDT 24 |
| Finished | Aug 15 05:27:40 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-52e02d08-e6d5-41ec-9c91-68b5f87e399e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2391692395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host _handshake.2391692395 |
| Directory | /workspace/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/1.usbdev_tx_rx_disruption.2344713758 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 558140328 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:27:43 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c72a4209-79cd-440f-a31d-7b8adb6eebb8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2344713758 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_tx_rx_disruption.2344713758 |
| Directory | /workspace/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/10.usbdev_alert_test.3299077042 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 78466268 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:29:13 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-448e13ed-2c88-404d-ae74-5b46474856bd |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3299077042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.3299077042 |
| Directory | /workspace/10.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_disconnect.3415127662 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 4474897391 ps |
| CPU time | 6.45 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:21 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-f2f22cc4-6b23-4f1c-8697-0b887c494c68 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3415127662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_a on_wake_disconnect.3415127662 |
| Directory | /workspace/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_reset.3247862502 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 13994861474 ps |
| CPU time | 16.9 seconds |
| Started | Aug 15 05:29:04 PM PDT 24 |
| Finished | Aug 15 05:29:26 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-a0a64327-a343-4ede-8e57-eb3fc29c9e15 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3247862502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.3247862502 |
| Directory | /workspace/10.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_resume.615650447 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 30649919848 ps |
| CPU time | 37.24 seconds |
| Started | Aug 15 05:29:07 PM PDT 24 |
| Finished | Aug 15 05:29:44 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-54c5faa0-d534-4f31-9632-3e29635a383a |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=615650447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_ao n_wake_resume.615650447 |
| Directory | /workspace/10.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/10.usbdev_av_buffer.420477074 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 193654749 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:29:08 PM PDT 24 |
| Finished | Aug 15 05:29:10 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-1f7139a0-c311-4eca-b5f6-9888fa8422d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42047 7074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_av_buffer.420477074 |
| Directory | /workspace/10.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/10.usbdev_bitstuff_err.616647509 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 148904241 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-71289bb7-78fe-43a0-96cc-acb34f2f0d3f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61664 7509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_bitstuff_err.616647509 |
| Directory | /workspace/10.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_data_toggle_clear.186158229 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 429756362 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:29:07 PM PDT 24 |
| Finished | Aug 15 05:29:09 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-6694e27a-e581-43e3-beb6-e0d4fd16425f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18615 8229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_clear.186158229 |
| Directory | /workspace/10.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/10.usbdev_data_toggle_restore.912224470 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 381533759 ps |
| CPU time | 1.21 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-bd981334-84e5-47a0-94da-23448839f4e9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=912224470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.912224470 |
| Directory | /workspace/10.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/10.usbdev_device_address.2694541387 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 42637264218 ps |
| CPU time | 62.5 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-f7b0b22d-9534-428e-842a-40a2f0ab188d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26945 41387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.2694541387 |
| Directory | /workspace/10.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/10.usbdev_device_timeout.1153274800 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 1540191379 ps |
| CPU time | 13.43 seconds |
| Started | Aug 15 05:29:15 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-6c79916c-3d73-4b59-9ad1-f2f4b690408f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1153274800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.1153274800 |
| Directory | /workspace/10.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/10.usbdev_disable_endpoint.780992442 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 526193894 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-998b4eef-b7d5-4ea3-abc9-a5cb8f6a0022 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78099 2442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disable_endpoint.780992442 |
| Directory | /workspace/10.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/10.usbdev_enable.17295186 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 48682349 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-cc8ea6f0-3e1d-4aa3-be4a-6888a3b3647e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17295 186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_enable.17295186 |
| Directory | /workspace/10.usbdev_enable/latest |
| Test location | /workspace/coverage/default/10.usbdev_endpoint_access.2141840048 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 821360207 ps |
| CPU time | 2.1 seconds |
| Started | Aug 15 05:29:07 PM PDT 24 |
| Finished | Aug 15 05:29:09 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-5cc0ff60-2721-45ab-963d-dbd9d65e257c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21418 40048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.2141840048 |
| Directory | /workspace/10.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/10.usbdev_endpoint_types.3225016926 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 672580468 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:29:08 PM PDT 24 |
| Finished | Aug 15 05:29:09 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-813a51ed-3da4-481b-8ad8-004b7ec8e698 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3225016926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.3225016926 |
| Directory | /workspace/10.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_iso.1052710429 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 185400920 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-2b629fd7-4001-4add-92a0-f826610cd33d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1052710429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.1052710429 |
| Directory | /workspace/10.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_stall.2812128476 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 144105172 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:29:11 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c025bf78-8206-41fc-8ae0-b438a34f6830 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28121 28476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_stall.2812128476 |
| Directory | /workspace/10.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_trans.2632532523 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 206298634 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ecb06f8a-7137-45a6-94f9-483157af4343 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26325 32523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_trans.2632532523 |
| Directory | /workspace/10.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_invalid_sync.3277369060 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 4118718969 ps |
| CPU time | 33.86 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:46 PM PDT 24 |
| Peak memory | 224116 kb |
| Host | smart-9104a9c2-6208-4309-92f3-ae02fdf394d0 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3277369060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.3277369060 |
| Directory | /workspace/10.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/10.usbdev_iso_retraction.3912748200 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 11447982563 ps |
| CPU time | 79.32 seconds |
| Started | Aug 15 05:29:22 PM PDT 24 |
| Finished | Aug 15 05:30:41 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-a25525bc-9fa6-40fa-99af-1fa8eab91576 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3912748200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.3912748200 |
| Directory | /workspace/10.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_in_err.3373864269 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 191968473 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:29:24 PM PDT 24 |
| Finished | Aug 15 05:29:25 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-9bf46b90-4f05-4134-8c67-7b307779e626 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33738 64269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_in_err.3373864269 |
| Directory | /workspace/10.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_resume.551268920 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 23878384457 ps |
| CPU time | 38.8 seconds |
| Started | Aug 15 05:29:20 PM PDT 24 |
| Finished | Aug 15 05:29:59 PM PDT 24 |
| Peak memory | 216052 kb |
| Host | smart-f0545c45-68ba-4ec9-86c2-7588096eb850 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55126 8920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_resume.551268920 |
| Directory | /workspace/10.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_suspend.1718730665 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 4712387886 ps |
| CPU time | 7.34 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:37 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-4fa2919e-aa64-4553-a334-739809ee39c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17187 30665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_suspend.1718730665 |
| Directory | /workspace/10.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_inter_pkt_delay.3694419693 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 3848035910 ps |
| CPU time | 40.92 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:53 PM PDT 24 |
| Peak memory | 215868 kb |
| Host | smart-9230d586-54c9-4297-889f-531311e57679 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3694419693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.3694419693 |
| Directory | /workspace/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_length_in_transaction.1540170405 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 257223122 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:15 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-66202cec-1961-4c60-a94e-f48f9daa6e55 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1540170405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.1540170405 |
| Directory | /workspace/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_length_out_transaction.3077416717 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 196275853 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-3e3a045f-02df-4c3c-ac99-79cae490e7c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30774 16717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.3077416717 |
| Directory | /workspace/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_non_iso_usb_traffic.3847257524 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 3147276203 ps |
| CPU time | 91.43 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:31:02 PM PDT 24 |
| Peak memory | 217836 kb |
| Host | smart-0a31e7b1-33e3-4ef2-a531-9860b1e846de |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38472 57524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.3847257524 |
| Directory | /workspace/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_usb_traffic.1680731154 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 2676537159 ps |
| CPU time | 22.19 seconds |
| Started | Aug 15 05:29:13 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 218684 kb |
| Host | smart-a503de1f-89fd-463e-ae84-10408c79e86e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1680731154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.1680731154 |
| Directory | /workspace/10.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_inter_pkt_delay.2317496358 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 2838336577 ps |
| CPU time | 21.64 seconds |
| Started | Aug 15 05:29:17 PM PDT 24 |
| Finished | Aug 15 05:29:39 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-cd90882c-1d5f-48e1-b1cb-9225b16af6f0 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2317496358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.2317496358 |
| Directory | /workspace/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_length_in_transaction.2636811582 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 168076043 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c577b43f-8a88-4b99-acb4-073ea9af5019 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2636811582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.2636811582 |
| Directory | /workspace/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_length_out_transaction.2030158292 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 147622043 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:22 PM PDT 24 |
| Finished | Aug 15 05:29:23 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-52fad7a6-d5ca-4371-acbc-f12108262f1c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20301 58292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.2030158292 |
| Directory | /workspace/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_iso.386916274 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 215206458 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:29:16 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4ad8a010-fc9d-4084-a5c0-35b2b39ec33f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38691 6274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_iso.386916274 |
| Directory | /workspace/10.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_stall.175537340 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 197614726 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:29:22 PM PDT 24 |
| Finished | Aug 15 05:29:23 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-984fd72d-19d7-4f42-a951-c54388daa3b7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17553 7340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_stall.175537340 |
| Directory | /workspace/10.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_trans_nak.2365768034 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 183397123 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:08 PM PDT 24 |
| Finished | Aug 15 05:29:10 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-bc42ec28-857f-4abf-a401-14bab66b70f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23657 68034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_trans_nak.2365768034 |
| Directory | /workspace/10.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/10.usbdev_pending_in_trans.4210950053 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 148896403 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:29:22 PM PDT 24 |
| Finished | Aug 15 05:29:23 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-3bcb43b4-2dce-45e7-8c64-80042bac38a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42109 50053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pending_in_trans.4210950053 |
| Directory | /workspace/10.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_config_pinflip.853536725 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 197498402 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-cfe72265-9c8b-4bec-b873-d61d09bc0a1c |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=853536725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.853536725 |
| Directory | /workspace/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_config_usb_ref_disable.2800503359 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 165155446 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:29:15 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-e893aefd-724a-483c-aa9d-538a12189a35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28005 03359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.2800503359 |
| Directory | /workspace/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_pins_sense.2122283908 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 71897458 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:29:25 PM PDT 24 |
| Finished | Aug 15 05:29:26 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-d2e3ae94-ebd7-4b44-86cf-d07297b40315 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21222 83908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.2122283908 |
| Directory | /workspace/10.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_buffer.93470914 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 7946430350 ps |
| CPU time | 20.1 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-bd23f712-0d41-4d56-9c28-5ecf00798f5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93470 914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_buffer.93470914 |
| Directory | /workspace/10.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_received.1968742352 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 193313625 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:28 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-bca43f4e-03c0-4fe0-b22c-09c7956a10ed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19687 42352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_received.1968742352 |
| Directory | /workspace/10.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_sent.4001214663 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 206078979 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:29:16 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-7d639f27-fb89-4561-8029-0df543a5b500 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40012 14663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_sent.4001214663 |
| Directory | /workspace/10.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/10.usbdev_random_length_in_transaction.1462071394 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 195961312 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:29:16 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-afd9d2d0-f9f9-4953-9c1a-460dd1a73df5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14620 71394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_in_transaction.1462071394 |
| Directory | /workspace/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_random_length_out_transaction.3792896202 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 196419928 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:29:15 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-aa5bc973-9810-4f05-aa40-3fef15b728f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37928 96202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.3792896202 |
| Directory | /workspace/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_resume_link_active.4285185251 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 20159133736 ps |
| CPU time | 23.36 seconds |
| Started | Aug 15 05:29:23 PM PDT 24 |
| Finished | Aug 15 05:29:47 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-06781de2-38d1-4b19-9a91-a6e4957cbd12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42851 85251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_resume_link_active.4285185251 |
| Directory | /workspace/10.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/10.usbdev_rx_crc_err.1710919327 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 176699021 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:13 PM PDT 24 |
| Finished | Aug 15 05:29:14 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-38c3cf3a-e410-4444-a06a-6e66650baa75 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17109 19327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_rx_crc_err.1710919327 |
| Directory | /workspace/10.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_rx_full.3827656796 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 247545128 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-17f5a27f-f641-41f9-a3db-991a5e760a7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38276 56796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_rx_full.3827656796 |
| Directory | /workspace/10.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/10.usbdev_setup_stage.3519109546 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 153058385 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:29:15 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-a0503dbb-3a44-4207-a1ab-71f71a6af1f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35191 09546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_setup_stage.3519109546 |
| Directory | /workspace/10.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/10.usbdev_setup_trans_ignored.658235963 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 154425389 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-764e5019-e7ee-4c98-b20a-159daa047cb0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65823 5963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_setup_trans_ignored.658235963 |
| Directory | /workspace/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/10.usbdev_smoke.4146150654 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 221807264 ps |
| CPU time | 1.14 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:14 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-9cc4fd19-f18b-46f0-9eee-26f356b9d528 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41461 50654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.4146150654 |
| Directory | /workspace/10.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/10.usbdev_spurious_pids_ignored.730661374 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 2272242922 ps |
| CPU time | 65.32 seconds |
| Started | Aug 15 05:29:18 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-2457f51b-0a63-4d48-a053-56e0326ed4db |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=730661374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.730661374 |
| Directory | /workspace/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/10.usbdev_stall_priority_over_nak.2758329439 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 150621489 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:13 PM PDT 24 |
| Finished | Aug 15 05:29:14 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-25fcf06d-a78b-41ee-a798-b3cfcd64277a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27583 29439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.2758329439 |
| Directory | /workspace/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/10.usbdev_stall_trans.182303122 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 176724300 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:15 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-6c24a32b-d5b3-401a-a9c6-d28c9d4fe7f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18230 3122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_trans.182303122 |
| Directory | /workspace/10.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_stream_len_max.1441653402 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 678697312 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:14 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-5f10afef-a97e-430d-96db-374a0b7e0a64 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14416 53402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.1441653402 |
| Directory | /workspace/10.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/10.usbdev_streaming_out.2568017364 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 2415685535 ps |
| CPU time | 24.72 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:55 PM PDT 24 |
| Peak memory | 217640 kb |
| Host | smart-42cb77ea-5bba-4f8c-a526-55015920b44f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25680 17364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_streaming_out.2568017364 |
| Directory | /workspace/10.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/10.usbdev_timeout_missing_host_handshake.704198449 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 570946912 ps |
| CPU time | 11.91 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:24 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-d6a8e20c-69d5-4477-98dc-e03b8185632a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=704198449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host _handshake.704198449 |
| Directory | /workspace/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/10.usbdev_tx_rx_disruption.2425215023 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 577226621 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:29:09 PM PDT 24 |
| Finished | Aug 15 05:29:11 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b0560ada-a7cd-4244-8d48-24d3a8a28ba4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2425215023 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_tx_rx_disruption.2425215023 |
| Directory | /workspace/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/100.usbdev_endpoint_types.1448567157 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 184368162 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-bec7d22e-8bc2-4164-b6f7-9093e2bcfabe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1448567157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.1448567157 |
| Directory | /workspace/100.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/100.usbdev_tx_rx_disruption.1075446451 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 461425242 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-a112382a-65b1-4fd2-bba7-2c219c491704 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1075446451 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 100.usbdev_tx_rx_disruption.1075446451 |
| Directory | /workspace/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/101.usbdev_endpoint_types.1546640771 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 468589787 ps |
| CPU time | 1.26 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-bcf20f29-09f6-43a4-b9b3-37c15aa69d06 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1546640771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1546640771 |
| Directory | /workspace/101.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/101.usbdev_tx_rx_disruption.3114365167 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 469757029 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-973588c7-8b14-4cdd-be27-b0bad8ba3a57 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3114365167 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 101.usbdev_tx_rx_disruption.3114365167 |
| Directory | /workspace/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/102.usbdev_endpoint_types.151220303 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 584987646 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-0b6b7b8f-d84d-4c5f-ae73-b127cabf47ed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=151220303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.151220303 |
| Directory | /workspace/102.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/102.usbdev_tx_rx_disruption.2825405844 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 593806662 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:35:00 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-f8791fd5-b662-40d4-9769-3215fd81851e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2825405844 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 102.usbdev_tx_rx_disruption.2825405844 |
| Directory | /workspace/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/103.usbdev_endpoint_types.3724348191 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 432864073 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3ced9e14-1d8e-4f04-b217-a3805d5e4c2c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3724348191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.3724348191 |
| Directory | /workspace/103.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/103.usbdev_tx_rx_disruption.2591119700 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 528503282 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:34:58 PM PDT 24 |
| Finished | Aug 15 05:35:00 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-f794cf07-4e40-4dbc-adba-12ec71983087 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2591119700 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 103.usbdev_tx_rx_disruption.2591119700 |
| Directory | /workspace/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/104.usbdev_endpoint_types.2557480173 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 237089787 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:35:02 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c59168ed-979b-47ff-9d59-3214a4a2ddcd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2557480173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.2557480173 |
| Directory | /workspace/104.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/104.usbdev_tx_rx_disruption.2165274896 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 551048926 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:10 PM PDT 24 |
| Finished | Aug 15 05:35:12 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-fb4e2c88-17a0-40ec-8c81-71b08a2a7c89 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2165274896 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 104.usbdev_tx_rx_disruption.2165274896 |
| Directory | /workspace/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/105.usbdev_tx_rx_disruption.1596178001 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 646835164 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:09 PM PDT 24 |
| Finished | Aug 15 05:35:10 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-a141fef5-436a-48c1-a1ca-78a4e8af6580 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1596178001 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 105.usbdev_tx_rx_disruption.1596178001 |
| Directory | /workspace/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/106.usbdev_tx_rx_disruption.4129130419 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 567045078 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:13 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-e70e53d1-b509-4785-a922-b53ca6bab638 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4129130419 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 106.usbdev_tx_rx_disruption.4129130419 |
| Directory | /workspace/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/107.usbdev_tx_rx_disruption.307576508 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 556910993 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-0e50c50d-2acc-44af-995f-aa0c2d1d2230 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=307576508 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 107.usbdev_tx_rx_disruption.307576508 |
| Directory | /workspace/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/108.usbdev_tx_rx_disruption.1394686359 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 438011599 ps |
| CPU time | 1.43 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-5419e85b-059d-4983-babe-888ded4b7ee5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1394686359 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 108.usbdev_tx_rx_disruption.1394686359 |
| Directory | /workspace/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/109.usbdev_endpoint_types.152646038 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 305327749 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:01 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-fdd8a7c8-2e48-419e-85d6-faa81f60370a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=152646038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.152646038 |
| Directory | /workspace/109.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/109.usbdev_tx_rx_disruption.3346817710 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 496628873 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:01 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-33ff1e97-4633-42d1-896f-fe876eb6375a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3346817710 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 109.usbdev_tx_rx_disruption.3346817710 |
| Directory | /workspace/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/11.usbdev_alert_test.2009776919 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 73334921 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-c6dd4f89-6859-46af-bd1a-c91c8bbd9533 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2009776919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.2009776919 |
| Directory | /workspace/11.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_disconnect.941842138 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 5110399300 ps |
| CPU time | 7.39 seconds |
| Started | Aug 15 05:29:17 PM PDT 24 |
| Finished | Aug 15 05:29:24 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-3c9e12d0-4fde-4c03-935a-f85428007e90 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=941842138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_ao n_wake_disconnect.941842138 |
| Directory | /workspace/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_reset.3781914743 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 15956235339 ps |
| CPU time | 19.48 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-1ad97371-5d69-4790-b3f8-04a773f75915 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3781914743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.3781914743 |
| Directory | /workspace/11.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_resume.3665752373 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 23411435709 ps |
| CPU time | 28.29 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:41 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-cb44fb17-20ea-44ba-b6fc-87284406603b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3665752373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_a on_wake_resume.3665752373 |
| Directory | /workspace/11.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/11.usbdev_av_buffer.1355400587 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 149256837 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-6c2b684a-8b01-416c-978a-2e7bd3dde3d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13554 00587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_av_buffer.1355400587 |
| Directory | /workspace/11.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/11.usbdev_bitstuff_err.126860453 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 145516440 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:28 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ac73dcd2-7529-4a7e-8b2a-37673c77e51c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12686 0453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_bitstuff_err.126860453 |
| Directory | /workspace/11.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_data_toggle_clear.842708773 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 563370779 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:29:23 PM PDT 24 |
| Finished | Aug 15 05:29:25 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-1382194a-976c-47e9-941a-2061e224f9b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84270 8773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_clear.842708773 |
| Directory | /workspace/11.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/11.usbdev_data_toggle_restore.221132431 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 854799336 ps |
| CPU time | 2.25 seconds |
| Started | Aug 15 05:29:13 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-4bf1cb3a-2ed5-4dc8-b57a-bd71447b5601 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=221132431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.221132431 |
| Directory | /workspace/11.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/11.usbdev_device_address.1532814102 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 35223532210 ps |
| CPU time | 51.31 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:30:19 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-8c306a94-b50f-4ae7-bf4b-b4a19187ffbd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15328 14102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.1532814102 |
| Directory | /workspace/11.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/11.usbdev_device_timeout.380216764 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 4968693236 ps |
| CPU time | 34.22 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:30:01 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-7825d2ed-374f-473c-aa93-c5b7bce4881e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=380216764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.380216764 |
| Directory | /workspace/11.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/11.usbdev_disable_endpoint.808736009 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 878677274 ps |
| CPU time | 2.07 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-bee3d962-4ceb-4b11-afd0-6112018264b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80873 6009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_disable_endpoint.808736009 |
| Directory | /workspace/11.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/11.usbdev_disconnected.2865426013 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 149387905 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:15 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-89dd2fa0-10a5-4488-9a56-2e09d61b853c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28654 26013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_disconnected.2865426013 |
| Directory | /workspace/11.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/11.usbdev_enable.2649448442 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 49874853 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:29:26 PM PDT 24 |
| Finished | Aug 15 05:29:27 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-fe929a3d-5047-4eb8-a809-618b2d454602 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26494 48442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_enable.2649448442 |
| Directory | /workspace/11.usbdev_enable/latest |
| Test location | /workspace/coverage/default/11.usbdev_endpoint_access.2308450538 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 910883250 ps |
| CPU time | 2.56 seconds |
| Started | Aug 15 05:29:25 PM PDT 24 |
| Finished | Aug 15 05:29:28 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-ac0295e4-4bd5-42af-902d-39cc851e3871 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23084 50538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.2308450538 |
| Directory | /workspace/11.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/11.usbdev_fifo_rst.94990513 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 260309871 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:29:21 PM PDT 24 |
| Finished | Aug 15 05:29:23 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-6813b355-390e-42fc-a53c-b4de0f455ea4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94990 513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_fifo_rst.94990513 |
| Directory | /workspace/11.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_iso.1098846922 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 223860250 ps |
| CPU time | 1.16 seconds |
| Started | Aug 15 05:29:21 PM PDT 24 |
| Finished | Aug 15 05:29:22 PM PDT 24 |
| Peak memory | 215796 kb |
| Host | smart-416d8592-d645-4f91-818a-b8fab2fd086a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1098846922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.1098846922 |
| Directory | /workspace/11.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_stall.1029523871 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 135391442 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:29:16 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-84268b8f-1110-492c-ae20-91dcfb31924e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10295 23871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_stall.1029523871 |
| Directory | /workspace/11.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_trans.223528828 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 158717994 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-cf2ba064-3e20-418b-8e74-bc4cf536d06c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22352 8828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_trans.223528828 |
| Directory | /workspace/11.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_invalid_sync.3290209987 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 4139122128 ps |
| CPU time | 117.09 seconds |
| Started | Aug 15 05:29:25 PM PDT 24 |
| Finished | Aug 15 05:31:22 PM PDT 24 |
| Peak memory | 217620 kb |
| Host | smart-b5779481-808b-4526-ab93-a9ca23ce67d0 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3290209987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.3290209987 |
| Directory | /workspace/11.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/11.usbdev_iso_retraction.2095449333 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 4197050200 ps |
| CPU time | 28.45 seconds |
| Started | Aug 15 05:29:16 PM PDT 24 |
| Finished | Aug 15 05:29:44 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-c6fa57d1-1cd3-42ab-96ad-2c5d2a78c582 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2095449333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.2095449333 |
| Directory | /workspace/11.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_in_err.4089160467 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 217921394 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-05888aec-8d93-4f83-b47e-78586555c5bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40891 60467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_in_err.4089160467 |
| Directory | /workspace/11.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_resume.2914382416 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 35224626050 ps |
| CPU time | 56.3 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-6834162c-8b16-4d2c-85d1-69cca6dd4ee4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29143 82416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_resume.2914382416 |
| Directory | /workspace/11.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_suspend.1226431196 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 3356090562 ps |
| CPU time | 4.97 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:37 PM PDT 24 |
| Peak memory | 216064 kb |
| Host | smart-1879a6eb-165d-45d6-8074-e75f06a211fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12264 31196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_suspend.1226431196 |
| Directory | /workspace/11.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/11.usbdev_low_speed_traffic.3896693731 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 4449923828 ps |
| CPU time | 40.29 seconds |
| Started | Aug 15 05:29:26 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-508ec8ef-e858-4494-85c7-348e85de95f4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3896693731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.3896693731 |
| Directory | /workspace/11.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_inter_pkt_delay.4257301748 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 3178727443 ps |
| CPU time | 23.49 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:53 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-03f812bd-da9e-4add-bf82-da3cd74edef6 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4257301748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.4257301748 |
| Directory | /workspace/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_length_in_transaction.2136137777 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 251111157 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:29:22 PM PDT 24 |
| Finished | Aug 15 05:29:23 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-fc9fb134-62fb-4b74-84c2-8581791fab8d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2136137777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.2136137777 |
| Directory | /workspace/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_length_out_transaction.2959431170 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 209742368 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-967a574b-bea4-4bfb-ac3d-80958cd83ac5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29594 31170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.2959431170 |
| Directory | /workspace/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_non_iso_usb_traffic.746037797 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 2295921445 ps |
| CPU time | 16.74 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-98788f54-82a4-469d-86d9-569c03faa121 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74603 7797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.746037797 |
| Directory | /workspace/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_usb_traffic.2715370559 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 2299180651 ps |
| CPU time | 16.9 seconds |
| Started | Aug 15 05:29:24 PM PDT 24 |
| Finished | Aug 15 05:29:41 PM PDT 24 |
| Peak memory | 217516 kb |
| Host | smart-67074b29-2a8d-44c0-9205-361af8a4302d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2715370559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.2715370559 |
| Directory | /workspace/11.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_inter_pkt_delay.2194786187 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 2591865986 ps |
| CPU time | 75.74 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-5b50edd2-2567-429b-9118-6ec615d3d0ed |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2194786187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.2194786187 |
| Directory | /workspace/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_length_in_transaction.3676753585 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 159857877 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:29:20 PM PDT 24 |
| Finished | Aug 15 05:29:21 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-70dfc7ea-8adb-40a5-a8db-993bc1f35566 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3676753585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.3676753585 |
| Directory | /workspace/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_length_out_transaction.963509453 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 147782640 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-dbfc9947-8b2c-4b64-a3ff-ffc577c3c356 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96350 9453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.963509453 |
| Directory | /workspace/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_iso.4283291803 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 168912157 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-d958ae37-10c9-475b-a21b-80f272eaa257 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42832 91803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_iso.4283291803 |
| Directory | /workspace/11.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_stall.977028479 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 234362318 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-5a38588a-e31e-4a35-91ce-fced8c37bbc3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97702 8479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_stall.977028479 |
| Directory | /workspace/11.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_trans_nak.129495338 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 196775823 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-56c90fc9-9ec2-4cf1-8ce7-b92b273a6564 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12949 5338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_trans_nak.129495338 |
| Directory | /workspace/11.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/11.usbdev_pending_in_trans.3765872862 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 160483914 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-d922cf4e-0680-47ec-83d0-5f3ea673aaf1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37658 72862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pending_in_trans.3765872862 |
| Directory | /workspace/11.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_config_pinflip.2682761874 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 278016738 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:28 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-093cffb2-3c96-40b0-9379-fa3ffb4096a5 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2682761874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.2682761874 |
| Directory | /workspace/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_config_usb_ref_disable.3906854801 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 155597319 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:23 PM PDT 24 |
| Finished | Aug 15 05:29:24 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-37551263-e826-4f23-a5e3-f7c45a0ec049 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39068 54801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.3906854801 |
| Directory | /workspace/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_pins_sense.1046095912 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 100683124 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-75f69ce9-d276-4ed5-88cf-0df22aa1a8ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10460 95912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.1046095912 |
| Directory | /workspace/11.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_buffer.3169900463 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 8812164174 ps |
| CPU time | 22.16 seconds |
| Started | Aug 15 05:29:22 PM PDT 24 |
| Finished | Aug 15 05:29:44 PM PDT 24 |
| Peak memory | 224128 kb |
| Host | smart-fcf81539-feda-460b-b5cf-a1af6fba87de |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31699 00463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_buffer.3169900463 |
| Directory | /workspace/11.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_received.158228502 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 165155681 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:29:22 PM PDT 24 |
| Finished | Aug 15 05:29:23 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e6f49cfc-8c56-4ec4-a179-4753c32e165d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15822 8502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_received.158228502 |
| Directory | /workspace/11.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_sent.2358678104 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 227600538 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:29:22 PM PDT 24 |
| Finished | Aug 15 05:29:23 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-c01d0aaa-23f7-4aaf-8b99-856873fd53e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23586 78104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_sent.2358678104 |
| Directory | /workspace/11.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/11.usbdev_random_length_in_transaction.2342777034 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 183897008 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:28 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-7c693e70-0fb0-4892-b307-1feee22ece9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23427 77034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_in_transaction.2342777034 |
| Directory | /workspace/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_random_length_out_transaction.3059060225 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 194332965 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-33a1b4d5-7072-4361-ad9d-5d46d33e7844 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30590 60225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.3059060225 |
| Directory | /workspace/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_resume_link_active.553505773 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 20189208871 ps |
| CPU time | 26.78 seconds |
| Started | Aug 15 05:29:24 PM PDT 24 |
| Finished | Aug 15 05:29:51 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-b2709fac-307d-4b87-9ba8-0830539f51bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55350 5773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_resume_link_active.553505773 |
| Directory | /workspace/11.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/11.usbdev_rx_crc_err.1647098842 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 195193925 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-840862d2-8a9d-4522-8497-afb7f8b227bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16470 98842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_rx_crc_err.1647098842 |
| Directory | /workspace/11.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_rx_full.3474160814 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 258866910 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-fb69ba5c-73d2-41df-96ce-402b13d92ba5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34741 60814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_rx_full.3474160814 |
| Directory | /workspace/11.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/11.usbdev_setup_stage.4156932960 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 151699283 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c811d487-857c-4a83-91af-073d6b6be976 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41569 32960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_setup_stage.4156932960 |
| Directory | /workspace/11.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/11.usbdev_setup_trans_ignored.973227940 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 161048910 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:28 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-581c4501-1b77-465f-972c-ed34422e4fd3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97322 7940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_setup_trans_ignored.973227940 |
| Directory | /workspace/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/11.usbdev_smoke.2635050713 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 241808510 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-ab4d9725-f613-4707-84e7-fb18d44f7046 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26350 50713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.2635050713 |
| Directory | /workspace/11.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/11.usbdev_spurious_pids_ignored.818239674 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 2573329337 ps |
| CPU time | 19.55 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:50 PM PDT 24 |
| Peak memory | 217752 kb |
| Host | smart-b2894890-3033-437e-bd37-0676ade2c8f6 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=818239674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.818239674 |
| Directory | /workspace/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/11.usbdev_stall_priority_over_nak.3313224158 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 170376589 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-84a4c1e0-0a69-491b-a0e5-997b2f5c00e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33132 24158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.3313224158 |
| Directory | /workspace/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/11.usbdev_stall_trans.3319562263 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 202178684 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-892fcaa6-7ae3-483c-9041-3dbbaa5af01a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33195 62263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_trans.3319562263 |
| Directory | /workspace/11.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_stream_len_max.2099650583 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 1116826204 ps |
| CPU time | 2.73 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-6ca534fb-821c-4bd3-aeec-7a6daaf42672 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20996 50583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.2099650583 |
| Directory | /workspace/11.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/11.usbdev_streaming_out.2057143160 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 2171343841 ps |
| CPU time | 60.84 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-f438e16f-fc74-469d-a82d-00b5063500f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20571 43160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_streaming_out.2057143160 |
| Directory | /workspace/11.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/11.usbdev_timeout_missing_host_handshake.1235418353 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 668776673 ps |
| CPU time | 5.21 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:19 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-ae84df12-edc9-450b-81a8-049f327f9c64 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1235418353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_hos t_handshake.1235418353 |
| Directory | /workspace/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/11.usbdev_tx_rx_disruption.2701528985 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 521184194 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-9f43f1b9-8cbb-4f62-9176-014586e3ff3e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2701528985 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_tx_rx_disruption.2701528985 |
| Directory | /workspace/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/110.usbdev_endpoint_types.4237636150 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 292892280 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-a3167be2-434f-4d86-96cc-99bf3693bb4c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4237636150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.4237636150 |
| Directory | /workspace/110.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/110.usbdev_tx_rx_disruption.4095315639 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 516157740 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:34:59 PM PDT 24 |
| Finished | Aug 15 05:35:01 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-f3efa015-a7f7-4d05-9362-ca9378a2bee6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4095315639 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 110.usbdev_tx_rx_disruption.4095315639 |
| Directory | /workspace/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/111.usbdev_tx_rx_disruption.3444663918 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 502823609 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:35:10 PM PDT 24 |
| Peak memory | 207944 kb |
| Host | smart-6ec74978-a537-480c-8649-c6b9adfaea96 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3444663918 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 111.usbdev_tx_rx_disruption.3444663918 |
| Directory | /workspace/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/112.usbdev_endpoint_types.2792035269 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 515360331 ps |
| CPU time | 1.39 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-79eb4e4e-990d-4d5c-a2ed-8c3d967cd7ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2792035269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.2792035269 |
| Directory | /workspace/112.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/112.usbdev_tx_rx_disruption.1561618303 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 460612841 ps |
| CPU time | 1.43 seconds |
| Started | Aug 15 05:35:07 PM PDT 24 |
| Finished | Aug 15 05:35:09 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-6dc12d71-a06d-47a9-b8be-1c281e9194fb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1561618303 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 112.usbdev_tx_rx_disruption.1561618303 |
| Directory | /workspace/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/113.usbdev_endpoint_types.3594397569 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 522850708 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:35:06 PM PDT 24 |
| Finished | Aug 15 05:35:07 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-c3dc8d72-47f5-43c4-b6c7-c721d2d766f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3594397569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.3594397569 |
| Directory | /workspace/113.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/113.usbdev_tx_rx_disruption.1645191945 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 616112672 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:35:10 PM PDT 24 |
| Finished | Aug 15 05:35:12 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-8b8a24a0-e686-4f10-883b-d65a261349b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1645191945 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 113.usbdev_tx_rx_disruption.1645191945 |
| Directory | /workspace/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/114.usbdev_endpoint_types.2741933639 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 326742775 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-a19c9646-3bf8-4dd5-87e6-2d32a9b7dcf4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2741933639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.2741933639 |
| Directory | /workspace/114.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/114.usbdev_tx_rx_disruption.1889449515 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 482954252 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-2fec7073-e517-46e4-89c3-bded51e43daa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1889449515 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 114.usbdev_tx_rx_disruption.1889449515 |
| Directory | /workspace/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/115.usbdev_endpoint_types.4259414139 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 463466775 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:35:23 PM PDT 24 |
| Finished | Aug 15 05:35:24 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-b9106b8e-7ebf-4a49-b7b5-3b0bc38e1ca7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4259414139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.4259414139 |
| Directory | /workspace/115.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/116.usbdev_endpoint_types.2930389518 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 361687445 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:35:06 PM PDT 24 |
| Finished | Aug 15 05:35:07 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-1eda55e8-c4bf-43ed-9d06-9a96846b0851 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2930389518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.2930389518 |
| Directory | /workspace/116.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/116.usbdev_tx_rx_disruption.2320954202 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 641633575 ps |
| CPU time | 1.87 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-061e7a0a-450b-42f4-b2ec-17bd6012d4cd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2320954202 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 116.usbdev_tx_rx_disruption.2320954202 |
| Directory | /workspace/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/117.usbdev_endpoint_types.53636796 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 510128283 ps |
| CPU time | 1.37 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3fe2b37f-4b3c-45e1-a401-7b5a5cbe9aed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=53636796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.53636796 |
| Directory | /workspace/117.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/117.usbdev_tx_rx_disruption.3561764683 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 493664775 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:01 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-e6ffab1b-9c36-409f-9e29-f5c85e4b8a0b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3561764683 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 117.usbdev_tx_rx_disruption.3561764683 |
| Directory | /workspace/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/118.usbdev_endpoint_types.454041977 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 620102921 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:34:55 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b587aef2-3d77-4faa-ab34-327929d7d852 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=454041977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.454041977 |
| Directory | /workspace/118.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/118.usbdev_tx_rx_disruption.2066767768 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 592424133 ps |
| CPU time | 1.81 seconds |
| Started | Aug 15 05:35:13 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-1ca9d2c9-f85f-4bc4-b00b-c7be6a1f6ba4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2066767768 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 118.usbdev_tx_rx_disruption.2066767768 |
| Directory | /workspace/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/119.usbdev_tx_rx_disruption.134716690 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 604293131 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:12 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-0e8a9e56-e1cc-45ba-942d-3e5d40b1ae2f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=134716690 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 119.usbdev_tx_rx_disruption.134716690 |
| Directory | /workspace/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/12.usbdev_alert_test.3506210139 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 56223386 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:29:24 PM PDT 24 |
| Finished | Aug 15 05:29:25 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-ab2dc367-5ede-418b-b492-0c5ae1937036 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3506210139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.3506210139 |
| Directory | /workspace/12.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_disconnect.121929609 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 3930612157 ps |
| CPU time | 5.44 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:38 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-4ffa903b-12d9-4c3e-9401-cf16218666ac |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=121929609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_ao n_wake_disconnect.121929609 |
| Directory | /workspace/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_reset.410047106 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 18846197482 ps |
| CPU time | 28.42 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:30:00 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-ceb5213e-9e4a-45da-a669-704ed3b9ab59 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=410047106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.410047106 |
| Directory | /workspace/12.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_resume.2004109523 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 24241131305 ps |
| CPU time | 30.29 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:59 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-423571ca-7ff1-4555-8a90-3f897071e627 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2004109523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_a on_wake_resume.2004109523 |
| Directory | /workspace/12.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/12.usbdev_av_buffer.2032608049 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 158423427 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-889e5db9-cc6a-4b0b-9dad-abc73bbb88f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20326 08049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_av_buffer.2032608049 |
| Directory | /workspace/12.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/12.usbdev_bitstuff_err.3788299567 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 140395525 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-45042982-125d-4835-9dab-242cb8a21ffa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37882 99567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_bitstuff_err.3788299567 |
| Directory | /workspace/12.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_data_toggle_clear.861049919 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 604247055 ps |
| CPU time | 1.88 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-5e22827e-c5ce-4071-815c-aaf38a2f124d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86104 9919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_clear.861049919 |
| Directory | /workspace/12.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/12.usbdev_data_toggle_restore.2343927024 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 1171506802 ps |
| CPU time | 3.31 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-df84ecfb-f6df-4773-a4e9-5450710c1ab2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2343927024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.2343927024 |
| Directory | /workspace/12.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/12.usbdev_device_timeout.517712227 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 7772687858 ps |
| CPU time | 50.16 seconds |
| Started | Aug 15 05:29:23 PM PDT 24 |
| Finished | Aug 15 05:30:13 PM PDT 24 |
| Peak memory | 207848 kb |
| Host | smart-20ee52a3-a4e6-4eb3-ba46-f2afc0e26021 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=517712227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.517712227 |
| Directory | /workspace/12.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/12.usbdev_disable_endpoint.344153781 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 764539839 ps |
| CPU time | 1.85 seconds |
| Started | Aug 15 05:29:24 PM PDT 24 |
| Finished | Aug 15 05:29:26 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-ab05e1de-8181-4e6b-b259-48bddb658e96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34415 3781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disable_endpoint.344153781 |
| Directory | /workspace/12.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/12.usbdev_disconnected.3305230435 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 141955463 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:24 PM PDT 24 |
| Finished | Aug 15 05:29:25 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-42912dcf-2f5c-4afe-89a5-d70f9d52b4c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33052 30435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disconnected.3305230435 |
| Directory | /workspace/12.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/12.usbdev_enable.745960854 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 50626005 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:29:21 PM PDT 24 |
| Finished | Aug 15 05:29:22 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-b4fe8cfb-68d5-49d8-ae2d-2558da692979 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74596 0854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_enable.745960854 |
| Directory | /workspace/12.usbdev_enable/latest |
| Test location | /workspace/coverage/default/12.usbdev_endpoint_access.1979432364 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 975631290 ps |
| CPU time | 2.69 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-1aecdd30-a94a-4bfc-9160-f370a315370a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19794 32364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.1979432364 |
| Directory | /workspace/12.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/12.usbdev_endpoint_types.1536043049 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 544545846 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-352ca51c-e03a-4b20-918e-c8d8d23a148a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1536043049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.1536043049 |
| Directory | /workspace/12.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/12.usbdev_fifo_rst.1620853229 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 365094041 ps |
| CPU time | 2.63 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-b4048c88-89ae-4f24-82c7-0704366790bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16208 53229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_fifo_rst.1620853229 |
| Directory | /workspace/12.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_iso.3504252142 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 252382165 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-195289f0-0a93-47bf-b8cc-3d4e4a9fdad7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3504252142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.3504252142 |
| Directory | /workspace/12.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_stall.2504054828 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 162124982 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cac76847-1bdf-4e0d-b428-497c4a2f110b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25040 54828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_stall.2504054828 |
| Directory | /workspace/12.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_trans.3933313605 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 243934412 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:29:24 PM PDT 24 |
| Finished | Aug 15 05:29:25 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-8b8a0823-0ccf-4e7c-8992-297a0d35c7e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39333 13605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_trans.3933313605 |
| Directory | /workspace/12.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_invalid_sync.1387325252 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 4091550808 ps |
| CPU time | 40.09 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 217628 kb |
| Host | smart-be48aa3d-063d-4171-867a-87fdbb4650b2 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1387325252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.1387325252 |
| Directory | /workspace/12.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/12.usbdev_iso_retraction.2905262083 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 8145265355 ps |
| CPU time | 50.86 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-32e41c68-4527-4504-b625-7ebaf966650d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2905262083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.2905262083 |
| Directory | /workspace/12.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_in_err.641615887 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 195388723 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-1d87d5c2-4f6c-4f1e-946b-9c1902802bbd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64161 5887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_in_err.641615887 |
| Directory | /workspace/12.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_resume.2912589440 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 28776955944 ps |
| CPU time | 44 seconds |
| Started | Aug 15 05:29:26 PM PDT 24 |
| Finished | Aug 15 05:30:10 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-0ea7bfec-5368-40c7-99fc-9bf0bbd98e1f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29125 89440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_resume.2912589440 |
| Directory | /workspace/12.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_suspend.823223734 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 11213113556 ps |
| CPU time | 17.26 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:45 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-685ff565-9e02-4d63-abb9-d1ace6fe5a1f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82322 3734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_suspend.823223734 |
| Directory | /workspace/12.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/12.usbdev_low_speed_traffic.459078773 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 3590759648 ps |
| CPU time | 106.6 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 224056 kb |
| Host | smart-1c4a4cf3-18f9-4638-a9e2-ae1a60853e37 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=459078773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.459078773 |
| Directory | /workspace/12.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_inter_pkt_delay.2445444789 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 2288005988 ps |
| CPU time | 23.32 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:53 PM PDT 24 |
| Peak memory | 217268 kb |
| Host | smart-3d721ab4-1af2-435f-a052-eef226b7db50 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2445444789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.2445444789 |
| Directory | /workspace/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_length_in_transaction.1606055250 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 287492075 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-40d7e936-e89a-4061-8881-3ac322fcf84d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1606055250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.1606055250 |
| Directory | /workspace/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_length_out_transaction.922535158 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 184418588 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-75dcae7e-c501-4652-94eb-8c9b5161a493 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92253 5158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.922535158 |
| Directory | /workspace/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_non_iso_usb_traffic.2190671742 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 2877806177 ps |
| CPU time | 22.6 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:52 PM PDT 24 |
| Peak memory | 224024 kb |
| Host | smart-81b885a8-6cc5-457d-8873-d27f7ff88f4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21906 71742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.2190671742 |
| Directory | /workspace/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_usb_traffic.993156777 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 2258141088 ps |
| CPU time | 24.22 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:55 PM PDT 24 |
| Peak memory | 217316 kb |
| Host | smart-0d7a2b76-479f-48a2-9df7-1157cef7ff1b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=993156777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.993156777 |
| Directory | /workspace/12.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_inter_pkt_delay.937554945 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 2267402355 ps |
| CPU time | 18.51 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:49 PM PDT 24 |
| Peak memory | 217496 kb |
| Host | smart-867d544f-2b85-424e-9cb1-446089436bf2 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=937554945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.937554945 |
| Directory | /workspace/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_length_in_transaction.620874823 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 182477806 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a7055bf8-1414-476c-aa55-fdbdd16ea300 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=620874823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.620874823 |
| Directory | /workspace/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_length_out_transaction.3262578995 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 144142549 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-fd61d8f6-0456-4bf3-8fdf-f9471e032865 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32625 78995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.3262578995 |
| Directory | /workspace/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_iso.3356297258 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 199128581 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:29:24 PM PDT 24 |
| Finished | Aug 15 05:29:25 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-97f62428-7283-49c1-9619-9098451c51fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33562 97258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_iso.3356297258 |
| Directory | /workspace/12.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_stall.4274630641 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 167289224 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:36 PM PDT 24 |
| Finished | Aug 15 05:29:37 PM PDT 24 |
| Peak memory | 207276 kb |
| Host | smart-12a0e3e4-b55c-49c5-8bc8-b17f3c9a60d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42746 30641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_stall.4274630641 |
| Directory | /workspace/12.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_trans_nak.4128812977 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 164150595 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-36255eb0-5320-47b7-bfbe-1f304dc66225 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41288 12977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_trans_nak.4128812977 |
| Directory | /workspace/12.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/12.usbdev_pending_in_trans.3603152754 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 177495310 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-f4566da6-6aae-4830-8108-f31765e3bd83 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36031 52754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pending_in_trans.3603152754 |
| Directory | /workspace/12.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_config_pinflip.59238516 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 305863669 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207212 kb |
| Host | smart-b6412fed-c7f7-4468-a26f-020cb57c5e97 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=59238516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.59238516 |
| Directory | /workspace/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_config_usb_ref_disable.64226154 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 158616924 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-bd7183c0-5edb-4508-b1c0-5ceb3f8acac4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64226 154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.64226154 |
| Directory | /workspace/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_pins_sense.977465017 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 48049934 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-f531c818-e12a-4ade-a65a-9d77db76878d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97746 5017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.977465017 |
| Directory | /workspace/12.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_buffer.1603589682 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 18520624363 ps |
| CPU time | 47.88 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-5d8dcbcc-91bb-40d8-93e0-99976d0e33a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16035 89682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_buffer.1603589682 |
| Directory | /workspace/12.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_received.674817593 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 201326160 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c7be8a77-52f0-4dae-8e00-95f03b47d03c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67481 7593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_received.674817593 |
| Directory | /workspace/12.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_sent.2278617787 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 174461292 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-8655b87a-bb7e-49d4-9af8-95c9fa1ceba8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22786 17787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_sent.2278617787 |
| Directory | /workspace/12.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/12.usbdev_random_length_in_transaction.2928407976 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 199878001 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a8a2e143-e4ec-439f-888b-e88f7a5b03d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29284 07976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_in_transaction.2928407976 |
| Directory | /workspace/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_random_length_out_transaction.2545797138 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 214897466 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-9ea26352-dccd-493a-9f85-36e90e232d46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25457 97138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.2545797138 |
| Directory | /workspace/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_resume_link_active.2391320880 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 20157086355 ps |
| CPU time | 23.06 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:53 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-2c98af16-4edb-4a5f-a118-d4467b1aea21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23913 20880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_resume_link_active.2391320880 |
| Directory | /workspace/12.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/12.usbdev_rx_crc_err.1575008584 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 147666111 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207324 kb |
| Host | smart-f6524764-36f9-4d26-adf3-adee98fe3887 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15750 08584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_rx_crc_err.1575008584 |
| Directory | /workspace/12.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_rx_full.456934833 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 272332433 ps |
| CPU time | 1.24 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:28 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-cc3a53ae-67d7-49d4-8ded-d5d1ff52705d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45693 4833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_rx_full.456934833 |
| Directory | /workspace/12.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/12.usbdev_setup_stage.537358312 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 150231758 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:36 PM PDT 24 |
| Finished | Aug 15 05:29:37 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-1e6c284b-e5e8-4fbc-8e1f-dad5a0872eba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53735 8312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_setup_stage.537358312 |
| Directory | /workspace/12.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/12.usbdev_setup_trans_ignored.607388236 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 153770206 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-cba22c6a-8f91-4084-876e-61d31ade9965 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60738 8236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_setup_trans_ignored.607388236 |
| Directory | /workspace/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/12.usbdev_smoke.790034214 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 211350780 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:29:37 PM PDT 24 |
| Finished | Aug 15 05:29:38 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-56bf25ce-d0cb-4ae6-a3a9-7afd4c0ea1fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79003 4214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.790034214 |
| Directory | /workspace/12.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/12.usbdev_spurious_pids_ignored.516664500 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 3318683698 ps |
| CPU time | 33.08 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:30:07 PM PDT 24 |
| Peak memory | 223996 kb |
| Host | smart-1e3f347c-e429-46e6-950d-3463327ffb72 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=516664500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.516664500 |
| Directory | /workspace/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/12.usbdev_stall_priority_over_nak.111245742 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 188301774 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 206400 kb |
| Host | smart-c2f0be25-ad94-44f2-8ba9-008ce96a0f80 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11124 5742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.111245742 |
| Directory | /workspace/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/12.usbdev_stall_trans.3146266182 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 181408918 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-4d83821d-8b8d-4475-b511-4e79e95ef8db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31462 66182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_trans.3146266182 |
| Directory | /workspace/12.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_stream_len_max.3732827892 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 413556177 ps |
| CPU time | 1.32 seconds |
| Started | Aug 15 05:29:25 PM PDT 24 |
| Finished | Aug 15 05:29:27 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-4af57493-e855-4ae3-bb98-99b5efae5f49 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37328 27892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.3732827892 |
| Directory | /workspace/12.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/12.usbdev_streaming_out.96955589 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 4013623555 ps |
| CPU time | 114.37 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 215856 kb |
| Host | smart-dd3361a3-938b-4844-97ba-58c00a6b1917 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96955 589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_streaming_out.96955589 |
| Directory | /workspace/12.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/12.usbdev_timeout_missing_host_handshake.419141599 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 157325637 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:29:28 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-08d1e33a-6702-472a-9365-2629aa05f1fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=419141599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host _handshake.419141599 |
| Directory | /workspace/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/12.usbdev_tx_rx_disruption.2636493776 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 499755408 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-788ec09b-d725-452f-8d21-26837376002e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2636493776 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_tx_rx_disruption.2636493776 |
| Directory | /workspace/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/120.usbdev_endpoint_types.351568648 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 504555612 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0cee6b83-83ca-4260-832e-996e320c1b40 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=351568648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.351568648 |
| Directory | /workspace/120.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/120.usbdev_tx_rx_disruption.3582603069 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 487166202 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-c46de012-d790-448a-a6f7-a94345f3b916 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3582603069 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 120.usbdev_tx_rx_disruption.3582603069 |
| Directory | /workspace/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/121.usbdev_tx_rx_disruption.1035676380 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 481488866 ps |
| CPU time | 1.4 seconds |
| Started | Aug 15 05:35:06 PM PDT 24 |
| Finished | Aug 15 05:35:07 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-4b5d8b7a-6afd-4885-8670-b4d28dfcfa28 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1035676380 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 121.usbdev_tx_rx_disruption.1035676380 |
| Directory | /workspace/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/122.usbdev_tx_rx_disruption.72798984 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 515461684 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-42cef7de-5177-480b-9e88-52c3297e3cef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72798984 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 122.usbdev_tx_rx_disruption.72798984 |
| Directory | /workspace/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/123.usbdev_endpoint_types.34934943 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 675450427 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:03 PM PDT 24 |
| Finished | Aug 15 05:35:04 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ae3636a8-40b0-41fc-a048-ef795e6287a3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=34934943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.34934943 |
| Directory | /workspace/123.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/123.usbdev_tx_rx_disruption.4163334758 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 546902187 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:34:55 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-7f8c066e-2eb8-4fd2-86f4-5e0a3991b559 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4163334758 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 123.usbdev_tx_rx_disruption.4163334758 |
| Directory | /workspace/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/124.usbdev_endpoint_types.871702552 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 494895835 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-0536274a-7463-44c0-b5c9-c587aa906d9d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=871702552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.871702552 |
| Directory | /workspace/124.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/124.usbdev_tx_rx_disruption.3614583712 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 443338455 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-2e9826a9-9e10-4431-8521-b2ea663c93d9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3614583712 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 124.usbdev_tx_rx_disruption.3614583712 |
| Directory | /workspace/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/125.usbdev_endpoint_types.1892958346 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 337547759 ps |
| CPU time | 1.2 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:52 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1c16f83c-7a15-46df-9ba6-23b59abdcb85 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1892958346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.1892958346 |
| Directory | /workspace/125.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/125.usbdev_tx_rx_disruption.2148480177 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 463591868 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:35:02 PM PDT 24 |
| Finished | Aug 15 05:35:04 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-71936305-59aa-4585-9a80-2c515dcc0bf7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2148480177 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 125.usbdev_tx_rx_disruption.2148480177 |
| Directory | /workspace/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/126.usbdev_endpoint_types.2119241274 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 264781089 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:35:09 PM PDT 24 |
| Finished | Aug 15 05:35:10 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-23022851-2666-4168-9c13-4ae2f01ab049 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2119241274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.2119241274 |
| Directory | /workspace/126.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/126.usbdev_tx_rx_disruption.291357252 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 639704667 ps |
| CPU time | 1.88 seconds |
| Started | Aug 15 05:35:20 PM PDT 24 |
| Finished | Aug 15 05:35:22 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-97bd1e5c-ed88-4a5e-b8d1-8abf94c39b91 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=291357252 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 126.usbdev_tx_rx_disruption.291357252 |
| Directory | /workspace/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/127.usbdev_tx_rx_disruption.3928745457 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 586181459 ps |
| CPU time | 1.78 seconds |
| Started | Aug 15 05:35:12 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-0ed5f53d-aae1-41f7-aee5-2c1d67fa4feb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3928745457 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 127.usbdev_tx_rx_disruption.3928745457 |
| Directory | /workspace/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/128.usbdev_endpoint_types.1290118728 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 401993660 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-36a8b1ff-0788-49ca-9a1e-53d4584d1afa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1290118728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.1290118728 |
| Directory | /workspace/128.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/128.usbdev_tx_rx_disruption.1636509652 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 484858649 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-ef57c6cb-5d95-4215-ae69-9fc9859311aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1636509652 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 128.usbdev_tx_rx_disruption.1636509652 |
| Directory | /workspace/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/129.usbdev_endpoint_types.3581156903 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 195158299 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-a39a017a-3046-4663-8f66-f7b36a9a0bf0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3581156903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.3581156903 |
| Directory | /workspace/129.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/129.usbdev_tx_rx_disruption.832301836 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 630207819 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:05 PM PDT 24 |
| Finished | Aug 15 05:35:07 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-436dca1d-0603-4b94-94ae-5605bac0f04c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=832301836 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 129.usbdev_tx_rx_disruption.832301836 |
| Directory | /workspace/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/13.usbdev_alert_test.774809820 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 39730950 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207284 kb |
| Host | smart-29f6b1d3-fcec-4424-982f-9e817e948eb7 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=774809820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.774809820 |
| Directory | /workspace/13.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_disconnect.2834051084 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 10674652248 ps |
| CPU time | 16.49 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:47 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-644845a6-a206-4999-9924-ae34df3af4f7 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2834051084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_a on_wake_disconnect.2834051084 |
| Directory | /workspace/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_reset.3337785245 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 13568577530 ps |
| CPU time | 19.54 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:51 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-3b214b1a-dbca-41df-8667-e5661376eb12 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3337785245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.3337785245 |
| Directory | /workspace/13.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_resume.615534300 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 23867972344 ps |
| CPU time | 28.79 seconds |
| Started | Aug 15 05:29:27 PM PDT 24 |
| Finished | Aug 15 05:29:56 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-3db065db-71e5-4c9e-bfd8-49748ef84d4d |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=615534300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_ao n_wake_resume.615534300 |
| Directory | /workspace/13.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/13.usbdev_av_buffer.2006896685 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 196459874 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-80336c9c-9ec2-4580-a3e2-e5cf0076163f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20068 96685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_av_buffer.2006896685 |
| Directory | /workspace/13.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/13.usbdev_bitstuff_err.4052121899 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 149236364 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-6ea6adef-db03-4948-8e13-494fb75b0629 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40521 21899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_bitstuff_err.4052121899 |
| Directory | /workspace/13.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_data_toggle_clear.852535396 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 655139220 ps |
| CPU time | 1.93 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-eaa3beca-4481-4534-837d-3f8c9faff74c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85253 5396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_clear.852535396 |
| Directory | /workspace/13.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/13.usbdev_device_address.840722188 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 41278362074 ps |
| CPU time | 63.4 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:30:35 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-b9b0f17d-e4ab-4b11-ba4e-ee300cf45131 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84072 2188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.840722188 |
| Directory | /workspace/13.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/13.usbdev_device_timeout.4240321575 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 462492242 ps |
| CPU time | 8.2 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-9b9d6f2b-1576-45f2-997a-8f4691b3f1ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4240321575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.4240321575 |
| Directory | /workspace/13.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/13.usbdev_disable_endpoint.782287721 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 962370596 ps |
| CPU time | 2.06 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-391a5d67-577f-405b-a66c-5bcacbf54efc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78228 7721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_disable_endpoint.782287721 |
| Directory | /workspace/13.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/13.usbdev_disconnected.2215484626 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 158375330 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-0d118092-10b5-4d29-8546-9f7c50fa4b2d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22154 84626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_disconnected.2215484626 |
| Directory | /workspace/13.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/13.usbdev_enable.1953104018 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 60944764 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-af8dc271-ae6c-4302-9e1d-89be5f82704a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19531 04018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_enable.1953104018 |
| Directory | /workspace/13.usbdev_enable/latest |
| Test location | /workspace/coverage/default/13.usbdev_endpoint_access.3443883651 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 889252926 ps |
| CPU time | 2.41 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-864ece33-72cf-4da1-b647-2fceabbf76a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34438 83651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.3443883651 |
| Directory | /workspace/13.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/13.usbdev_endpoint_types.2628448500 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 589697722 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-ff30e647-301b-4b93-85bf-424763b6f798 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2628448500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.2628448500 |
| Directory | /workspace/13.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/13.usbdev_fifo_rst.256725842 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 276064634 ps |
| CPU time | 1.98 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:29:37 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-5d3889ff-585c-424f-a697-5b549e60dd0d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25672 5842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_fifo_rst.256725842 |
| Directory | /workspace/13.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_iso.1366709297 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 210483992 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 215828 kb |
| Host | smart-9da7f73a-443a-4ee3-a2a5-71f600c1ed9a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1366709297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.1366709297 |
| Directory | /workspace/13.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_stall.3787010191 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 156150914 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:29:43 PM PDT 24 |
| Finished | Aug 15 05:29:44 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-054efa7b-a78b-4bb6-916c-312ff5d83578 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37870 10191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_stall.3787010191 |
| Directory | /workspace/13.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_trans.2134364158 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 217344592 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-2b8f79f8-f761-4e5c-b160-bdcf75913ef8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21343 64158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_trans.2134364158 |
| Directory | /workspace/13.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_invalid_sync.4000217167 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 3266809187 ps |
| CPU time | 30.25 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:30:02 PM PDT 24 |
| Peak memory | 224060 kb |
| Host | smart-d7173fa5-b80b-48e7-ab28-deafa0e7d84e |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4000217167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.4000217167 |
| Directory | /workspace/13.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_in_err.2276648858 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 212895578 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8cb7e776-8788-40c1-b0ef-b76d59b15017 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22766 48858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_in_err.2276648858 |
| Directory | /workspace/13.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_resume.3014859655 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 8641225917 ps |
| CPU time | 11.76 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:46 PM PDT 24 |
| Peak memory | 216072 kb |
| Host | smart-989b6f1d-e011-4ee0-adf3-5e7685f13d4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30148 59655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_resume.3014859655 |
| Directory | /workspace/13.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_suspend.79848222 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 9213876993 ps |
| CPU time | 11.49 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:45 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-39b10f4e-c306-421f-9d43-68f92ce01e03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79848 222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_suspend.79848222 |
| Directory | /workspace/13.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/13.usbdev_low_speed_traffic.4049971026 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 3518150687 ps |
| CPU time | 37.24 seconds |
| Started | Aug 15 05:29:47 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-7fdf5f9d-9d08-4658-a6a6-768b0d0841b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4049971026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.4049971026 |
| Directory | /workspace/13.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_inter_pkt_delay.847218251 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 2738164729 ps |
| CPU time | 76.82 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 217456 kb |
| Host | smart-7c1dfb50-437a-4e56-8a2b-84319ad7ae2f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=847218251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.847218251 |
| Directory | /workspace/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_length_out_transaction.868986210 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 208160685 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:29:36 PM PDT 24 |
| Finished | Aug 15 05:29:37 PM PDT 24 |
| Peak memory | 207268 kb |
| Host | smart-1cc3871c-be83-443d-8cf6-62154692546e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86898 6210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.868986210 |
| Directory | /workspace/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_non_iso_usb_traffic.3835885302 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 3136925947 ps |
| CPU time | 25.06 seconds |
| Started | Aug 15 05:29:39 PM PDT 24 |
| Finished | Aug 15 05:30:04 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-9428d9a8-b7c3-472a-9f33-5c7cd83c62eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38358 85302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.3835885302 |
| Directory | /workspace/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_usb_traffic.3742100391 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 2350493537 ps |
| CPU time | 61.99 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:30:37 PM PDT 24 |
| Peak memory | 224072 kb |
| Host | smart-4ae28d9f-0e82-4221-8116-d7fc0a518e21 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3742100391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.3742100391 |
| Directory | /workspace/13.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_inter_pkt_delay.297748582 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 1873609849 ps |
| CPU time | 19.13 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:51 PM PDT 24 |
| Peak memory | 216736 kb |
| Host | smart-ff8da0f7-8ed8-4184-829e-567e53f2b8bd |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=297748582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.297748582 |
| Directory | /workspace/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_length_in_transaction.4138239537 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 149220579 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207336 kb |
| Host | smart-35b07fc7-add9-4076-87e2-7b5e547ac7bd |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4138239537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.4138239537 |
| Directory | /workspace/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_length_out_transaction.659417743 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 164609882 ps |
| CPU time | 0.79 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a175f5b4-b6be-4200-945f-7f4938a32491 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65941 7743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.659417743 |
| Directory | /workspace/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_iso.732173303 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 160055324 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a31cf4c9-66d1-4504-be17-872cd5c666a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73217 3303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_iso.732173303 |
| Directory | /workspace/13.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_stall.1178485973 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 181182916 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:44 PM PDT 24 |
| Finished | Aug 15 05:29:45 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-f695340b-9ace-4bf7-9376-7d090a6fe7ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11784 85973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_stall.1178485973 |
| Directory | /workspace/13.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_trans_nak.3918172207 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 180687568 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d98d4424-5c38-46e2-ab7f-72539e6d1991 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39181 72207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_trans_nak.3918172207 |
| Directory | /workspace/13.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/13.usbdev_pending_in_trans.3044820206 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 189144031 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:29:39 PM PDT 24 |
| Finished | Aug 15 05:29:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d04fb2e4-8ed5-4980-8418-39ec02a12575 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30448 20206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pending_in_trans.3044820206 |
| Directory | /workspace/13.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_config_pinflip.557643279 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 220967795 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-a93705cb-5817-46f3-bf7a-1d196823fb51 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=557643279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.557643279 |
| Directory | /workspace/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_config_usb_ref_disable.4218570763 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 150577881 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-771c4efd-8b7d-4bb6-b26d-9949821160ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42185 70763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.4218570763 |
| Directory | /workspace/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_pins_sense.2026427877 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 59363788 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:29:41 PM PDT 24 |
| Finished | Aug 15 05:29:42 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-74f8d14c-d92f-432a-8a9e-4de25786c268 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20264 27877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.2026427877 |
| Directory | /workspace/13.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_buffer.3901486614 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 16734153064 ps |
| CPU time | 44.81 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:30:18 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-b43ccb76-39d4-4cf1-ac81-b901fa1c78d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39014 86614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_buffer.3901486614 |
| Directory | /workspace/13.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_received.2120704279 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 174133684 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-13747d6f-66fa-4804-9eed-6261a32fe5db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21207 04279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_received.2120704279 |
| Directory | /workspace/13.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_sent.425638509 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 179974812 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:29:30 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-338e5967-64c7-40bd-a19f-e279e66515d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42563 8509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_sent.425638509 |
| Directory | /workspace/13.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/13.usbdev_random_length_in_transaction.2970507707 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 172708585 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-b27447f0-5440-4a5d-9aeb-50fe87697bc0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29705 07707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_in_transaction.2970507707 |
| Directory | /workspace/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_random_length_out_transaction.1232099843 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 167272339 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:29:42 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-87e05976-44ad-47ed-89ba-ab6c56acd418 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12320 99843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.1232099843 |
| Directory | /workspace/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_resume_link_active.1034508154 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 20190362839 ps |
| CPU time | 29.14 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:30:02 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-cfbb2fcd-f2ad-4542-b05d-59981f4ff9fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10345 08154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_resume_link_active.1034508154 |
| Directory | /workspace/13.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/13.usbdev_rx_crc_err.520527759 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 193629974 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-1cbf533d-1555-46c1-9c11-a8e7f9072957 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52052 7759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_rx_crc_err.520527759 |
| Directory | /workspace/13.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_setup_stage.2141156600 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 153726258 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5f0ee2ce-cd43-416a-9fc5-847bc1ac1338 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21411 56600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_setup_stage.2141156600 |
| Directory | /workspace/13.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/13.usbdev_setup_trans_ignored.3383869141 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 215415157 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:47 PM PDT 24 |
| Finished | Aug 15 05:29:48 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-58f88c9a-399d-45fa-aa1d-40ec9a5d304d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33838 69141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_setup_trans_ignored.3383869141 |
| Directory | /workspace/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/13.usbdev_smoke.405033783 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 225402850 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c437b7ae-8b0b-4828-8d20-e02ca7b12a48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40503 3783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.405033783 |
| Directory | /workspace/13.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/13.usbdev_spurious_pids_ignored.905351178 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 3215332161 ps |
| CPU time | 23.7 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:58 PM PDT 24 |
| Peak memory | 224060 kb |
| Host | smart-6b806d04-bdb8-4556-b8b6-1e5e96934317 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=905351178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.905351178 |
| Directory | /workspace/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/13.usbdev_stall_priority_over_nak.3776314509 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 165839973 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:29:33 PM PDT 24 |
| Finished | Aug 15 05:29:34 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-eef7797f-1d96-4028-b6eb-49d937ae4513 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37763 14509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.3776314509 |
| Directory | /workspace/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/13.usbdev_stall_trans.108696302 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 169042473 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-2a092e78-bd04-42c6-b1a4-e8fa95206420 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10869 6302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_trans.108696302 |
| Directory | /workspace/13.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_stream_len_max.3546073972 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 812168199 ps |
| CPU time | 2.28 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:29:37 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-33f59c01-43b2-49a5-9206-924079d345a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35460 73972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.3546073972 |
| Directory | /workspace/13.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/13.usbdev_streaming_out.478463894 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 1788890207 ps |
| CPU time | 46.99 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-1f47b0f1-a0e8-4e6b-a6f0-4706aa9c9f5e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47846 3894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_streaming_out.478463894 |
| Directory | /workspace/13.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/13.usbdev_timeout_missing_host_handshake.2767776215 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 2932659219 ps |
| CPU time | 25.98 seconds |
| Started | Aug 15 05:29:31 PM PDT 24 |
| Finished | Aug 15 05:29:57 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-d0d1dfb9-2e87-4c23-aad3-b208a87c5c5c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2767776215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_hos t_handshake.2767776215 |
| Directory | /workspace/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/13.usbdev_tx_rx_disruption.2518548741 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 600673830 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:29:38 PM PDT 24 |
| Finished | Aug 15 05:29:40 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-6f003ffc-cf1b-4fea-8a58-4b0ca35383fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2518548741 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_tx_rx_disruption.2518548741 |
| Directory | /workspace/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/130.usbdev_endpoint_types.2515539677 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 259686059 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:35:18 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 206440 kb |
| Host | smart-195c21a8-8d6c-420f-98cd-d26bb53d15bd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2515539677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.2515539677 |
| Directory | /workspace/130.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/130.usbdev_tx_rx_disruption.479751721 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 662192385 ps |
| CPU time | 1.74 seconds |
| Started | Aug 15 05:35:07 PM PDT 24 |
| Finished | Aug 15 05:35:09 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-0ba27148-b120-4a0a-8821-098158e53b46 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=479751721 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 130.usbdev_tx_rx_disruption.479751721 |
| Directory | /workspace/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/131.usbdev_endpoint_types.3939222822 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 270239482 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:35:17 PM PDT 24 |
| Finished | Aug 15 05:35:18 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-36ecdfe0-81cf-42cf-bca3-61d924e73767 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3939222822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.3939222822 |
| Directory | /workspace/131.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/131.usbdev_tx_rx_disruption.2955912530 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 496983389 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:05 PM PDT 24 |
| Finished | Aug 15 05:35:07 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-24e1250e-0b18-4528-be01-454b0118f8d6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2955912530 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 131.usbdev_tx_rx_disruption.2955912530 |
| Directory | /workspace/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/132.usbdev_endpoint_types.562161709 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 412435683 ps |
| CPU time | 1.29 seconds |
| Started | Aug 15 05:35:03 PM PDT 24 |
| Finished | Aug 15 05:35:04 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-8e45cd3a-bc47-43df-a77f-bba417eb3949 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=562161709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.562161709 |
| Directory | /workspace/132.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/133.usbdev_tx_rx_disruption.2179200606 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 648615333 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-dc897ca5-68c8-4f2a-bf29-b3c7edb4a9dd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2179200606 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 133.usbdev_tx_rx_disruption.2179200606 |
| Directory | /workspace/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/134.usbdev_endpoint_types.3425447509 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 508667842 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:11 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-7dcfc072-ec15-45b4-b3b4-96827700159e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3425447509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.3425447509 |
| Directory | /workspace/134.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/134.usbdev_tx_rx_disruption.645963202 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 478512300 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-6255d751-f49c-4ec8-a2aa-864869150e96 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=645963202 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 134.usbdev_tx_rx_disruption.645963202 |
| Directory | /workspace/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/135.usbdev_endpoint_types.1634363682 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 227631022 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-fa81666f-0dfb-4f07-bb05-aa71808ea555 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1634363682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.1634363682 |
| Directory | /workspace/135.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/135.usbdev_tx_rx_disruption.1743726079 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 541117779 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-2682dd39-3bba-4ab5-a488-4ab891f150c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1743726079 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 135.usbdev_tx_rx_disruption.1743726079 |
| Directory | /workspace/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/136.usbdev_tx_rx_disruption.939587681 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 606548917 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-c5652ec1-7d54-4183-919c-715beabd56d0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=939587681 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 136.usbdev_tx_rx_disruption.939587681 |
| Directory | /workspace/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/137.usbdev_endpoint_types.4048381668 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 487669697 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-1c3394fe-29fe-4892-a73d-bd29e5fa47d7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4048381668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.4048381668 |
| Directory | /workspace/137.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/137.usbdev_tx_rx_disruption.4280883366 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 466435951 ps |
| CPU time | 1.4 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 206492 kb |
| Host | smart-56bc43b2-91b0-4b22-a97b-c33f8f2ed346 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4280883366 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 137.usbdev_tx_rx_disruption.4280883366 |
| Directory | /workspace/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/138.usbdev_endpoint_types.35354044 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 197303057 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-39d4319a-8e9f-4248-b042-61cd2ec2f978 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=35354044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.35354044 |
| Directory | /workspace/138.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/138.usbdev_tx_rx_disruption.4227258692 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 651681486 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e59b31f6-2a85-4576-9d86-bb320423432a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4227258692 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 138.usbdev_tx_rx_disruption.4227258692 |
| Directory | /workspace/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/139.usbdev_endpoint_types.1183198549 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 370876555 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-9601c6c2-ab26-4a00-b0d4-92653974b124 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1183198549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.1183198549 |
| Directory | /workspace/139.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/139.usbdev_tx_rx_disruption.2561082274 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 533895525 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:35:08 PM PDT 24 |
| Finished | Aug 15 05:35:10 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-4603a692-5330-468e-8901-49af6371a84a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2561082274 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 139.usbdev_tx_rx_disruption.2561082274 |
| Directory | /workspace/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/14.usbdev_alert_test.217755725 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 56567152 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:05 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-4033eed6-c066-427f-890e-b6502fdfd441 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=217755725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.217755725 |
| Directory | /workspace/14.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_disconnect.3200211471 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 5809313450 ps |
| CPU time | 7.93 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-b08d6d58-bc8b-4bb4-a755-c31cb79a2ff2 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3200211471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_a on_wake_disconnect.3200211471 |
| Directory | /workspace/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_reset.3847285372 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 21049518300 ps |
| CPU time | 29.02 seconds |
| Started | Aug 15 05:29:38 PM PDT 24 |
| Finished | Aug 15 05:30:07 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-fc5ca106-d084-4e7b-990d-832af2af8987 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3847285372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.3847285372 |
| Directory | /workspace/14.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_resume.1232500016 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 29666630739 ps |
| CPU time | 35.66 seconds |
| Started | Aug 15 05:29:38 PM PDT 24 |
| Finished | Aug 15 05:30:14 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-bfc13255-f27d-46a1-b535-dce0075da763 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1232500016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_a on_wake_resume.1232500016 |
| Directory | /workspace/14.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/14.usbdev_av_buffer.2382172134 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 145288562 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:56 PM PDT 24 |
| Finished | Aug 15 05:29:57 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-dc1633a5-749a-4784-9997-b4348f913151 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23821 72134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_av_buffer.2382172134 |
| Directory | /workspace/14.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/14.usbdev_bitstuff_err.3400179728 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 146990314 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:29 PM PDT 24 |
| Finished | Aug 15 05:29:30 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7198f24a-185c-4861-8dd6-c3b058dbbf03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34001 79728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_bitstuff_err.3400179728 |
| Directory | /workspace/14.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_data_toggle_clear.1559666846 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 146476532 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:35 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-1468642d-3437-42d0-95a6-a81683916107 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15596 66846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_clear.1559666846 |
| Directory | /workspace/14.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/14.usbdev_data_toggle_restore.2954524627 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 488483267 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:29:38 PM PDT 24 |
| Finished | Aug 15 05:29:39 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-6ac15841-35e9-4cd6-a80c-742b14384a4e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2954524627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.2954524627 |
| Directory | /workspace/14.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/14.usbdev_device_address.1122685025 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 20953278103 ps |
| CPU time | 32.94 seconds |
| Started | Aug 15 05:29:36 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-0a0eb7b1-0f0a-4498-ac98-f01cdcf57dac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11226 85025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.1122685025 |
| Directory | /workspace/14.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/14.usbdev_device_timeout.1868426098 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 4989266751 ps |
| CPU time | 33.21 seconds |
| Started | Aug 15 05:29:39 PM PDT 24 |
| Finished | Aug 15 05:30:12 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-18a0ba5d-b60b-4c3e-98d3-be59b5ed81b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1868426098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.1868426098 |
| Directory | /workspace/14.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/14.usbdev_disable_endpoint.4014069148 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 406037377 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:29:32 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-b6d8e1ea-810d-425a-b061-22f9e42d27ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40140 69148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disable_endpoint.4014069148 |
| Directory | /workspace/14.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/14.usbdev_disconnected.3445143984 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 138125077 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:29:38 PM PDT 24 |
| Finished | Aug 15 05:29:44 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-6f1d7c07-927c-46f9-b719-e2fd78bd5982 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34451 43984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disconnected.3445143984 |
| Directory | /workspace/14.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/14.usbdev_enable.2794569245 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 43685307 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:29:41 PM PDT 24 |
| Finished | Aug 15 05:29:42 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-6b3d53a4-c8e2-4a56-988a-2b7855d10679 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27945 69245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_enable.2794569245 |
| Directory | /workspace/14.usbdev_enable/latest |
| Test location | /workspace/coverage/default/14.usbdev_endpoint_access.2229560655 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 880488300 ps |
| CPU time | 2.41 seconds |
| Started | Aug 15 05:29:40 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-bc6fedbf-a063-4570-981d-ff68b99c84c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22295 60655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.2229560655 |
| Directory | /workspace/14.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/14.usbdev_endpoint_types.2473014477 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 589656718 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:29:53 PM PDT 24 |
| Finished | Aug 15 05:29:55 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-4d0a9eff-5b8c-41a0-b365-538e17ff8579 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2473014477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.2473014477 |
| Directory | /workspace/14.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/14.usbdev_fifo_rst.1254790880 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 264978412 ps |
| CPU time | 1.92 seconds |
| Started | Aug 15 05:29:51 PM PDT 24 |
| Finished | Aug 15 05:29:53 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-75aa875f-728b-4c8e-a9b5-81781c22203f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12547 90880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_fifo_rst.1254790880 |
| Directory | /workspace/14.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_iso.705774153 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 182624248 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:29:42 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-68a6621e-b3dd-4c5c-af85-ebd09675441d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=705774153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.705774153 |
| Directory | /workspace/14.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_stall.4034023216 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 143923445 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:29:49 PM PDT 24 |
| Finished | Aug 15 05:29:50 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-67c5e340-5c4c-4965-a3ec-1a0ee29a91db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40340 23216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_stall.4034023216 |
| Directory | /workspace/14.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_trans.1726002151 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 194388774 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:29:39 PM PDT 24 |
| Finished | Aug 15 05:29:40 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-47c5964a-eae9-4a53-937a-0f6b758c7d29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17260 02151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_trans.1726002151 |
| Directory | /workspace/14.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_invalid_sync.1654793197 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 4971784607 ps |
| CPU time | 134.74 seconds |
| Started | Aug 15 05:29:39 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 217652 kb |
| Host | smart-c41fbf8c-d3f0-4085-9ae4-3c2cbdc81607 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1654793197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1654793197 |
| Directory | /workspace/14.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/14.usbdev_iso_retraction.854435441 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 6447717735 ps |
| CPU time | 80.79 seconds |
| Started | Aug 15 05:29:40 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-db219910-e5f4-4429-94db-399d359f57cb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=854435441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.854435441 |
| Directory | /workspace/14.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_in_err.2195927994 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 178312500 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:42 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-3c0c57a6-c26e-422f-be28-728602a2757d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21959 27994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_in_err.2195927994 |
| Directory | /workspace/14.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_resume.2536402274 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 31921734159 ps |
| CPU time | 48.38 seconds |
| Started | Aug 15 05:29:42 PM PDT 24 |
| Finished | Aug 15 05:30:31 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-e789b6d5-be12-4a3a-a97e-713854e38334 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25364 02274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_resume.2536402274 |
| Directory | /workspace/14.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_suspend.3231138719 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 9016914525 ps |
| CPU time | 12.49 seconds |
| Started | Aug 15 05:29:40 PM PDT 24 |
| Finished | Aug 15 05:29:53 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-1a2deb21-a23c-44c6-9801-0d722aa8b44d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32311 38719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_suspend.3231138719 |
| Directory | /workspace/14.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/14.usbdev_low_speed_traffic.3309439430 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 4434517390 ps |
| CPU time | 34.75 seconds |
| Started | Aug 15 05:29:41 PM PDT 24 |
| Finished | Aug 15 05:30:16 PM PDT 24 |
| Peak memory | 219104 kb |
| Host | smart-550e8220-413f-46cb-a97b-46f9992382c3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3309439430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.3309439430 |
| Directory | /workspace/14.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_inter_pkt_delay.3252800091 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 3001840970 ps |
| CPU time | 25.05 seconds |
| Started | Aug 15 05:29:42 PM PDT 24 |
| Finished | Aug 15 05:30:07 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-b3c2e1ea-2a89-4ce2-890a-fcc2af145036 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3252800091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.3252800091 |
| Directory | /workspace/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_length_in_transaction.3019753180 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 303159784 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:29:51 PM PDT 24 |
| Finished | Aug 15 05:29:52 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-fcf409fb-049f-4d38-ae2a-17f75bb67382 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3019753180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.3019753180 |
| Directory | /workspace/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_length_out_transaction.861208148 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 236849867 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:29:41 PM PDT 24 |
| Finished | Aug 15 05:29:42 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-b93aac00-3064-4a90-87b9-e5f4aa244a53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86120 8148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.861208148 |
| Directory | /workspace/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_non_iso_usb_traffic.1125683665 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 3629768918 ps |
| CPU time | 100.74 seconds |
| Started | Aug 15 05:29:41 PM PDT 24 |
| Finished | Aug 15 05:31:22 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-ce1e5769-5322-4df6-ae90-ef23666bad5b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11256 83665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.1125683665 |
| Directory | /workspace/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_usb_traffic.3277200804 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 2455290331 ps |
| CPU time | 70.38 seconds |
| Started | Aug 15 05:29:36 PM PDT 24 |
| Finished | Aug 15 05:30:47 PM PDT 24 |
| Peak memory | 223996 kb |
| Host | smart-25dc8cd7-8a65-4ff3-84c0-77b8dd6501e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3277200804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.3277200804 |
| Directory | /workspace/14.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_inter_pkt_delay.3700903459 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 3660416718 ps |
| CPU time | 27.52 seconds |
| Started | Aug 15 05:29:53 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-afb60b89-983b-4d58-8a8a-83ee6b73d381 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3700903459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.3700903459 |
| Directory | /workspace/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_length_in_transaction.2630109282 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 166485178 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:29:47 PM PDT 24 |
| Finished | Aug 15 05:29:48 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-10484ce9-845a-4be8-a708-2bdbf137be1c |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2630109282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.2630109282 |
| Directory | /workspace/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_length_out_transaction.4007910906 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 145410829 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:45 PM PDT 24 |
| Finished | Aug 15 05:29:46 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-794987c9-17e4-477f-99a0-25e404b6dc44 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40079 10906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.4007910906 |
| Directory | /workspace/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_iso.1314354471 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 201157104 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:40 PM PDT 24 |
| Finished | Aug 15 05:29:42 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-f6f0e7d2-5a8a-42ba-88d2-068ab4866674 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13143 54471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_iso.1314354471 |
| Directory | /workspace/14.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_stall.1410116747 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 197685024 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:29:40 PM PDT 24 |
| Finished | Aug 15 05:29:42 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-6683e149-7c8b-4560-be38-2a5b1c0fc928 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14101 16747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_stall.1410116747 |
| Directory | /workspace/14.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_trans_nak.2492006039 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 218617270 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:40 PM PDT 24 |
| Finished | Aug 15 05:29:41 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-657e7e31-ed1f-4552-9e8c-da05145e4dfb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24920 06039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_trans_nak.2492006039 |
| Directory | /workspace/14.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/14.usbdev_pending_in_trans.627229943 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 146802189 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:29:49 PM PDT 24 |
| Finished | Aug 15 05:29:50 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-1e958494-9378-4b03-9139-98aa2dec6f7e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62722 9943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pending_in_trans.627229943 |
| Directory | /workspace/14.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_config_pinflip.2641786585 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 251222968 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:29:43 PM PDT 24 |
| Finished | Aug 15 05:29:45 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-119349f5-ab84-4fe9-a53d-6c94a1a95867 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2641786585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.2641786585 |
| Directory | /workspace/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_config_usb_ref_disable.3948773049 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 147521397 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:09 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-19574e48-2612-4ec1-b22e-7f9e3afacabe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39487 73049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.3948773049 |
| Directory | /workspace/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_buffer.3290705035 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 18614009560 ps |
| CPU time | 46.72 seconds |
| Started | Aug 15 05:29:40 PM PDT 24 |
| Finished | Aug 15 05:30:27 PM PDT 24 |
| Peak memory | 216088 kb |
| Host | smart-9ddcf7e1-8c72-4eb0-93c2-69b8df27b9dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32907 05035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_buffer.3290705035 |
| Directory | /workspace/14.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_received.182406341 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 180453329 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:46 PM PDT 24 |
| Finished | Aug 15 05:29:47 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-640ec101-8b38-4794-aa36-8ee2c53ab69f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18240 6341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_received.182406341 |
| Directory | /workspace/14.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_sent.4028187637 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 233754762 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:29:47 PM PDT 24 |
| Finished | Aug 15 05:29:48 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-ae274857-f6d9-4d68-ae3c-711f94779ba0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40281 87637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_sent.4028187637 |
| Directory | /workspace/14.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/14.usbdev_random_length_in_transaction.2938489717 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 230793740 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:29:35 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 206408 kb |
| Host | smart-36429bef-b574-46d3-82aa-98ecab709119 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29384 89717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_in_transaction.2938489717 |
| Directory | /workspace/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_random_length_out_transaction.3029851499 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 174995289 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:39 PM PDT 24 |
| Finished | Aug 15 05:29:40 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e5e92b1a-65af-4aed-8332-054bbe34d1cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30298 51499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.3029851499 |
| Directory | /workspace/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_resume_link_active.746987318 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 20154609853 ps |
| CPU time | 24.16 seconds |
| Started | Aug 15 05:29:38 PM PDT 24 |
| Finished | Aug 15 05:30:02 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-b08e5bce-f824-4cbd-b46b-06ba5ec433c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74698 7318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_resume_link_active.746987318 |
| Directory | /workspace/14.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/14.usbdev_rx_crc_err.2733284514 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 139785381 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:55 PM PDT 24 |
| Finished | Aug 15 05:29:56 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-b1f9fe7e-9985-42c4-bcb0-78e474a1e5fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27332 84514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_rx_crc_err.2733284514 |
| Directory | /workspace/14.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_rx_full.3584169508 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 323237195 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:29:54 PM PDT 24 |
| Finished | Aug 15 05:29:55 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a01d4323-1682-4363-b2cf-96dc8f8de513 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35841 69508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_rx_full.3584169508 |
| Directory | /workspace/14.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/14.usbdev_setup_stage.2017724138 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 170232242 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:01 PM PDT 24 |
| Finished | Aug 15 05:30:02 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-6604d299-356b-4d70-b2d5-2988a579ee24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20177 24138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_setup_stage.2017724138 |
| Directory | /workspace/14.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/14.usbdev_setup_trans_ignored.901138845 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 203720702 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:00 PM PDT 24 |
| Finished | Aug 15 05:30:01 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-24d358f0-f486-4e04-aecd-4071e5a83268 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90113 8845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_setup_trans_ignored.901138845 |
| Directory | /workspace/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/14.usbdev_smoke.3124525363 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 235217973 ps |
| CPU time | 1.14 seconds |
| Started | Aug 15 05:29:57 PM PDT 24 |
| Finished | Aug 15 05:29:58 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-47d1aa4a-8ba4-4d9e-a0ff-2f6580b122f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31245 25363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.3124525363 |
| Directory | /workspace/14.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/14.usbdev_spurious_pids_ignored.3873053511 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 2852030417 ps |
| CPU time | 27.3 seconds |
| Started | Aug 15 05:30:01 PM PDT 24 |
| Finished | Aug 15 05:30:29 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-260ed733-4641-4a61-bb25-497f1eee351a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3873053511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.3873053511 |
| Directory | /workspace/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/14.usbdev_stall_priority_over_nak.2797290377 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 146306579 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:59 PM PDT 24 |
| Finished | Aug 15 05:30:00 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-3cf641e1-39c3-4f27-8757-c1d4550fbe02 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27972 90377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.2797290377 |
| Directory | /workspace/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/14.usbdev_stall_trans.3032427287 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 162892796 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:55 PM PDT 24 |
| Finished | Aug 15 05:29:56 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-7e723966-2b6e-4b17-941a-4914e500c637 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30324 27287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_trans.3032427287 |
| Directory | /workspace/14.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_stream_len_max.3218907066 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 972634026 ps |
| CPU time | 2.46 seconds |
| Started | Aug 15 05:29:54 PM PDT 24 |
| Finished | Aug 15 05:29:57 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-e21b288c-4336-4b06-8b6f-78bdefc20f1c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32189 07066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.3218907066 |
| Directory | /workspace/14.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/14.usbdev_streaming_out.4267700586 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 2409332272 ps |
| CPU time | 69.85 seconds |
| Started | Aug 15 05:29:53 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-f1824bfb-e062-42d2-a28f-b5a2f663ea71 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42677 00586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_streaming_out.4267700586 |
| Directory | /workspace/14.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/14.usbdev_timeout_missing_host_handshake.891457928 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 3573275948 ps |
| CPU time | 23.42 seconds |
| Started | Aug 15 05:29:34 PM PDT 24 |
| Finished | Aug 15 05:29:58 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-3a18c134-cb29-4a4a-ad61-e6e70235ddf9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=891457928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host _handshake.891457928 |
| Directory | /workspace/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/14.usbdev_tx_rx_disruption.937800920 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 517993015 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-3a477487-5418-4019-b446-8007bc9ebfa2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=937800920 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 14.usbdev_tx_rx_disruption.937800920 |
| Directory | /workspace/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/140.usbdev_endpoint_types.759116895 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 389399124 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:35:03 PM PDT 24 |
| Finished | Aug 15 05:35:04 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-eff7538a-3f11-4819-bf15-7c264f89e136 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=759116895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.759116895 |
| Directory | /workspace/140.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/140.usbdev_tx_rx_disruption.1498367388 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 407127942 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-cbcf154d-d299-4153-9308-83f083910a53 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1498367388 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 140.usbdev_tx_rx_disruption.1498367388 |
| Directory | /workspace/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/141.usbdev_endpoint_types.2708358012 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 456312608 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:25 PM PDT 24 |
| Finished | Aug 15 05:35:27 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-a80327df-84b4-4f26-b941-6450662d7ddc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2708358012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.2708358012 |
| Directory | /workspace/141.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/141.usbdev_tx_rx_disruption.3142974040 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 496615892 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-930f69d9-6fb5-485a-948e-b14429e8dab5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3142974040 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 141.usbdev_tx_rx_disruption.3142974040 |
| Directory | /workspace/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/142.usbdev_endpoint_types.4026981235 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 595994245 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:34:55 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ae6d39d7-fb30-49dc-92df-8d1db676c752 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4026981235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.4026981235 |
| Directory | /workspace/142.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/142.usbdev_tx_rx_disruption.3028749926 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 495033608 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-6ca2895c-9735-4dcf-b6f3-adf699a84a70 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3028749926 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 142.usbdev_tx_rx_disruption.3028749926 |
| Directory | /workspace/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/143.usbdev_endpoint_types.2087516507 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 209433734 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-ae1c1d6c-d85b-475a-a2db-52cf26c566ae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2087516507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.2087516507 |
| Directory | /workspace/143.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/143.usbdev_tx_rx_disruption.426265253 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 541068349 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-a6d288f4-d0f3-4eab-aa91-fe1d360bd1ed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=426265253 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 143.usbdev_tx_rx_disruption.426265253 |
| Directory | /workspace/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/144.usbdev_endpoint_types.3698355674 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 200220963 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:35:09 PM PDT 24 |
| Finished | Aug 15 05:35:10 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-3e0b5d79-16f3-4257-8ff0-aee6ed8642d1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3698355674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.3698355674 |
| Directory | /workspace/144.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/144.usbdev_tx_rx_disruption.1422683744 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 668645680 ps |
| CPU time | 2 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-9389267f-0c95-45b3-b907-5de45d986a30 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1422683744 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 144.usbdev_tx_rx_disruption.1422683744 |
| Directory | /workspace/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/145.usbdev_endpoint_types.1094241232 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 566810764 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:16 PM PDT 24 |
| Finished | Aug 15 05:35:18 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-93edb067-e3ec-4779-a8de-392072eabd39 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1094241232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.1094241232 |
| Directory | /workspace/145.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/145.usbdev_tx_rx_disruption.4285001040 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 498240286 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:14 PM PDT 24 |
| Finished | Aug 15 05:35:16 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-f612f356-6dff-4d6a-a106-6c866a83463a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4285001040 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 145.usbdev_tx_rx_disruption.4285001040 |
| Directory | /workspace/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/146.usbdev_endpoint_types.2213995219 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 252838596 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f358b92d-9955-42e6-94cd-13d40fb82a8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2213995219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.2213995219 |
| Directory | /workspace/146.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/146.usbdev_tx_rx_disruption.2432520959 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 489727125 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:34:59 PM PDT 24 |
| Finished | Aug 15 05:35:06 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6650ac7c-1c42-48cc-9d19-b427df70683f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2432520959 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 146.usbdev_tx_rx_disruption.2432520959 |
| Directory | /workspace/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/147.usbdev_endpoint_types.1535386683 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 336008749 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:35:07 PM PDT 24 |
| Finished | Aug 15 05:35:09 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-e9dd3f18-f30b-4678-8478-5f47cd3ab109 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1535386683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.1535386683 |
| Directory | /workspace/147.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/147.usbdev_tx_rx_disruption.3319681468 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 552254940 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-4815a532-45e1-4609-b5cb-a180f2bb5814 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3319681468 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 147.usbdev_tx_rx_disruption.3319681468 |
| Directory | /workspace/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/148.usbdev_endpoint_types.3335692203 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 504482113 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:35:09 PM PDT 24 |
| Finished | Aug 15 05:35:11 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-6f9097f2-88c5-41d6-9145-66d3de54646c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3335692203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.3335692203 |
| Directory | /workspace/148.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/148.usbdev_tx_rx_disruption.1399085110 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 576482981 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-031affd9-1672-4e1c-835e-d3b61cd46441 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1399085110 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 148.usbdev_tx_rx_disruption.1399085110 |
| Directory | /workspace/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/149.usbdev_endpoint_types.3932460745 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 483781855 ps |
| CPU time | 1.29 seconds |
| Started | Aug 15 05:35:16 PM PDT 24 |
| Finished | Aug 15 05:35:18 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-c2910340-34bd-433a-a974-06cf564aa38a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3932460745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.3932460745 |
| Directory | /workspace/149.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/149.usbdev_tx_rx_disruption.3209513731 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 551460603 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:34:58 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-aa9e2e75-05d8-4c0e-af02-9a19bf11f975 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3209513731 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 149.usbdev_tx_rx_disruption.3209513731 |
| Directory | /workspace/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/15.usbdev_alert_test.3448680785 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 61226067 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:30:18 PM PDT 24 |
| Finished | Aug 15 05:30:19 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-223f7d7d-5323-43dd-a4a7-0ade6539fe96 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3448680785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.3448680785 |
| Directory | /workspace/15.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_disconnect.3868404207 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 4716993277 ps |
| CPU time | 6.53 seconds |
| Started | Aug 15 05:29:54 PM PDT 24 |
| Finished | Aug 15 05:30:01 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-39eb7bee-3435-457a-bfa9-637ff77c6731 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3868404207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_a on_wake_disconnect.3868404207 |
| Directory | /workspace/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_reset.2008438144 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 13905121603 ps |
| CPU time | 15.61 seconds |
| Started | Aug 15 05:30:00 PM PDT 24 |
| Finished | Aug 15 05:30:16 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-dcff2dbb-e17e-4b6e-ba42-dfa569e512b7 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2008438144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.2008438144 |
| Directory | /workspace/15.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_resume.3101003645 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 25725478402 ps |
| CPU time | 33.9 seconds |
| Started | Aug 15 05:29:57 PM PDT 24 |
| Finished | Aug 15 05:30:31 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-a488e51c-5984-4d10-9a87-a6d49831a255 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3101003645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_a on_wake_resume.3101003645 |
| Directory | /workspace/15.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/15.usbdev_av_buffer.3551201866 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 156300717 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:56 PM PDT 24 |
| Finished | Aug 15 05:29:57 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-04931260-bf66-43fb-b345-6f510ccb6752 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35512 01866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_av_buffer.3551201866 |
| Directory | /workspace/15.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/15.usbdev_bitstuff_err.2599861490 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 168387593 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:04 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c1cbcca8-3b2f-4124-8a59-7e407c278e85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25998 61490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_bitstuff_err.2599861490 |
| Directory | /workspace/15.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_data_toggle_clear.3709274011 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 213717620 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:29:59 PM PDT 24 |
| Finished | Aug 15 05:30:00 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-cb235657-293a-4cb2-88f6-e73d1461d428 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37092 74011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_clear.3709274011 |
| Directory | /workspace/15.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/15.usbdev_data_toggle_restore.2740189318 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 426667378 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:05 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-5a18dfdf-0b7a-4295-957a-d7c5e1e744a5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2740189318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.2740189318 |
| Directory | /workspace/15.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/15.usbdev_device_address.2886560251 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 49006279554 ps |
| CPU time | 89.12 seconds |
| Started | Aug 15 05:29:56 PM PDT 24 |
| Finished | Aug 15 05:31:26 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-b0954f81-a116-4282-bd23-675ac38a996e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28865 60251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.2886560251 |
| Directory | /workspace/15.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/15.usbdev_device_timeout.4096166068 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 7295906056 ps |
| CPU time | 50.75 seconds |
| Started | Aug 15 05:29:58 PM PDT 24 |
| Finished | Aug 15 05:30:48 PM PDT 24 |
| Peak memory | 207864 kb |
| Host | smart-fdabc085-2492-4255-a6e1-7a0b81a2ada5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4096166068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.4096166068 |
| Directory | /workspace/15.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/15.usbdev_disable_endpoint.764285191 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 860746469 ps |
| CPU time | 2.13 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:05 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-8e3c5c75-8d4a-4731-b25c-a6a9980e3307 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76428 5191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_disable_endpoint.764285191 |
| Directory | /workspace/15.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/15.usbdev_disconnected.1065527672 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 145792500 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0c4618fc-d6a3-4cc4-a483-faed94ddf482 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10655 27672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_disconnected.1065527672 |
| Directory | /workspace/15.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/15.usbdev_enable.3755588177 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 58132880 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:29:48 PM PDT 24 |
| Finished | Aug 15 05:29:49 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-6afed790-c17c-424e-af6a-78a822b99722 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37555 88177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_enable.3755588177 |
| Directory | /workspace/15.usbdev_enable/latest |
| Test location | /workspace/coverage/default/15.usbdev_endpoint_access.3809346129 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 856704797 ps |
| CPU time | 2.27 seconds |
| Started | Aug 15 05:30:02 PM PDT 24 |
| Finished | Aug 15 05:30:04 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-d85edc74-347b-4b48-b3b2-edb53fc55363 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38093 46129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.3809346129 |
| Directory | /workspace/15.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/15.usbdev_endpoint_types.1842457862 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 427902712 ps |
| CPU time | 1.28 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:08 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-6e680ed5-97fa-4f81-8218-a3bbaf695d6e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1842457862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.1842457862 |
| Directory | /workspace/15.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/15.usbdev_fifo_rst.3285601310 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 178978578 ps |
| CPU time | 1.99 seconds |
| Started | Aug 15 05:29:53 PM PDT 24 |
| Finished | Aug 15 05:29:55 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-5171d3cf-5acc-433c-baac-a6d01a6d4900 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32856 01310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_fifo_rst.3285601310 |
| Directory | /workspace/15.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_iso.1897421270 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 189093667 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:05 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-c8d8b1ab-ec5a-40bd-a624-650226673805 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1897421270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.1897421270 |
| Directory | /workspace/15.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_stall.81129606 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 200414638 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:05 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-f73e9a02-c2d3-4ba9-bb69-384b12e37a77 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81129 606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_stall.81129606 |
| Directory | /workspace/15.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_trans.4084791560 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 184228287 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:29:53 PM PDT 24 |
| Finished | Aug 15 05:29:54 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-5cf279ed-c688-45ae-828d-ee345862bde0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40847 91560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_trans.4084791560 |
| Directory | /workspace/15.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_invalid_sync.990660957 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 3517144389 ps |
| CPU time | 102.68 seconds |
| Started | Aug 15 05:30:00 PM PDT 24 |
| Finished | Aug 15 05:31:43 PM PDT 24 |
| Peak memory | 217708 kb |
| Host | smart-c76b0663-39e7-435c-a3f3-c35dd7e69914 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=990660957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.990660957 |
| Directory | /workspace/15.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/15.usbdev_iso_retraction.169669345 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 8578063444 ps |
| CPU time | 54.63 seconds |
| Started | Aug 15 05:29:58 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-a5c1ab0f-67f7-4035-8209-191b55eaa438 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=169669345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.169669345 |
| Directory | /workspace/15.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_in_err.2852934933 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 164221110 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:53 PM PDT 24 |
| Finished | Aug 15 05:29:54 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-af8e46df-b4f2-4f8b-a0c2-ea65ceea99ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28529 34933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_in_err.2852934933 |
| Directory | /workspace/15.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_resume.1095564672 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 34022714991 ps |
| CPU time | 52.87 seconds |
| Started | Aug 15 05:29:55 PM PDT 24 |
| Finished | Aug 15 05:30:48 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-0ce88a43-0139-4693-83cd-c3a55401ebb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10955 64672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_resume.1095564672 |
| Directory | /workspace/15.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_suspend.2262125738 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 6276198973 ps |
| CPU time | 8.52 seconds |
| Started | Aug 15 05:29:58 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-b2a91cc9-be86-4093-a572-b67452b4b7d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22621 25738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_suspend.2262125738 |
| Directory | /workspace/15.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/15.usbdev_low_speed_traffic.1838643804 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 2286039758 ps |
| CPU time | 66.97 seconds |
| Started | Aug 15 05:29:55 PM PDT 24 |
| Finished | Aug 15 05:31:02 PM PDT 24 |
| Peak memory | 218400 kb |
| Host | smart-776381bc-6299-484f-8d0e-e84865c0075c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1838643804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.1838643804 |
| Directory | /workspace/15.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_inter_pkt_delay.337453013 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 2576346976 ps |
| CPU time | 26.45 seconds |
| Started | Aug 15 05:29:57 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-8b79d836-3b1e-4613-8eb9-6e837b3eea25 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=337453013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.337453013 |
| Directory | /workspace/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_length_in_transaction.4166889103 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 251226047 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:05 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-b8a374d3-4711-4490-9cf6-a14d43ac64fd |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=4166889103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.4166889103 |
| Directory | /workspace/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_length_out_transaction.767737624 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 197705526 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:04 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-b2fa13b3-010f-4001-afbd-9197af1a5659 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76773 7624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.767737624 |
| Directory | /workspace/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_non_iso_usb_traffic.741839376 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 3106187967 ps |
| CPU time | 31.64 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:35 PM PDT 24 |
| Peak memory | 217780 kb |
| Host | smart-9ace2745-60b8-4dec-8a68-4fd00ce5bc43 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74183 9376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.741839376 |
| Directory | /workspace/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_inter_pkt_delay.3372405301 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 2735820349 ps |
| CPU time | 23.51 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:27 PM PDT 24 |
| Peak memory | 215732 kb |
| Host | smart-6e05af10-c1a9-40d5-8bb5-ba9a5822409d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3372405301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.3372405301 |
| Directory | /workspace/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_length_in_transaction.3333125185 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 175715712 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:29:56 PM PDT 24 |
| Finished | Aug 15 05:29:57 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-cd8339a7-5f5e-4f37-827e-9b8e87bad580 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3333125185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.3333125185 |
| Directory | /workspace/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_length_out_transaction.2956539253 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 150662640 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:29:55 PM PDT 24 |
| Finished | Aug 15 05:29:56 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9187f2ec-083d-4c42-8e27-c4ecfe5ec56d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29565 39253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.2956539253 |
| Directory | /workspace/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_iso.842103902 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 187921482 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a2af2637-43f7-4cc2-a047-c76e53261faa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84210 3902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_iso.842103902 |
| Directory | /workspace/15.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_stall.2667951203 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 191503630 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:30:10 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-60a57157-d47b-4ad3-8f8f-b31f676061d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26679 51203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_stall.2667951203 |
| Directory | /workspace/15.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_trans_nak.1139056464 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 227465957 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:30:01 PM PDT 24 |
| Finished | Aug 15 05:30:02 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-413bbfad-39b4-499e-9877-d9965ef95985 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11390 56464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_trans_nak.1139056464 |
| Directory | /workspace/15.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/15.usbdev_pending_in_trans.1604129004 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 175048486 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:59 PM PDT 24 |
| Finished | Aug 15 05:30:00 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c1d79eec-683a-4836-9d41-adff06d837c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16041 29004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pending_in_trans.1604129004 |
| Directory | /workspace/15.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_config_pinflip.3063770056 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 256166079 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-50cf1973-ac40-49cc-af60-fcccf159e603 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3063770056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.3063770056 |
| Directory | /workspace/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_config_usb_ref_disable.1733770011 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 182570884 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:58 PM PDT 24 |
| Finished | Aug 15 05:29:59 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-adc5ac03-3d9c-4de3-9457-3ac261e22edd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17337 70011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.1733770011 |
| Directory | /workspace/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_pins_sense.3863167785 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 33173167 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:29:53 PM PDT 24 |
| Finished | Aug 15 05:29:54 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f96c6fed-3089-4b2f-82e3-ad9ed5131aff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38631 67785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.3863167785 |
| Directory | /workspace/15.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_buffer.3907575194 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 16880440575 ps |
| CPU time | 44.46 seconds |
| Started | Aug 15 05:30:09 PM PDT 24 |
| Finished | Aug 15 05:30:54 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-88081f79-1eb2-4e52-8456-29980100fc5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39075 75194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_buffer.3907575194 |
| Directory | /workspace/15.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_received.1707915829 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 178950378 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:17 PM PDT 24 |
| Finished | Aug 15 05:30:19 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-8cafc2f8-a445-4f6c-936e-05f8a92315f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17079 15829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_received.1707915829 |
| Directory | /workspace/15.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_sent.1283566656 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 171162087 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:00 PM PDT 24 |
| Finished | Aug 15 05:30:01 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a1765200-600e-4856-9d92-7c9a94c9339f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12835 66656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_sent.1283566656 |
| Directory | /workspace/15.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/15.usbdev_random_length_in_transaction.3022888526 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 256950247 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:30:01 PM PDT 24 |
| Finished | Aug 15 05:30:02 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-667933e8-fc42-41c1-812f-2871737357ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30228 88526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_in_transaction.3022888526 |
| Directory | /workspace/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_random_length_out_transaction.42472384 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 162764361 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:07 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-aa12f658-ba59-4a40-af2c-287c10264819 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42472 384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.42472384 |
| Directory | /workspace/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_resume_link_active.1094346956 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 20217626623 ps |
| CPU time | 28.08 seconds |
| Started | Aug 15 05:30:01 PM PDT 24 |
| Finished | Aug 15 05:30:29 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-6d7f3d1d-ec89-4a88-a74b-cab6f907f547 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10943 46956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_resume_link_active.1094346956 |
| Directory | /workspace/15.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/15.usbdev_rx_crc_err.4200269421 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 173978393 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:07 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-1aecca38-474f-4130-93ba-c358bcf9d5ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42002 69421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_rx_crc_err.4200269421 |
| Directory | /workspace/15.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_rx_full.3791470594 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 263913366 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:29:57 PM PDT 24 |
| Finished | Aug 15 05:29:59 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-64b0c71b-be3d-4f49-a290-cf0e51108b82 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37914 70594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_rx_full.3791470594 |
| Directory | /workspace/15.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/15.usbdev_setup_stage.3609827246 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 152017721 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:04 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-cf27ba73-e628-4f36-9323-1c33c5938949 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36098 27246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_setup_stage.3609827246 |
| Directory | /workspace/15.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/15.usbdev_setup_trans_ignored.2642798138 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 151125124 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:04 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-f9496e48-4f7c-4425-9a58-2895706ac7d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26427 98138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_setup_trans_ignored.2642798138 |
| Directory | /workspace/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/15.usbdev_smoke.921302046 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 195501263 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:05 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d380f846-ccdb-40f9-aa00-c24be59565e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92130 2046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.921302046 |
| Directory | /workspace/15.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/15.usbdev_spurious_pids_ignored.451619276 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 1438370325 ps |
| CPU time | 10.27 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 224004 kb |
| Host | smart-803f7f5e-8b98-4fe1-a867-f477496eeda2 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=451619276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.451619276 |
| Directory | /workspace/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/15.usbdev_stall_priority_over_nak.2052930807 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 175191597 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:30:14 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-12f4d3b9-9b42-41e5-bfc1-a8215595b208 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20529 30807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.2052930807 |
| Directory | /workspace/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/15.usbdev_stall_trans.1947459422 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 157010949 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:08 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-3a9f52e4-30bf-4050-a3bb-e8999573dc8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19474 59422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_trans.1947459422 |
| Directory | /workspace/15.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_stream_len_max.403648868 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 290582686 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:30:05 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-642a06b1-5d3a-4dc7-aea4-dbc01f24cbf7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40364 8868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.403648868 |
| Directory | /workspace/15.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/15.usbdev_streaming_out.3637071487 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 2716843488 ps |
| CPU time | 80.73 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 216136 kb |
| Host | smart-12332320-7a06-4db9-957f-879ed7d00994 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36370 71487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_streaming_out.3637071487 |
| Directory | /workspace/15.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/15.usbdev_timeout_missing_host_handshake.2297422611 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 1008790677 ps |
| CPU time | 23.07 seconds |
| Started | Aug 15 05:30:00 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-b7cfdcb3-6609-499d-a82c-ddd10e5cc96d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2297422611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_hos t_handshake.2297422611 |
| Directory | /workspace/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/15.usbdev_tx_rx_disruption.3043332036 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 485952234 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:30:13 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-107693b9-73d5-43ab-9ad6-55eb3413c1ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3043332036 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_tx_rx_disruption.3043332036 |
| Directory | /workspace/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/150.usbdev_endpoint_types.3107894042 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 566745929 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ab84650f-5697-41c8-8263-64e16a9830c3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3107894042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.3107894042 |
| Directory | /workspace/150.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/150.usbdev_tx_rx_disruption.3423026957 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 517081889 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:20 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-fa5826e2-df8b-4aeb-b445-b46b8a2a8957 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3423026957 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 150.usbdev_tx_rx_disruption.3423026957 |
| Directory | /workspace/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/151.usbdev_endpoint_types.1251186249 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 207853169 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:55 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-5d671891-bc15-4f68-ab7b-31a5fa91258f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1251186249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.1251186249 |
| Directory | /workspace/151.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/151.usbdev_tx_rx_disruption.379011738 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 498836421 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:10 PM PDT 24 |
| Finished | Aug 15 05:35:12 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-700cc275-c8d4-49d7-b210-1a33914c258b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=379011738 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 151.usbdev_tx_rx_disruption.379011738 |
| Directory | /workspace/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/152.usbdev_endpoint_types.2046304618 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 172544669 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:35:03 PM PDT 24 |
| Finished | Aug 15 05:35:04 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-2b733ef4-c17f-4979-b908-47a7091a2e9f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2046304618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.2046304618 |
| Directory | /workspace/152.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/152.usbdev_tx_rx_disruption.3824428828 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 528006015 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-fb38320a-f65b-4e34-bf9a-d47677d33510 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3824428828 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 152.usbdev_tx_rx_disruption.3824428828 |
| Directory | /workspace/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/153.usbdev_tx_rx_disruption.3156467671 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 464824351 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:09 PM PDT 24 |
| Finished | Aug 15 05:35:11 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-9d663093-0851-4772-a812-763d2435d822 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3156467671 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 153.usbdev_tx_rx_disruption.3156467671 |
| Directory | /workspace/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/154.usbdev_endpoint_types.3053808056 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 245625273 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-6319a636-ec7a-4070-804a-d8fe94bce79d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3053808056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.3053808056 |
| Directory | /workspace/154.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/154.usbdev_tx_rx_disruption.923230679 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 511926339 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:34:59 PM PDT 24 |
| Finished | Aug 15 05:35:01 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-264a0796-ecfd-40ca-b963-cd6b59f1da66 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=923230679 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 154.usbdev_tx_rx_disruption.923230679 |
| Directory | /workspace/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/155.usbdev_endpoint_types.3230522479 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 236907036 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:35:12 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-7b2811c0-50b7-4939-bf8e-3642c633d15e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3230522479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.3230522479 |
| Directory | /workspace/155.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/155.usbdev_tx_rx_disruption.1854288920 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 589288690 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-f674292a-65dd-4bae-ba09-2ab86329e180 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1854288920 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 155.usbdev_tx_rx_disruption.1854288920 |
| Directory | /workspace/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/156.usbdev_endpoint_types.2521162240 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 417356693 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:34:55 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-58a78c6b-ced4-491f-9508-9d58210dd747 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2521162240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.2521162240 |
| Directory | /workspace/156.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/156.usbdev_tx_rx_disruption.3457176352 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 637634884 ps |
| CPU time | 1.77 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-1b586e73-d7cc-4820-98f6-d3c91b56b466 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3457176352 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 156.usbdev_tx_rx_disruption.3457176352 |
| Directory | /workspace/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/157.usbdev_endpoint_types.1972123238 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 179029934 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:35:16 PM PDT 24 |
| Finished | Aug 15 05:35:17 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-933b4fd0-b096-459e-8d58-c2410716de26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1972123238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.1972123238 |
| Directory | /workspace/157.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/157.usbdev_tx_rx_disruption.4142263287 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 536270963 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:10 PM PDT 24 |
| Finished | Aug 15 05:35:12 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-c111d902-5ee7-4a8a-990f-dfd5a069332a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4142263287 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 157.usbdev_tx_rx_disruption.4142263287 |
| Directory | /workspace/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/158.usbdev_endpoint_types.3304634161 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 169626253 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:35:05 PM PDT 24 |
| Finished | Aug 15 05:35:06 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2168d26b-8e4e-47af-b7be-edf2497eeef1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3304634161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.3304634161 |
| Directory | /workspace/158.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/158.usbdev_tx_rx_disruption.489927961 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 621724111 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:35:24 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-8d78cf44-c15f-43c0-8a21-58e0f923e7f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=489927961 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 158.usbdev_tx_rx_disruption.489927961 |
| Directory | /workspace/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/159.usbdev_endpoint_types.3127340321 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 502068282 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:18 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ea1654c4-6fa1-46c2-b4e4-8276640e0149 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3127340321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.3127340321 |
| Directory | /workspace/159.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/159.usbdev_tx_rx_disruption.4208429745 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 560378409 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:35:25 PM PDT 24 |
| Finished | Aug 15 05:35:26 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-0d9ec684-4176-4a9b-a536-f08c4f6cf12e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4208429745 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 159.usbdev_tx_rx_disruption.4208429745 |
| Directory | /workspace/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/16.usbdev_alert_test.1577050323 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 49017528 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:30:16 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-eaa925e2-4bc6-4440-b628-66c880f787e9 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1577050323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.1577050323 |
| Directory | /workspace/16.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_disconnect.281848584 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 4442633311 ps |
| CPU time | 6.17 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-f1965d9f-2047-4485-b5b3-ced921bdc74f |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=281848584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_ao n_wake_disconnect.281848584 |
| Directory | /workspace/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_reset.2112566914 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 15299553746 ps |
| CPU time | 18.52 seconds |
| Started | Aug 15 05:29:56 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-4c3fdecf-c42b-43b5-9c02-33ec67b5c03f |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2112566914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.2112566914 |
| Directory | /workspace/16.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_resume.1426317923 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 28917455960 ps |
| CPU time | 37.23 seconds |
| Started | Aug 15 05:30:09 PM PDT 24 |
| Finished | Aug 15 05:30:46 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-7bcc22be-0087-41f6-9a92-8b939b85f46e |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1426317923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_a on_wake_resume.1426317923 |
| Directory | /workspace/16.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/16.usbdev_av_buffer.843276393 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 198441237 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:13 PM PDT 24 |
| Finished | Aug 15 05:30:14 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-38c9452b-cf75-439b-8252-bf5484f3d2f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84327 6393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_av_buffer.843276393 |
| Directory | /workspace/16.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/16.usbdev_bitstuff_err.374760548 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 145158846 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-e668f2dd-4af0-4ab5-b247-4c5371fb14b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37476 0548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_bitstuff_err.374760548 |
| Directory | /workspace/16.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/16.usbdev_data_toggle_clear.2909295676 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 198527762 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:10 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-ed4489bf-65c1-4029-a0cc-53ca45935436 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29092 95676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_clear.2909295676 |
| Directory | /workspace/16.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/16.usbdev_data_toggle_restore.771119173 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 417834753 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:29:59 PM PDT 24 |
| Finished | Aug 15 05:30:00 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a6083acf-e16f-48e0-ad58-e754ca9013f9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=771119173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.771119173 |
| Directory | /workspace/16.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/16.usbdev_device_address.1423765940 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 22902697665 ps |
| CPU time | 35.94 seconds |
| Started | Aug 15 05:30:14 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-698c3e57-c978-470e-95e9-28075bd2fa87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14237 65940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.1423765940 |
| Directory | /workspace/16.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/16.usbdev_device_timeout.606898530 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 1249517249 ps |
| CPU time | 29.55 seconds |
| Started | Aug 15 05:30:13 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 206796 kb |
| Host | smart-a599b52f-dd78-44a7-bfcc-e8f12bbc3406 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=606898530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.606898530 |
| Directory | /workspace/16.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/16.usbdev_disable_endpoint.1847105742 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 812636075 ps |
| CPU time | 1.81 seconds |
| Started | Aug 15 05:30:05 PM PDT 24 |
| Finished | Aug 15 05:30:07 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-7b4f250e-6c78-4784-9a2c-47fba158371b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18471 05742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disable_endpoint.1847105742 |
| Directory | /workspace/16.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/16.usbdev_disconnected.1170631324 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 140907725 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:30:01 PM PDT 24 |
| Finished | Aug 15 05:30:02 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-38d6e410-51f7-4303-b085-0be1f0a17cef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11706 31324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disconnected.1170631324 |
| Directory | /workspace/16.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/16.usbdev_enable.2178413196 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 32202541 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:30:14 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-90ead1e2-d0bc-4783-8a6e-d323e31b4877 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21784 13196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_enable.2178413196 |
| Directory | /workspace/16.usbdev_enable/latest |
| Test location | /workspace/coverage/default/16.usbdev_endpoint_access.1665494180 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 959843995 ps |
| CPU time | 2.58 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-107b2b07-7d1c-4150-b60e-e363a508bcfd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16654 94180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.1665494180 |
| Directory | /workspace/16.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/16.usbdev_endpoint_types.237544768 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 488754847 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:30:00 PM PDT 24 |
| Finished | Aug 15 05:30:01 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7f24e6ad-7ddb-45f8-8d52-b491957d4e15 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=237544768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.237544768 |
| Directory | /workspace/16.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/16.usbdev_fifo_rst.1895152736 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 158309743 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-8081e8a1-5f64-4b98-a306-4512b552285b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18951 52736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_fifo_rst.1895152736 |
| Directory | /workspace/16.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_iso.921278258 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 151525110 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:01 PM PDT 24 |
| Finished | Aug 15 05:30:02 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a4ff2eee-4880-4cca-880a-62f88aa37c0a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=921278258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.921278258 |
| Directory | /workspace/16.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_stall.1964427079 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 236206511 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:10 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d1cc4002-da94-414b-9f1d-c0edcb804107 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19644 27079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_stall.1964427079 |
| Directory | /workspace/16.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_trans.249786886 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 205866460 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:30:17 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-575dfea8-a607-4ea0-b3f6-2b4f1dd360eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24978 6886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_trans.249786886 |
| Directory | /workspace/16.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_invalid_sync.2795521677 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 3635808354 ps |
| CPU time | 30.13 seconds |
| Started | Aug 15 05:29:58 PM PDT 24 |
| Finished | Aug 15 05:30:29 PM PDT 24 |
| Peak memory | 217104 kb |
| Host | smart-743c18de-1266-4c15-b079-c0b55e0f7cac |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2795521677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.2795521677 |
| Directory | /workspace/16.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/16.usbdev_iso_retraction.3233305743 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 7691127844 ps |
| CPU time | 91.14 seconds |
| Started | Aug 15 05:30:16 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-5aef3783-0890-40ea-bbef-ba4c2c7ab445 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3233305743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.3233305743 |
| Directory | /workspace/16.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_in_err.2584274568 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 199460442 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:16 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-31a21b53-aba1-4af5-ae88-996c33a1436a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25842 74568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_in_err.2584274568 |
| Directory | /workspace/16.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_resume.93471830 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 13909631815 ps |
| CPU time | 18.96 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-51a1e500-5696-467f-b033-406de75767cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93471 830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_resume.93471830 |
| Directory | /workspace/16.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_suspend.2925405802 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 10634187127 ps |
| CPU time | 16.13 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207828 kb |
| Host | smart-1ddea9cc-3b3b-4dd1-8c7f-2afc23f33705 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29254 05802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_suspend.2925405802 |
| Directory | /workspace/16.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/16.usbdev_low_speed_traffic.3611986384 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 4966235551 ps |
| CPU time | 52.71 seconds |
| Started | Aug 15 05:30:21 PM PDT 24 |
| Finished | Aug 15 05:31:14 PM PDT 24 |
| Peak memory | 219576 kb |
| Host | smart-dabf981c-96e8-4c3d-b7a7-5d1a0f278392 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3611986384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.3611986384 |
| Directory | /workspace/16.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_inter_pkt_delay.3199821592 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 1924066433 ps |
| CPU time | 19.34 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:22 PM PDT 24 |
| Peak memory | 223920 kb |
| Host | smart-c13c4088-01c8-419e-bba4-5a0649670363 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3199821592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.3199821592 |
| Directory | /workspace/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_length_in_transaction.494113926 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 246210313 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:10 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8e386acb-8df1-4846-83de-f772c4c13ff8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=494113926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.494113926 |
| Directory | /workspace/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_length_out_transaction.1661334635 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 218809289 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:30:11 PM PDT 24 |
| Finished | Aug 15 05:30:12 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-1990b1e7-f76f-4f49-be65-138c3933d9d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16613 34635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.1661334635 |
| Directory | /workspace/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_non_iso_usb_traffic.2579672131 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 2340548530 ps |
| CPU time | 18.33 seconds |
| Started | Aug 15 05:30:19 PM PDT 24 |
| Finished | Aug 15 05:30:37 PM PDT 24 |
| Peak memory | 224048 kb |
| Host | smart-598fb8db-dfee-45cf-b2c8-a4444b827776 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25796 72131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.2579672131 |
| Directory | /workspace/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_inter_pkt_delay.3398383126 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 1654919176 ps |
| CPU time | 16.35 seconds |
| Started | Aug 15 05:30:03 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 217148 kb |
| Host | smart-5494fd59-2e85-4aec-ae51-00800af59439 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3398383126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.3398383126 |
| Directory | /workspace/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_length_in_transaction.429445002 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 193819963 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:08 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-17ea514c-4e5e-40bf-8463-e16cac17c608 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=429445002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.429445002 |
| Directory | /workspace/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_length_out_transaction.3933267672 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 153543190 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:08 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-bc509951-2d36-4227-b084-5bab826fe7a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39332 67672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.3933267672 |
| Directory | /workspace/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_nak_trans.271647422 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 245348488 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-a10cf724-8b09-4a78-99c9-fe3002fcf1c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27164 7422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_nak_trans.271647422 |
| Directory | /workspace/16.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_iso.3650353680 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 247862426 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:11 PM PDT 24 |
| Finished | Aug 15 05:30:12 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-d474ddbd-9ff0-47d5-8bfd-18c6fc39ee21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36503 53680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_iso.3650353680 |
| Directory | /workspace/16.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_stall.2532447678 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 191195518 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-2d813b95-20a1-4966-89cf-2b1c4378014d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25324 47678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_stall.2532447678 |
| Directory | /workspace/16.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_trans_nak.3223854347 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 163126598 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:07 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-25ea0772-9547-435c-bfe5-7f4d51e92811 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32238 54347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_trans_nak.3223854347 |
| Directory | /workspace/16.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/16.usbdev_pending_in_trans.2890900880 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 166077060 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e45ba7e8-fc51-4652-9fce-03c01e58574d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28909 00880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pending_in_trans.2890900880 |
| Directory | /workspace/16.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_config_pinflip.1952878917 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 258077205 ps |
| CPU time | 1.16 seconds |
| Started | Aug 15 05:30:16 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f3f95a43-a88f-41e4-93b7-678eaf8f136e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1952878917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.1952878917 |
| Directory | /workspace/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_config_usb_ref_disable.1824104147 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 145991066 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:30:09 PM PDT 24 |
| Finished | Aug 15 05:30:10 PM PDT 24 |
| Peak memory | 207276 kb |
| Host | smart-9cc6b0f0-00cc-48f2-96be-9d6adfcee0b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18241 04147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.1824104147 |
| Directory | /workspace/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_pins_sense.1795082504 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 42353220 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:30:10 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5468d56c-3d7c-4e9e-ab00-d055b886dbac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17950 82504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.1795082504 |
| Directory | /workspace/16.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_buffer.882245743 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 18543656775 ps |
| CPU time | 55.12 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-6d77463e-079f-4fd3-9738-597a9d659c20 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88224 5743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_buffer.882245743 |
| Directory | /workspace/16.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_received.1389582814 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 223635363 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:30:19 PM PDT 24 |
| Finished | Aug 15 05:30:20 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-a8d6da02-cec2-4459-98c7-7b7b0b2f9b00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13895 82814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_received.1389582814 |
| Directory | /workspace/16.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_sent.3764290267 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 229238675 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:30:05 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-38282577-8d5f-496f-b320-171b09f64a06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37642 90267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_sent.3764290267 |
| Directory | /workspace/16.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/16.usbdev_random_length_in_transaction.1332677834 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 185615991 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:09 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-3fbe976a-5b02-4e1f-943e-89635bcebf68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13326 77834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_in_transaction.1332677834 |
| Directory | /workspace/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_random_length_out_transaction.1047119437 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 139751768 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:08 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-61f07df2-e089-43b4-afda-3f06884c37d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10471 19437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.1047119437 |
| Directory | /workspace/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_resume_link_active.3855897568 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 20162231483 ps |
| CPU time | 23.07 seconds |
| Started | Aug 15 05:30:15 PM PDT 24 |
| Finished | Aug 15 05:30:38 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-2d0e0b3f-841d-42f4-b8c2-7642165e5ea5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38558 97568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_resume_link_active.3855897568 |
| Directory | /workspace/16.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/16.usbdev_rx_crc_err.1583451100 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 156792720 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:08 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-1f6fe3a5-c053-4559-9331-e62abcfe04ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15834 51100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_rx_crc_err.1583451100 |
| Directory | /workspace/16.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/16.usbdev_rx_full.2050319160 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 246468736 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:30:15 PM PDT 24 |
| Finished | Aug 15 05:30:16 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8b32b27c-3892-4713-a253-32d10fb7c7bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20503 19160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_rx_full.2050319160 |
| Directory | /workspace/16.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/16.usbdev_setup_stage.455656135 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 188327391 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:07 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-aee5da07-9417-40ca-a878-2b21ce9f660f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45565 6135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_setup_stage.455656135 |
| Directory | /workspace/16.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/16.usbdev_setup_trans_ignored.3852976727 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 214658509 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:19 PM PDT 24 |
| Finished | Aug 15 05:30:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-32b3b7df-f8e8-4e15-9187-68a736d9ba7e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38529 76727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_setup_trans_ignored.3852976727 |
| Directory | /workspace/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/16.usbdev_smoke.1329631364 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 234635146 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:30:13 PM PDT 24 |
| Finished | Aug 15 05:30:14 PM PDT 24 |
| Peak memory | 206520 kb |
| Host | smart-5a4b05cb-abc2-491d-97e1-27adc2f1b62e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13296 31364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.1329631364 |
| Directory | /workspace/16.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/16.usbdev_spurious_pids_ignored.4103984825 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 3041995240 ps |
| CPU time | 83.18 seconds |
| Started | Aug 15 05:30:11 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 217584 kb |
| Host | smart-acb86b16-de6d-4b09-8e74-5fd991a96e29 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4103984825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.4103984825 |
| Directory | /workspace/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/16.usbdev_stall_priority_over_nak.3369441779 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 191718570 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:30:05 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-53b1c11d-8910-4f02-ba3a-f369b41c8649 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33694 41779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.3369441779 |
| Directory | /workspace/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/16.usbdev_stall_trans.2334817469 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 167380060 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:19 PM PDT 24 |
| Finished | Aug 15 05:30:20 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-4a8b63d1-15ee-4edf-9eee-1e2e42bec43c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23348 17469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_trans.2334817469 |
| Directory | /workspace/16.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_stream_len_max.548555355 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 839682042 ps |
| CPU time | 2.09 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-6d8c0bbb-27ae-4c75-a031-6fbd72a7e215 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54855 5355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.548555355 |
| Directory | /workspace/16.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/16.usbdev_streaming_out.3507471059 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 2465683069 ps |
| CPU time | 72.22 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 217548 kb |
| Host | smart-f1885eba-1abc-4f77-86f4-f948b1db5e37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35074 71059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_streaming_out.3507471059 |
| Directory | /workspace/16.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/16.usbdev_timeout_missing_host_handshake.2335712744 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 607075336 ps |
| CPU time | 11.15 seconds |
| Started | Aug 15 05:30:13 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-351326fe-acae-40c7-82f8-f0caff8b5449 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2335712744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_hos t_handshake.2335712744 |
| Directory | /workspace/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/16.usbdev_tx_rx_disruption.51191541 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 526017476 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:08 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-8c90636d-abd9-49cc-a188-afb353e2924e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51191541 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_tx_rx_disruption.51191541 |
| Directory | /workspace/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/160.usbdev_endpoint_types.3649680295 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 191982049 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:35:10 PM PDT 24 |
| Finished | Aug 15 05:35:11 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8f4ad499-85a2-4e3e-9e0c-ed6c3896c764 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3649680295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.3649680295 |
| Directory | /workspace/160.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/160.usbdev_tx_rx_disruption.4207809422 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 505688978 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:33 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-3cb6f42c-8db4-4821-b86b-5f19c9357d6e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4207809422 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 160.usbdev_tx_rx_disruption.4207809422 |
| Directory | /workspace/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/161.usbdev_endpoint_types.3350366759 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 621522373 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-f4868a56-f1fa-4345-a65d-35530721fed7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3350366759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.3350366759 |
| Directory | /workspace/161.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/161.usbdev_tx_rx_disruption.214599781 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 608893577 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:35:18 PM PDT 24 |
| Finished | Aug 15 05:35:20 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-11279ccb-4286-43fa-826e-13766dad8ad6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=214599781 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 161.usbdev_tx_rx_disruption.214599781 |
| Directory | /workspace/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/162.usbdev_endpoint_types.3885807737 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 605212548 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:11 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a7caab31-3ce0-4104-aa98-80f0f1b33340 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3885807737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.3885807737 |
| Directory | /workspace/162.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/162.usbdev_tx_rx_disruption.3200091295 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 672102133 ps |
| CPU time | 1.88 seconds |
| Started | Aug 15 05:35:42 PM PDT 24 |
| Finished | Aug 15 05:35:44 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-3ed2343e-01d6-4dc9-8f94-efa3240e8366 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3200091295 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 162.usbdev_tx_rx_disruption.3200091295 |
| Directory | /workspace/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/163.usbdev_endpoint_types.2470603675 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 369151522 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:35:12 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-a742310f-959c-445d-88b4-d5238c9daab5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2470603675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.2470603675 |
| Directory | /workspace/163.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/163.usbdev_tx_rx_disruption.4248373482 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 465749072 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-c4566b1e-4ca6-481a-ab33-cc1283f4ad87 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4248373482 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 163.usbdev_tx_rx_disruption.4248373482 |
| Directory | /workspace/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/164.usbdev_tx_rx_disruption.909010844 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 511388059 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:35:16 PM PDT 24 |
| Finished | Aug 15 05:35:17 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-918282dc-10b8-4e99-b944-8355570b5828 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=909010844 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 164.usbdev_tx_rx_disruption.909010844 |
| Directory | /workspace/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/165.usbdev_endpoint_types.790360835 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 195082712 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:35:24 PM PDT 24 |
| Finished | Aug 15 05:35:29 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-3c881f0a-ea20-4ddb-ad62-e6a4edc722fa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=790360835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.790360835 |
| Directory | /workspace/165.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/165.usbdev_tx_rx_disruption.2083667877 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 652143263 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-bf83ac2d-9dd3-47d5-bd11-ed5cd4e5a5a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2083667877 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 165.usbdev_tx_rx_disruption.2083667877 |
| Directory | /workspace/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/166.usbdev_endpoint_types.3127838258 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 598073919 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:34:59 PM PDT 24 |
| Finished | Aug 15 05:35:00 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-1acfdfd9-0ded-4e0e-87f8-159136cf60c6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3127838258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.3127838258 |
| Directory | /workspace/166.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/166.usbdev_tx_rx_disruption.1459088028 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 608754885 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-302c9206-4e52-4c18-838d-f40775bfd6f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1459088028 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 166.usbdev_tx_rx_disruption.1459088028 |
| Directory | /workspace/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/167.usbdev_endpoint_types.2595098390 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 162266005 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e77e3219-b90b-49ed-952d-540092735da5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2595098390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.2595098390 |
| Directory | /workspace/167.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/167.usbdev_tx_rx_disruption.4116447703 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 636211582 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:35:21 PM PDT 24 |
| Finished | Aug 15 05:35:23 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-fdd77a8d-2cd4-4a17-9ac8-5e32b734ef62 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4116447703 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 167.usbdev_tx_rx_disruption.4116447703 |
| Directory | /workspace/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/168.usbdev_endpoint_types.2618410860 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 707869192 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:17 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 206828 kb |
| Host | smart-51dcef08-5f9f-4bd9-85a4-aa90d67b9177 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2618410860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.2618410860 |
| Directory | /workspace/168.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/168.usbdev_tx_rx_disruption.3533256167 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 485066871 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:23 PM PDT 24 |
| Finished | Aug 15 05:35:25 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-068014ee-3dc1-48bf-b7c7-7365c6b147ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3533256167 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 168.usbdev_tx_rx_disruption.3533256167 |
| Directory | /workspace/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/169.usbdev_endpoint_types.3594450680 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 439594772 ps |
| CPU time | 1.27 seconds |
| Started | Aug 15 05:35:01 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-7cdae85f-23b6-4a9b-81dc-a2b6f09251e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3594450680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.3594450680 |
| Directory | /workspace/169.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/169.usbdev_tx_rx_disruption.2432177480 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 582821493 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-fdccb51f-fec2-4ea7-8674-b14747338bd0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2432177480 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 169.usbdev_tx_rx_disruption.2432177480 |
| Directory | /workspace/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/17.usbdev_alert_test.718355883 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 32857812 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:30:11 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-0d64033a-1301-40d5-b0aa-303335129589 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=718355883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.718355883 |
| Directory | /workspace/17.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_disconnect.1305792423 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 10168238298 ps |
| CPU time | 12.94 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:19 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-4343e52d-3acf-45f7-91e8-d0c2534e31af |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1305792423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_a on_wake_disconnect.1305792423 |
| Directory | /workspace/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_reset.667461730 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 21381408943 ps |
| CPU time | 28.49 seconds |
| Started | Aug 15 05:30:04 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-2d49e170-be6b-489b-894e-33b744184358 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=667461730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.667461730 |
| Directory | /workspace/17.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_resume.3984761752 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 25531154821 ps |
| CPU time | 30.15 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:36 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-076f8b67-904a-43e9-8999-5afc58f4eaa5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3984761752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_a on_wake_resume.3984761752 |
| Directory | /workspace/17.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/17.usbdev_av_buffer.2004087215 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 192945200 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-4fc7be41-7f25-4d54-988d-8cf06cb43b91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20040 87215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_av_buffer.2004087215 |
| Directory | /workspace/17.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/17.usbdev_bitstuff_err.549762384 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 149777812 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:10 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b3ad0494-9a59-4b62-9cc5-dc3f031d780f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54976 2384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_bitstuff_err.549762384 |
| Directory | /workspace/17.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_data_toggle_clear.2322493018 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 449886347 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:30:21 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-010ecde8-23ab-420a-9adc-e545abc607ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23224 93018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_clear.2322493018 |
| Directory | /workspace/17.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/17.usbdev_data_toggle_restore.2229212144 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 423777374 ps |
| CPU time | 1.36 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-cd7d7ad8-30a1-41ba-a678-c97c52637775 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2229212144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.2229212144 |
| Directory | /workspace/17.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/17.usbdev_device_address.2115089907 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 50478092137 ps |
| CPU time | 86.47 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-a2687b07-7d88-4e33-b41b-8ac3606cea62 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21150 89907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.2115089907 |
| Directory | /workspace/17.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/17.usbdev_device_timeout.2904564516 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 1594623215 ps |
| CPU time | 9.84 seconds |
| Started | Aug 15 05:30:14 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-bc545ae9-8bf5-4c01-81e8-4c5f47de013c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2904564516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.2904564516 |
| Directory | /workspace/17.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/17.usbdev_disable_endpoint.1673703853 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 940614435 ps |
| CPU time | 2.09 seconds |
| Started | Aug 15 05:30:21 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 206452 kb |
| Host | smart-fb18af59-cc6b-401b-addc-61b4f0bfc656 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16737 03853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_disable_endpoint.1673703853 |
| Directory | /workspace/17.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/17.usbdev_disconnected.1498589547 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 144303184 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:14 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-013a27e2-a950-4e93-a9ee-9e36b95c3762 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14985 89547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_disconnected.1498589547 |
| Directory | /workspace/17.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/17.usbdev_enable.2722027296 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 51980631 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-516838f0-852a-4f1c-8127-cc8b2f949b65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27220 27296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_enable.2722027296 |
| Directory | /workspace/17.usbdev_enable/latest |
| Test location | /workspace/coverage/default/17.usbdev_endpoint_access.1424331872 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 1114003461 ps |
| CPU time | 2.69 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:31 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-3dd2cd10-26c9-4adc-8469-e3b6b2987d14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14243 31872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.1424331872 |
| Directory | /workspace/17.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/17.usbdev_fifo_rst.1862967873 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 426661502 ps |
| CPU time | 2.7 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-06154391-5c6c-4fdf-9078-b505ba9ea479 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18629 67873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_fifo_rst.1862967873 |
| Directory | /workspace/17.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_iso.3486816485 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 221229259 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:30:15 PM PDT 24 |
| Finished | Aug 15 05:30:16 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-ef111149-6161-4f9a-8666-c89dd347c880 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3486816485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.3486816485 |
| Directory | /workspace/17.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_stall.2916163881 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 193769369 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:16 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-9520f24b-591c-429c-a433-f7d77e1c3b03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29161 63881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_stall.2916163881 |
| Directory | /workspace/17.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_trans.2471452838 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 183298715 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-3c2eea19-90e4-412f-a685-d8b3f31e608b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24714 52838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_trans.2471452838 |
| Directory | /workspace/17.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_invalid_sync.901289571 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 4007389776 ps |
| CPU time | 112.32 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:31:59 PM PDT 24 |
| Peak memory | 218264 kb |
| Host | smart-1260e770-8f24-409f-b5d9-e8652976a790 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=901289571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.901289571 |
| Directory | /workspace/17.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/17.usbdev_iso_retraction.3805549313 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 8470715847 ps |
| CPU time | 108.85 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:31:56 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-9caa7e0f-e78b-4ddc-ba3f-0b05ef0b3cb1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3805549313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.3805549313 |
| Directory | /workspace/17.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_in_err.265219251 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 195120432 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:05 PM PDT 24 |
| Finished | Aug 15 05:30:06 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-e46f82e9-0deb-4471-b4b5-a20b5b5716a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26521 9251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_in_err.265219251 |
| Directory | /workspace/17.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_resume.703271738 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 9624648494 ps |
| CPU time | 12.61 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 215836 kb |
| Host | smart-c96b9efd-b3c1-4762-bb6f-1ab2f9b5ab45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70327 1738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_resume.703271738 |
| Directory | /workspace/17.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_suspend.474232341 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 4327699208 ps |
| CPU time | 7.17 seconds |
| Started | Aug 15 05:30:07 PM PDT 24 |
| Finished | Aug 15 05:30:15 PM PDT 24 |
| Peak memory | 216080 kb |
| Host | smart-9b2e69d9-6886-4ba1-a1a7-0758b0b929ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47423 2341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_suspend.474232341 |
| Directory | /workspace/17.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/17.usbdev_low_speed_traffic.711524375 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 4068008060 ps |
| CPU time | 30.47 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:55 PM PDT 24 |
| Peak memory | 224196 kb |
| Host | smart-7cbd6e7f-ec51-4285-ad65-669aa6e64024 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=711524375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.711524375 |
| Directory | /workspace/17.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_inter_pkt_delay.566747467 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 2386969994 ps |
| CPU time | 67.52 seconds |
| Started | Aug 15 05:30:17 PM PDT 24 |
| Finished | Aug 15 05:31:25 PM PDT 24 |
| Peak memory | 217488 kb |
| Host | smart-cbf4c1b2-9be0-4dbe-8a56-0c43936e31d5 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=566747467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.566747467 |
| Directory | /workspace/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_length_in_transaction.4153328146 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 278346659 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:30:14 PM PDT 24 |
| Finished | Aug 15 05:30:16 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-5d4cecb9-5ad1-41f9-b254-ac1c100bf58d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=4153328146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.4153328146 |
| Directory | /workspace/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_length_out_transaction.2593239370 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 189322497 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:30:10 PM PDT 24 |
| Finished | Aug 15 05:30:11 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-387bbe51-bb44-47e0-a02d-de6ce2f8bc28 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25932 39370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.2593239370 |
| Directory | /workspace/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_non_iso_usb_traffic.1245583245 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 3048044049 ps |
| CPU time | 31.29 seconds |
| Started | Aug 15 05:30:11 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 217848 kb |
| Host | smart-deb9e1db-544c-4a52-8307-8309c7be7e36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12455 83245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.1245583245 |
| Directory | /workspace/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_inter_pkt_delay.710842064 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 3227943898 ps |
| CPU time | 26.09 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:53 PM PDT 24 |
| Peak memory | 217548 kb |
| Host | smart-3c2d1b71-c452-4886-98ba-98534e048e22 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=710842064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.710842064 |
| Directory | /workspace/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_length_in_transaction.3762344933 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 148938247 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-25a24b55-65a4-414a-ac30-4be5e7226863 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3762344933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.3762344933 |
| Directory | /workspace/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_length_out_transaction.993544072 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 185960175 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:06 PM PDT 24 |
| Finished | Aug 15 05:30:08 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-978b788d-5d3b-4e1a-8ae7-29aaf6657ae9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99354 4072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.993544072 |
| Directory | /workspace/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_nak_trans.823539308 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 202753945 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:30:12 PM PDT 24 |
| Finished | Aug 15 05:30:14 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-f04ff686-3cee-4b5c-b19e-9beee23c767d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82353 9308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_nak_trans.823539308 |
| Directory | /workspace/17.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_iso.2816531414 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 171638149 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-7029d274-1416-4d64-9194-c00d8b14eead |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28165 31414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_iso.2816531414 |
| Directory | /workspace/17.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_stall.1145679087 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 203499459 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:30:13 PM PDT 24 |
| Finished | Aug 15 05:30:14 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-c438174d-c378-44d2-aee5-a89f507073e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11456 79087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_stall.1145679087 |
| Directory | /workspace/17.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_trans_nak.1531219138 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 208936456 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:16 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-67068e32-bdf2-43aa-8d5a-1dffc7d0960a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15312 19138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_trans_nak.1531219138 |
| Directory | /workspace/17.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/17.usbdev_pending_in_trans.3726988326 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 150249295 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:18 PM PDT 24 |
| Finished | Aug 15 05:30:19 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-8dc293c1-cba9-44fa-b870-c5c1673a502d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37269 88326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pending_in_trans.3726988326 |
| Directory | /workspace/17.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_config_pinflip.2112952330 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 200722164 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-04f1f738-2ada-44d8-a57c-b95370b57939 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2112952330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.2112952330 |
| Directory | /workspace/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_config_usb_ref_disable.909411316 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 187627531 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:31 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-251ce248-3916-4422-a143-5deffed44c0c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90941 1316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.909411316 |
| Directory | /workspace/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_pins_sense.4166486722 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 31354213 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:30:09 PM PDT 24 |
| Finished | Aug 15 05:30:10 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5964890f-0460-4b2e-88d0-76c06b7ffa5e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41664 86722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.4166486722 |
| Directory | /workspace/17.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_buffer.529349544 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 19577089590 ps |
| CPU time | 49.37 seconds |
| Started | Aug 15 05:30:11 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 220632 kb |
| Host | smart-ab52b55d-8cbd-499e-afa2-e8eb0c92afb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52934 9544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_buffer.529349544 |
| Directory | /workspace/17.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_received.1674379634 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 192847173 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:14 PM PDT 24 |
| Finished | Aug 15 05:30:16 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-6ba7173b-67dc-4321-ae3a-f749c9392b03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16743 79634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_received.1674379634 |
| Directory | /workspace/17.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_sent.303789802 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 223456513 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:30:19 PM PDT 24 |
| Finished | Aug 15 05:30:20 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-83926c42-0579-4c42-9a01-43f39885f04c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30378 9802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_sent.303789802 |
| Directory | /workspace/17.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/17.usbdev_random_length_in_transaction.1962057866 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 174144769 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:27 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-f2387c56-c809-41a2-b063-317a1184b91c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19620 57866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_in_transaction.1962057866 |
| Directory | /workspace/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_random_length_out_transaction.1588403591 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 202202646 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:30:11 PM PDT 24 |
| Finished | Aug 15 05:30:12 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-573251cf-dc19-4b3f-af0e-c05d5e74ec93 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15884 03591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.1588403591 |
| Directory | /workspace/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_resume_link_active.3627474306 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 20214766738 ps |
| CPU time | 27.84 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-8e89f309-d015-43e9-a1a8-ac8464869cc8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36274 74306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_resume_link_active.3627474306 |
| Directory | /workspace/17.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/17.usbdev_rx_crc_err.797584439 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 145718387 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a3a3a435-b6d1-4f69-a800-7c260e20c35d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79758 4439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_rx_crc_err.797584439 |
| Directory | /workspace/17.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_rx_full.219496610 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 306046985 ps |
| CPU time | 1.22 seconds |
| Started | Aug 15 05:30:18 PM PDT 24 |
| Finished | Aug 15 05:30:19 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-d77709b4-e3ed-42bd-bea0-f0eb332ce782 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21949 6610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_rx_full.219496610 |
| Directory | /workspace/17.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/17.usbdev_setup_stage.3927326149 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 157094148 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:13 PM PDT 24 |
| Finished | Aug 15 05:30:14 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-4952340d-778b-4921-b1a2-50a6014e7191 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39273 26149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_setup_stage.3927326149 |
| Directory | /workspace/17.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/17.usbdev_setup_trans_ignored.2592931825 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 154287922 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:09 PM PDT 24 |
| Finished | Aug 15 05:30:10 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-9f22c142-2dfb-4bd1-a102-ecb289d55b39 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25929 31825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_setup_trans_ignored.2592931825 |
| Directory | /workspace/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/17.usbdev_smoke.2041788918 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 211850677 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:30:15 PM PDT 24 |
| Finished | Aug 15 05:30:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-aa48fc6c-e6aa-45cd-9faf-e3ecdecb495a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20417 88918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.2041788918 |
| Directory | /workspace/17.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/17.usbdev_spurious_pids_ignored.3440998686 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 1908790094 ps |
| CPU time | 15.01 seconds |
| Started | Aug 15 05:30:09 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 224004 kb |
| Host | smart-2bf7335c-115a-40f2-8808-d1f6ef6aebd7 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3440998686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.3440998686 |
| Directory | /workspace/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/17.usbdev_stall_priority_over_nak.1090343824 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 158958197 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-088006fe-4b1d-4448-936b-b3209edcacff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10903 43824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.1090343824 |
| Directory | /workspace/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/17.usbdev_stall_trans.1736869001 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 147030126 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-2c76af51-0607-4287-bd80-5d2e8690b9c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17368 69001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_trans.1736869001 |
| Directory | /workspace/17.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_stream_len_max.819100623 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 809686951 ps |
| CPU time | 2.17 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-8ce28d8b-6e5f-4405-80dd-34c299ea0d6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81910 0623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.819100623 |
| Directory | /workspace/17.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/17.usbdev_streaming_out.2728487969 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 2244141122 ps |
| CPU time | 17.28 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 217216 kb |
| Host | smart-4928b6bb-d46f-4f65-84a0-fe99c5d2a7a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27284 87969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_streaming_out.2728487969 |
| Directory | /workspace/17.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/17.usbdev_timeout_missing_host_handshake.456261043 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 565032455 ps |
| CPU time | 12.15 seconds |
| Started | Aug 15 05:30:08 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-90a42de0-395e-4147-ac71-bcb91bd3ac8b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=456261043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host _handshake.456261043 |
| Directory | /workspace/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/17.usbdev_tx_rx_disruption.4227269353 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 614777282 ps |
| CPU time | 1.81 seconds |
| Started | Aug 15 05:30:18 PM PDT 24 |
| Finished | Aug 15 05:30:20 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-3094333a-a3c4-4546-843b-d572ad533ef1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4227269353 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_tx_rx_disruption.4227269353 |
| Directory | /workspace/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/170.usbdev_endpoint_types.4019191637 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 232991923 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:35:25 PM PDT 24 |
| Finished | Aug 15 05:35:26 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ab5b7505-fc13-45b7-85f1-91f4e6b78ce2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4019191637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.4019191637 |
| Directory | /workspace/170.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/171.usbdev_endpoint_types.4124459160 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 200360040 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:35:01 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3981f8c0-c23c-4cc5-b1a2-e8935cb23171 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4124459160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.4124459160 |
| Directory | /workspace/171.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/171.usbdev_tx_rx_disruption.3443863964 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 468542367 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-1c0c1e91-28d9-4ea8-b244-2275322dfaa7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3443863964 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 171.usbdev_tx_rx_disruption.3443863964 |
| Directory | /workspace/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/172.usbdev_tx_rx_disruption.443224652 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 639730075 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:20 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-1ab9ce47-70f2-45f8-b1b6-67723b9c4d6b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=443224652 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 172.usbdev_tx_rx_disruption.443224652 |
| Directory | /workspace/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/173.usbdev_endpoint_types.2002149271 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 348006395 ps |
| CPU time | 1.16 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-4606389f-872b-4089-8ce1-a29bcd26b916 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2002149271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.2002149271 |
| Directory | /workspace/173.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/173.usbdev_tx_rx_disruption.1000246816 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 540726694 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-5afd4acb-6de5-4614-91ed-73ae8f7225aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1000246816 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 173.usbdev_tx_rx_disruption.1000246816 |
| Directory | /workspace/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/174.usbdev_endpoint_types.1183141116 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 204949178 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:35:30 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-bf21e016-745c-4273-8b4a-4580f57bc75b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1183141116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.1183141116 |
| Directory | /workspace/174.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/174.usbdev_tx_rx_disruption.108547518 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 610952580 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:35:11 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-3a6a55bf-0d12-47d1-ab95-d6f41ea65f0b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=108547518 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 174.usbdev_tx_rx_disruption.108547518 |
| Directory | /workspace/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/175.usbdev_endpoint_types.172367679 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 554782620 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:35:18 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e50b5e25-b0d2-4804-abef-16c17f98bcb7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=172367679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.172367679 |
| Directory | /workspace/175.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/175.usbdev_tx_rx_disruption.2034633158 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 634125792 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:20 PM PDT 24 |
| Finished | Aug 15 05:35:22 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-70c60f8f-b592-422a-989f-2cba05d07862 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2034633158 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 175.usbdev_tx_rx_disruption.2034633158 |
| Directory | /workspace/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/176.usbdev_endpoint_types.3537934769 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 155840812 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:35:09 PM PDT 24 |
| Finished | Aug 15 05:35:10 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-6c342324-82e2-4ca7-a937-8110c7a1d0e9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3537934769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.3537934769 |
| Directory | /workspace/176.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/176.usbdev_tx_rx_disruption.2741415918 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 469024594 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:22 PM PDT 24 |
| Finished | Aug 15 05:35:24 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-6dd71ff1-0fe0-40c7-95c4-0ba0ad32e486 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2741415918 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 176.usbdev_tx_rx_disruption.2741415918 |
| Directory | /workspace/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/177.usbdev_endpoint_types.580651625 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 191062065 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:35:02 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-363706ab-c894-4a49-a175-a4daf3d2815e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=580651625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.580651625 |
| Directory | /workspace/177.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/177.usbdev_tx_rx_disruption.1149082937 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 470758235 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:35:15 PM PDT 24 |
| Finished | Aug 15 05:35:16 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-27255cdf-8357-4c97-92c7-fd4928e5bb54 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1149082937 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 177.usbdev_tx_rx_disruption.1149082937 |
| Directory | /workspace/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/178.usbdev_tx_rx_disruption.398500416 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 539308910 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:35:04 PM PDT 24 |
| Finished | Aug 15 05:35:06 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-f2c9b41a-76d3-4340-98dd-61389878e9af |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=398500416 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 178.usbdev_tx_rx_disruption.398500416 |
| Directory | /workspace/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/179.usbdev_endpoint_types.1158892199 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 155406205 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-f4e58d9a-ad15-457a-9f4f-9c0b6ef89243 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1158892199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.1158892199 |
| Directory | /workspace/179.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/179.usbdev_tx_rx_disruption.2834486345 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 593608520 ps |
| CPU time | 1.83 seconds |
| Started | Aug 15 05:35:24 PM PDT 24 |
| Finished | Aug 15 05:35:26 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-4caabe37-f982-43ab-8ad1-8ae919e9f665 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2834486345 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 179.usbdev_tx_rx_disruption.2834486345 |
| Directory | /workspace/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/18.usbdev_alert_test.667250309 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 55524536 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:27 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-05dc5283-5db9-4e29-91a8-1a73c379f855 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=667250309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.667250309 |
| Directory | /workspace/18.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_disconnect.3237836942 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 4510834524 ps |
| CPU time | 7.34 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:34 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-6341dcea-98d3-4bde-964b-061f8e6ec020 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3237836942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_a on_wake_disconnect.3237836942 |
| Directory | /workspace/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_reset.3295514 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 20809165414 ps |
| CPU time | 27.45 seconds |
| Started | Aug 15 05:30:15 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-e5a2d3bc-f53f-4537-8578-2c813e5d0291 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3295514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.3295514 |
| Directory | /workspace/18.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_resume.2476631830 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 24930072768 ps |
| CPU time | 34.17 seconds |
| Started | Aug 15 05:30:18 PM PDT 24 |
| Finished | Aug 15 05:30:53 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-a8649627-bc55-44e2-b5eb-33c4640756bd |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2476631830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_a on_wake_resume.2476631830 |
| Directory | /workspace/18.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/18.usbdev_av_buffer.4027797096 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 161134174 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:29 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-9ba2cd0c-a43c-4848-9275-8f91dd642e89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40277 97096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_av_buffer.4027797096 |
| Directory | /workspace/18.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/18.usbdev_bitstuff_err.3536339399 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 144065959 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-181372b1-7548-4e46-a716-dbad7b58ab25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35363 39399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_bitstuff_err.3536339399 |
| Directory | /workspace/18.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_data_toggle_clear.406998344 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 331688293 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-765ef2ec-0dfa-497e-89ee-ae4122395eb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40699 8344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_clear.406998344 |
| Directory | /workspace/18.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/18.usbdev_data_toggle_restore.3931810076 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 1183583146 ps |
| CPU time | 2.94 seconds |
| Started | Aug 15 05:30:38 PM PDT 24 |
| Finished | Aug 15 05:30:41 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-ecdbf714-34bc-4224-807f-ae97614207e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3931810076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.3931810076 |
| Directory | /workspace/18.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/18.usbdev_device_address.1528123390 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 38777841574 ps |
| CPU time | 66.27 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-69aefa76-5e8a-439d-b67e-a44c190e1a50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15281 23390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.1528123390 |
| Directory | /workspace/18.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/18.usbdev_device_timeout.2704089004 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 7710625073 ps |
| CPU time | 52.34 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-e36e6257-c219-4e55-91a6-48301c262f01 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2704089004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.2704089004 |
| Directory | /workspace/18.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/18.usbdev_disable_endpoint.1863954338 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 713326205 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:30:19 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-c99e369c-5b0b-4d10-9c08-7a1f4e254d61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18639 54338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_disable_endpoint.1863954338 |
| Directory | /workspace/18.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/18.usbdev_disconnected.1475323248 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 141668064 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-28ab9826-5ad3-4653-820b-6a34ebd826ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14753 23248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_disconnected.1475323248 |
| Directory | /workspace/18.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/18.usbdev_enable.747750077 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 64302011 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-887624ee-a36e-4247-9003-77ea9bef3fa3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74775 0077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_enable.747750077 |
| Directory | /workspace/18.usbdev_enable/latest |
| Test location | /workspace/coverage/default/18.usbdev_endpoint_access.3033186921 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 810177036 ps |
| CPU time | 2.22 seconds |
| Started | Aug 15 05:30:31 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-613e0890-0b88-4f61-9d85-bdafdf028e45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30331 86921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.3033186921 |
| Directory | /workspace/18.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/18.usbdev_fifo_rst.2867164771 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 158006159 ps |
| CPU time | 1.37 seconds |
| Started | Aug 15 05:30:18 PM PDT 24 |
| Finished | Aug 15 05:30:20 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-03ba928b-fb7b-4d15-8702-7952fcbe14a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28671 64771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_fifo_rst.2867164771 |
| Directory | /workspace/18.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_iso.4007385712 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 162074171 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-f14c0566-e07b-4c32-a6f0-b018927e240e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4007385712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.4007385712 |
| Directory | /workspace/18.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_stall.2225543510 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 139737951 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:30:38 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-2f8828a5-95fe-4fe6-87ab-eb6910ec3a37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22255 43510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_stall.2225543510 |
| Directory | /workspace/18.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_trans.3952343539 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 271607452 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:30:29 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-fe87159a-016c-4280-b77b-235853e1163a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39523 43539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_trans.3952343539 |
| Directory | /workspace/18.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_invalid_sync.2131310852 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 3971251350 ps |
| CPU time | 112.16 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:32:17 PM PDT 24 |
| Peak memory | 216004 kb |
| Host | smart-28540100-ef70-43b6-8932-e056f1073eff |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2131310852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.2131310852 |
| Directory | /workspace/18.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/18.usbdev_iso_retraction.3578591104 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 13499263632 ps |
| CPU time | 87.42 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:31:49 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-77a23634-ea0d-4ce5-aac4-30b403e6a140 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3578591104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.3578591104 |
| Directory | /workspace/18.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_in_err.4216489820 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 226758922 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:21 PM PDT 24 |
| Finished | Aug 15 05:30:22 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-a721f28a-1463-414f-ae26-d76d54b72512 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42164 89820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_in_err.4216489820 |
| Directory | /workspace/18.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_resume.2012395628 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 7131199768 ps |
| CPU time | 11.84 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:32 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-17d7243e-8e7d-4509-849d-719561012343 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20123 95628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_resume.2012395628 |
| Directory | /workspace/18.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_suspend.1827734363 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 8369235702 ps |
| CPU time | 10.66 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:35 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-0982e96f-0a72-4219-8c19-51c1f403d674 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18277 34363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_suspend.1827734363 |
| Directory | /workspace/18.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/18.usbdev_low_speed_traffic.3321779582 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 3661605699 ps |
| CPU time | 37.52 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 219492 kb |
| Host | smart-5d5af24d-d7a9-42ff-a8e0-8e148e69c029 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3321779582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.3321779582 |
| Directory | /workspace/18.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_inter_pkt_delay.3608752630 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 2775181313 ps |
| CPU time | 27.41 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 217628 kb |
| Host | smart-7de69c77-c843-48dc-85d2-838b516c4fd8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3608752630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.3608752630 |
| Directory | /workspace/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_length_in_transaction.538171092 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 293008420 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-cdf2f6d8-2fa7-4e07-88af-b4218aa57c68 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=538171092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.538171092 |
| Directory | /workspace/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_length_out_transaction.894543943 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 219081434 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-7f3befdd-65ff-4d22-9f6c-4c9d441a7c73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89454 3943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.894543943 |
| Directory | /workspace/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_non_iso_usb_traffic.1096786304 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 2320324816 ps |
| CPU time | 65.31 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 217680 kb |
| Host | smart-1535187e-9dc3-46bc-8ff3-39afc02b251e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10967 86304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.1096786304 |
| Directory | /workspace/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_inter_pkt_delay.1034771105 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 3534790854 ps |
| CPU time | 37.24 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-a8e8eb70-0c31-421d-a7f8-83a6e5654ae6 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1034771105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.1034771105 |
| Directory | /workspace/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_length_in_transaction.2115883740 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 165923559 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-11eb50f2-0e3b-4346-803f-ad72bf98b142 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2115883740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.2115883740 |
| Directory | /workspace/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_length_out_transaction.2834227414 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 157428114 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-08daef1e-318e-4d12-9ab5-bf62272fcaf0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28342 27414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.2834227414 |
| Directory | /workspace/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_iso.2417048788 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 181386935 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-b9ae2640-21fb-42f8-a272-086a98bacb78 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24170 48788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_iso.2417048788 |
| Directory | /workspace/18.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_stall.1098460291 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 246939974 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cdfbeb06-53f7-4e1f-a40b-a286594c506a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10984 60291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_stall.1098460291 |
| Directory | /workspace/18.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_trans_nak.2016082320 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 177110387 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-cba3a3fa-59a0-4ce8-bfd7-7807dd5e527c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20160 82320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_trans_nak.2016082320 |
| Directory | /workspace/18.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/18.usbdev_pending_in_trans.301864735 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 152661349 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-a962221f-9d40-4087-a1df-333b65fa2962 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30186 4735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pending_in_trans.301864735 |
| Directory | /workspace/18.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_config_pinflip.2156856604 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 225729274 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:30:15 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-81047315-fcdd-4ed1-a20a-a1e46a1ecdbf |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2156856604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.2156856604 |
| Directory | /workspace/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_config_usb_ref_disable.1254238325 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 158978399 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-f1a849bb-8f87-4dc0-9274-04e604b706bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12542 38325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.1254238325 |
| Directory | /workspace/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_pins_sense.1201144356 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 37520254 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-9085bdad-482b-4984-8a96-295750aa1d19 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12011 44356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.1201144356 |
| Directory | /workspace/18.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_buffer.1744867106 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 11834754991 ps |
| CPU time | 29.92 seconds |
| Started | Aug 15 05:30:15 PM PDT 24 |
| Finished | Aug 15 05:30:45 PM PDT 24 |
| Peak memory | 220404 kb |
| Host | smart-e9ffa18d-fba2-498d-962d-c0e1bf95d5a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17448 67106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_buffer.1744867106 |
| Directory | /workspace/18.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_received.917476279 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 159162294 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:18 PM PDT 24 |
| Finished | Aug 15 05:30:19 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-9a5c9942-9b63-4173-91ad-1a6a6dce4fb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91747 6279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_received.917476279 |
| Directory | /workspace/18.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_sent.2137702146 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 198225241 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:30:41 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-f2944bfe-cd7a-41e4-ab6d-f8853a92b29c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21377 02146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_sent.2137702146 |
| Directory | /workspace/18.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/18.usbdev_random_length_in_transaction.3157826122 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 174923907 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:17 PM PDT 24 |
| Finished | Aug 15 05:30:18 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-af8e247b-469f-4452-bac5-a000fccd6879 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31578 26122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_in_transaction.3157826122 |
| Directory | /workspace/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_random_length_out_transaction.110729532 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 175760431 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:34 PM PDT 24 |
| Finished | Aug 15 05:30:35 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-e3968905-3072-4192-8330-95a1db6c4e24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11072 9532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.110729532 |
| Directory | /workspace/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_resume_link_active.3129337383 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 20166163314 ps |
| CPU time | 22.49 seconds |
| Started | Aug 15 05:30:19 PM PDT 24 |
| Finished | Aug 15 05:30:41 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-3c3e871e-e606-45b7-81cc-711f80368768 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31293 37383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_resume_link_active.3129337383 |
| Directory | /workspace/18.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/18.usbdev_rx_crc_err.3705576384 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 183769802 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-cb1c0b23-4644-4758-bea8-00274910a772 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37055 76384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_rx_crc_err.3705576384 |
| Directory | /workspace/18.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_rx_full.681741896 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 403291140 ps |
| CPU time | 1.38 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-45fcec72-8dc0-4536-aa34-6c8fa461de8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68174 1896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_rx_full.681741896 |
| Directory | /workspace/18.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/18.usbdev_setup_stage.2168973194 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 234664664 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:21 PM PDT 24 |
| Finished | Aug 15 05:30:22 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-2ad0d3c3-3494-4573-91ce-c403ba361f2c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21689 73194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_setup_stage.2168973194 |
| Directory | /workspace/18.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/18.usbdev_setup_trans_ignored.1899431578 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 151144194 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:27 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-06be4ae0-89ea-4f3a-86b4-ed1b34caca04 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18994 31578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_setup_trans_ignored.1899431578 |
| Directory | /workspace/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/18.usbdev_smoke.3806056619 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 250329654 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-bb242e1c-5abf-4b40-821c-64b39846a188 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38060 56619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.3806056619 |
| Directory | /workspace/18.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/18.usbdev_spurious_pids_ignored.218951339 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 1785766979 ps |
| CPU time | 14.48 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:38 PM PDT 24 |
| Peak memory | 224004 kb |
| Host | smart-521eb84a-0453-49d3-aa1f-53bbf13e7526 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=218951339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.218951339 |
| Directory | /workspace/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/18.usbdev_stall_priority_over_nak.319348958 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 225041658 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-25114a51-1e28-41fd-9ed0-d059ec5ac489 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31934 8958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.319348958 |
| Directory | /workspace/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/18.usbdev_stall_trans.645937410 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 150609513 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:27 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-739fc9c1-e670-479d-99f6-b97887d972d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64593 7410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_trans.645937410 |
| Directory | /workspace/18.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_stream_len_max.4033670793 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 785191463 ps |
| CPU time | 2.02 seconds |
| Started | Aug 15 05:30:48 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-27c6665c-7922-4080-bfd2-9854154f50b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40336 70793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.4033670793 |
| Directory | /workspace/18.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/18.usbdev_streaming_out.4188786964 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 2965516856 ps |
| CPU time | 28.66 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:51 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-3ea04f87-1e93-4f69-b9f3-ad708a941969 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41887 86964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_streaming_out.4188786964 |
| Directory | /workspace/18.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/18.usbdev_timeout_missing_host_handshake.3018160168 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 1090419512 ps |
| CPU time | 26.76 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:53 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-d181b330-79c6-490e-a8e5-e3f18d77be88 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3018160168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_hos t_handshake.3018160168 |
| Directory | /workspace/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/18.usbdev_tx_rx_disruption.3860615178 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 509603653 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:30:29 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-64637acb-3666-4a74-86e2-5b98611f3b32 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3860615178 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_tx_rx_disruption.3860615178 |
| Directory | /workspace/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/180.usbdev_endpoint_types.2182146647 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 572589270 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8d40b804-f7f6-4e38-8814-f34e34e7f54b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2182146647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.2182146647 |
| Directory | /workspace/180.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/180.usbdev_tx_rx_disruption.2072200906 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 528238971 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-3a772796-b6cc-4b9e-9018-51da3b691e02 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2072200906 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 180.usbdev_tx_rx_disruption.2072200906 |
| Directory | /workspace/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/181.usbdev_endpoint_types.982999699 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 290179137 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:34:55 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6474ed29-53da-4ce5-b6e0-c1ffc39d9974 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=982999699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.982999699 |
| Directory | /workspace/181.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/181.usbdev_tx_rx_disruption.2693337964 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 648454652 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:17 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 206936 kb |
| Host | smart-d930e6f1-d260-463c-b902-eb315b72e9f2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2693337964 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 181.usbdev_tx_rx_disruption.2693337964 |
| Directory | /workspace/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/182.usbdev_endpoint_types.56350436 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 418618122 ps |
| CPU time | 1.24 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-80100d7c-6b08-4c22-8c9d-2d5e7264b49c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=56350436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.56350436 |
| Directory | /workspace/182.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/182.usbdev_tx_rx_disruption.1328792214 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 485024646 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:14 PM PDT 24 |
| Finished | Aug 15 05:35:16 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-035e3c3c-f29a-49c5-b041-7da0e8d91eb7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1328792214 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 182.usbdev_tx_rx_disruption.1328792214 |
| Directory | /workspace/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/183.usbdev_tx_rx_disruption.1783112140 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 431545378 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:34:55 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-301d4468-235e-4d32-a812-427002ae832b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1783112140 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 183.usbdev_tx_rx_disruption.1783112140 |
| Directory | /workspace/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/184.usbdev_tx_rx_disruption.2131650472 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 603111990 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:31 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-962a7beb-8dee-4a8d-9dad-6575084e7b9f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2131650472 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 184.usbdev_tx_rx_disruption.2131650472 |
| Directory | /workspace/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/185.usbdev_endpoint_types.1860972801 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 143457549 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:35:14 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b68226fc-5856-416e-87f6-e299f2df57bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1860972801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.1860972801 |
| Directory | /workspace/185.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/185.usbdev_tx_rx_disruption.99876641 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 507376820 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:23 PM PDT 24 |
| Finished | Aug 15 05:35:25 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d90bc302-da0d-4c83-9eb0-66fbe8cca385 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99876641 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 185.usbdev_tx_rx_disruption.99876641 |
| Directory | /workspace/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/186.usbdev_endpoint_types.1529773096 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 322192569 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:35:13 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-5507efbb-3a0e-4ba7-b5b0-803409a5f217 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1529773096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.1529773096 |
| Directory | /workspace/186.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/186.usbdev_tx_rx_disruption.11429942 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 518676915 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:27 PM PDT 24 |
| Finished | Aug 15 05:35:29 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-db0f8632-7bf6-48fe-97dc-58c67047c217 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11429942 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 186.usbdev_tx_rx_disruption.11429942 |
| Directory | /workspace/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/187.usbdev_endpoint_types.2365692241 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 321846862 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:35:21 PM PDT 24 |
| Finished | Aug 15 05:35:22 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-68d413b3-fd6b-4e34-a1b6-77163db6f6c8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2365692241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.2365692241 |
| Directory | /workspace/187.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/188.usbdev_endpoint_types.3505642203 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 233488529 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:35:13 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-4f230ee4-811c-485a-bb3c-68aa749745b9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3505642203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.3505642203 |
| Directory | /workspace/188.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/188.usbdev_tx_rx_disruption.2706962968 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 695028817 ps |
| CPU time | 1.78 seconds |
| Started | Aug 15 05:34:58 PM PDT 24 |
| Finished | Aug 15 05:35:00 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-7568b614-106d-44e2-8963-a6efac94b683 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2706962968 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 188.usbdev_tx_rx_disruption.2706962968 |
| Directory | /workspace/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/189.usbdev_endpoint_types.497187870 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 153518861 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:20 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-19f09af8-6c69-4351-8bff-9365255f0895 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=497187870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.497187870 |
| Directory | /workspace/189.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/189.usbdev_tx_rx_disruption.1568469456 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 547838499 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:12 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-db7ae455-5a2c-428d-bd3d-7c15ad33d95f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1568469456 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 189.usbdev_tx_rx_disruption.1568469456 |
| Directory | /workspace/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/19.usbdev_alert_test.3286687173 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 30176329 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:30:43 PM PDT 24 |
| Finished | Aug 15 05:30:44 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-6c58f32b-595d-4ab4-ad63-b6bb789bdb01 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3286687173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.3286687173 |
| Directory | /workspace/19.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_disconnect.1203854912 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 5804666642 ps |
| CPU time | 9.81 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-02222fdb-b57d-4617-a6c8-65091af71150 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1203854912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_a on_wake_disconnect.1203854912 |
| Directory | /workspace/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_reset.909608081 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 20198627321 ps |
| CPU time | 24.27 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:53 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-622079f7-2edf-430a-9874-d5fb54115b7c |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=909608081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.909608081 |
| Directory | /workspace/19.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_resume.619991811 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 24403543668 ps |
| CPU time | 30.74 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:55 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-a0b2848a-6166-450b-8212-62a4d53b2c83 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=619991811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_ao n_wake_resume.619991811 |
| Directory | /workspace/19.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/19.usbdev_av_buffer.1198767938 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 163086543 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:30:30 PM PDT 24 |
| Finished | Aug 15 05:30:32 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-7097da6c-8458-4da0-bf12-c25786803a7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11987 67938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_av_buffer.1198767938 |
| Directory | /workspace/19.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/19.usbdev_bitstuff_err.1023068923 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 150571228 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-c7d358d6-d6ce-4ce1-9d4a-6c23d2c9aac4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10230 68923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_bitstuff_err.1023068923 |
| Directory | /workspace/19.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_data_toggle_clear.3008624192 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 342303690 ps |
| CPU time | 1.21 seconds |
| Started | Aug 15 05:30:27 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-52e1ca5f-5667-4d68-b271-b54e99b01cc5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30086 24192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_clear.3008624192 |
| Directory | /workspace/19.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/19.usbdev_data_toggle_restore.263667021 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 1203735914 ps |
| CPU time | 3 seconds |
| Started | Aug 15 05:30:20 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-978e94e7-3ef2-4e1a-bb36-6a37b467d3ed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=263667021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.263667021 |
| Directory | /workspace/19.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/19.usbdev_device_address.3920579981 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 28926278559 ps |
| CPU time | 51.25 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:31:14 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-25ba6f48-d485-40b1-9c01-a0fc45a302a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39205 79981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.3920579981 |
| Directory | /workspace/19.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/19.usbdev_device_timeout.4147990055 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 913941170 ps |
| CPU time | 19.35 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:42 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-29e8113a-8b62-4ab2-9fab-73093af1a007 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4147990055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.4147990055 |
| Directory | /workspace/19.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/19.usbdev_disable_endpoint.2155097813 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 925982824 ps |
| CPU time | 2.17 seconds |
| Started | Aug 15 05:30:22 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-e964a12e-5f81-49de-8d23-6abd4a9a61c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21550 97813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disable_endpoint.2155097813 |
| Directory | /workspace/19.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/19.usbdev_disconnected.3192766581 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 139838112 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-11493eb3-6875-4ee0-ac39-c4a4a207b6d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31927 66581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disconnected.3192766581 |
| Directory | /workspace/19.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/19.usbdev_enable.2766202512 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 41305052 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:30:31 PM PDT 24 |
| Finished | Aug 15 05:30:32 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-0a564306-56d4-46dd-bfca-aee06e875eed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27662 02512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_enable.2766202512 |
| Directory | /workspace/19.usbdev_enable/latest |
| Test location | /workspace/coverage/default/19.usbdev_endpoint_access.4029400484 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 951121631 ps |
| CPU time | 2.45 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:29 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-3702e116-889f-4ec4-8f7f-14fa59ffada7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40294 00484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.4029400484 |
| Directory | /workspace/19.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/19.usbdev_endpoint_types.3819921111 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 272183236 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:30:16 PM PDT 24 |
| Finished | Aug 15 05:30:17 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-aa66f50a-bf6f-4cf3-9efe-abe5c24875ba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3819921111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.3819921111 |
| Directory | /workspace/19.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/19.usbdev_fifo_rst.3793687104 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 335541878 ps |
| CPU time | 2.57 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:29 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-156896a3-9b36-4d3f-8446-0d9a145dfc8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37936 87104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_fifo_rst.3793687104 |
| Directory | /workspace/19.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_iso.1113151095 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 214921746 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:30:21 PM PDT 24 |
| Finished | Aug 15 05:30:22 PM PDT 24 |
| Peak memory | 215836 kb |
| Host | smart-857a54dd-7c1b-424f-9462-94b332717bee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1113151095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.1113151095 |
| Directory | /workspace/19.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_stall.136501253 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 142983179 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:27 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-fb200677-a2ec-4c81-8262-4d48c9b8a192 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13650 1253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_stall.136501253 |
| Directory | /workspace/19.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_trans.2472930199 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 180721208 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-892073a7-bfa8-47ee-8987-b309b0480fc2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24729 30199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_trans.2472930199 |
| Directory | /workspace/19.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_invalid_sync.4079765175 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 3873909799 ps |
| CPU time | 114.16 seconds |
| Started | Aug 15 05:30:41 PM PDT 24 |
| Finished | Aug 15 05:32:35 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-bae9a855-b822-41aa-bd1e-fc29145b7bc5 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4079765175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.4079765175 |
| Directory | /workspace/19.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/19.usbdev_iso_retraction.3704849348 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 5218386020 ps |
| CPU time | 62.1 seconds |
| Started | Aug 15 05:30:27 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-8c07c532-f7b6-424b-a946-b60f12a35fba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3704849348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.3704849348 |
| Directory | /workspace/19.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_in_err.2963745288 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 211753617 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-c6fa6ccf-d0e2-447e-ae25-bf3217474a58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29637 45288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_in_err.2963745288 |
| Directory | /workspace/19.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_resume.3154774353 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 6799238328 ps |
| CPU time | 8.81 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-2e8bfb08-4e30-41f7-9a37-d3f0349ae584 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31547 74353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_resume.3154774353 |
| Directory | /workspace/19.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_suspend.4120654580 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 3404555348 ps |
| CPU time | 5.54 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 216744 kb |
| Host | smart-d11e5cde-f870-442c-9342-382e508bd4d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41206 54580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_suspend.4120654580 |
| Directory | /workspace/19.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/19.usbdev_low_speed_traffic.1064585718 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 3183518867 ps |
| CPU time | 30.94 seconds |
| Started | Aug 15 05:30:33 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 218544 kb |
| Host | smart-953f412b-1a5b-4b3c-9840-b9fd8d50a083 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1064585718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.1064585718 |
| Directory | /workspace/19.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_inter_pkt_delay.1009852904 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 3899955796 ps |
| CPU time | 112.43 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:32:30 PM PDT 24 |
| Peak memory | 217152 kb |
| Host | smart-2b2af3ff-e889-4948-b56e-a75a11dd9944 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1009852904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.1009852904 |
| Directory | /workspace/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_length_in_transaction.1560915981 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 287983066 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-1c4357fb-f4b8-4874-8380-91f033aa4750 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1560915981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.1560915981 |
| Directory | /workspace/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_length_out_transaction.2258069339 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 234246703 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:30:40 PM PDT 24 |
| Finished | Aug 15 05:30:46 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-56ba7a00-1529-4a02-8ad2-e006c1d59d95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22580 69339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.2258069339 |
| Directory | /workspace/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_non_iso_usb_traffic.4281715683 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 1709928254 ps |
| CPU time | 16.87 seconds |
| Started | Aug 15 05:30:28 PM PDT 24 |
| Finished | Aug 15 05:30:45 PM PDT 24 |
| Peak memory | 217516 kb |
| Host | smart-cf8fd1ca-460c-41f3-a538-0e67fa5262b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42817 15683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.4281715683 |
| Directory | /workspace/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_inter_pkt_delay.2634333901 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 3346960737 ps |
| CPU time | 97.86 seconds |
| Started | Aug 15 05:30:46 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 217272 kb |
| Host | smart-77fe3fc7-818b-430b-a515-fedf33c9f3ce |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2634333901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.2634333901 |
| Directory | /workspace/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_length_in_transaction.2084399355 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 157834211 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:30:33 PM PDT 24 |
| Finished | Aug 15 05:30:34 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-785e0acf-82bd-4838-8769-17f0c6a991c8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2084399355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.2084399355 |
| Directory | /workspace/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_length_out_transaction.3895138957 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 150319596 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:30:34 PM PDT 24 |
| Finished | Aug 15 05:30:35 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-d3d2d29c-e067-4d09-98f0-68ac83ef29a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38951 38957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.3895138957 |
| Directory | /workspace/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_nak_trans.2432326552 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 236305201 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:30:50 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ebdda6df-e023-45b5-a71e-3b29a1c4205e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24323 26552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_nak_trans.2432326552 |
| Directory | /workspace/19.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_iso.4121397369 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 228273253 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:30:45 PM PDT 24 |
| Finished | Aug 15 05:30:46 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7f2d8703-d1ec-445b-bad5-ba88c98e457e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41213 97369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_iso.4121397369 |
| Directory | /workspace/19.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_stall.954796422 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 214758741 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:34 PM PDT 24 |
| Finished | Aug 15 05:30:35 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-79b05c32-17c5-49eb-be2d-d36c47782ac7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95479 6422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_stall.954796422 |
| Directory | /workspace/19.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_trans_nak.2071983314 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 191210815 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:42 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6cbc8e87-74e8-41ea-81d5-881592e38d37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20719 83314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_trans_nak.2071983314 |
| Directory | /workspace/19.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/19.usbdev_pending_in_trans.3392418390 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 216056040 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:27 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-a009cfbc-8dde-4b8f-a6db-3487d51a5341 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33924 18390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pending_in_trans.3392418390 |
| Directory | /workspace/19.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_config_pinflip.3161070274 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 238811149 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:30:39 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-ffd12686-a2b5-45ad-ab49-31a8936331af |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3161070274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.3161070274 |
| Directory | /workspace/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_config_usb_ref_disable.1215616538 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 175464540 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:27 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-58f2f8e9-9a8c-4bc8-86e1-2ec113004074 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12156 16538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.1215616538 |
| Directory | /workspace/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_pins_sense.2021069869 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 45468867 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:30:32 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-25e6f585-05be-4742-b972-a1e2eac727b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20210 69869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2021069869 |
| Directory | /workspace/19.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_buffer.1865012521 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 17943670622 ps |
| CPU time | 49.63 seconds |
| Started | Aug 15 05:30:30 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-f5b4c5e0-8fa9-4292-853a-94f1ae5b6ca7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18650 12521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_buffer.1865012521 |
| Directory | /workspace/19.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_received.1999537158 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 167566062 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:23 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ef009497-ad33-43fc-9fde-28e252caf6af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19995 37158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_received.1999537158 |
| Directory | /workspace/19.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_sent.1285285177 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 193579864 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:46 PM PDT 24 |
| Finished | Aug 15 05:30:47 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-7f01c27f-d91d-4561-b611-170732165945 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12852 85177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_sent.1285285177 |
| Directory | /workspace/19.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/19.usbdev_random_length_in_transaction.2283337617 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 210548920 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:30:45 PM PDT 24 |
| Finished | Aug 15 05:30:46 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-9ab21cff-0549-4480-b2c4-81e4e220b0c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22833 37617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_in_transaction.2283337617 |
| Directory | /workspace/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_random_length_out_transaction.1836360178 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 190379615 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:28 PM PDT 24 |
| Finished | Aug 15 05:30:29 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-7b642170-a9a9-4a6d-8b7a-3b8e3780eab3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18363 60178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.1836360178 |
| Directory | /workspace/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_resume_link_active.1164562489 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 20180860138 ps |
| CPU time | 24.02 seconds |
| Started | Aug 15 05:30:53 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-f01a4a93-4daa-43cb-9d12-61d58c591983 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11645 62489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_resume_link_active.1164562489 |
| Directory | /workspace/19.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/19.usbdev_rx_crc_err.108683755 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 160365517 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:52 PM PDT 24 |
| Finished | Aug 15 05:30:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-1223ae64-59bc-4b46-a7f6-dcaf865a786e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10868 3755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_rx_crc_err.108683755 |
| Directory | /workspace/19.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_rx_full.1573513170 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 254781703 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:30:29 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-1510a326-ffbc-4e32-97c2-c40392afed1d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15735 13170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_rx_full.1573513170 |
| Directory | /workspace/19.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/19.usbdev_setup_stage.821008353 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 191162711 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:33 PM PDT 24 |
| Finished | Aug 15 05:30:34 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-328e97b9-2594-40fb-be0c-4199e4d20a9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82100 8353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_setup_stage.821008353 |
| Directory | /workspace/19.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/19.usbdev_setup_trans_ignored.4092175312 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 168623445 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-a6c76dd5-882f-442c-8b33-0cd41af2cbaa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40921 75312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_setup_trans_ignored.4092175312 |
| Directory | /workspace/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/19.usbdev_smoke.2537380583 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 265176964 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:30:38 PM PDT 24 |
| Finished | Aug 15 05:30:39 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a73e0450-1ac1-4bc9-bcae-06197cd3724c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25373 80583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.2537380583 |
| Directory | /workspace/19.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/19.usbdev_spurious_pids_ignored.1171180942 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 1813989716 ps |
| CPU time | 49.49 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 215820 kb |
| Host | smart-2cf92e5c-41e6-4cf3-bc5e-c9d24b15cfd0 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1171180942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.1171180942 |
| Directory | /workspace/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/19.usbdev_stall_priority_over_nak.1413931583 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 183542369 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:33 PM PDT 24 |
| Finished | Aug 15 05:30:34 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-2e5d2cce-49a8-476d-96cb-9c507996f2cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14139 31583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.1413931583 |
| Directory | /workspace/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/19.usbdev_stall_trans.4255476001 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 176747838 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:27 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-282addc3-0111-49d5-a925-4f732bdbe0ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42554 76001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_trans.4255476001 |
| Directory | /workspace/19.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_stream_len_max.340082575 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 1268873414 ps |
| CPU time | 3.01 seconds |
| Started | Aug 15 05:30:28 PM PDT 24 |
| Finished | Aug 15 05:30:31 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-24ecc685-674e-4c52-980a-4b7fb9c7e6fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34008 2575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.340082575 |
| Directory | /workspace/19.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/19.usbdev_streaming_out.4002795243 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 3502517412 ps |
| CPU time | 35.96 seconds |
| Started | Aug 15 05:30:32 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-5b9f83fb-bafa-42a0-83da-0fe26cf8cc8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40027 95243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_streaming_out.4002795243 |
| Directory | /workspace/19.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/19.usbdev_timeout_missing_host_handshake.3987884601 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 4267184668 ps |
| CPU time | 28.97 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:53 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-3de705e1-0bd2-41e9-b9d1-d7dce3fba9ae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3987884601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_hos t_handshake.3987884601 |
| Directory | /workspace/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/190.usbdev_endpoint_types.2424628707 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 427886050 ps |
| CPU time | 1.25 seconds |
| Started | Aug 15 05:35:25 PM PDT 24 |
| Finished | Aug 15 05:35:26 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-32e4d0b2-b88d-455a-867b-da3bf1f25261 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2424628707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.2424628707 |
| Directory | /workspace/190.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/190.usbdev_tx_rx_disruption.2239779859 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 491482460 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:22 PM PDT 24 |
| Finished | Aug 15 05:35:23 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-00e7f7f8-8d12-43ce-ba69-0f3db0916c27 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2239779859 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 190.usbdev_tx_rx_disruption.2239779859 |
| Directory | /workspace/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/191.usbdev_endpoint_types.3253301784 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 334704184 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:35:17 PM PDT 24 |
| Finished | Aug 15 05:35:18 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b98d3da2-1e8a-4010-9078-e8187e927946 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3253301784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.3253301784 |
| Directory | /workspace/191.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/191.usbdev_tx_rx_disruption.3881555902 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 494822979 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:13 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-2e9d07ed-ec50-4031-b41c-e5e1a5347fca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3881555902 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 191.usbdev_tx_rx_disruption.3881555902 |
| Directory | /workspace/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/192.usbdev_endpoint_types.3615680878 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 235287065 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:35:30 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-609db9ba-790d-4b70-92d8-47bbe1066086 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3615680878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.3615680878 |
| Directory | /workspace/192.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/192.usbdev_tx_rx_disruption.1234288065 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 661891337 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:33 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-cd585385-2fcc-4b32-9e3d-ee3e6516fae2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1234288065 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 192.usbdev_tx_rx_disruption.1234288065 |
| Directory | /workspace/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/193.usbdev_endpoint_types.1562828163 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 251430730 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:31 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-708eeef1-53ea-4214-893b-1a580c4dbcc8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1562828163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.1562828163 |
| Directory | /workspace/193.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/193.usbdev_tx_rx_disruption.1795755462 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 496982598 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:20 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c3fd866e-fb85-4646-acd9-173916a2a571 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1795755462 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 193.usbdev_tx_rx_disruption.1795755462 |
| Directory | /workspace/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/194.usbdev_endpoint_types.1497342162 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 172195920 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-0bab09e5-4aad-4150-adc7-b0c5c612c2ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1497342162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.1497342162 |
| Directory | /workspace/194.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/194.usbdev_tx_rx_disruption.1892322870 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 523456843 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:20 PM PDT 24 |
| Finished | Aug 15 05:35:22 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-f810c91c-c13e-451c-9752-187880829e98 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1892322870 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 194.usbdev_tx_rx_disruption.1892322870 |
| Directory | /workspace/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/195.usbdev_endpoint_types.2295966939 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 230153198 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:35:26 PM PDT 24 |
| Finished | Aug 15 05:35:28 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-34b2af27-adf7-44cb-b3bd-6a9ed002f1f9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2295966939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.2295966939 |
| Directory | /workspace/195.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/195.usbdev_tx_rx_disruption.3407629347 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 521108131 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-eff93777-5864-43f3-894f-b4749acd3e40 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3407629347 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 195.usbdev_tx_rx_disruption.3407629347 |
| Directory | /workspace/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/196.usbdev_tx_rx_disruption.1763271022 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 518800557 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:35:15 PM PDT 24 |
| Finished | Aug 15 05:35:17 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-125157b0-8cb8-406e-9098-b99fe7e61cf2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1763271022 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 196.usbdev_tx_rx_disruption.1763271022 |
| Directory | /workspace/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/197.usbdev_endpoint_types.2946037163 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 236486542 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-322081e5-d6d0-4529-bc46-3cb82347065a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2946037163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.2946037163 |
| Directory | /workspace/197.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/197.usbdev_tx_rx_disruption.475343865 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 548999025 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:15 PM PDT 24 |
| Finished | Aug 15 05:35:17 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-7951d2d7-59b2-4793-ac1e-23909a50707e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=475343865 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 197.usbdev_tx_rx_disruption.475343865 |
| Directory | /workspace/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/198.usbdev_endpoint_types.3713501449 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 178700463 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:35:13 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-5bda7280-aabc-4c35-b9cc-b8bffbb54514 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3713501449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.3713501449 |
| Directory | /workspace/198.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/198.usbdev_tx_rx_disruption.1686373060 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 610821146 ps |
| CPU time | 1.83 seconds |
| Started | Aug 15 05:35:22 PM PDT 24 |
| Finished | Aug 15 05:35:24 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-1a852290-3dd1-4a14-8812-36be1a3384c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1686373060 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 198.usbdev_tx_rx_disruption.1686373060 |
| Directory | /workspace/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/199.usbdev_endpoint_types.1477074085 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 444170083 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:16 PM PDT 24 |
| Finished | Aug 15 05:35:18 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4f8c9311-63da-41bd-9c92-fa08bc280aab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1477074085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.1477074085 |
| Directory | /workspace/199.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/199.usbdev_tx_rx_disruption.2225872787 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 578343947 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:35:11 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-3a69fe6c-d08f-4f9c-8b4e-063fac7feb18 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2225872787 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 199.usbdev_tx_rx_disruption.2225872787 |
| Directory | /workspace/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/2.usbdev_alert_test.2836923377 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 38588844 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b9545586-1077-418b-84f8-d2ca98e355c4 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2836923377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.2836923377 |
| Directory | /workspace/2.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_disconnect.3679645379 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 7158733193 ps |
| CPU time | 11.66 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:27:53 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-a27240e3-7fa3-40d5-ad31-dbd744c7d19a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3679645379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_ao n_wake_disconnect.3679645379 |
| Directory | /workspace/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_reset.1055897434 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 19476089399 ps |
| CPU time | 21.54 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:28:05 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-c7212f2f-2afb-4d5b-a350-450290783f16 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1055897434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.1055897434 |
| Directory | /workspace/2.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_resume.775385633 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 31270274771 ps |
| CPU time | 39.46 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:28:28 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-1febb5eb-9d17-444c-8485-9e34d7fba049 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=775385633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon _wake_resume.775385633 |
| Directory | /workspace/2.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_buffer.1679260328 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 167520994 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:27:42 PM PDT 24 |
| Finished | Aug 15 05:27:43 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-0940d344-efce-4e0a-992a-0ee070677276 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16792 60328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_buffer.1679260328 |
| Directory | /workspace/2.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_empty.2518921570 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 183908812 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:27:45 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-91cf0ac9-2161-4ce7-aa57-c94366a499ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25189 21570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_empty.2518921570 |
| Directory | /workspace/2.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_overflow.2641853406 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 136347737 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207240 kb |
| Host | smart-bc6c524c-14df-4214-93ab-3a219d73f683 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26418 53406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_overflow.2641853406 |
| Directory | /workspace/2.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/2.usbdev_bitstuff_err.3332934648 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 178749209 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-fd544c3a-02ae-46c1-b148-6fcfb2c3b664 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33329 34648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_bitstuff_err.3332934648 |
| Directory | /workspace/2.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_data_toggle_clear.2448954317 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 405736513 ps |
| CPU time | 1.39 seconds |
| Started | Aug 15 05:27:40 PM PDT 24 |
| Finished | Aug 15 05:27:42 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-6e4c698a-1d00-42ec-b591-9317a143a68f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24489 54317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_clear.2448954317 |
| Directory | /workspace/2.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/2.usbdev_data_toggle_restore.2039133798 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 736399429 ps |
| CPU time | 2.04 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:27:51 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-4c2f45c0-0989-430d-99b7-4112eadd5235 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2039133798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.2039133798 |
| Directory | /workspace/2.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/2.usbdev_device_address.3021621481 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 18223774779 ps |
| CPU time | 32.27 seconds |
| Started | Aug 15 05:27:41 PM PDT 24 |
| Finished | Aug 15 05:28:13 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-f0d1b94d-bf96-498a-87aa-d75f9a28f875 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30216 21481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.3021621481 |
| Directory | /workspace/2.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/2.usbdev_device_timeout.3168589584 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 749382039 ps |
| CPU time | 5.05 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-0771cecc-cfef-4e2e-8118-fd933d98e09c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3168589584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.3168589584 |
| Directory | /workspace/2.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/2.usbdev_disable_endpoint.4152820776 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 735161251 ps |
| CPU time | 1.87 seconds |
| Started | Aug 15 05:27:42 PM PDT 24 |
| Finished | Aug 15 05:27:44 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-e2f60502-26df-46b5-842d-05ca3765af3c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41528 20776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disable_endpoint.4152820776 |
| Directory | /workspace/2.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/2.usbdev_disconnected.1498817025 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 145684181 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:27:44 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-cc672a48-9bbc-40e0-865d-949724e27587 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14988 17025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disconnected.1498817025 |
| Directory | /workspace/2.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/2.usbdev_enable.1693144992 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 49355961 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-ce0d6560-f96b-43f0-8fac-b2efb082cd6d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16931 44992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_enable.1693144992 |
| Directory | /workspace/2.usbdev_enable/latest |
| Test location | /workspace/coverage/default/2.usbdev_endpoint_access.3795430048 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 996933084 ps |
| CPU time | 2.57 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-7976cdca-b239-4fc3-9c67-5ca881cf6460 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37954 30048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.3795430048 |
| Directory | /workspace/2.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/2.usbdev_endpoint_types.536757136 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 238461669 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-a76afe67-7e4e-4559-93dc-c13ae93bda22 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=536757136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.536757136 |
| Directory | /workspace/2.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/2.usbdev_fifo_rst.90131378 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 186206316 ps |
| CPU time | 1.9 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-4f284cbf-bf38-4e34-a0c7-82d6f3b9f218 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90131 378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_fifo_rst.90131378 |
| Directory | /workspace/2.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_hiclk.50808338 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 92195440543 ps |
| CPU time | 153.97 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:30:21 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-ecdc8ebb-045d-4c04-91d8-8c9c79dc75d7 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=50808338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.50808338 |
| Directory | /workspace/2.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_hiclk_max.3495934237 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 104329596198 ps |
| CPU time | 174 seconds |
| Started | Aug 15 05:27:55 PM PDT 24 |
| Finished | Aug 15 05:30:49 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-ff8b5bbc-6603-4ed9-9bd0-e6c84071a6b2 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3495934237 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk_max.3495934237 |
| Directory | /workspace/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_loclk.2052351506 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 120134201420 ps |
| CPU time | 181.2 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:30:47 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-296b05f5-22ce-4889-ab8f-c5e44316d8a8 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2052351506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.2052351506 |
| Directory | /workspace/2.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_phase.1926867465 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 88112631107 ps |
| CPU time | 158.48 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-b433df18-e4b5-44f1-8d89-d8e67fb9adcf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19268 67465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_phase.1926867465 |
| Directory | /workspace/2.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_iso.4106334685 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 245858268 ps |
| CPU time | 1.36 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 215840 kb |
| Host | smart-75d092c6-2303-46bf-a6e7-0963d3995b64 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4106334685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.4106334685 |
| Directory | /workspace/2.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_stall.658192082 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 144530062 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:27:59 PM PDT 24 |
| Finished | Aug 15 05:28:00 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-7247fae1-6892-42d6-a1b0-c8edf3f11c87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65819 2082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_stall.658192082 |
| Directory | /workspace/2.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_trans.2424205477 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 232248387 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-e978e6c7-354a-4110-8e4c-a361670617b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24242 05477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_trans.2424205477 |
| Directory | /workspace/2.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_invalid_sync.1922771266 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 4166799800 ps |
| CPU time | 31.29 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:28:20 PM PDT 24 |
| Peak memory | 224096 kb |
| Host | smart-516bcc16-2c33-428b-900c-8890ae661b5b |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1922771266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.1922771266 |
| Directory | /workspace/2.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/2.usbdev_iso_retraction.151511168 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 6641739277 ps |
| CPU time | 40.89 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:28:30 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-132570ca-bbc3-47b9-9cb0-714d6b58efef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=151511168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.151511168 |
| Directory | /workspace/2.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_in_err.2330176327 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 171610290 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-320fef05-8176-4637-a2ca-776fb3eebfb7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23301 76327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_in_err.2330176327 |
| Directory | /workspace/2.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_resume.311701884 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 27137185852 ps |
| CPU time | 43.51 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:28:29 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-bdbb3c9a-2ad0-499f-adea-ae2ff860f83d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31170 1884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_resume.311701884 |
| Directory | /workspace/2.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_suspend.4022879717 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 9975825539 ps |
| CPU time | 15.54 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:28:03 PM PDT 24 |
| Peak memory | 207828 kb |
| Host | smart-70264536-0765-4e57-bd37-4dcb4186f64d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40228 79717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_suspend.4022879717 |
| Directory | /workspace/2.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/2.usbdev_low_speed_traffic.3716377054 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 2936309969 ps |
| CPU time | 23.63 seconds |
| Started | Aug 15 05:27:59 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 219068 kb |
| Host | smart-af32aa94-4be3-4442-97d9-e44bbe8f2a1d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3716377054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.3716377054 |
| Directory | /workspace/2.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_inter_pkt_delay.4027320923 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 2376756465 ps |
| CPU time | 18.88 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:28:03 PM PDT 24 |
| Peak memory | 217672 kb |
| Host | smart-79619058-30a4-40f7-8d19-c14eff1fa145 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4027320923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.4027320923 |
| Directory | /workspace/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_length_in_transaction.2848158192 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 313966164 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-f9680fdb-7e00-4cfb-b969-d5509f2fcb45 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2848158192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.2848158192 |
| Directory | /workspace/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_length_out_transaction.324637723 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 188309178 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:27:44 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-8b879dcb-0960-49f3-985f-598102bb98cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32463 7723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.324637723 |
| Directory | /workspace/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_non_iso_usb_traffic.1589459353 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 2175951063 ps |
| CPU time | 23.11 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:28:10 PM PDT 24 |
| Peak memory | 217556 kb |
| Host | smart-b5998a71-ca60-488e-8f6e-5bdae6966096 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15894 59353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.1589459353 |
| Directory | /workspace/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_usb_traffic.1690074638 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 2015300525 ps |
| CPU time | 16.5 seconds |
| Started | Aug 15 05:27:44 PM PDT 24 |
| Finished | Aug 15 05:28:00 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-42420a39-bf1d-4035-825b-dfd157edfd19 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1690074638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.1690074638 |
| Directory | /workspace/2.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_inter_pkt_delay.1751234946 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 2411352054 ps |
| CPU time | 68.59 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:29:06 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-fed5964e-daa8-48c8-ac9d-cb2acab30938 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1751234946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.1751234946 |
| Directory | /workspace/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_length_in_transaction.3884140777 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 159643650 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:27:43 PM PDT 24 |
| Finished | Aug 15 05:27:45 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-bd1ab8b6-7c31-4802-aded-1c4e93ae2a1e |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3884140777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.3884140777 |
| Directory | /workspace/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_length_out_transaction.486806365 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 146729152 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:54 PM PDT 24 |
| Finished | Aug 15 05:27:55 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-3a1963db-927d-4e9e-8e27-7809541ad8e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48680 6365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.486806365 |
| Directory | /workspace/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_nak_trans.3760563513 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 285370752 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-07374ae7-9750-4126-bf3d-ec69a1216883 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37605 63513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_nak_trans.3760563513 |
| Directory | /workspace/2.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_iso.1943859136 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 163183123 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-a34b8e9c-1959-4e8b-b431-cb86958c244c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19438 59136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_iso.1943859136 |
| Directory | /workspace/2.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_stall.3194619047 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 157640336 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:27:52 PM PDT 24 |
| Finished | Aug 15 05:27:53 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-a7cf4f70-47ff-4010-ba68-680bfb73d1bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31946 19047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_stall.3194619047 |
| Directory | /workspace/2.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_trans_nak.2265466720 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 168119652 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-7145fb27-8f5c-4808-b968-a9c7f0d5755f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22654 66720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_trans_nak.2265466720 |
| Directory | /workspace/2.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/2.usbdev_pending_in_trans.1899096529 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 154719093 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-fcc52794-927f-4aec-8c5f-47d84c9f0375 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18990 96529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pending_in_trans.1899096529 |
| Directory | /workspace/2.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_pinflip.3956383710 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 218339381 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:27:58 PM PDT 24 |
| Finished | Aug 15 05:28:00 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-908e3407-772d-43cb-bcc5-54f12df77f5c |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3956383710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.3956383710 |
| Directory | /workspace/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_rand_bus_type.56166620 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 238191690 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-ae05b793-7a9b-4995-9bdd-77ed2deacb62 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56166 620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.56166620 |
| Directory | /workspace/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_usb_ref_disable.597820390 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 138600918 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:27:58 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-1155cc6d-92bd-45fa-9669-c7a07846ac61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59782 0390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.597820390 |
| Directory | /workspace/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_pins_sense.4272447924 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 92809201 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-363d19d3-fc65-405a-8b24-ed70775966fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42724 47924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.4272447924 |
| Directory | /workspace/2.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_buffer.1604937800 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 6852238148 ps |
| CPU time | 17.71 seconds |
| Started | Aug 15 05:27:54 PM PDT 24 |
| Finished | Aug 15 05:28:12 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-de5db138-472c-41cb-a8b7-46a933462cb4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16049 37800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_buffer.1604937800 |
| Directory | /workspace/2.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_received.2769824609 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 205605179 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:27:55 PM PDT 24 |
| Finished | Aug 15 05:27:56 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d0ecc576-3906-4414-9c4e-226c971053a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27698 24609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_received.2769824609 |
| Directory | /workspace/2.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_sent.523027552 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 244373840 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-3e95f5a3-4974-4f91-abe8-9fff041cab5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52302 7552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_sent.523027552 |
| Directory | /workspace/2.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_bus_disconnects.3413016935 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 1847535669 ps |
| CPU time | 45.18 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:28:34 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-880e847f-f6e6-4823-864d-cc6176f07a8a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3413016935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.3413016935 |
| Directory | /workspace/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_suspends.1882049183 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 5332629907 ps |
| CPU time | 26.51 seconds |
| Started | Aug 15 05:27:52 PM PDT 24 |
| Finished | Aug 15 05:28:19 PM PDT 24 |
| Peak memory | 219636 kb |
| Host | smart-cfbdbfa3-cd62-404e-a288-892168439550 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1882049183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.1882049183 |
| Directory | /workspace/2.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/2.usbdev_random_length_in_transaction.3140149789 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 268949066 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:27:58 PM PDT 24 |
| Finished | Aug 15 05:27:59 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c6c3a5d8-a4ac-4989-934b-9c264cae9f24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31401 49789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_in_transaction.3140149789 |
| Directory | /workspace/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_random_length_out_transaction.3579133234 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 160818979 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:28:04 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-9e0bd10e-6b32-455b-87d0-efad271841b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35791 33234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.3579133234 |
| Directory | /workspace/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_resume_link_active.201225224 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 20157846176 ps |
| CPU time | 23.97 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:28:10 PM PDT 24 |
| Peak memory | 206508 kb |
| Host | smart-d5aac4c5-2dff-4868-a0ea-61ad225ee598 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20122 5224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_resume_link_active.201225224 |
| Directory | /workspace/2.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_crc_err.503311554 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 174572476 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a9516e6d-2c66-45a4-8d0a-fe9835ad0991 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50331 1554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_crc_err.503311554 |
| Directory | /workspace/2.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_full.3646484801 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 262107246 ps |
| CPU time | 1.16 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-fe31e018-884b-40be-a988-81f27718dbeb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36464 84801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_full.3646484801 |
| Directory | /workspace/2.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_pid_err.3861901275 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 180461634 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:27:50 PM PDT 24 |
| Finished | Aug 15 05:27:51 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-42e1e761-e374-4b9a-9b2c-5338ca7c858c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38619 01275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_pid_err.3861901275 |
| Directory | /workspace/2.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_sec_cm.1963152720 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 576975482 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:27:51 PM PDT 24 |
| Peak memory | 224220 kb |
| Host | smart-dff9425e-e5f1-443d-a181-444bf79c003a |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1963152720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.1963152720 |
| Directory | /workspace/2.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_priority.3965771072 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 407466013 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:27:52 PM PDT 24 |
| Finished | Aug 15 05:27:53 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-a56759f8-cc6a-430a-a07a-7e857df72398 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39657 71072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.3965771072 |
| Directory | /workspace/2.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_priority_over_stall_response.828338002 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 248561458 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:27:50 PM PDT 24 |
| Finished | Aug 15 05:27:52 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e9369795-7c7f-46f4-aa70-b98bda7aa1a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82833 8002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+tg l+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.828338002 |
| Directory | /workspace/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_stage.849349917 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 150278758 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207328 kb |
| Host | smart-522d0fb2-0fe0-42ad-8054-9a98c071ed37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84934 9917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_stage.849349917 |
| Directory | /workspace/2.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_trans_ignored.792346341 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 199091025 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-2a6696d8-048f-45e1-afc4-0b60747e2ce5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79234 6341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_trans_ignored.792346341 |
| Directory | /workspace/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/2.usbdev_smoke.1883367095 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 277024023 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:28:05 PM PDT 24 |
| Finished | Aug 15 05:28:06 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-84c971fc-1236-4494-8a10-104804579678 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18833 67095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.1883367095 |
| Directory | /workspace/2.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/2.usbdev_spurious_pids_ignored.4055976583 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 2200487277 ps |
| CPU time | 15.48 seconds |
| Started | Aug 15 05:27:53 PM PDT 24 |
| Finished | Aug 15 05:28:08 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-ff678300-e293-45f8-b31f-93e0b7a5d1f8 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4055976583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.4055976583 |
| Directory | /workspace/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/2.usbdev_stall_priority_over_nak.926623455 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 202491922 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-32e53687-0be6-45e1-b12c-028b4ae7bb76 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92662 3455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.926623455 |
| Directory | /workspace/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/2.usbdev_stall_trans.3836627515 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 168260847 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-2b571bf6-5126-46d9-beb0-a1a36354e221 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38366 27515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_trans.3836627515 |
| Directory | /workspace/2.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_stream_len_max.487316314 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 532820848 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-86a2da31-da9c-413f-a4c6-449807510e10 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48731 6314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.487316314 |
| Directory | /workspace/2.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/2.usbdev_streaming_out.2063569098 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 3101086567 ps |
| CPU time | 32.73 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:28:20 PM PDT 24 |
| Peak memory | 217644 kb |
| Host | smart-259b6cec-5c8a-4cd3-9dd7-677146094b1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20635 69098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_streaming_out.2063569098 |
| Directory | /workspace/2.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/2.usbdev_stress_usb_traffic.1286947263 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 13054495155 ps |
| CPU time | 101.39 seconds |
| Started | Aug 15 05:28:01 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 217580 kb |
| Host | smart-15beb221-cd79-44e9-a2d5-bc623b475ea2 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1286947263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.1286947263 |
| Directory | /workspace/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_timeout_missing_host_handshake.367709927 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 141763082 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-aebb7da4-d78c-4fd7-8012-76846369794e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=367709927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_ handshake.367709927 |
| Directory | /workspace/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/2.usbdev_tx_rx_disruption.815416419 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 711999292 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:27:55 PM PDT 24 |
| Finished | Aug 15 05:27:57 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-e6f3a1c3-662f-4837-904e-97d8f8a02132 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=815416419 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_tx_rx_disruption.815416419 |
| Directory | /workspace/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_disconnect.874047307 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 5214704267 ps |
| CPU time | 7.6 seconds |
| Started | Aug 15 05:30:31 PM PDT 24 |
| Finished | Aug 15 05:30:38 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-4f915a93-d355-4696-b1ab-566590c37581 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=874047307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_ao n_wake_disconnect.874047307 |
| Directory | /workspace/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_reset.758728945 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 15800586226 ps |
| CPU time | 18.31 seconds |
| Started | Aug 15 05:30:51 PM PDT 24 |
| Finished | Aug 15 05:31:10 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-4e9d5de8-3c04-4aaf-a1e8-46ef5619a2b3 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=758728945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.758728945 |
| Directory | /workspace/20.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_resume.3052720005 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 23880693406 ps |
| CPU time | 28.46 seconds |
| Started | Aug 15 05:30:28 PM PDT 24 |
| Finished | Aug 15 05:30:57 PM PDT 24 |
| Peak memory | 215852 kb |
| Host | smart-c2850db1-6d67-4776-97a7-28032917b83e |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3052720005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_a on_wake_resume.3052720005 |
| Directory | /workspace/20.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/20.usbdev_av_buffer.2463517855 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 144278034 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-80934e7b-4d7b-48b0-9ba9-045afbb59f10 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24635 17855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_av_buffer.2463517855 |
| Directory | /workspace/20.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/20.usbdev_bitstuff_err.2659573697 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 158090366 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:26 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a709c976-76b1-4e90-9801-4f32a6d84adb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26595 73697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_bitstuff_err.2659573697 |
| Directory | /workspace/20.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_data_toggle_clear.2194412836 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 172996194 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:29 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-26b9e6ce-f24c-4924-8a92-312c9d86cb66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21944 12836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_clear.2194412836 |
| Directory | /workspace/20.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/20.usbdev_data_toggle_restore.960393505 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 673247491 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-e17046f6-787b-4d86-83f7-69e5657a571b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=960393505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.960393505 |
| Directory | /workspace/20.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/20.usbdev_device_address.756014195 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 25235855872 ps |
| CPU time | 41.53 seconds |
| Started | Aug 15 05:30:28 PM PDT 24 |
| Finished | Aug 15 05:31:10 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-5eaff497-0a88-408d-a037-ef44cd043b64 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75601 4195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.756014195 |
| Directory | /workspace/20.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/20.usbdev_device_timeout.1993194234 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 164947449 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:38 PM PDT 24 |
| Finished | Aug 15 05:30:39 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-da64834e-c705-4d51-ad89-d29b8bc44620 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1993194234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.1993194234 |
| Directory | /workspace/20.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/20.usbdev_disable_endpoint.818760140 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 885283350 ps |
| CPU time | 1.85 seconds |
| Started | Aug 15 05:30:31 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-dacbf2ea-46c9-4057-87d6-99347bf75722 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81876 0140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disable_endpoint.818760140 |
| Directory | /workspace/20.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/20.usbdev_disconnected.4013680102 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 167722228 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:33 PM PDT 24 |
| Finished | Aug 15 05:30:34 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-c27ec2ce-16fe-4a6b-b4be-dcf8a0b57c70 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40136 80102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disconnected.4013680102 |
| Directory | /workspace/20.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/20.usbdev_enable.790226879 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 53055579 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:30:38 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-fca75268-ab0f-4ee0-ba0f-2b64716c3115 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79022 6879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_enable.790226879 |
| Directory | /workspace/20.usbdev_enable/latest |
| Test location | /workspace/coverage/default/20.usbdev_endpoint_access.2110781028 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 1114795928 ps |
| CPU time | 2.74 seconds |
| Started | Aug 15 05:30:31 PM PDT 24 |
| Finished | Aug 15 05:30:34 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-b652e828-a2ba-4946-9d9a-4ae00ff54b8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21107 81028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.2110781028 |
| Directory | /workspace/20.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/20.usbdev_endpoint_types.146364814 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 399217317 ps |
| CPU time | 1.23 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:30:39 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4dee7ac8-8ff1-4b27-9a7a-50cb1ce26f16 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=146364814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.146364814 |
| Directory | /workspace/20.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/20.usbdev_fifo_rst.3224694260 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 171134179 ps |
| CPU time | 1.86 seconds |
| Started | Aug 15 05:30:30 PM PDT 24 |
| Finished | Aug 15 05:30:32 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-4bdb3429-cc0f-4951-a049-8a8535e4bdb4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32246 94260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_fifo_rst.3224694260 |
| Directory | /workspace/20.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_iso.23080644 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 205201462 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:30:43 PM PDT 24 |
| Finished | Aug 15 05:30:44 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-14a8d9b6-bf83-4a59-a769-017a3cb123ae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=23080644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.23080644 |
| Directory | /workspace/20.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_stall.835519404 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 142017583 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:30 PM PDT 24 |
| Finished | Aug 15 05:30:31 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-6f71e92e-ba88-48f7-b7e3-baef9a643963 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83551 9404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_stall.835519404 |
| Directory | /workspace/20.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_trans.1460370686 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 211764056 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:30:44 PM PDT 24 |
| Finished | Aug 15 05:30:45 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-02c2ad27-a3e2-46ff-815c-8107bec42b8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14603 70686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_trans.1460370686 |
| Directory | /workspace/20.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_invalid_sync.1526247359 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 4188768557 ps |
| CPU time | 34.26 seconds |
| Started | Aug 15 05:30:28 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 215852 kb |
| Host | smart-13f2c1b3-3cc3-434c-9d8e-e31a5ec4a2de |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1526247359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.1526247359 |
| Directory | /workspace/20.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/20.usbdev_iso_retraction.3092039889 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 11861844723 ps |
| CPU time | 156.93 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-00a0b37c-fbab-4f18-a804-76a6aa3db9b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3092039889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.3092039889 |
| Directory | /workspace/20.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_in_err.3333001336 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 269149199 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:30:28 PM PDT 24 |
| Finished | Aug 15 05:30:29 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-320c335e-3a97-4d22-b36c-d3f89fa05d67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33330 01336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_in_err.3333001336 |
| Directory | /workspace/20.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_resume.996361756 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 7537685555 ps |
| CPU time | 12.6 seconds |
| Started | Aug 15 05:30:39 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-1abb6531-f548-46b4-b6db-b8dde66ae0a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99636 1756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_resume.996361756 |
| Directory | /workspace/20.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_suspend.789005321 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 4834097275 ps |
| CPU time | 6.95 seconds |
| Started | Aug 15 05:30:53 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-59d31a23-e4e9-485e-99b8-14f5d8466e61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78900 5321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_suspend.789005321 |
| Directory | /workspace/20.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/20.usbdev_low_speed_traffic.893959510 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 2977514596 ps |
| CPU time | 24.01 seconds |
| Started | Aug 15 05:30:32 PM PDT 24 |
| Finished | Aug 15 05:30:57 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-cc366459-ceb6-45e8-a4aa-1bd18a391863 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=893959510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.893959510 |
| Directory | /workspace/20.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_inter_pkt_delay.1990506784 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 2589852117 ps |
| CPU time | 20 seconds |
| Started | Aug 15 05:30:36 PM PDT 24 |
| Finished | Aug 15 05:30:56 PM PDT 24 |
| Peak memory | 215784 kb |
| Host | smart-0bf065c3-3e7d-4df3-b01d-4b82b47b8397 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1990506784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.1990506784 |
| Directory | /workspace/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_length_in_transaction.2738146971 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 255732055 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:30:38 PM PDT 24 |
| Finished | Aug 15 05:30:39 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-c9f8753e-7817-4ca6-b446-29081a40778b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2738146971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.2738146971 |
| Directory | /workspace/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_length_out_transaction.3608790829 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 208682571 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:41 PM PDT 24 |
| Finished | Aug 15 05:30:42 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-da570437-ec35-4e8d-a977-a3a8c8d27f6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36087 90829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.3608790829 |
| Directory | /workspace/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_non_iso_usb_traffic.1437897318 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 3368538399 ps |
| CPU time | 24.96 seconds |
| Started | Aug 15 05:30:25 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-cbd9e84d-7534-4cc9-b397-c1853a07dc56 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14378 97318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.1437897318 |
| Directory | /workspace/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_inter_pkt_delay.439860104 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 3806783719 ps |
| CPU time | 30.46 seconds |
| Started | Aug 15 05:30:31 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 217588 kb |
| Host | smart-89a9a411-3ad8-48b1-8b7c-3fd9e543f83c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=439860104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.439860104 |
| Directory | /workspace/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_length_in_transaction.2184109937 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 160101073 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:26 PM PDT 24 |
| Finished | Aug 15 05:30:27 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-a7386ccf-7030-4727-a1bd-3d92d54e4f73 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2184109937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.2184109937 |
| Directory | /workspace/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_length_out_transaction.3001261038 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 151381203 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:30:34 PM PDT 24 |
| Finished | Aug 15 05:30:35 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-7b33b788-1322-4906-98bb-5056dd96d7e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30012 61038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.3001261038 |
| Directory | /workspace/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_nak_trans.3931391184 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 224544007 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:30:29 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-f2787f69-cfa4-459b-9a32-a6d744a807fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39313 91184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_nak_trans.3931391184 |
| Directory | /workspace/20.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_iso.4259506886 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 159097074 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:44 PM PDT 24 |
| Finished | Aug 15 05:30:45 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ec0bd392-c280-4e93-8a8d-119efd4d9374 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42595 06886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_iso.4259506886 |
| Directory | /workspace/20.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_stall.105151563 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 226521625 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:30:24 PM PDT 24 |
| Finished | Aug 15 05:30:25 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c3684ff1-ea8b-4143-9284-ddc95e3ec306 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10515 1563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_stall.105151563 |
| Directory | /workspace/20.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_trans_nak.2686292712 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 185432495 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:32 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ac0db58b-edbb-4a13-b846-2df46307d704 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26862 92712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_trans_nak.2686292712 |
| Directory | /workspace/20.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/20.usbdev_pending_in_trans.423221202 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 173283112 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:30:43 PM PDT 24 |
| Finished | Aug 15 05:30:44 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-97820688-157b-4997-bc73-ea36dd2c1597 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42322 1202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pending_in_trans.423221202 |
| Directory | /workspace/20.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_config_pinflip.198879086 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 216222931 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:30:33 PM PDT 24 |
| Finished | Aug 15 05:30:35 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-bc00ebf7-ca39-4ab8-8584-0dbe446505aa |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=198879086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.198879086 |
| Directory | /workspace/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_config_usb_ref_disable.429829728 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 173455872 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:39 PM PDT 24 |
| Finished | Aug 15 05:30:40 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-104e2604-f89a-4eda-9c73-c93c32780f48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42982 9728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.429829728 |
| Directory | /workspace/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_pins_sense.426103 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 37242484 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:30:33 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-0f82f192-d61d-46ae-8b8f-c9ea72971285 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42610 3 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.426103 |
| Directory | /workspace/20.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_buffer.3548746252 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 21697196595 ps |
| CPU time | 51.7 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-cb53b8f8-0434-4c80-bc05-46d5054b77e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35487 46252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_buffer.3548746252 |
| Directory | /workspace/20.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_received.3854386477 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 184556223 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:44 PM PDT 24 |
| Finished | Aug 15 05:30:45 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-4851cb54-bad5-4366-8ed9-87c5217294e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38543 86477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_received.3854386477 |
| Directory | /workspace/20.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_sent.1598582981 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 208087300 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:29 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-9a00bf02-cc99-43b8-92c0-6226d91012ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15985 82981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_sent.1598582981 |
| Directory | /workspace/20.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/20.usbdev_random_length_in_transaction.635500147 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 203552285 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:30:32 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-653498b5-cfc2-4d5c-8361-ea81220149ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63550 0147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_in_transaction.635500147 |
| Directory | /workspace/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_random_length_out_transaction.1403205834 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 206900539 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:30:50 PM PDT 24 |
| Finished | Aug 15 05:30:51 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a7265a17-79d8-4130-872b-f87aa67195fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14032 05834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.1403205834 |
| Directory | /workspace/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_rx_crc_err.985809167 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 173546207 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:30:42 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-bf162eaa-f34c-49c4-996f-10144cd900e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98580 9167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_rx_crc_err.985809167 |
| Directory | /workspace/20.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_rx_full.2288461203 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 263547929 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:30:39 PM PDT 24 |
| Finished | Aug 15 05:30:45 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-391c6b51-420e-4abc-b127-d56a7d1c77ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22884 61203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_rx_full.2288461203 |
| Directory | /workspace/20.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/20.usbdev_setup_stage.1936836402 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 168426839 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:30:28 PM PDT 24 |
| Finished | Aug 15 05:30:29 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-e2271061-a87e-4263-9c04-7eb2e5fdee51 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19368 36402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_setup_stage.1936836402 |
| Directory | /workspace/20.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/20.usbdev_setup_trans_ignored.2636975979 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 148487359 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:49 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-85732ef1-e672-443c-9f3d-bc1c37e7f919 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26369 75979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_setup_trans_ignored.2636975979 |
| Directory | /workspace/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/20.usbdev_smoke.3072945358 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 223412853 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:30:32 PM PDT 24 |
| Finished | Aug 15 05:30:34 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ca03c5a2-96ce-495c-8f0c-3f0355eec23c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30729 45358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.3072945358 |
| Directory | /workspace/20.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/20.usbdev_spurious_pids_ignored.2148257636 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 3092217666 ps |
| CPU time | 28.95 seconds |
| Started | Aug 15 05:30:43 PM PDT 24 |
| Finished | Aug 15 05:31:12 PM PDT 24 |
| Peak memory | 218012 kb |
| Host | smart-f30ebc03-a7a9-46b8-b053-f07274ede4fa |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2148257636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.2148257636 |
| Directory | /workspace/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/20.usbdev_stall_priority_over_nak.3643693316 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 185268090 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:35 PM PDT 24 |
| Finished | Aug 15 05:30:36 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e90b9278-b97c-4f94-b5b7-db1138dfba01 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36436 93316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.3643693316 |
| Directory | /workspace/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/20.usbdev_stall_trans.294819627 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 166790162 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:30:47 PM PDT 24 |
| Finished | Aug 15 05:30:48 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-72e9a96a-cc17-4457-9577-ad31677d6552 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29481 9627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_trans.294819627 |
| Directory | /workspace/20.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_stream_len_max.1948608998 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 503727597 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:30:42 PM PDT 24 |
| Finished | Aug 15 05:30:44 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-adcf1797-2c6d-435b-815d-d1a8786feb95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19486 08998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.1948608998 |
| Directory | /workspace/20.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/20.usbdev_streaming_out.29277975 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 2610303593 ps |
| CPU time | 26.44 seconds |
| Started | Aug 15 05:31:04 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-508b67a9-8bd0-4350-956c-1afe2422afa6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29277 975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_streaming_out.29277975 |
| Directory | /workspace/20.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/20.usbdev_timeout_missing_host_handshake.1879793504 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 735382262 ps |
| CPU time | 15.88 seconds |
| Started | Aug 15 05:30:38 PM PDT 24 |
| Finished | Aug 15 05:30:54 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-09efb4b8-9c02-4df9-9943-5e2875232d2c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1879793504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_hos t_handshake.1879793504 |
| Directory | /workspace/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/20.usbdev_tx_rx_disruption.2032543250 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 474961793 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:30:56 PM PDT 24 |
| Finished | Aug 15 05:30:58 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-4a675aa4-d104-4bc8-a9d8-e4712b252267 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2032543250 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_tx_rx_disruption.2032543250 |
| Directory | /workspace/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/200.usbdev_tx_rx_disruption.2419056624 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 588456813 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:20 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f370de32-98cd-46ed-9cbb-ab41e93a5a9d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2419056624 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 200.usbdev_tx_rx_disruption.2419056624 |
| Directory | /workspace/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/201.usbdev_tx_rx_disruption.615750213 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 634955987 ps |
| CPU time | 1.77 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c0a6ee9c-a38e-47a3-a283-6cb5508bbb68 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=615750213 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 201.usbdev_tx_rx_disruption.615750213 |
| Directory | /workspace/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/202.usbdev_tx_rx_disruption.3172715126 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 606735269 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:13 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-02ffbea4-f516-4571-b9ab-b38f209be044 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3172715126 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 202.usbdev_tx_rx_disruption.3172715126 |
| Directory | /workspace/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/203.usbdev_tx_rx_disruption.3669275923 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 511424188 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:30 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-01af76e2-8096-4b77-be60-d3e4fe7aed1a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3669275923 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 203.usbdev_tx_rx_disruption.3669275923 |
| Directory | /workspace/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/204.usbdev_tx_rx_disruption.1081107027 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 581360005 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-dc922fa2-ce76-4a92-8224-407f6bbcc3ed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1081107027 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 204.usbdev_tx_rx_disruption.1081107027 |
| Directory | /workspace/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/205.usbdev_tx_rx_disruption.3674663053 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 525344775 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:11 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-72aeed1b-ada9-4ca7-9e66-3e96fa29c297 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3674663053 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 205.usbdev_tx_rx_disruption.3674663053 |
| Directory | /workspace/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/206.usbdev_tx_rx_disruption.2839425044 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 477822179 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:12 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-ce35b5ec-46a1-41fd-970c-7c66a985bd13 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2839425044 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 206.usbdev_tx_rx_disruption.2839425044 |
| Directory | /workspace/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/207.usbdev_tx_rx_disruption.2661135181 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 702512205 ps |
| CPU time | 1.91 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-75437dda-9916-4fee-a344-c50c3d455ef8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2661135181 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 207.usbdev_tx_rx_disruption.2661135181 |
| Directory | /workspace/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/208.usbdev_tx_rx_disruption.1269036154 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 560640734 ps |
| CPU time | 1.87 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-45c41b2f-24d4-49d3-bab8-3e327333a369 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1269036154 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 208.usbdev_tx_rx_disruption.1269036154 |
| Directory | /workspace/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/209.usbdev_tx_rx_disruption.1312183892 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 532658100 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:35:22 PM PDT 24 |
| Finished | Aug 15 05:35:23 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-261dfb07-fca4-475c-8be4-5e7c71e92184 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1312183892 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 209.usbdev_tx_rx_disruption.1312183892 |
| Directory | /workspace/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/21.usbdev_alert_test.1770577039 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 103445710 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:11 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-aee8b849-f20d-46fa-ab84-49bd2a94982f |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1770577039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.1770577039 |
| Directory | /workspace/21.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_disconnect.2479900906 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 6803261063 ps |
| CPU time | 9.33 seconds |
| Started | Aug 15 05:30:57 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 215812 kb |
| Host | smart-0876aaa7-03e8-4103-bbf9-b22851c8a93b |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2479900906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_a on_wake_disconnect.2479900906 |
| Directory | /workspace/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_reset.1491265970 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 15468218606 ps |
| CPU time | 17.8 seconds |
| Started | Aug 15 05:30:47 PM PDT 24 |
| Finished | Aug 15 05:31:05 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-559a29c7-febb-406c-abbe-2d4d1f34f522 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1491265970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1491265970 |
| Directory | /workspace/21.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_resume.2353317755 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 23535678625 ps |
| CPU time | 28.42 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:28 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-bae28dd0-d119-4f2a-a704-3a582b0f301e |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2353317755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_a on_wake_resume.2353317755 |
| Directory | /workspace/21.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/21.usbdev_av_buffer.2929733042 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 178334301 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:51 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-0052ecd6-b894-49f3-8a4d-df922b8320a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29297 33042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_av_buffer.2929733042 |
| Directory | /workspace/21.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/21.usbdev_bitstuff_err.457256191 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 153509523 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:30:49 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-cf0a1c5b-2b46-42a6-a09f-5c14fea48c9a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45725 6191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_bitstuff_err.457256191 |
| Directory | /workspace/21.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_data_toggle_clear.2757555552 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 427654801 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:30:45 PM PDT 24 |
| Finished | Aug 15 05:30:47 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-4661465a-097c-4687-ac56-a62df163d093 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27575 55552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_clear.2757555552 |
| Directory | /workspace/21.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/21.usbdev_data_toggle_restore.1499550174 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 767719349 ps |
| CPU time | 2.21 seconds |
| Started | Aug 15 05:30:58 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-b34edf91-cf1a-4c84-b4b1-bf9000fec0f5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1499550174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.1499550174 |
| Directory | /workspace/21.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/21.usbdev_device_address.4019447731 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 37255865520 ps |
| CPU time | 55.83 seconds |
| Started | Aug 15 05:30:52 PM PDT 24 |
| Finished | Aug 15 05:31:48 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-e6eb1f51-352e-4f9c-897d-4eb27d23edbb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40194 47731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.4019447731 |
| Directory | /workspace/21.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/21.usbdev_device_timeout.2452782175 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 5052663698 ps |
| CPU time | 35.76 seconds |
| Started | Aug 15 05:30:40 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-ab033538-afc4-45a7-963e-2babdb89faf3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2452782175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.2452782175 |
| Directory | /workspace/21.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/21.usbdev_disable_endpoint.1363103920 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 737422005 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:30:50 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e18019f6-ec26-4d9f-9048-426f3ec42710 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13631 03920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_disable_endpoint.1363103920 |
| Directory | /workspace/21.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/21.usbdev_disconnected.1913034525 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 135874672 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:31 PM PDT 24 |
| Finished | Aug 15 05:30:32 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8c659cc0-be4a-41dc-9076-4620b22eca1f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19130 34525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_disconnected.1913034525 |
| Directory | /workspace/21.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/21.usbdev_enable.1705717775 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 40364694 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:30:57 PM PDT 24 |
| Finished | Aug 15 05:30:58 PM PDT 24 |
| Peak memory | 207316 kb |
| Host | smart-4d606409-fdff-48d7-a761-1246fc7abcaf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17057 17775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_enable.1705717775 |
| Directory | /workspace/21.usbdev_enable/latest |
| Test location | /workspace/coverage/default/21.usbdev_endpoint_access.1706575374 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 834828085 ps |
| CPU time | 2.38 seconds |
| Started | Aug 15 05:30:47 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-3c16526f-270c-485e-9955-f7b1cccca150 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17065 75374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.1706575374 |
| Directory | /workspace/21.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/21.usbdev_endpoint_types.2655873017 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 148883569 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:44 PM PDT 24 |
| Finished | Aug 15 05:30:45 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f6fa3430-9cf8-4ec9-b4d8-20ce6877f8c6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2655873017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.2655873017 |
| Directory | /workspace/21.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/21.usbdev_fifo_rst.1752140500 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 341992204 ps |
| CPU time | 2.3 seconds |
| Started | Aug 15 05:30:35 PM PDT 24 |
| Finished | Aug 15 05:30:37 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-d9e81478-951a-44f3-a738-779b633f8b4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17521 40500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_fifo_rst.1752140500 |
| Directory | /workspace/21.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_iso.1452591210 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 159332662 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:32 PM PDT 24 |
| Finished | Aug 15 05:30:33 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-77cbe5a8-732f-478d-9361-d2707e6eb0ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1452591210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.1452591210 |
| Directory | /workspace/21.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_stall.4155356669 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 152818931 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:30:46 PM PDT 24 |
| Finished | Aug 15 05:30:47 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-05928480-2fb7-458b-aef5-cfa6dc552d75 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41553 56669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_stall.4155356669 |
| Directory | /workspace/21.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_trans.2031912903 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 153731037 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:30:42 PM PDT 24 |
| Finished | Aug 15 05:30:43 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-1a536416-eb6a-47ce-80d9-35ac578221a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20319 12903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_trans.2031912903 |
| Directory | /workspace/21.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_invalid_sync.1904147503 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 4097297954 ps |
| CPU time | 31.38 seconds |
| Started | Aug 15 05:30:42 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 224144 kb |
| Host | smart-4561d2ab-f8f8-4ce1-884a-23825f293944 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1904147503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.1904147503 |
| Directory | /workspace/21.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/21.usbdev_iso_retraction.3936611994 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 11565023288 ps |
| CPU time | 136.43 seconds |
| Started | Aug 15 05:30:52 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-fb196dcf-dd7b-4045-bff8-f5d11faabccd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3936611994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.3936611994 |
| Directory | /workspace/21.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_in_err.198807308 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 209275453 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:30:48 PM PDT 24 |
| Finished | Aug 15 05:30:49 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-c1856434-96a9-49c5-9cb2-71f792c2619d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19880 7308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_in_err.198807308 |
| Directory | /workspace/21.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_resume.915898442 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 29671783066 ps |
| CPU time | 49.41 seconds |
| Started | Aug 15 05:30:57 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-8129e66e-c2ab-4040-ba46-d19b6093de83 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91589 8442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_resume.915898442 |
| Directory | /workspace/21.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_suspend.3916236993 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 6325020839 ps |
| CPU time | 8.65 seconds |
| Started | Aug 15 05:30:33 PM PDT 24 |
| Finished | Aug 15 05:30:42 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-8651fea1-c4db-4b11-9e4d-018955573988 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39162 36993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_suspend.3916236993 |
| Directory | /workspace/21.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/21.usbdev_low_speed_traffic.2794892818 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 4988892114 ps |
| CPU time | 54.83 seconds |
| Started | Aug 15 05:30:34 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 218580 kb |
| Host | smart-f5d9a319-a4c4-48aa-91a8-b95f9eed5788 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2794892818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.2794892818 |
| Directory | /workspace/21.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_inter_pkt_delay.954664173 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 2265789501 ps |
| CPU time | 65.06 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:32:04 PM PDT 24 |
| Peak memory | 217012 kb |
| Host | smart-53a65417-bc19-48c2-a1e5-f5a3351f7101 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=954664173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.954664173 |
| Directory | /workspace/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_length_in_transaction.1171926843 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 242229408 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:41 PM PDT 24 |
| Finished | Aug 15 05:30:42 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5ec76b1a-fab5-4210-a7bd-16685b2a45ac |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1171926843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.1171926843 |
| Directory | /workspace/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_length_out_transaction.840672740 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 256628732 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:30:31 PM PDT 24 |
| Finished | Aug 15 05:30:32 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7ac05079-4fa4-4bb2-842d-47034f64ca2f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84067 2740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.840672740 |
| Directory | /workspace/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_non_iso_usb_traffic.4075473703 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 2368938573 ps |
| CPU time | 66.99 seconds |
| Started | Aug 15 05:30:50 PM PDT 24 |
| Finished | Aug 15 05:31:57 PM PDT 24 |
| Peak memory | 217616 kb |
| Host | smart-46e3f6e7-f242-460a-9a5e-39623119d07a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40754 73703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.4075473703 |
| Directory | /workspace/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_inter_pkt_delay.3046434534 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 3431998843 ps |
| CPU time | 97.08 seconds |
| Started | Aug 15 05:30:41 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-70d2c638-b8cc-4da0-9c99-807ac95505bf |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3046434534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.3046434534 |
| Directory | /workspace/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_length_in_transaction.1313413404 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 161901271 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:49 PM PDT 24 |
| Finished | Aug 15 05:30:50 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-aad65de9-97ed-4af1-9c03-fbe62ab50546 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1313413404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.1313413404 |
| Directory | /workspace/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_length_out_transaction.232628833 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 148478806 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:30:45 PM PDT 24 |
| Finished | Aug 15 05:30:46 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-3066ab92-4b89-4797-ad25-b6933f16305b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23262 8833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.232628833 |
| Directory | /workspace/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_nak_trans.2405890167 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 220604607 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:30:37 PM PDT 24 |
| Finished | Aug 15 05:30:38 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-82e9c6f8-eace-4cef-a923-c5bc00e16272 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24058 90167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_nak_trans.2405890167 |
| Directory | /workspace/21.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_iso.3680235064 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 166784133 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:43 PM PDT 24 |
| Finished | Aug 15 05:30:44 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-7163eb47-7259-4c79-bf8c-898111e63e3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36802 35064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_iso.3680235064 |
| Directory | /workspace/21.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_stall.2489640095 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 183805062 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:30:46 PM PDT 24 |
| Finished | Aug 15 05:30:47 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c942d299-ec02-4d43-a54e-0f76c5a4bb92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24896 40095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_stall.2489640095 |
| Directory | /workspace/21.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_trans_nak.1943862631 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 169602585 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:30:44 PM PDT 24 |
| Finished | Aug 15 05:30:45 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-79d853bf-e729-48a2-b8c7-56804b8c245a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19438 62631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_trans_nak.1943862631 |
| Directory | /workspace/21.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/21.usbdev_pending_in_trans.1555645453 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 163412322 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:30:46 PM PDT 24 |
| Finished | Aug 15 05:30:47 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-25d65859-4c0d-4e85-9979-d11c724ac189 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15556 45453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pending_in_trans.1555645453 |
| Directory | /workspace/21.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_config_pinflip.1240279676 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 210325835 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-60dae14c-7fb5-4ea3-b257-7a4a90bd77f3 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1240279676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.1240279676 |
| Directory | /workspace/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_config_usb_ref_disable.2019024051 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 150342403 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:04 PM PDT 24 |
| Finished | Aug 15 05:31:05 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-60a0ea7c-9280-4eab-85d0-13b710b32201 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20190 24051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.2019024051 |
| Directory | /workspace/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_pins_sense.2380246624 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 38575773 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-4fd9dc69-9824-49a6-a3ab-ae38b788ef24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23802 46624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.2380246624 |
| Directory | /workspace/21.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_buffer.2443627424 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 18582511374 ps |
| CPU time | 46.59 seconds |
| Started | Aug 15 05:30:53 PM PDT 24 |
| Finished | Aug 15 05:31:40 PM PDT 24 |
| Peak memory | 223924 kb |
| Host | smart-9a0cb46a-3782-484e-b701-73bf8a2267ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24436 27424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_buffer.2443627424 |
| Directory | /workspace/21.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_received.1109388708 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 160537505 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:51 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-aff288dc-dd61-4b38-a2b3-404471c798c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11093 88708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_received.1109388708 |
| Directory | /workspace/21.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_sent.2164605953 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 259552259 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-3f5fd99d-714d-402f-90ce-416a269ad209 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21646 05953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_sent.2164605953 |
| Directory | /workspace/21.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/21.usbdev_random_length_in_transaction.319177676 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 244924044 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:30:53 PM PDT 24 |
| Finished | Aug 15 05:30:54 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-6e1f91ab-6537-4dde-9c91-ba35454125db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31917 7676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_in_transaction.319177676 |
| Directory | /workspace/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_random_length_out_transaction.3924448442 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 189161444 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-226986b7-01c6-4d82-bede-6f44e975547b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39244 48442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.3924448442 |
| Directory | /workspace/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_rx_crc_err.79760747 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 154283559 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:04 PM PDT 24 |
| Finished | Aug 15 05:31:05 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-b78b91ad-e302-4779-bf1d-30767e9891f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79760 747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_rx_crc_err.79760747 |
| Directory | /workspace/21.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_rx_full.3034926296 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 371125496 ps |
| CPU time | 1.26 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-f768e361-f328-4942-b6e4-6f40b9476e36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30349 26296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_rx_full.3034926296 |
| Directory | /workspace/21.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/21.usbdev_setup_stage.1399165915 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 155929384 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-b43dc5d9-7c4f-481b-a9ee-878cc9a73bc7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13991 65915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_setup_stage.1399165915 |
| Directory | /workspace/21.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/21.usbdev_setup_trans_ignored.4170065190 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 186863552 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:30:54 PM PDT 24 |
| Finished | Aug 15 05:30:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-fbfd436c-3902-4d49-b8f4-4ce7ee85b3bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41700 65190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_setup_trans_ignored.4170065190 |
| Directory | /workspace/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/21.usbdev_smoke.1427149452 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 248470505 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-45701f36-8ab0-4011-84ce-038e3eaf1a37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14271 49452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.1427149452 |
| Directory | /workspace/21.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/21.usbdev_spurious_pids_ignored.966162289 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 1815136908 ps |
| CPU time | 52.16 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:56 PM PDT 24 |
| Peak memory | 217276 kb |
| Host | smart-17d7eedc-bda9-4ebe-a7b1-6cce501a2aaf |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=966162289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.966162289 |
| Directory | /workspace/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/21.usbdev_stall_priority_over_nak.2653024426 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 185057207 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:30:53 PM PDT 24 |
| Finished | Aug 15 05:30:54 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-78ab71cb-2933-4270-8fbd-611201e1e8af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26530 24426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.2653024426 |
| Directory | /workspace/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/21.usbdev_stall_trans.2679563652 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 260713606 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:30:54 PM PDT 24 |
| Finished | Aug 15 05:30:55 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6fd1562a-4f7a-49f6-89aa-15a8c974c259 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26795 63652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_trans.2679563652 |
| Directory | /workspace/21.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_stream_len_max.1107090135 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 797021536 ps |
| CPU time | 2.02 seconds |
| Started | Aug 15 05:30:58 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-9d64bc73-40d8-46ae-a319-b71be2d7fd99 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11070 90135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.1107090135 |
| Directory | /workspace/21.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/21.usbdev_streaming_out.3665900296 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 2166024774 ps |
| CPU time | 64.04 seconds |
| Started | Aug 15 05:30:56 PM PDT 24 |
| Finished | Aug 15 05:32:00 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-23582942-20ec-4e30-b27d-ccb04c689b07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36659 00296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_streaming_out.3665900296 |
| Directory | /workspace/21.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/21.usbdev_timeout_missing_host_handshake.3909287385 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 6365863447 ps |
| CPU time | 44.56 seconds |
| Started | Aug 15 05:30:54 PM PDT 24 |
| Finished | Aug 15 05:31:39 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-18400946-e4f1-4711-a6f1-f5944eaf6035 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3909287385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_hos t_handshake.3909287385 |
| Directory | /workspace/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/21.usbdev_tx_rx_disruption.1030325955 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 583123169 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:30:55 PM PDT 24 |
| Finished | Aug 15 05:30:57 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-a75c6d46-5d7c-42a2-be08-85af2e03dbcc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1030325955 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_tx_rx_disruption.1030325955 |
| Directory | /workspace/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/210.usbdev_tx_rx_disruption.1799516354 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 527476019 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:35:06 PM PDT 24 |
| Finished | Aug 15 05:35:08 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-5d5e7c81-7393-4790-bd3a-4393afb76728 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1799516354 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 210.usbdev_tx_rx_disruption.1799516354 |
| Directory | /workspace/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/211.usbdev_tx_rx_disruption.1541612455 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 466239419 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c3b7737e-a062-4f23-a42f-0a3fda6a6cef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1541612455 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 211.usbdev_tx_rx_disruption.1541612455 |
| Directory | /workspace/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/212.usbdev_tx_rx_disruption.1238060296 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 597683718 ps |
| CPU time | 1.8 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-46e4e27e-8271-436c-be05-95be870f64d9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1238060296 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 212.usbdev_tx_rx_disruption.1238060296 |
| Directory | /workspace/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/213.usbdev_tx_rx_disruption.1606174730 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 452277329 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:29 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-00c008fd-ccf8-402b-a8c9-d0880ffb3197 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1606174730 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 213.usbdev_tx_rx_disruption.1606174730 |
| Directory | /workspace/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/214.usbdev_tx_rx_disruption.3850760481 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 565558397 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:35:25 PM PDT 24 |
| Finished | Aug 15 05:35:27 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-1205bbcf-6663-4e13-b3fc-90e1fc48aefb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3850760481 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 214.usbdev_tx_rx_disruption.3850760481 |
| Directory | /workspace/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/215.usbdev_tx_rx_disruption.3174409360 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 641370631 ps |
| CPU time | 1.92 seconds |
| Started | Aug 15 05:35:23 PM PDT 24 |
| Finished | Aug 15 05:35:25 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-0c2fbe56-dd47-427d-8cd6-02d91e128f09 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3174409360 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 215.usbdev_tx_rx_disruption.3174409360 |
| Directory | /workspace/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/216.usbdev_tx_rx_disruption.1281246410 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 448564940 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:24 PM PDT 24 |
| Finished | Aug 15 05:35:26 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-973f24b2-e9e9-4a3e-a3c4-5643d0fcf04b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1281246410 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 216.usbdev_tx_rx_disruption.1281246410 |
| Directory | /workspace/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/217.usbdev_tx_rx_disruption.2015390315 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 625539718 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:35:17 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-27fa3c56-bc83-408b-aefc-8b95c064870b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2015390315 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 217.usbdev_tx_rx_disruption.2015390315 |
| Directory | /workspace/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/218.usbdev_tx_rx_disruption.3849224797 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 681403200 ps |
| CPU time | 1.9 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6b64acc2-70f5-41e2-aebb-de17d188b2ce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3849224797 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 218.usbdev_tx_rx_disruption.3849224797 |
| Directory | /workspace/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/219.usbdev_tx_rx_disruption.2205395312 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 437927954 ps |
| CPU time | 1.31 seconds |
| Started | Aug 15 05:35:20 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-13c02af4-694d-4a65-9934-7e5e81088b37 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2205395312 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 219.usbdev_tx_rx_disruption.2205395312 |
| Directory | /workspace/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/22.usbdev_alert_test.474131573 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 50758584 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:31:06 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-a64bbdb3-3651-472f-91f0-a406504560c8 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=474131573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.474131573 |
| Directory | /workspace/22.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_disconnect.1446777453 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 5761781456 ps |
| CPU time | 8.34 seconds |
| Started | Aug 15 05:30:53 PM PDT 24 |
| Finished | Aug 15 05:31:02 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-b1957220-70fa-4f34-849d-c57a49ac342d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1446777453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_a on_wake_disconnect.1446777453 |
| Directory | /workspace/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_reset.3820411244 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 15318286504 ps |
| CPU time | 19.46 seconds |
| Started | Aug 15 05:30:57 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-8d599689-f69a-4ce7-bbc4-87151b7ee823 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3820411244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.3820411244 |
| Directory | /workspace/22.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_resume.1306624397 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 23902422727 ps |
| CPU time | 33.46 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:32 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-1b2f5f0e-dd4a-43d6-a33a-46cba78107d9 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1306624397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_a on_wake_resume.1306624397 |
| Directory | /workspace/22.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/22.usbdev_av_buffer.915553708 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 162263555 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a0ca043a-5c00-4589-aef8-356b54dd6b3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91555 3708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_av_buffer.915553708 |
| Directory | /workspace/22.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/22.usbdev_bitstuff_err.3690809508 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 140369044 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:51 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-143ea6e4-153d-4475-b2e8-90cc2bc416e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36908 09508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_bitstuff_err.3690809508 |
| Directory | /workspace/22.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/22.usbdev_data_toggle_clear.4085431493 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 183262268 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:54 PM PDT 24 |
| Finished | Aug 15 05:30:55 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ca239ac7-f714-4f73-b94e-ed0560dfd0c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40854 31493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_clear.4085431493 |
| Directory | /workspace/22.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/22.usbdev_data_toggle_restore.246953289 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 289421379 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:31:01 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-c7b53b26-7d1a-4b12-9b9e-d20abb58a53e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=246953289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.246953289 |
| Directory | /workspace/22.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/22.usbdev_device_address.3582454839 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 15023118329 ps |
| CPU time | 24.02 seconds |
| Started | Aug 15 05:30:56 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-8c914fd7-e407-4ebd-8c67-a407a4962f33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35824 54839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.3582454839 |
| Directory | /workspace/22.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/22.usbdev_device_timeout.3549142060 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 2943639598 ps |
| CPU time | 25.71 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 207960 kb |
| Host | smart-91a399a1-1945-4f95-a23b-69254dfeeaf4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3549142060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.3549142060 |
| Directory | /workspace/22.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/22.usbdev_disable_endpoint.116439585 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 700845770 ps |
| CPU time | 1.77 seconds |
| Started | Aug 15 05:31:04 PM PDT 24 |
| Finished | Aug 15 05:31:06 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a377807f-e6f4-49a7-8d37-86ebc6e385d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11643 9585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disable_endpoint.116439585 |
| Directory | /workspace/22.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/22.usbdev_disconnected.1524343379 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 180251045 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:30:51 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-f4b21d10-8f9d-476f-bd9e-6377a5d03332 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15243 43379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disconnected.1524343379 |
| Directory | /workspace/22.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/22.usbdev_enable.3374943577 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 34349641 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:30:58 PM PDT 24 |
| Finished | Aug 15 05:30:59 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-f4509721-4e7e-49cb-be67-b53ba70a9c85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33749 43577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_enable.3374943577 |
| Directory | /workspace/22.usbdev_enable/latest |
| Test location | /workspace/coverage/default/22.usbdev_endpoint_access.1294465978 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 686744242 ps |
| CPU time | 2.25 seconds |
| Started | Aug 15 05:30:56 PM PDT 24 |
| Finished | Aug 15 05:30:58 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-fc8bc115-5c84-4d83-8b23-427879ba1ee2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12944 65978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.1294465978 |
| Directory | /workspace/22.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/22.usbdev_endpoint_types.246089908 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 332113468 ps |
| CPU time | 1.19 seconds |
| Started | Aug 15 05:31:00 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-3f069296-63f0-45da-a0b7-7d87c5397337 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=246089908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.246089908 |
| Directory | /workspace/22.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/22.usbdev_fifo_rst.884398437 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 176347635 ps |
| CPU time | 2.13 seconds |
| Started | Aug 15 05:30:56 PM PDT 24 |
| Finished | Aug 15 05:30:58 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-d9811a12-1186-428f-bae5-3bc579ab5ba3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88439 8437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_fifo_rst.884398437 |
| Directory | /workspace/22.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_iso.816229283 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 193293519 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:31:02 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-44df5321-3094-49ca-8385-ab6e5c4541c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=816229283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.816229283 |
| Directory | /workspace/22.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_stall.3983137747 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 141367629 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:56 PM PDT 24 |
| Finished | Aug 15 05:30:57 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-651a82e4-8a18-44d2-90af-be2f835ee1fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39831 37747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_stall.3983137747 |
| Directory | /workspace/22.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_trans.3228510201 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 253097771 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:30:58 PM PDT 24 |
| Finished | Aug 15 05:30:59 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-c343ffc7-ace1-4ce5-9767-62e6bb24080a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32285 10201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_trans.3228510201 |
| Directory | /workspace/22.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_invalid_sync.1810515006 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 4930781303 ps |
| CPU time | 38.03 seconds |
| Started | Aug 15 05:30:57 PM PDT 24 |
| Finished | Aug 15 05:31:35 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-9573cfe2-daef-44be-85cb-d47bfdffa984 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1810515006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.1810515006 |
| Directory | /workspace/22.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/22.usbdev_iso_retraction.1194642593 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 5359077164 ps |
| CPU time | 59.74 seconds |
| Started | Aug 15 05:30:58 PM PDT 24 |
| Finished | Aug 15 05:31:58 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-15cd962d-4c61-4ca9-8eb6-9eb66db5ff3b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1194642593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.1194642593 |
| Directory | /workspace/22.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_in_err.3227423271 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 236771351 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:30:52 PM PDT 24 |
| Finished | Aug 15 05:30:53 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-438d98aa-7fd2-4910-ac4c-62a6fd3d237c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32274 23271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_in_err.3227423271 |
| Directory | /workspace/22.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_suspend.4002263238 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 6267999510 ps |
| CPU time | 8.39 seconds |
| Started | Aug 15 05:30:56 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 216880 kb |
| Host | smart-be2db30a-549f-49dc-8447-913e5644e6b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40022 63238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_suspend.4002263238 |
| Directory | /workspace/22.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/22.usbdev_low_speed_traffic.2733268927 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 5373893419 ps |
| CPU time | 46.33 seconds |
| Started | Aug 15 05:30:56 PM PDT 24 |
| Finished | Aug 15 05:31:43 PM PDT 24 |
| Peak memory | 224136 kb |
| Host | smart-59a2bf5d-8028-4d2e-80e8-4b63fc4bdcc3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2733268927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.2733268927 |
| Directory | /workspace/22.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_inter_pkt_delay.2377302530 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 1769775801 ps |
| CPU time | 18.75 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 217300 kb |
| Host | smart-6bca6019-808c-4385-a076-823ddc5737f5 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2377302530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.2377302530 |
| Directory | /workspace/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_length_in_transaction.985020568 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 244386025 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:31:06 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-cdfe769e-d6a4-4b7d-95ba-b6b9bf228cfa |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=985020568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.985020568 |
| Directory | /workspace/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_length_out_transaction.4084162712 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 184966701 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:30:55 PM PDT 24 |
| Finished | Aug 15 05:30:56 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-c5e1cc92-b19f-4680-bcae-0509b859652e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40841 62712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.4084162712 |
| Directory | /workspace/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_non_iso_usb_traffic.2906835458 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 2575449449 ps |
| CPU time | 72.85 seconds |
| Started | Aug 15 05:30:57 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-bfdb74af-ead5-4415-b2ac-4e816a633c57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29068 35458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.2906835458 |
| Directory | /workspace/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_inter_pkt_delay.1962616333 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 3289515966 ps |
| CPU time | 25.75 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:31 PM PDT 24 |
| Peak memory | 217576 kb |
| Host | smart-274798f2-6fd0-4343-bde1-3b22fcbb4710 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1962616333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.1962616333 |
| Directory | /workspace/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_length_in_transaction.2195240857 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 197938610 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:11 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-022a6776-3ef4-4820-b3b2-728e3bf395eb |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2195240857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.2195240857 |
| Directory | /workspace/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_length_out_transaction.175228401 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 149669549 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-fc11a13d-0528-4a1a-9b5d-b001c784a035 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17522 8401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.175228401 |
| Directory | /workspace/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_nak_trans.3082021852 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 230236550 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-654cea17-7798-47bd-81ad-01b6d9588401 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30820 21852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_nak_trans.3082021852 |
| Directory | /workspace/22.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_iso.1610510235 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 156772128 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:31:23 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-6e78a2f0-5a73-4537-b97e-1574daa8f93b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16105 10235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_iso.1610510235 |
| Directory | /workspace/22.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_stall.3619462408 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 244983513 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:00 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-1d81b723-955b-4398-8fe0-b3ab6153eb46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36194 62408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_stall.3619462408 |
| Directory | /workspace/22.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_trans_nak.405703459 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 175376584 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-57ba2072-4b92-4685-96d6-d4440150c2de |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40570 3459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_trans_nak.405703459 |
| Directory | /workspace/22.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/22.usbdev_pending_in_trans.909191088 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 178749631 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:12 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-9c216d5e-fa9d-4aec-9f20-897dd35060b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90919 1088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pending_in_trans.909191088 |
| Directory | /workspace/22.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_config_pinflip.424408368 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 224892657 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-3fd73693-58cb-4c99-b932-b414dffa426e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=424408368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.424408368 |
| Directory | /workspace/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_config_usb_ref_disable.176293056 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 199915707 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:15 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-ab52c6f6-8a19-4a75-9b07-bef041aa7e4f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17629 3056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.176293056 |
| Directory | /workspace/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_pins_sense.3788090215 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 46583092 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-8e045973-38ee-48fd-835f-c3369206089b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37880 90215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.3788090215 |
| Directory | /workspace/22.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_buffer.1341759136 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 15102338961 ps |
| CPU time | 39.33 seconds |
| Started | Aug 15 05:30:59 PM PDT 24 |
| Finished | Aug 15 05:31:38 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-38bbd5bb-c00e-4494-950e-e6c77111a6a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13417 59136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_buffer.1341759136 |
| Directory | /workspace/22.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_received.1852596038 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 183863257 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:31:01 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-eb7e8452-6877-4769-8848-42a05ac60153 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18525 96038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_received.1852596038 |
| Directory | /workspace/22.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_sent.223166745 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 234831289 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:31:06 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-63c909c0-47c9-4536-b94b-ad32b9f9a82d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22316 6745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_sent.223166745 |
| Directory | /workspace/22.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/22.usbdev_random_length_in_transaction.1740491767 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 199162451 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:30:51 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-512f7ca5-8493-4c2a-a0eb-86bfa17ee798 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17404 91767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_in_transaction.1740491767 |
| Directory | /workspace/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_random_length_out_transaction.3412285924 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 168772681 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-2f72de7a-e320-4ae1-9dd1-81d363bb4719 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34122 85924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.3412285924 |
| Directory | /workspace/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_rx_crc_err.25957257 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 159325456 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-d087426e-d66d-4674-a394-9e7d0a933795 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25957 257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_rx_crc_err.25957257 |
| Directory | /workspace/22.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/22.usbdev_rx_full.3521707983 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 381552418 ps |
| CPU time | 1.33 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f6be1b9d-8263-4bb8-97d1-68a7fe5c3516 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35217 07983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_rx_full.3521707983 |
| Directory | /workspace/22.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/22.usbdev_setup_stage.1107148051 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 163879046 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:13 PM PDT 24 |
| Finished | Aug 15 05:31:14 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-288ed4c3-1ce2-4e14-b093-f00bcc9f1723 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11071 48051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_setup_stage.1107148051 |
| Directory | /workspace/22.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/22.usbdev_setup_trans_ignored.556465343 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 205769560 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-86c1c29b-2038-4799-af7d-7078ecfa4dcd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55646 5343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_setup_trans_ignored.556465343 |
| Directory | /workspace/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/22.usbdev_smoke.2547833595 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 302850190 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:06 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-cf1ac0e7-8d1c-4bf3-8ef9-af79ee32f4ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25478 33595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.2547833595 |
| Directory | /workspace/22.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/22.usbdev_spurious_pids_ignored.3539098712 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 1786242121 ps |
| CPU time | 17.88 seconds |
| Started | Aug 15 05:31:25 PM PDT 24 |
| Finished | Aug 15 05:31:43 PM PDT 24 |
| Peak memory | 223896 kb |
| Host | smart-7da52d10-6de8-439e-a132-eb5fd645a103 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3539098712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.3539098712 |
| Directory | /workspace/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/22.usbdev_stall_priority_over_nak.2144445865 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 183409701 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:11 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-0796d950-bb37-43b6-9143-d5a925685b6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21444 45865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.2144445865 |
| Directory | /workspace/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/22.usbdev_stall_trans.2112145086 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 210664171 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:11 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-67f4ab75-e4bc-4aac-a004-6eaf3567820a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21121 45086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_trans.2112145086 |
| Directory | /workspace/22.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_stream_len_max.683444214 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 394730402 ps |
| CPU time | 1.38 seconds |
| Started | Aug 15 05:31:13 PM PDT 24 |
| Finished | Aug 15 05:31:14 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-a211e5c8-0594-460d-8edb-45c73b5093f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68344 4214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.683444214 |
| Directory | /workspace/22.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/22.usbdev_streaming_out.805457504 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 2755632239 ps |
| CPU time | 26.31 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:36 PM PDT 24 |
| Peak memory | 217644 kb |
| Host | smart-3767e8ee-8e6c-4732-90f0-74e44f811ae4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80545 7504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_streaming_out.805457504 |
| Directory | /workspace/22.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/22.usbdev_timeout_missing_host_handshake.1530385843 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 2208318922 ps |
| CPU time | 14.3 seconds |
| Started | Aug 15 05:30:58 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-fe442b63-ce9f-4c50-b231-0cfd5f5b8fff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1530385843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_hos t_handshake.1530385843 |
| Directory | /workspace/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/22.usbdev_tx_rx_disruption.4139674064 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 614344860 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-70649771-bf66-408f-b67e-4f7b0de934da |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4139674064 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_tx_rx_disruption.4139674064 |
| Directory | /workspace/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/220.usbdev_tx_rx_disruption.676974619 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 562470656 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:16 PM PDT 24 |
| Finished | Aug 15 05:35:18 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-b2920974-eaca-4a1d-8d22-0d45ee4d4891 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=676974619 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 220.usbdev_tx_rx_disruption.676974619 |
| Directory | /workspace/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/221.usbdev_tx_rx_disruption.1290937031 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 602084798 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:21 PM PDT 24 |
| Finished | Aug 15 05:35:23 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-ad44aa86-8ab8-4cc2-a9f4-38cababa328e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1290937031 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 221.usbdev_tx_rx_disruption.1290937031 |
| Directory | /workspace/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/222.usbdev_tx_rx_disruption.2925784564 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 501764882 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-63a858e4-e278-418f-9531-fa3b47584a1f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2925784564 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 222.usbdev_tx_rx_disruption.2925784564 |
| Directory | /workspace/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/223.usbdev_tx_rx_disruption.3135174511 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 517427517 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-d64f9581-34c2-4bad-b5e2-b55c52a17a49 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3135174511 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 223.usbdev_tx_rx_disruption.3135174511 |
| Directory | /workspace/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/224.usbdev_tx_rx_disruption.2432786837 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 670089482 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:35:25 PM PDT 24 |
| Finished | Aug 15 05:35:27 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-020627ee-7f0d-4223-9f89-14f7919b8dba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2432786837 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 224.usbdev_tx_rx_disruption.2432786837 |
| Directory | /workspace/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/225.usbdev_tx_rx_disruption.562277404 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 667193562 ps |
| CPU time | 2.05 seconds |
| Started | Aug 15 05:35:23 PM PDT 24 |
| Finished | Aug 15 05:35:25 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-20bff95f-70b5-44cc-883e-03eef89215c3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=562277404 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 225.usbdev_tx_rx_disruption.562277404 |
| Directory | /workspace/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/226.usbdev_tx_rx_disruption.1976560000 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 613040828 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:35:12 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-ec3d03f3-8371-411a-abbd-ebd0547045ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1976560000 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 226.usbdev_tx_rx_disruption.1976560000 |
| Directory | /workspace/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/227.usbdev_tx_rx_disruption.3506809944 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 513603585 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-479c8d27-fa8b-4ed8-b6bc-e8ab8a586faa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3506809944 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 227.usbdev_tx_rx_disruption.3506809944 |
| Directory | /workspace/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/228.usbdev_tx_rx_disruption.2405883635 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 632274390 ps |
| CPU time | 1.77 seconds |
| Started | Aug 15 05:35:30 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-631b99e8-8bd4-496e-a6ab-01546937dedf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2405883635 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 228.usbdev_tx_rx_disruption.2405883635 |
| Directory | /workspace/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/229.usbdev_tx_rx_disruption.2420106201 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 604411184 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:06 PM PDT 24 |
| Finished | Aug 15 05:35:08 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-4df6e225-8083-4939-8710-65e8304cbd14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2420106201 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 229.usbdev_tx_rx_disruption.2420106201 |
| Directory | /workspace/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/23.usbdev_alert_test.2639966006 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 41333651 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-3f05e9c5-f2b3-44f0-acbf-0d158bec7ed7 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2639966006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.2639966006 |
| Directory | /workspace/23.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_disconnect.3863872892 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 5529573065 ps |
| CPU time | 7.71 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:12 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-8a19ab84-2298-464d-b7a7-e2fc496ebcc8 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3863872892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_a on_wake_disconnect.3863872892 |
| Directory | /workspace/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_reset.3057473747 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 16311512094 ps |
| CPU time | 18.36 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:37 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-cd8d2d43-c83e-4027-89cf-3154ad39c7a4 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3057473747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.3057473747 |
| Directory | /workspace/23.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_resume.2551036759 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 25793058788 ps |
| CPU time | 33.86 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-08c5f211-209c-4960-9f8d-b9cb0ac42c95 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2551036759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_a on_wake_resume.2551036759 |
| Directory | /workspace/23.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/23.usbdev_av_buffer.4014036400 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 206777220 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-23107763-2b93-407c-b642-95fabd9b8a9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40140 36400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_av_buffer.4014036400 |
| Directory | /workspace/23.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/23.usbdev_bitstuff_err.985467082 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 149867409 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-6c20d524-d830-4ccd-8a2f-0dc3572cb2d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98546 7082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_bitstuff_err.985467082 |
| Directory | /workspace/23.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_data_toggle_clear.2414849161 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 233454819 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:31:04 PM PDT 24 |
| Finished | Aug 15 05:31:06 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-63c0185f-a62c-474e-a743-bb079ae535f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24148 49161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_clear.2414849161 |
| Directory | /workspace/23.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/23.usbdev_device_address.2042013011 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 16775835083 ps |
| CPU time | 28.54 seconds |
| Started | Aug 15 05:31:08 PM PDT 24 |
| Finished | Aug 15 05:31:37 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-4e2c16e5-a002-4416-9e92-04e704fd55b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20420 13011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.2042013011 |
| Directory | /workspace/23.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/23.usbdev_device_timeout.2324245542 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 5218273143 ps |
| CPU time | 46.44 seconds |
| Started | Aug 15 05:31:08 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-0985db72-25f0-4d23-b71c-468b9e318f04 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2324245542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.2324245542 |
| Directory | /workspace/23.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/23.usbdev_disable_endpoint.2016719189 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 767673949 ps |
| CPU time | 2.02 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:31:09 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-0cf7af9e-863c-4371-a528-51183212cbcd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20167 19189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.2016719189 |
| Directory | /workspace/23.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/23.usbdev_disconnected.3191346299 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 133794042 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-6260412f-95be-4044-95ec-86d0ab3fd1a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31913 46299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disconnected.3191346299 |
| Directory | /workspace/23.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/23.usbdev_enable.3881097712 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 44282342 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:31:00 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-90f6ba0c-17dc-4355-8010-16dc43f221d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38810 97712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_enable.3881097712 |
| Directory | /workspace/23.usbdev_enable/latest |
| Test location | /workspace/coverage/default/23.usbdev_endpoint_access.967312921 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 818223359 ps |
| CPU time | 2.28 seconds |
| Started | Aug 15 05:31:00 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-65936c73-6ebd-48cd-8873-b727a99188d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96731 2921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.967312921 |
| Directory | /workspace/23.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/23.usbdev_endpoint_types.49859357 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 640292090 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-33e7979b-d845-462f-8f57-88bd5b4d3111 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=49859357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.49859357 |
| Directory | /workspace/23.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/23.usbdev_fifo_rst.745059951 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 187984424 ps |
| CPU time | 2.31 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-380a0083-c0f0-4124-97f8-159da0a061f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74505 9951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_fifo_rst.745059951 |
| Directory | /workspace/23.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_iso.3435161844 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 276043480 ps |
| CPU time | 1.23 seconds |
| Started | Aug 15 05:30:58 PM PDT 24 |
| Finished | Aug 15 05:31:00 PM PDT 24 |
| Peak memory | 216864 kb |
| Host | smart-5be72be2-f880-48f8-b26f-916b37031621 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3435161844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.3435161844 |
| Directory | /workspace/23.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_stall.186501630 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 154170115 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-f5e6d1a8-ae82-4de0-b0e6-5d6da0daf87d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18650 1630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_stall.186501630 |
| Directory | /workspace/23.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_trans.2509856730 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 235113785 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:31:09 PM PDT 24 |
| Finished | Aug 15 05:31:10 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a0a75cd0-1c06-47bc-9faa-81f31914539e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25098 56730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_trans.2509856730 |
| Directory | /workspace/23.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_invalid_sync.3169712742 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 4955459711 ps |
| CPU time | 54.23 seconds |
| Started | Aug 15 05:31:09 PM PDT 24 |
| Finished | Aug 15 05:32:03 PM PDT 24 |
| Peak memory | 216992 kb |
| Host | smart-5dbd253d-e718-4657-a544-7abfeed599c3 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3169712742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.3169712742 |
| Directory | /workspace/23.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/23.usbdev_iso_retraction.4182694683 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 8897788874 ps |
| CPU time | 58.78 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:32:06 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-1dc47b70-bc8d-4a1b-85a8-067ec2c4903a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4182694683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.4182694683 |
| Directory | /workspace/23.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_in_err.669269713 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 205234760 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-c5c2d11b-ac08-4914-9480-cd7bb3c053d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66926 9713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_in_err.669269713 |
| Directory | /workspace/23.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_resume.369578896 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 30079156346 ps |
| CPU time | 49.94 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:55 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-8d4f92e6-8bed-4af3-9b9d-8a31589d0a85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36957 8896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_resume.369578896 |
| Directory | /workspace/23.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_suspend.3992116491 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 3904674242 ps |
| CPU time | 5.95 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 216080 kb |
| Host | smart-9411babc-62fe-4c19-bbb8-f90974cbf26a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39921 16491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_suspend.3992116491 |
| Directory | /workspace/23.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/23.usbdev_low_speed_traffic.1230275442 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 2800982044 ps |
| CPU time | 81.6 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 218688 kb |
| Host | smart-1c7bebd2-a1de-41b6-b863-7faec07849b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1230275442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.1230275442 |
| Directory | /workspace/23.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_inter_pkt_delay.758591748 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 2582009610 ps |
| CPU time | 75.52 seconds |
| Started | Aug 15 05:31:06 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 217424 kb |
| Host | smart-389af9cb-42a0-4807-9022-ee49fe42416c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=758591748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.758591748 |
| Directory | /workspace/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_length_in_transaction.2104924245 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 270816729 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:31:04 PM PDT 24 |
| Finished | Aug 15 05:31:05 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-f4297f16-1b97-459e-8715-5f94e8350a26 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2104924245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.2104924245 |
| Directory | /workspace/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_length_out_transaction.2381937392 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 184555725 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-51753a2e-41f8-462e-978b-37051363e834 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23819 37392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.2381937392 |
| Directory | /workspace/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_non_iso_usb_traffic.1908263389 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 2523631810 ps |
| CPU time | 66.77 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:32:21 PM PDT 24 |
| Peak memory | 217616 kb |
| Host | smart-62ad59e6-37c7-44e4-a3d7-8d031921a8d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19082 63389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.1908263389 |
| Directory | /workspace/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_inter_pkt_delay.953082067 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 1819602930 ps |
| CPU time | 17.09 seconds |
| Started | Aug 15 05:30:58 PM PDT 24 |
| Finished | Aug 15 05:31:15 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-8cdde290-0e78-4f83-952b-9c96b1bff387 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=953082067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.953082067 |
| Directory | /workspace/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_length_in_transaction.4125488265 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 160466705 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:06 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-6d6287ec-1ce6-4bc9-b027-033441c4edd4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4125488265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.4125488265 |
| Directory | /workspace/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_length_out_transaction.4078023960 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 154222269 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:09 PM PDT 24 |
| Finished | Aug 15 05:31:10 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-60c51828-94c9-4044-911d-9c72b844fece |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40780 23960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.4078023960 |
| Directory | /workspace/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_nak_trans.3507632401 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 166860687 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:08 PM PDT 24 |
| Finished | Aug 15 05:31:09 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b8e0f77b-3471-429c-84fb-a42e77d55c8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35076 32401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_nak_trans.3507632401 |
| Directory | /workspace/23.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_iso.2661361806 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 150385047 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:07 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4dfa0af7-72a5-4172-b80a-f30f81f7e0e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26613 61806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_iso.2661361806 |
| Directory | /workspace/23.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_stall.2759832828 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 179861161 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-50a4a909-22e1-48d1-8c86-ae14261a283a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27598 32828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_stall.2759832828 |
| Directory | /workspace/23.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_trans_nak.2223067639 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 174692389 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:00 PM PDT 24 |
| Finished | Aug 15 05:31:01 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-db87e74a-799f-4544-80b9-324509474a52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22230 67639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_trans_nak.2223067639 |
| Directory | /workspace/23.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/23.usbdev_pending_in_trans.267591103 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 167836618 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-bb9cc607-eb33-402f-afec-87f84e93615c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26759 1103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pending_in_trans.267591103 |
| Directory | /workspace/23.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_config_pinflip.143947034 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 241240720 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:31:02 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-e35b3b6d-956c-42c8-86eb-0fab9907aeec |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=143947034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.143947034 |
| Directory | /workspace/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_config_usb_ref_disable.358457283 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 150594847 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-d8987cc8-f109-442b-9daa-7bc3ae3f3c23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35845 7283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.358457283 |
| Directory | /workspace/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_pins_sense.805126195 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 36024641 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:31:03 PM PDT 24 |
| Finished | Aug 15 05:31:04 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-c8c39bd8-459d-4a80-9d5c-7806e9a74c76 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80512 6195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.805126195 |
| Directory | /workspace/23.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_buffer.2563515052 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 15446308301 ps |
| CPU time | 43.39 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 220344 kb |
| Host | smart-435d0bbf-b040-4948-90a5-2322f5747e7d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25635 15052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_buffer.2563515052 |
| Directory | /workspace/23.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_received.3477457812 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 158892168 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-56906418-f355-4ff5-b2ce-63190941e754 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34774 57812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_received.3477457812 |
| Directory | /workspace/23.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_sent.2965839295 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 210244600 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:12 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-134c582d-e26a-469c-b11a-6d20a119fc8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29658 39295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_sent.2965839295 |
| Directory | /workspace/23.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/23.usbdev_random_length_in_transaction.1066995696 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 175218305 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:06 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-a49ad028-7472-484d-b598-d60cf897cf1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10669 95696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_in_transaction.1066995696 |
| Directory | /workspace/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_random_length_out_transaction.3628850957 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 171692922 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:15 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-3dfb12ca-e314-4d5b-9aa3-512281e07489 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36288 50957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.3628850957 |
| Directory | /workspace/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_rx_crc_err.705793796 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 156346851 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:12 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-1e615b5d-1d3d-41f7-b13a-97ddbc2e5b67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70579 3796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_rx_crc_err.705793796 |
| Directory | /workspace/23.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_rx_full.1936234244 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 356870233 ps |
| CPU time | 1.26 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-f2a5a895-c124-41da-aa65-59169d56d939 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19362 34244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_rx_full.1936234244 |
| Directory | /workspace/23.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/23.usbdev_setup_stage.2841451594 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 166141139 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:08 PM PDT 24 |
| Finished | Aug 15 05:31:09 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-c9b46916-7201-4df6-97d4-67b28f9da215 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28414 51594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_setup_stage.2841451594 |
| Directory | /workspace/23.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/23.usbdev_setup_trans_ignored.1629027459 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 212439992 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4a3e0c40-b58e-4b9d-a1cb-612201bd3762 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16290 27459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_setup_trans_ignored.1629027459 |
| Directory | /workspace/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/23.usbdev_smoke.3684691644 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 239041232 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:11 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-44bb7ad3-465b-4759-a5eb-cc971c4afa97 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36846 91644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.3684691644 |
| Directory | /workspace/23.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/23.usbdev_spurious_pids_ignored.2836029484 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 2109592521 ps |
| CPU time | 55.6 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:32:11 PM PDT 24 |
| Peak memory | 223936 kb |
| Host | smart-60a22d88-d8ba-4ffb-89d1-1e3dda22e87e |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2836029484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2836029484 |
| Directory | /workspace/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/23.usbdev_stall_priority_over_nak.1483279077 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 152034534 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:31:31 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-fd218e00-d9e6-46c6-aa57-b6c2bfd9f1f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14832 79077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.1483279077 |
| Directory | /workspace/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/23.usbdev_stall_trans.206664178 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 191063791 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:02 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-9f728efb-63d4-45c6-a7fe-551cc4220c48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20666 4178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_trans.206664178 |
| Directory | /workspace/23.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_stream_len_max.1236375857 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 1264097040 ps |
| CPU time | 3.12 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-def77f21-cf4e-4251-a3d8-c9f6fb866578 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12363 75857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.1236375857 |
| Directory | /workspace/23.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/23.usbdev_streaming_out.2864097447 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 2964586210 ps |
| CPU time | 29.09 seconds |
| Started | Aug 15 05:31:24 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-1c2a26f9-238b-431c-807f-9f29aec380b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28640 97447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_streaming_out.2864097447 |
| Directory | /workspace/23.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/23.usbdev_timeout_missing_host_handshake.1375720325 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 4250468775 ps |
| CPU time | 28.84 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-4499a804-aa40-4b5a-ae65-2d92af2c549c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1375720325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_hos t_handshake.1375720325 |
| Directory | /workspace/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/23.usbdev_tx_rx_disruption.1261601322 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 489595328 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-2b106f5f-3747-4533-8447-26daba9f9b22 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1261601322 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_tx_rx_disruption.1261601322 |
| Directory | /workspace/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/230.usbdev_tx_rx_disruption.3666834810 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 560724082 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:33 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0641c4bd-d5d0-4ee1-abae-90c5954623c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3666834810 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 230.usbdev_tx_rx_disruption.3666834810 |
| Directory | /workspace/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/231.usbdev_tx_rx_disruption.3743839140 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 522231538 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:11 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-3e29a56f-c35d-499d-8a29-036a06437cbc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3743839140 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 231.usbdev_tx_rx_disruption.3743839140 |
| Directory | /workspace/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/232.usbdev_tx_rx_disruption.1626275310 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 416955160 ps |
| CPU time | 1.33 seconds |
| Started | Aug 15 05:35:14 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-cd95eb76-e28b-4e7e-8f5f-a8abbe013768 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1626275310 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 232.usbdev_tx_rx_disruption.1626275310 |
| Directory | /workspace/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/233.usbdev_tx_rx_disruption.336623361 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 548705231 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:35:13 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-7b6cde48-4524-4391-9163-ebd6cae96c4d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=336623361 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 233.usbdev_tx_rx_disruption.336623361 |
| Directory | /workspace/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/234.usbdev_tx_rx_disruption.1513102040 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 613735797 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:08 PM PDT 24 |
| Finished | Aug 15 05:35:10 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-68ea3931-8dc1-435d-bfbe-42d7c3110345 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1513102040 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 234.usbdev_tx_rx_disruption.1513102040 |
| Directory | /workspace/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/235.usbdev_tx_rx_disruption.588289758 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 441966082 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-ccb75c5c-c13b-41a4-8ee0-3109f2b7d899 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=588289758 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 235.usbdev_tx_rx_disruption.588289758 |
| Directory | /workspace/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/236.usbdev_tx_rx_disruption.2545536803 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 524889630 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:11 PM PDT 24 |
| Finished | Aug 15 05:35:12 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-cf8b47bb-5f23-42bb-a29c-759d6922b3a5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2545536803 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 236.usbdev_tx_rx_disruption.2545536803 |
| Directory | /workspace/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/237.usbdev_tx_rx_disruption.3895004898 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 475232612 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:19 PM PDT 24 |
| Finished | Aug 15 05:35:21 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8c56775f-f423-4fd4-8235-7e53b76d7703 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3895004898 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 237.usbdev_tx_rx_disruption.3895004898 |
| Directory | /workspace/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/238.usbdev_tx_rx_disruption.2706319021 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 465212052 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:35:27 PM PDT 24 |
| Finished | Aug 15 05:35:29 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-78660332-e7e8-4dcf-b439-a9990224a8b4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2706319021 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 238.usbdev_tx_rx_disruption.2706319021 |
| Directory | /workspace/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/239.usbdev_tx_rx_disruption.3372440113 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 441054543 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4deb0252-c9f6-40bd-9b0e-40c5c3bb4001 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3372440113 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 239.usbdev_tx_rx_disruption.3372440113 |
| Directory | /workspace/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/24.usbdev_alert_test.3822740216 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 80852459 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:15 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-0fb89a1c-10a0-485b-84cf-b35c9e43bc22 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3822740216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.3822740216 |
| Directory | /workspace/24.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_disconnect.1246237349 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 4067223331 ps |
| CPU time | 6 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-8fc6dc68-5b8a-4ea6-909a-4ab72091c38d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1246237349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_a on_wake_disconnect.1246237349 |
| Directory | /workspace/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_reset.3224620507 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 20191119672 ps |
| CPU time | 30.5 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-0deaf808-297b-40e1-8577-0feaf5329d6b |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3224620507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.3224620507 |
| Directory | /workspace/24.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_resume.2028162745 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 24583732815 ps |
| CPU time | 29.42 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-048c946c-ff3d-4ceb-9fbc-7cf379161c6f |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2028162745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_a on_wake_resume.2028162745 |
| Directory | /workspace/24.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/24.usbdev_av_buffer.874812009 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 161005767 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d0d70e5b-4b01-40c5-b026-adc49677639a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87481 2009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_av_buffer.874812009 |
| Directory | /workspace/24.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/24.usbdev_bitstuff_err.1634998616 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 170467150 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-14e4393a-4f7f-40e0-b682-f1aecfa0d5e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16349 98616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_bitstuff_err.1634998616 |
| Directory | /workspace/24.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_data_toggle_clear.1464822083 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 275786002 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-cbd523f9-e5c9-49b3-8e58-fe4488935e08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14648 22083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_clear.1464822083 |
| Directory | /workspace/24.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/24.usbdev_device_address.2148959893 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 27663582241 ps |
| CPU time | 48.19 seconds |
| Started | Aug 15 05:31:36 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-213b5668-17b2-4c4e-aead-f5e628df48eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21489 59893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.2148959893 |
| Directory | /workspace/24.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/24.usbdev_device_timeout.3205670600 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 1999827705 ps |
| CPU time | 16.1 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:27 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-7ad448cb-90cd-456c-bb22-0a85656bacef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3205670600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.3205670600 |
| Directory | /workspace/24.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/24.usbdev_disable_endpoint.3676692598 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 1056334887 ps |
| CPU time | 2.56 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-6adb2498-3326-43f5-9dc8-191afff1b950 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36766 92598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disable_endpoint.3676692598 |
| Directory | /workspace/24.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/24.usbdev_disconnected.500303550 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 156830477 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-c94dff29-f6a7-4eb9-9c94-f38c802123f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50030 3550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disconnected.500303550 |
| Directory | /workspace/24.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/24.usbdev_enable.429454489 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 34275285 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:12 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-4cfcef64-07b7-43fb-ba83-87ac636963da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42945 4489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_enable.429454489 |
| Directory | /workspace/24.usbdev_enable/latest |
| Test location | /workspace/coverage/default/24.usbdev_endpoint_access.2495658844 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 848358461 ps |
| CPU time | 2.39 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-6238bc83-e204-4693-ba85-924fa0d4f047 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24956 58844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.2495658844 |
| Directory | /workspace/24.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/24.usbdev_endpoint_types.4168738124 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 786341793 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:31:08 PM PDT 24 |
| Finished | Aug 15 05:31:10 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-5e126dd1-8fdf-4cc1-a470-5a054172fdd4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4168738124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.4168738124 |
| Directory | /workspace/24.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/24.usbdev_fifo_rst.27284047 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 164060191 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-cc256947-e33f-41c7-8306-6931749585a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27284 047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_fifo_rst.27284047 |
| Directory | /workspace/24.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_iso.2480173570 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 224963936 ps |
| CPU time | 1.29 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 215732 kb |
| Host | smart-72603ac3-5189-488c-9ea8-afb10fbeb8b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2480173570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.2480173570 |
| Directory | /workspace/24.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_stall.2087493088 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 146681403 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-0671561f-3a95-44bd-9447-441102319609 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20874 93088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_stall.2087493088 |
| Directory | /workspace/24.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_trans.4021428223 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 221831939 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:06 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-6218eb0e-880f-4e32-adc1-0e67a125ac64 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40214 28223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_trans.4021428223 |
| Directory | /workspace/24.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_iso_retraction.3757774147 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 10476124343 ps |
| CPU time | 73.18 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:32:31 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-5ac73703-d545-44b9-b366-d7a8ff5096ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3757774147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.3757774147 |
| Directory | /workspace/24.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_in_err.722820406 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 174343834 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b2f8f84c-b6f7-41aa-a771-a77ceece0bae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72282 0406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_in_err.722820406 |
| Directory | /workspace/24.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_resume.2201467541 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 32124006216 ps |
| CPU time | 49.32 seconds |
| Started | Aug 15 05:31:23 PM PDT 24 |
| Finished | Aug 15 05:32:13 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-1b61b54b-64c3-45a4-8ddb-fe8a857b1de3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22014 67541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_resume.2201467541 |
| Directory | /workspace/24.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_suspend.1974925196 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 10469793346 ps |
| CPU time | 16.06 seconds |
| Started | Aug 15 05:31:37 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-2d01fa57-25ee-4a19-80ea-6b4d865c8a57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19749 25196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_suspend.1974925196 |
| Directory | /workspace/24.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/24.usbdev_low_speed_traffic.3831580746 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 4468643349 ps |
| CPU time | 39.65 seconds |
| Started | Aug 15 05:31:04 PM PDT 24 |
| Finished | Aug 15 05:31:44 PM PDT 24 |
| Peak memory | 224152 kb |
| Host | smart-fa291cc5-0761-4eff-8aad-40e374c82f14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3831580746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.3831580746 |
| Directory | /workspace/24.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_length_in_transaction.497234882 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 261586676 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:31:05 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6595a9f4-9b74-4c9d-9a27-e60a522366f2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=497234882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.497234882 |
| Directory | /workspace/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_length_out_transaction.1762584721 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 185552563 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:13 PM PDT 24 |
| Finished | Aug 15 05:31:14 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-050aa195-e3c5-464e-acb0-60852c832389 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17625 84721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.1762584721 |
| Directory | /workspace/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_non_iso_usb_traffic.1762715091 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 2954917770 ps |
| CPU time | 82.23 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:32:34 PM PDT 24 |
| Peak memory | 223996 kb |
| Host | smart-713d0cfe-ebbd-4540-9343-7ece934bd98a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17627 15091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.1762715091 |
| Directory | /workspace/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_inter_pkt_delay.3567750635 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 2279564294 ps |
| CPU time | 65.97 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:32:20 PM PDT 24 |
| Peak memory | 217252 kb |
| Host | smart-588abbf0-3fb5-4f5c-bea4-c6c71d72b006 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3567750635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.3567750635 |
| Directory | /workspace/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_length_in_transaction.1103788853 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 153277564 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-2998df5b-cd95-4aa3-b1ad-31ad41641843 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1103788853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.1103788853 |
| Directory | /workspace/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_length_out_transaction.3085737271 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 144333884 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-c89580dd-86e8-4f71-b4e5-d159280e9c69 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30857 37271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.3085737271 |
| Directory | /workspace/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_nak_trans.1253549445 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 195420904 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:31:26 PM PDT 24 |
| Finished | Aug 15 05:31:27 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-90fbb0ce-9ec4-43c9-b5f9-de7e62610136 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12535 49445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_nak_trans.1253549445 |
| Directory | /workspace/24.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_iso.1340327058 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 194542524 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-6018b4a5-a690-4e30-9ce7-0ca120f3632c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13403 27058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_iso.1340327058 |
| Directory | /workspace/24.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_stall.2017082329 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 173525568 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:13 PM PDT 24 |
| Finished | Aug 15 05:31:14 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-27219122-6d7a-44bd-9038-68bc170b0ac4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20170 82329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_stall.2017082329 |
| Directory | /workspace/24.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_trans_nak.1526136079 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 260866841 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:31:21 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-4d65c53f-c274-4dec-952f-a513dfe340ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15261 36079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_trans_nak.1526136079 |
| Directory | /workspace/24.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/24.usbdev_pending_in_trans.2735141085 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 168374487 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:25 PM PDT 24 |
| Finished | Aug 15 05:31:26 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-31f58f27-4890-4817-8f9d-aecd519b9caf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27351 41085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pending_in_trans.2735141085 |
| Directory | /workspace/24.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_config_pinflip.613487517 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 248706374 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-4d4c5db8-ee4b-4a6b-8e19-a6ab89162095 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=613487517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.613487517 |
| Directory | /workspace/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_config_usb_ref_disable.1962445524 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 156151664 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:13 PM PDT 24 |
| Finished | Aug 15 05:31:14 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a20780df-ec4e-470f-a60e-e37dbc8bef53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19624 45524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.1962445524 |
| Directory | /workspace/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_pins_sense.607798213 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 38694985 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-e38d5136-7c30-4734-b531-ea506f8c031b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60779 8213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.607798213 |
| Directory | /workspace/24.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_buffer.2715562781 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 13257143309 ps |
| CPU time | 31.88 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:42 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-867302c3-0c89-4c4e-a34b-f1ab66e44d7f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27155 62781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_buffer.2715562781 |
| Directory | /workspace/24.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_received.1075484044 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 175781306 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:15 PM PDT 24 |
| Peak memory | 206480 kb |
| Host | smart-aa1fa6ce-b048-4e27-b7c1-d2349ba4c7c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10754 84044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_received.1075484044 |
| Directory | /workspace/24.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_sent.312056260 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 304784918 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:31:09 PM PDT 24 |
| Finished | Aug 15 05:31:10 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a9aa14dd-5068-4611-9632-73f495642cd6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31205 6260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_sent.312056260 |
| Directory | /workspace/24.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/24.usbdev_random_length_in_transaction.3538633869 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 182601668 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-0d50ea73-b18f-4e15-95da-6a226fbafa7f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35386 33869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_in_transaction.3538633869 |
| Directory | /workspace/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_random_length_out_transaction.1880540128 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 176032751 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3b3a7a09-1a58-44c3-8ab0-c90a2c91fd92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18805 40128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.1880540128 |
| Directory | /workspace/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_rx_crc_err.2448023988 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 190403293 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:31:31 PM PDT 24 |
| Finished | Aug 15 05:31:32 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ef607eea-6933-41fc-bbe0-dc4a4c6b2187 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24480 23988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_rx_crc_err.2448023988 |
| Directory | /workspace/24.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_setup_stage.1613941516 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 200435420 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-1e36ca86-1a29-4ef3-913f-757de9546a15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16139 41516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_setup_stage.1613941516 |
| Directory | /workspace/24.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/24.usbdev_setup_trans_ignored.3168446673 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 169785636 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:15 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-483a7eab-4aad-4f5a-8106-3fc4dde4ea8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31684 46673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_setup_trans_ignored.3168446673 |
| Directory | /workspace/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/24.usbdev_smoke.4145568387 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 219190345 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:31:36 PM PDT 24 |
| Finished | Aug 15 05:31:37 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-42e5ce01-47fd-4f87-82a4-750e874b2881 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41455 68387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.4145568387 |
| Directory | /workspace/24.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/24.usbdev_spurious_pids_ignored.1051374999 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 3128326030 ps |
| CPU time | 91.06 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 224060 kb |
| Host | smart-90699c14-12b8-40ab-93c5-41c14c1a847c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1051374999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.1051374999 |
| Directory | /workspace/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/24.usbdev_stall_priority_over_nak.3309479669 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 152887460 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-25a8ae07-f723-4bdf-bb2f-2d63e18619ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33094 79669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.3309479669 |
| Directory | /workspace/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/24.usbdev_stall_trans.1205386070 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 197310706 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-a38db2da-73bf-4048-bed7-939420e517bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12053 86070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_trans.1205386070 |
| Directory | /workspace/24.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_stream_len_max.946605378 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 1306792339 ps |
| CPU time | 3.14 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-e8d51614-40cc-4c6c-9d39-502306344ee2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94660 5378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.946605378 |
| Directory | /workspace/24.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/24.usbdev_streaming_out.1713672262 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 2512600569 ps |
| CPU time | 70.16 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 224108 kb |
| Host | smart-b0172ac6-baf7-4a8c-be0e-3d8e47bb7f28 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17136 72262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_streaming_out.1713672262 |
| Directory | /workspace/24.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/24.usbdev_timeout_missing_host_handshake.1896452765 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 1253844232 ps |
| CPU time | 29.47 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:31:42 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-7bf7daf4-7972-4daa-825a-b8f7160c70e5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1896452765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_hos t_handshake.1896452765 |
| Directory | /workspace/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/24.usbdev_tx_rx_disruption.49528834 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 432232261 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-0a726bc6-5181-4591-9cf4-bbb1c8886aed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49528834 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_tx_rx_disruption.49528834 |
| Directory | /workspace/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/240.usbdev_tx_rx_disruption.1016219443 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 502279862 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:35:21 PM PDT 24 |
| Finished | Aug 15 05:35:22 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-8636d4e4-86f1-49e4-8b5d-fc0641aaba3b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1016219443 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 240.usbdev_tx_rx_disruption.1016219443 |
| Directory | /workspace/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/241.usbdev_tx_rx_disruption.3203131064 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 623015782 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:31 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-f1a3246e-293b-42bd-bdcf-4c8bb26e79ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3203131064 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 241.usbdev_tx_rx_disruption.3203131064 |
| Directory | /workspace/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/242.usbdev_tx_rx_disruption.3785913996 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 701993216 ps |
| CPU time | 2.05 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-2d339e36-1d7b-448d-9d93-59846e616b40 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3785913996 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 242.usbdev_tx_rx_disruption.3785913996 |
| Directory | /workspace/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/243.usbdev_tx_rx_disruption.2186623972 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 450648344 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:35:24 PM PDT 24 |
| Finished | Aug 15 05:35:25 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-772ed2f4-56e9-4de2-9b74-3e669ac031e5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2186623972 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 243.usbdev_tx_rx_disruption.2186623972 |
| Directory | /workspace/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/244.usbdev_tx_rx_disruption.617014414 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 527552619 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-18c7591d-4625-4b83-803f-e67ea8fd45b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=617014414 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 244.usbdev_tx_rx_disruption.617014414 |
| Directory | /workspace/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/245.usbdev_tx_rx_disruption.775753620 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 651211200 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:26 PM PDT 24 |
| Finished | Aug 15 05:35:28 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-59feffb4-6529-4828-9062-a233123e608e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=775753620 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 245.usbdev_tx_rx_disruption.775753620 |
| Directory | /workspace/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/246.usbdev_tx_rx_disruption.2948115480 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 539468858 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-18439e82-7f50-4954-80bf-8d5969d986bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2948115480 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 246.usbdev_tx_rx_disruption.2948115480 |
| Directory | /workspace/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/247.usbdev_tx_rx_disruption.3883055443 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 530077270 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:31 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-a6e98674-ff69-400f-981c-7710cda59cc6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3883055443 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 247.usbdev_tx_rx_disruption.3883055443 |
| Directory | /workspace/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/248.usbdev_tx_rx_disruption.2455639939 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 518612573 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0f58c6a0-078b-4edb-b2e4-bd46fb6c481d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2455639939 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 248.usbdev_tx_rx_disruption.2455639939 |
| Directory | /workspace/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/249.usbdev_tx_rx_disruption.293602786 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 608124368 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:31 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-6500e80c-9e94-4fa2-a0de-75f974c35e46 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=293602786 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 249.usbdev_tx_rx_disruption.293602786 |
| Directory | /workspace/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/25.usbdev_alert_test.624586527 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 79587095 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:31:28 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-e72ebcd2-cc58-47a1-be20-ebef3bf844a5 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=624586527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.624586527 |
| Directory | /workspace/25.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_disconnect.3684912697 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 6609712968 ps |
| CPU time | 8.36 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-5bde49e3-6e55-4e74-b08d-7653f49d986d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3684912697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_a on_wake_disconnect.3684912697 |
| Directory | /workspace/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_reset.1245203196 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 15287921833 ps |
| CPU time | 20.08 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-ae68f5bd-c936-4f92-a914-1e3b7c399ae0 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1245203196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.1245203196 |
| Directory | /workspace/25.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_resume.1495343245 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 29173297176 ps |
| CPU time | 38.23 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:58 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-ec27562c-6bc7-4ab9-a2b6-cb95f8355558 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1495343245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_a on_wake_resume.1495343245 |
| Directory | /workspace/25.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/25.usbdev_av_buffer.3098617016 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 145224583 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:23 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-2dedd68b-d983-465c-ba8c-a2603838af19 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30986 17016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_av_buffer.3098617016 |
| Directory | /workspace/25.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/25.usbdev_bitstuff_err.3602600157 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 147150431 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:31:23 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-4f13234f-4f5d-439e-a615-3aa2ecd1c2f1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36026 00157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_bitstuff_err.3602600157 |
| Directory | /workspace/25.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_data_toggle_clear.942806848 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 390289097 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-3b2315ea-9849-4e0a-bd0d-fe35a3052e50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94280 6848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_clear.942806848 |
| Directory | /workspace/25.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/25.usbdev_data_toggle_restore.1549539889 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 552168503 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-5b13020a-18a6-4a09-ac7e-47fbc2767d99 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1549539889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.1549539889 |
| Directory | /workspace/25.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/25.usbdev_device_timeout.1031725520 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 2487870002 ps |
| CPU time | 21.15 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:43 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-1270aaad-611a-4c0a-9648-ca65152dbf5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1031725520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.1031725520 |
| Directory | /workspace/25.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/25.usbdev_disable_endpoint.2069714877 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 858336635 ps |
| CPU time | 2.1 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-63d4fe83-6ae2-408d-b8b2-48b28004e206 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20697 14877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_disable_endpoint.2069714877 |
| Directory | /workspace/25.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/25.usbdev_disconnected.4012799512 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 135838700 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:28 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-6dc93f4b-c341-4669-80ea-0e9565baca59 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40127 99512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_disconnected.4012799512 |
| Directory | /workspace/25.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/25.usbdev_enable.252065282 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 39249969 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e5346b02-122b-49a5-9ce3-7592e5c8414e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25206 5282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_enable.252065282 |
| Directory | /workspace/25.usbdev_enable/latest |
| Test location | /workspace/coverage/default/25.usbdev_endpoint_access.2957212113 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 835015673 ps |
| CPU time | 2.39 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:22 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-82d2382f-894a-47c4-92ae-6c74c6595ebb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29572 12113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.2957212113 |
| Directory | /workspace/25.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/25.usbdev_endpoint_types.3832221236 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 286855479 ps |
| CPU time | 1.19 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f470bb91-ecbc-4876-9eed-311e8f0ec977 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3832221236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.3832221236 |
| Directory | /workspace/25.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/25.usbdev_fifo_rst.190775272 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 177627531 ps |
| CPU time | 2.37 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-6b071bc4-e7cc-436f-aca5-8b4ad2ab00b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19077 5272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_fifo_rst.190775272 |
| Directory | /workspace/25.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_iso.2963963053 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 242679322 ps |
| CPU time | 1.2 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-30b01603-9c7b-4ab2-b570-6a1669021dbd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2963963053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.2963963053 |
| Directory | /workspace/25.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_stall.2562013715 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 142622566 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-58b68b05-f659-4f8d-b045-4211d680ecb4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25620 13715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_stall.2562013715 |
| Directory | /workspace/25.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_trans.3168668867 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 244484331 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:31:14 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-ae724611-884f-487c-b8ff-d58933c8041c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31686 68867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_trans.3168668867 |
| Directory | /workspace/25.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_invalid_sync.3234582151 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 4563943770 ps |
| CPU time | 36.39 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:55 PM PDT 24 |
| Peak memory | 218292 kb |
| Host | smart-69177e5e-25a9-4b6d-9d48-d4517642720f |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3234582151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.3234582151 |
| Directory | /workspace/25.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/25.usbdev_iso_retraction.2958605491 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 6753994339 ps |
| CPU time | 48.9 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:32:07 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-68e54586-c1bf-4a02-8300-a89926ea6e97 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2958605491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.2958605491 |
| Directory | /workspace/25.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_in_err.76013317 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 233620317 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-b89dd6f0-ad41-471b-a72f-ad24fc409d09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76013 317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_in_err.76013317 |
| Directory | /workspace/25.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_resume.63591783 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 7133844951 ps |
| CPU time | 11.79 seconds |
| Started | Aug 15 05:31:11 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-82a5a91c-3c22-4d17-ba88-4913cd3b4df0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63591 783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_resume.63591783 |
| Directory | /workspace/25.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_suspend.3128306603 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 11398450835 ps |
| CPU time | 13.44 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:31 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-42ed7b26-9f78-4890-9179-2f6e53416260 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31283 06603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_suspend.3128306603 |
| Directory | /workspace/25.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/25.usbdev_low_speed_traffic.2299722877 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 2933672364 ps |
| CPU time | 29.91 seconds |
| Started | Aug 15 05:31:10 PM PDT 24 |
| Finished | Aug 15 05:31:40 PM PDT 24 |
| Peak memory | 224316 kb |
| Host | smart-4ed5f133-8d03-456c-82bc-4298ecce18f4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2299722877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.2299722877 |
| Directory | /workspace/25.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_inter_pkt_delay.80889956 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 4088016240 ps |
| CPU time | 122.64 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 217348 kb |
| Host | smart-c8c377a7-2311-47e2-a626-06e5d7291d81 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=80889956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.80889956 |
| Directory | /workspace/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_length_in_transaction.3429625695 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 290108472 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:31:32 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-a554b255-e28f-4e71-83db-e18580217d5b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3429625695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.3429625695 |
| Directory | /workspace/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_length_out_transaction.3243888225 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 198326672 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:31:37 PM PDT 24 |
| Finished | Aug 15 05:31:38 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-ad71c5d7-8b6e-4c77-a247-d833e68ca4e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32438 88225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.3243888225 |
| Directory | /workspace/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_inter_pkt_delay.1620563446 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 2543843608 ps |
| CPU time | 18.91 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:39 PM PDT 24 |
| Peak memory | 217560 kb |
| Host | smart-473ab1d0-c81f-4cc1-80b7-8f5524ffda4f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1620563446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.1620563446 |
| Directory | /workspace/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_length_in_transaction.1789875666 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 222635006 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-231bc884-a0c2-4840-bab9-6ad5b849dd17 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1789875666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.1789875666 |
| Directory | /workspace/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_length_out_transaction.1408585997 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 190299436 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:27 PM PDT 24 |
| Finished | Aug 15 05:31:28 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-c62d7b5a-9647-4d01-a367-96e2af981b3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14085 85997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.1408585997 |
| Directory | /workspace/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_nak_trans.2867505910 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 225233340 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-3322f410-32ba-48ac-8020-494b8d7a28a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28675 05910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_nak_trans.2867505910 |
| Directory | /workspace/25.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_iso.424898662 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 185919415 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:33 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-73da0cb9-b58f-4129-a230-4995ac47833e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42489 8662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_iso.424898662 |
| Directory | /workspace/25.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_stall.115867672 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 158379556 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-d0e4282b-7fb9-4ba1-9548-8f282f5f107a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11586 7672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_stall.115867672 |
| Directory | /workspace/25.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_trans_nak.901392767 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 171619800 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f52350a2-b98d-4403-8aa2-3f4997d5b79a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90139 2767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_trans_nak.901392767 |
| Directory | /workspace/25.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/25.usbdev_pending_in_trans.868829960 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 155409900 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-68a01bc4-68f0-44c8-a64c-d306d92596e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86882 9960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pending_in_trans.868829960 |
| Directory | /workspace/25.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_config_pinflip.3478749255 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 262681427 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:27 PM PDT 24 |
| Finished | Aug 15 05:31:28 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-55c3ec4a-8ebb-4406-9d74-66494042311f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3478749255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.3478749255 |
| Directory | /workspace/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_config_usb_ref_disable.685721403 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 142846804 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ff3853f9-38f7-4db9-8a91-577d43ea9e0d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68572 1403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.685721403 |
| Directory | /workspace/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_pins_sense.3111738820 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 36350365 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-cd64237e-8d8e-4648-bcc4-ac95a53f8675 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31117 38820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.3111738820 |
| Directory | /workspace/25.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_buffer.1956031881 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 18152615715 ps |
| CPU time | 47.76 seconds |
| Started | Aug 15 05:31:25 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 220332 kb |
| Host | smart-9e95d637-91a3-464c-a07d-3b6bcaca0738 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19560 31881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_buffer.1956031881 |
| Directory | /workspace/25.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_received.2850280995 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 188671387 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-5a61b323-3edb-40b6-905b-31c2e9729b29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28502 80995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_received.2850280995 |
| Directory | /workspace/25.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_sent.126544980 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 208372853 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-60676598-08ca-4955-b912-447db0fa6855 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12654 4980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_sent.126544980 |
| Directory | /workspace/25.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/25.usbdev_random_length_in_transaction.3666674671 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 222624381 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:31:26 PM PDT 24 |
| Finished | Aug 15 05:31:28 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-55158e81-0584-4494-ad01-d80809e8ed93 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36666 74671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_in_transaction.3666674671 |
| Directory | /workspace/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_random_length_out_transaction.2988045350 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 209308301 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ba732770-de22-4de3-83a0-e14f5aa19104 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29880 45350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.2988045350 |
| Directory | /workspace/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_rx_crc_err.863592969 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 184863592 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-b7104eb1-c095-4b77-8f4a-31fb2a1e69fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86359 2969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_rx_crc_err.863592969 |
| Directory | /workspace/25.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_rx_full.186001579 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 257287477 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-5e1a9946-e455-492f-b660-5af7552b32df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18600 1579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_rx_full.186001579 |
| Directory | /workspace/25.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/25.usbdev_setup_stage.4116448586 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 150014928 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-6ab47633-f075-4697-b15f-1814d0fa7a8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41164 48586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_setup_stage.4116448586 |
| Directory | /workspace/25.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/25.usbdev_setup_trans_ignored.1603572615 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 158259728 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:21 PM PDT 24 |
| Finished | Aug 15 05:31:22 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-97dd9e84-16ec-4aa3-aa6e-c2579ab45b2d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16035 72615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_setup_trans_ignored.1603572615 |
| Directory | /workspace/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/25.usbdev_smoke.17117637 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 231571354 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:12 PM PDT 24 |
| Finished | Aug 15 05:31:13 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-297b1edc-b5d1-4fee-b48c-0e1951ca9cb3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17117 637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /works pace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.17117637 |
| Directory | /workspace/25.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/25.usbdev_spurious_pids_ignored.3496346358 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 2819299718 ps |
| CPU time | 20.9 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:37 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-5b91b515-dec8-4afb-a783-af4d107a1b3a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3496346358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.3496346358 |
| Directory | /workspace/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/25.usbdev_stall_priority_over_nak.2142863141 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 160219450 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:34 PM PDT 24 |
| Finished | Aug 15 05:31:35 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-4ae1f471-91da-49e1-a017-8d0897b40733 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21428 63141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.2142863141 |
| Directory | /workspace/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/25.usbdev_stall_trans.1310982029 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 177685047 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:39 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-75a9984e-3530-4eeb-8fa1-38b6bc8cc407 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13109 82029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_trans.1310982029 |
| Directory | /workspace/25.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_stream_len_max.4178525708 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 764701352 ps |
| CPU time | 1.98 seconds |
| Started | Aug 15 05:31:32 PM PDT 24 |
| Finished | Aug 15 05:31:35 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-bd824c9b-5ee6-4627-8ea8-13906a5e6fc7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41785 25708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.4178525708 |
| Directory | /workspace/25.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/25.usbdev_streaming_out.4083027956 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 3842393009 ps |
| CPU time | 30.68 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:32:01 PM PDT 24 |
| Peak memory | 217668 kb |
| Host | smart-78f701a3-4363-48b0-8e28-61b447bb8641 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40830 27956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_streaming_out.4083027956 |
| Directory | /workspace/25.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/25.usbdev_timeout_missing_host_handshake.2769191470 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 1100277564 ps |
| CPU time | 9.11 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:27 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-0f537dd0-bf2e-4e26-94dc-e3ceae85c035 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2769191470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_hos t_handshake.2769191470 |
| Directory | /workspace/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/25.usbdev_tx_rx_disruption.89358130 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 634747132 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-548e35d1-a241-4bf4-bbbc-176338124338 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89358130 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_tx_rx_disruption.89358130 |
| Directory | /workspace/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/250.usbdev_tx_rx_disruption.2806827596 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 513352874 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-71200df7-9d39-4f13-83ee-82d16e3a2070 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2806827596 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 250.usbdev_tx_rx_disruption.2806827596 |
| Directory | /workspace/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/251.usbdev_tx_rx_disruption.1321078845 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 519724256 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:44 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-a4e18760-61e7-4ed3-bc04-65fd302bce24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1321078845 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 251.usbdev_tx_rx_disruption.1321078845 |
| Directory | /workspace/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/252.usbdev_tx_rx_disruption.1056886537 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 626705198 ps |
| CPU time | 1.84 seconds |
| Started | Aug 15 05:35:24 PM PDT 24 |
| Finished | Aug 15 05:35:26 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3849eea7-b2e6-4c51-b630-45d1a91f48c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1056886537 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 252.usbdev_tx_rx_disruption.1056886537 |
| Directory | /workspace/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/253.usbdev_tx_rx_disruption.2372793440 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 622554269 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-24c18697-fb14-4971-96b7-a5a4dad30f1f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2372793440 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 253.usbdev_tx_rx_disruption.2372793440 |
| Directory | /workspace/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/254.usbdev_tx_rx_disruption.2315737357 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 533719954 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:30 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-0dd2cc57-14d2-4025-9307-aa3c52fc4392 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2315737357 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 254.usbdev_tx_rx_disruption.2315737357 |
| Directory | /workspace/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/255.usbdev_tx_rx_disruption.3899918139 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 514410077 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c239e683-6aa2-4289-adf8-d39ce3a7cccf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3899918139 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 255.usbdev_tx_rx_disruption.3899918139 |
| Directory | /workspace/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/256.usbdev_tx_rx_disruption.492017776 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 592889206 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-68463ffa-d10b-4cc5-93ec-2fafa5225ffe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=492017776 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 256.usbdev_tx_rx_disruption.492017776 |
| Directory | /workspace/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/257.usbdev_tx_rx_disruption.2989311296 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 574179413 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:39 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-09dffc48-7b6d-473a-93bf-107c2282b60f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2989311296 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 257.usbdev_tx_rx_disruption.2989311296 |
| Directory | /workspace/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/258.usbdev_tx_rx_disruption.1271353548 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 519223548 ps |
| CPU time | 1.43 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:34 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-9a4789e2-1a1a-45a5-95a7-ae929a10c54a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1271353548 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 258.usbdev_tx_rx_disruption.1271353548 |
| Directory | /workspace/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/259.usbdev_tx_rx_disruption.2919372914 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 632763496 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:37 PM PDT 24 |
| Finished | Aug 15 05:35:39 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-a284859b-a2eb-4abd-9790-890d9fea7b7f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2919372914 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 259.usbdev_tx_rx_disruption.2919372914 |
| Directory | /workspace/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/26.usbdev_alert_test.129691350 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 33132059 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:31:27 PM PDT 24 |
| Finished | Aug 15 05:31:28 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-66c694c0-4d65-4bdc-b140-0db236e85051 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=129691350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.129691350 |
| Directory | /workspace/26.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_disconnect.2533316638 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 5978160291 ps |
| CPU time | 9.69 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:27 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-e773429d-9df8-4ae5-a728-ca508aafec7e |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2533316638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_a on_wake_disconnect.2533316638 |
| Directory | /workspace/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_reset.3139236272 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 20408097991 ps |
| CPU time | 22.84 seconds |
| Started | Aug 15 05:31:31 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-429488ef-c1c3-4f17-9e81-396759141d70 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3139236272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.3139236272 |
| Directory | /workspace/26.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_resume.3956665543 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 23868631278 ps |
| CPU time | 26.92 seconds |
| Started | Aug 15 05:31:15 PM PDT 24 |
| Finished | Aug 15 05:31:43 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-30604f06-9add-4e92-84b1-4c4095273f1b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3956665543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_a on_wake_resume.3956665543 |
| Directory | /workspace/26.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/26.usbdev_av_buffer.187655167 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 167094713 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:23 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-16d054c1-7dc1-47ca-b5b5-079d5747414b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18765 5167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_av_buffer.187655167 |
| Directory | /workspace/26.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/26.usbdev_bitstuff_err.386867847 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 142904994 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:31:16 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-3274197b-c00c-4bc3-9b61-e27c57606ff3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38686 7847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_bitstuff_err.386867847 |
| Directory | /workspace/26.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_data_toggle_clear.3109383201 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 637694846 ps |
| CPU time | 1.94 seconds |
| Started | Aug 15 05:31:28 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-9ac1a016-f759-4066-9aeb-5e123b56deb0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31093 83201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_clear.3109383201 |
| Directory | /workspace/26.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/26.usbdev_data_toggle_restore.604012900 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 1405657728 ps |
| CPU time | 3.55 seconds |
| Started | Aug 15 05:31:54 PM PDT 24 |
| Finished | Aug 15 05:31:57 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-c760436c-76ba-4dd1-abdb-bd01cf040ae8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=604012900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.604012900 |
| Directory | /workspace/26.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/26.usbdev_device_address.3803118612 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 26201343423 ps |
| CPU time | 42.55 seconds |
| Started | Aug 15 05:31:14 PM PDT 24 |
| Finished | Aug 15 05:31:57 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-f4f12248-1c1e-411d-8a23-0e22cf2a8929 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38031 18612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.3803118612 |
| Directory | /workspace/26.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/26.usbdev_device_timeout.3453479930 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 4328462184 ps |
| CPU time | 27.67 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-fecdc3f5-4a50-4e30-9a03-13a9b5df1229 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3453479930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.3453479930 |
| Directory | /workspace/26.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/26.usbdev_disable_endpoint.4150444747 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 483288823 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:18 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-54fb8def-2eb6-46b6-afd3-647f794eac67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41504 44747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_disable_endpoint.4150444747 |
| Directory | /workspace/26.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/26.usbdev_disconnected.3679457432 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 144878922 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:31:31 PM PDT 24 |
| Finished | Aug 15 05:31:32 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-1e857af6-e6b2-49b5-ab3d-8dd1127ebc86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36794 57432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_disconnected.3679457432 |
| Directory | /workspace/26.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/26.usbdev_enable.3779300511 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 67152269 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:31:33 PM PDT 24 |
| Finished | Aug 15 05:31:33 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-690648d2-fbff-4282-aeff-3be097d4d9a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37793 00511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_enable.3779300511 |
| Directory | /workspace/26.usbdev_enable/latest |
| Test location | /workspace/coverage/default/26.usbdev_endpoint_access.1138759604 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 877892143 ps |
| CPU time | 2.44 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-2c5be34c-018b-42dd-bfdb-e993aaec779c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11387 59604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.1138759604 |
| Directory | /workspace/26.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/26.usbdev_endpoint_types.997579886 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 431866247 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:31:31 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-00c04ac0-0f82-4301-a117-bd72a81296e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=997579886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.997579886 |
| Directory | /workspace/26.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/26.usbdev_fifo_rst.2796873964 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 291751586 ps |
| CPU time | 2.07 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:31:32 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-9235173b-7ded-4036-b4ab-d12cc2c7c982 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27968 73964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_fifo_rst.2796873964 |
| Directory | /workspace/26.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_iso.3397454938 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 196994305 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 215824 kb |
| Host | smart-f30271f1-c9b9-468a-92e5-8375c49e9ede |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3397454938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.3397454938 |
| Directory | /workspace/26.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_stall.2969442914 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 137531552 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4d7a3395-597f-44e0-92d2-fc102eec5732 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29694 42914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_stall.2969442914 |
| Directory | /workspace/26.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_trans.4285660295 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 250184572 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:33 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-759c06c5-ccd7-4ced-a7f0-00769ce94bce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42856 60295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_trans.4285660295 |
| Directory | /workspace/26.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_invalid_sync.2952373965 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 2417449904 ps |
| CPU time | 22.97 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:40 PM PDT 24 |
| Peak memory | 218036 kb |
| Host | smart-d0481b90-ae1c-4af4-9801-48d58256a62d |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2952373965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.2952373965 |
| Directory | /workspace/26.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_in_err.4068764068 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 161820098 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-97b356a0-00e4-4063-bff3-5ec5e3bd5419 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40687 64068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_in_err.4068764068 |
| Directory | /workspace/26.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_resume.4271509657 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 27784396322 ps |
| CPU time | 46.34 seconds |
| Started | Aug 15 05:31:43 PM PDT 24 |
| Finished | Aug 15 05:32:29 PM PDT 24 |
| Peak memory | 216104 kb |
| Host | smart-1aac9140-bd4e-43a8-9df0-ce7646b428db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42715 09657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_resume.4271509657 |
| Directory | /workspace/26.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_suspend.1974561912 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 4860639201 ps |
| CPU time | 7.73 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:28 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-dd3469fc-8e62-4f8d-bffe-7168f68ada67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19745 61912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_suspend.1974561912 |
| Directory | /workspace/26.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/26.usbdev_low_speed_traffic.2002445269 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 4372761719 ps |
| CPU time | 47.72 seconds |
| Started | Aug 15 05:31:27 PM PDT 24 |
| Finished | Aug 15 05:32:15 PM PDT 24 |
| Peak memory | 218896 kb |
| Host | smart-3d3a750c-6394-4110-ae4c-92a9fd1fefed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2002445269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.2002445269 |
| Directory | /workspace/26.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_inter_pkt_delay.3139167453 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 2632771976 ps |
| CPU time | 28.34 seconds |
| Started | Aug 15 05:31:34 PM PDT 24 |
| Finished | Aug 15 05:32:03 PM PDT 24 |
| Peak memory | 217620 kb |
| Host | smart-b88f98d2-22dc-4a72-9dbd-51489c91cf4b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3139167453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.3139167453 |
| Directory | /workspace/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_length_in_transaction.2135508942 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 249332078 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:31:23 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-261032e2-1e62-4bcd-bc20-6ce7a0ebd251 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2135508942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.2135508942 |
| Directory | /workspace/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_length_out_transaction.1133309984 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 218127996 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-e939b4af-f985-4617-84a2-7a6672dd2f79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11333 09984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.1133309984 |
| Directory | /workspace/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_inter_pkt_delay.3010559141 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 2589521656 ps |
| CPU time | 19.65 seconds |
| Started | Aug 15 05:31:24 PM PDT 24 |
| Finished | Aug 15 05:31:44 PM PDT 24 |
| Peak memory | 217444 kb |
| Host | smart-c7b782b5-cffb-4360-8d6d-ac2ae89b2973 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3010559141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.3010559141 |
| Directory | /workspace/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_length_in_transaction.3082411781 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 164246155 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:24 PM PDT 24 |
| Finished | Aug 15 05:31:25 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-0a635453-4be2-4c12-b739-5fd6fdf113be |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3082411781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.3082411781 |
| Directory | /workspace/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_length_out_transaction.3433368072 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 140649898 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:36 PM PDT 24 |
| Finished | Aug 15 05:31:37 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-48df77e4-ca77-4333-8dbf-43519a0a93e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34333 68072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.3433368072 |
| Directory | /workspace/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_nak_trans.532110546 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 220022028 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:32 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-326aa425-cef8-4af3-b337-264694dd33ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53211 0546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_nak_trans.532110546 |
| Directory | /workspace/26.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_iso.3920788491 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 196674079 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-fccd5e56-6781-495c-898e-5b0cdfd6fa35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39207 88491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_iso.3920788491 |
| Directory | /workspace/26.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_stall.1549138714 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 184409203 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:23 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-17662f2b-6933-4126-aaad-ce3969348c29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15491 38714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_stall.1549138714 |
| Directory | /workspace/26.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_trans_nak.1281820865 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 196095543 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-a9aa8a30-ca26-41f9-bee3-5dad60b0c3e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12818 20865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_trans_nak.1281820865 |
| Directory | /workspace/26.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/26.usbdev_pending_in_trans.1044571348 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 184308586 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:31:21 PM PDT 24 |
| Finished | Aug 15 05:31:22 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-671bb6ce-8ea8-4cfb-96af-a61193a75c8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10445 71348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pending_in_trans.1044571348 |
| Directory | /workspace/26.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_config_pinflip.2958479451 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 237195989 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-d4369b67-c482-4075-86bc-0b8aae62a5e3 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2958479451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.2958479451 |
| Directory | /workspace/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_config_usb_ref_disable.87743980 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 159133406 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:41 PM PDT 24 |
| Finished | Aug 15 05:31:42 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-8f180bea-9fc5-481a-a3b1-ae394744db57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87743 980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.87743980 |
| Directory | /workspace/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_pins_sense.2379973078 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 36756720 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:31:26 PM PDT 24 |
| Finished | Aug 15 05:31:27 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3285864d-4912-4e59-8897-ed5d524ed29b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23799 73078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.2379973078 |
| Directory | /workspace/26.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_buffer.3871888410 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 22130363223 ps |
| CPU time | 62.14 seconds |
| Started | Aug 15 05:31:32 PM PDT 24 |
| Finished | Aug 15 05:32:35 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-98bfee45-fe05-4a65-8651-df558a42fd22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38718 88410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_buffer.3871888410 |
| Directory | /workspace/26.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_received.3729744631 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 153825065 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-1e4fc3d3-4134-4862-a924-368940470048 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37297 44631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_received.3729744631 |
| Directory | /workspace/26.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_sent.420820510 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 268162230 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-0a0978bf-e0d3-48aa-9d47-defbed6b947f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42082 0510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_sent.420820510 |
| Directory | /workspace/26.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/26.usbdev_random_length_in_transaction.2980087931 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 208843436 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:17 PM PDT 24 |
| Finished | Aug 15 05:31:19 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-e2af75d4-2041-4aad-9637-3ae0fb84691c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29800 87931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_in_transaction.2980087931 |
| Directory | /workspace/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_random_length_out_transaction.1352556273 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 180644913 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:42 PM PDT 24 |
| Finished | Aug 15 05:31:43 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-0e18aae0-a140-467f-bb9e-ef997e8c0418 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13525 56273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.1352556273 |
| Directory | /workspace/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_rx_crc_err.1793080219 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 175521148 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-8103740e-bae3-45a7-9196-feca147950f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17930 80219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_rx_crc_err.1793080219 |
| Directory | /workspace/26.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_rx_full.1459770722 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 245680907 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-9f8c1055-b81a-4488-bd4b-46b68ca6f40a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14597 70722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_rx_full.1459770722 |
| Directory | /workspace/26.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/26.usbdev_setup_stage.3668910846 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 157167570 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-bbd677f1-6863-4705-9f14-045e6daef020 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36689 10846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_setup_stage.3668910846 |
| Directory | /workspace/26.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/26.usbdev_setup_trans_ignored.961006512 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 146617348 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:31:31 PM PDT 24 |
| Finished | Aug 15 05:31:32 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-66a80930-52a7-4146-9a60-a8f12bf7be29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96100 6512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_setup_trans_ignored.961006512 |
| Directory | /workspace/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/26.usbdev_smoke.763834770 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 238630890 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-6b784321-7628-4159-a084-c9c2e23d9342 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76383 4770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.763834770 |
| Directory | /workspace/26.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/26.usbdev_spurious_pids_ignored.3348989050 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 3408828656 ps |
| CPU time | 26.27 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-e524c51b-aeee-4b22-b803-ff84c13bf5a4 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3348989050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.3348989050 |
| Directory | /workspace/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/26.usbdev_stall_priority_over_nak.388834773 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 184337230 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-65617bd6-9e01-407f-ad1d-d98c86af2cf7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38883 4773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.388834773 |
| Directory | /workspace/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/26.usbdev_stall_trans.2930204608 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 160281428 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:31:31 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-f004c216-54ba-4cd9-87c5-0e93dce4e72e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29302 04608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_trans.2930204608 |
| Directory | /workspace/26.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_stream_len_max.791007925 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 1376878719 ps |
| CPU time | 3.17 seconds |
| Started | Aug 15 05:31:34 PM PDT 24 |
| Finished | Aug 15 05:31:37 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-14c8c173-19cb-4761-bbef-a83f6bf288f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79100 7925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.791007925 |
| Directory | /workspace/26.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/26.usbdev_streaming_out.3753640080 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 4304174834 ps |
| CPU time | 31.72 seconds |
| Started | Aug 15 05:31:33 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-5101d47e-3f7d-46e1-8c06-18c1659bece3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37536 40080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_streaming_out.3753640080 |
| Directory | /workspace/26.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/26.usbdev_timeout_missing_host_handshake.1487694981 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 295428334 ps |
| CPU time | 4.43 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:23 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-523360e8-2250-41b0-ac40-c28269868a28 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1487694981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_hos t_handshake.1487694981 |
| Directory | /workspace/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/26.usbdev_tx_rx_disruption.1053396349 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 646226459 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-816d7d56-8167-4b71-9f37-ce9e503e7d9f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1053396349 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_tx_rx_disruption.1053396349 |
| Directory | /workspace/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/260.usbdev_tx_rx_disruption.2075788879 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 446793740 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:29 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-4c5f6704-65a3-49c9-bd57-b511d7e483dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2075788879 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 260.usbdev_tx_rx_disruption.2075788879 |
| Directory | /workspace/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/261.usbdev_tx_rx_disruption.1929037606 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 592463741 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:17 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-8fdbb991-1573-4ba9-85a9-3b95d701abdf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1929037606 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 261.usbdev_tx_rx_disruption.1929037606 |
| Directory | /workspace/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/262.usbdev_tx_rx_disruption.1672735313 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 560592842 ps |
| CPU time | 1.74 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:31 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-1dcdd49f-d299-43f0-85d0-f88004feeb96 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1672735313 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 262.usbdev_tx_rx_disruption.1672735313 |
| Directory | /workspace/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/263.usbdev_tx_rx_disruption.1388724382 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 624528882 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-964306d3-d69a-4d89-95e7-945480c49ea3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1388724382 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 263.usbdev_tx_rx_disruption.1388724382 |
| Directory | /workspace/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/264.usbdev_tx_rx_disruption.3156186768 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 595127529 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0c630335-7e08-434b-abb0-d87dc8c1be5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3156186768 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 264.usbdev_tx_rx_disruption.3156186768 |
| Directory | /workspace/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/265.usbdev_tx_rx_disruption.2120491310 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 537406580 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:35:34 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-25555b9c-ec12-4c5d-8b76-5ca67899e35f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2120491310 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 265.usbdev_tx_rx_disruption.2120491310 |
| Directory | /workspace/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/266.usbdev_tx_rx_disruption.137791875 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 617022388 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:35:29 PM PDT 24 |
| Finished | Aug 15 05:35:31 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-20269d75-417d-4dcf-af46-f8ad06b167e4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=137791875 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 266.usbdev_tx_rx_disruption.137791875 |
| Directory | /workspace/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/267.usbdev_tx_rx_disruption.2908307778 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 564880515 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-c2fa392c-ff00-485e-ba61-c0394a639664 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2908307778 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 267.usbdev_tx_rx_disruption.2908307778 |
| Directory | /workspace/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/268.usbdev_tx_rx_disruption.3536410106 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 545262633 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-e2768b86-53eb-4866-87e3-f1ba1c0bd78f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3536410106 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 268.usbdev_tx_rx_disruption.3536410106 |
| Directory | /workspace/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/269.usbdev_tx_rx_disruption.1214803778 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 553134421 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-20446cf0-ace0-46b4-bd4f-02d0d4d3727c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1214803778 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 269.usbdev_tx_rx_disruption.1214803778 |
| Directory | /workspace/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/27.usbdev_alert_test.2306832446 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 91544532 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:31:46 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-5bdea443-6fc6-4a1d-b363-d4191a11458b |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2306832446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.2306832446 |
| Directory | /workspace/27.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_disconnect.2883238475 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 11937681521 ps |
| CPU time | 14.76 seconds |
| Started | Aug 15 05:31:26 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-9219c6cc-acc5-4b10-9b2d-92805bb8fcb9 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2883238475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_a on_wake_disconnect.2883238475 |
| Directory | /workspace/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_reset.1498414084 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 20917337408 ps |
| CPU time | 26.88 seconds |
| Started | Aug 15 05:31:18 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-5b4b9a8f-c837-4ade-ac43-b9e9dec14e39 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1498414084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.1498414084 |
| Directory | /workspace/27.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_resume.798241445 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 26063509389 ps |
| CPU time | 30.99 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-c8e2eba3-5b9a-418e-a506-0c1c4822b874 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=798241445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_ao n_wake_resume.798241445 |
| Directory | /workspace/27.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/27.usbdev_av_buffer.4174844239 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 153635709 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:39 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-4628da49-f38d-43ba-ab71-36fbb74c8b9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41748 44239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_av_buffer.4174844239 |
| Directory | /workspace/27.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/27.usbdev_bitstuff_err.1081257800 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 170059953 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:42 PM PDT 24 |
| Finished | Aug 15 05:31:49 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-46edd346-cc91-48a8-a766-29b7058c624e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10812 57800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_bitstuff_err.1081257800 |
| Directory | /workspace/27.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_data_toggle_clear.3490139262 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 375667343 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:31:45 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-19723564-620a-4e81-9348-8dc9692c6383 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34901 39262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_clear.3490139262 |
| Directory | /workspace/27.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/27.usbdev_data_toggle_restore.1368111117 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 681557234 ps |
| CPU time | 1.92 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-ee3ad9f9-0714-4d6a-a2cd-b8c8e0b3d040 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1368111117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.1368111117 |
| Directory | /workspace/27.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/27.usbdev_device_address.4009838837 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 37833850248 ps |
| CPU time | 58.41 seconds |
| Started | Aug 15 05:31:49 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-34fd732e-50fc-4fa5-a752-f708d98b502d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40098 38837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.4009838837 |
| Directory | /workspace/27.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/27.usbdev_device_timeout.2299215450 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 1286539238 ps |
| CPU time | 28.46 seconds |
| Started | Aug 15 05:31:32 PM PDT 24 |
| Finished | Aug 15 05:32:01 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-a9b70e31-673f-49c6-a4b5-fee4160d82dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2299215450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.2299215450 |
| Directory | /workspace/27.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/27.usbdev_disable_endpoint.2233038606 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 930952159 ps |
| CPU time | 2.26 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:24 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-f2b08b1d-2337-494b-99c2-d20fec29e8cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22330 38606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_disable_endpoint.2233038606 |
| Directory | /workspace/27.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/27.usbdev_disconnected.2227605360 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 145074133 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:31:24 PM PDT 24 |
| Finished | Aug 15 05:31:25 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-f17228f1-b0c0-4c56-aa48-b01c6a4ba935 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22276 05360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_disconnected.2227605360 |
| Directory | /workspace/27.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/27.usbdev_enable.3155700695 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 84673763 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:31:48 PM PDT 24 |
| Finished | Aug 15 05:31:49 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-d43278c1-cf94-4c54-ad70-98fd4ab7825d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31557 00695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.3155700695 |
| Directory | /workspace/27.usbdev_enable/latest |
| Test location | /workspace/coverage/default/27.usbdev_endpoint_access.1253069340 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 1063036315 ps |
| CPU time | 2.68 seconds |
| Started | Aug 15 05:31:27 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-34a1cdd5-389f-4daf-80bb-df2564b160c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12530 69340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.1253069340 |
| Directory | /workspace/27.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/27.usbdev_endpoint_types.2334531051 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 224791927 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:47 PM PDT 24 |
| Finished | Aug 15 05:31:48 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-1f7669bd-f4bc-4a67-9590-406291650896 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2334531051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.2334531051 |
| Directory | /workspace/27.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/27.usbdev_fifo_rst.2797178895 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 308694822 ps |
| CPU time | 1.99 seconds |
| Started | Aug 15 05:31:22 PM PDT 24 |
| Finished | Aug 15 05:31:25 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-21918ab4-d390-4222-aac2-339ff2a6c6c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27971 78895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_fifo_rst.2797178895 |
| Directory | /workspace/27.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_iso.3347750358 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 243726077 ps |
| CPU time | 1.27 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:31:42 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-765d2eab-8af2-4bdd-b1da-f38c3133e759 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3347750358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.3347750358 |
| Directory | /workspace/27.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_stall.477916355 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 170276525 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:20 PM PDT 24 |
| Finished | Aug 15 05:31:21 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-32a61ac4-ad62-46e6-b133-fdb687180e6a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47791 6355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_stall.477916355 |
| Directory | /workspace/27.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_trans.1777238718 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 176125304 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:19 PM PDT 24 |
| Finished | Aug 15 05:31:20 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-31576b26-ebab-4938-a8dc-6249999276fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17772 38718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_trans.1777238718 |
| Directory | /workspace/27.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_invalid_sync.3475192280 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 3768095782 ps |
| CPU time | 35.27 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 216056 kb |
| Host | smart-81a0035f-b716-45d3-89f8-4b1b6dea9745 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3475192280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.3475192280 |
| Directory | /workspace/27.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/27.usbdev_iso_retraction.1857437894 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 9701314380 ps |
| CPU time | 69.19 seconds |
| Started | Aug 15 05:31:36 PM PDT 24 |
| Finished | Aug 15 05:32:45 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-655a603e-03db-46d4-88af-eeea1c276ee4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1857437894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.1857437894 |
| Directory | /workspace/27.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_in_err.523595082 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 181900482 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:31:42 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d687a49b-ee46-4664-88f8-08a00622e7ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52359 5082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_in_err.523595082 |
| Directory | /workspace/27.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_resume.2641043499 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 9701657442 ps |
| CPU time | 14.1 seconds |
| Started | Aug 15 05:31:23 PM PDT 24 |
| Finished | Aug 15 05:31:37 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-7771547a-3ead-4ec2-a7a3-5e786a233b89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26410 43499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_resume.2641043499 |
| Directory | /workspace/27.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_suspend.2547943582 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 10783268842 ps |
| CPU time | 14.47 seconds |
| Started | Aug 15 05:31:41 PM PDT 24 |
| Finished | Aug 15 05:31:56 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-f3f031f1-c1da-4a75-961f-baf8abc878c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25479 43582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_suspend.2547943582 |
| Directory | /workspace/27.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/27.usbdev_low_speed_traffic.1808854908 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 3224221906 ps |
| CPU time | 25.08 seconds |
| Started | Aug 15 05:31:44 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 219064 kb |
| Host | smart-b9745731-ed21-47d4-8a7d-e3a2d3af6345 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1808854908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.1808854908 |
| Directory | /workspace/27.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_inter_pkt_delay.3306121395 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 2949573213 ps |
| CPU time | 84.01 seconds |
| Started | Aug 15 05:31:31 PM PDT 24 |
| Finished | Aug 15 05:32:55 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-e5820239-bad9-444d-a164-2e85564e04be |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3306121395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.3306121395 |
| Directory | /workspace/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_length_in_transaction.1765449261 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 243177762 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:31:21 PM PDT 24 |
| Finished | Aug 15 05:31:22 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-5d1e5295-36fb-44d7-babe-afe5f449c208 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1765449261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.1765449261 |
| Directory | /workspace/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_length_out_transaction.3769200927 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 195136094 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:44 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-baf2e95a-9adb-4daa-a48d-afaff1dbfbc1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37692 00927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.3769200927 |
| Directory | /workspace/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_inter_pkt_delay.3770144862 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 2283853938 ps |
| CPU time | 23.36 seconds |
| Started | Aug 15 05:31:24 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 217260 kb |
| Host | smart-6bb02c3d-60f0-480b-92dd-bf69c2922395 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3770144862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.3770144862 |
| Directory | /workspace/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_length_in_transaction.4071949634 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 152284437 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-7d606d5a-3b5b-4541-b452-1079309c7a0a |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4071949634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.4071949634 |
| Directory | /workspace/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_length_out_transaction.2422772632 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 153223307 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:28 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-5a27bad2-301e-4c02-abc1-76116111df34 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24227 72632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.2422772632 |
| Directory | /workspace/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_nak_trans.802923155 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 206379111 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:31:43 PM PDT 24 |
| Finished | Aug 15 05:31:44 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-22153496-8d10-42b2-87bf-66de331ebb0e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80292 3155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_nak_trans.802923155 |
| Directory | /workspace/27.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_iso.2745471133 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 183041160 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-94f82c92-a595-448d-860a-7cf316c0449c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27454 71133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_iso.2745471133 |
| Directory | /workspace/27.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_stall.2927401525 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 197558741 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:31:47 PM PDT 24 |
| Finished | Aug 15 05:31:48 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-f5553eba-7ea0-4f62-a326-b00dc2bd9f54 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29274 01525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_stall.2927401525 |
| Directory | /workspace/27.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_trans_nak.2181854320 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 172752378 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-3d665328-bc05-454a-ab83-a7fa9cf11b14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21818 54320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_trans_nak.2181854320 |
| Directory | /workspace/27.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/27.usbdev_pending_in_trans.399744892 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 179758858 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:31:41 PM PDT 24 |
| Finished | Aug 15 05:31:42 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-925cb684-594f-499c-8426-e0015ec919ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39974 4892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pending_in_trans.399744892 |
| Directory | /workspace/27.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_config_pinflip.33218521 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 232872559 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:31:48 PM PDT 24 |
| Finished | Aug 15 05:31:49 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-7c987dc6-3d94-4142-8e82-e7f386a8a8e0 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=33218521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.33218521 |
| Directory | /workspace/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_config_usb_ref_disable.246534770 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 151531462 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:33 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a3d3ac8c-787a-461d-bde0-a6414c42245e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24653 4770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.246534770 |
| Directory | /workspace/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_pins_sense.317626543 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 43389971 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:31:44 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5d708aa3-383f-4dbb-a4a3-4c6b0c7b5efd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31762 6543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.317626543 |
| Directory | /workspace/27.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_buffer.1204497380 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 7346329297 ps |
| CPU time | 19.05 seconds |
| Started | Aug 15 05:31:46 PM PDT 24 |
| Finished | Aug 15 05:32:06 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-a32e2d42-a7dc-42e4-ac19-6fcd0d00c817 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12044 97380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_buffer.1204497380 |
| Directory | /workspace/27.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_received.210291791 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 167401107 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:33 PM PDT 24 |
| Finished | Aug 15 05:31:34 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-8c43210f-81f1-445e-b88c-2ee202ad0c35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21029 1791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_received.210291791 |
| Directory | /workspace/27.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_sent.3607218301 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 204380922 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:31:31 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-1ce79278-80f7-4674-8c92-fba91074d728 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36072 18301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_sent.3607218301 |
| Directory | /workspace/27.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/27.usbdev_random_length_in_transaction.2478387912 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 224913662 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:31:28 PM PDT 24 |
| Finished | Aug 15 05:31:29 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-4037c3a8-63e3-43e2-85d5-4bc84b5fbf18 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24783 87912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_in_transaction.2478387912 |
| Directory | /workspace/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_random_length_out_transaction.3525627406 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 188100553 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:38 PM PDT 24 |
| Finished | Aug 15 05:31:39 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f4cb0c6a-6253-4ec4-b6bd-b7bb503672c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35256 27406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.3525627406 |
| Directory | /workspace/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_rx_crc_err.3882841718 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 166331752 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:44 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-5fd7b988-292d-4bc7-a7cb-4143e16e4dab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38828 41718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_rx_crc_err.3882841718 |
| Directory | /workspace/27.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_rx_full.2648245607 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 246280740 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-1cce36c6-25f1-4fb2-9938-37c782d3ca14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26482 45607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_rx_full.2648245607 |
| Directory | /workspace/27.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/27.usbdev_setup_stage.951988534 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 157873126 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:45 PM PDT 24 |
| Finished | Aug 15 05:31:46 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-b58bd522-f3f6-43f6-a62d-262f23753fce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95198 8534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_setup_stage.951988534 |
| Directory | /workspace/27.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/27.usbdev_setup_trans_ignored.1934995109 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 157117118 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:49 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-2efe3fe0-7ce3-409d-844a-6938480158e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19349 95109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_setup_trans_ignored.1934995109 |
| Directory | /workspace/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/27.usbdev_smoke.1828026983 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 211801108 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:31:47 PM PDT 24 |
| Finished | Aug 15 05:31:48 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-c170ad96-bb3e-4e77-a91a-aae57c615e3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18280 26983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.1828026983 |
| Directory | /workspace/27.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/27.usbdev_spurious_pids_ignored.692823578 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 3009388505 ps |
| CPU time | 22.72 seconds |
| Started | Aug 15 05:31:38 PM PDT 24 |
| Finished | Aug 15 05:32:02 PM PDT 24 |
| Peak memory | 217928 kb |
| Host | smart-a2fbdd16-0d8d-4ccb-997d-03641737d527 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=692823578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.692823578 |
| Directory | /workspace/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/27.usbdev_stall_priority_over_nak.3227335626 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 165177406 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:55 PM PDT 24 |
| Finished | Aug 15 05:31:56 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-86fb8ae7-e446-49ac-b115-ec1d189ce9cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32273 35626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.3227335626 |
| Directory | /workspace/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/27.usbdev_stall_trans.2764919967 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 149941458 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:31:47 PM PDT 24 |
| Finished | Aug 15 05:31:48 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-9696cc9a-2c0e-45ca-9139-b047255dc122 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27649 19967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_trans.2764919967 |
| Directory | /workspace/27.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_stream_len_max.4116466995 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 1078685491 ps |
| CPU time | 2.82 seconds |
| Started | Aug 15 05:31:44 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-5579d07d-593c-4c2a-a371-60394c6169b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41164 66995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.4116466995 |
| Directory | /workspace/27.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/27.usbdev_streaming_out.1236666446 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 2709235508 ps |
| CPU time | 74.01 seconds |
| Started | Aug 15 05:31:46 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 217316 kb |
| Host | smart-16d5f204-554d-417a-8faa-90c5399b8461 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12366 66446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_streaming_out.1236666446 |
| Directory | /workspace/27.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/27.usbdev_timeout_missing_host_handshake.3418611438 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 149245525 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:45 PM PDT 24 |
| Finished | Aug 15 05:31:46 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-10ed8f42-7c4a-4c61-ac9d-b8b8ae7b78d6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3418611438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_hos t_handshake.3418611438 |
| Directory | /workspace/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/27.usbdev_tx_rx_disruption.2742715221 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 591502454 ps |
| CPU time | 1.8 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:31:55 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-124090d1-01c5-4954-a437-6b25cc16c816 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2742715221 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_tx_rx_disruption.2742715221 |
| Directory | /workspace/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/270.usbdev_tx_rx_disruption.3202529329 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 505685728 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-3e72fcf5-c736-4780-b0a6-1577a1a0217d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3202529329 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 270.usbdev_tx_rx_disruption.3202529329 |
| Directory | /workspace/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/271.usbdev_tx_rx_disruption.2779003581 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 565699920 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-e46084f8-70e8-4f82-b4d8-38a1cc980ed3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2779003581 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 271.usbdev_tx_rx_disruption.2779003581 |
| Directory | /workspace/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/272.usbdev_tx_rx_disruption.3556998665 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 517721730 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-35170428-3ea2-468a-a9e5-b8bc453391fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3556998665 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 272.usbdev_tx_rx_disruption.3556998665 |
| Directory | /workspace/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/273.usbdev_tx_rx_disruption.1906349301 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 466279801 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:36:18 PM PDT 24 |
| Finished | Aug 15 05:36:20 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-44f060a3-f1bc-421d-ac0e-940daf9bc9c8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1906349301 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 273.usbdev_tx_rx_disruption.1906349301 |
| Directory | /workspace/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/274.usbdev_tx_rx_disruption.150801587 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 467074835 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-6f704915-ab58-40c0-ba8d-131f95b1c649 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=150801587 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 274.usbdev_tx_rx_disruption.150801587 |
| Directory | /workspace/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/275.usbdev_tx_rx_disruption.3474704315 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 697438272 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:35:34 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-0b861206-4549-4e4b-924b-d839bf6df775 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3474704315 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 275.usbdev_tx_rx_disruption.3474704315 |
| Directory | /workspace/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/276.usbdev_tx_rx_disruption.2427359135 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 474958872 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-9453c7ec-3774-4976-8552-5bc2e7c5633b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2427359135 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 276.usbdev_tx_rx_disruption.2427359135 |
| Directory | /workspace/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/277.usbdev_tx_rx_disruption.1331036578 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 596774116 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-23eaaebb-9aa6-43f9-bf4d-cad7e28b7c49 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1331036578 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 277.usbdev_tx_rx_disruption.1331036578 |
| Directory | /workspace/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/278.usbdev_tx_rx_disruption.3386668371 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 618400143 ps |
| CPU time | 1.81 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-dcf5e617-773c-4d1c-9273-46f37de37b49 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3386668371 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 278.usbdev_tx_rx_disruption.3386668371 |
| Directory | /workspace/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/279.usbdev_tx_rx_disruption.157804510 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 475427197 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:30 PM PDT 24 |
| Finished | Aug 15 05:35:32 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-91f64b8c-8737-4376-8942-a3b86cdb96a7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=157804510 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 279.usbdev_tx_rx_disruption.157804510 |
| Directory | /workspace/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/28.usbdev_alert_test.2285105988 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 36941498 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:31:54 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-654279d8-e35e-401b-841d-215e23e2e19e |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2285105988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.2285105988 |
| Directory | /workspace/28.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_disconnect.2110258870 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 10652055296 ps |
| CPU time | 14.2 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:32:06 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-b3793d38-6242-4906-83e0-329c85a12f15 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2110258870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_a on_wake_disconnect.2110258870 |
| Directory | /workspace/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_reset.2332684234 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 15387607920 ps |
| CPU time | 21.81 seconds |
| Started | Aug 15 05:31:38 PM PDT 24 |
| Finished | Aug 15 05:32:00 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-154b7da6-5ecd-410b-93d4-6accf47e1175 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2332684234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.2332684234 |
| Directory | /workspace/28.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_resume.2208411117 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 29833275703 ps |
| CPU time | 33.31 seconds |
| Started | Aug 15 05:31:36 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-47a0e1b3-b502-4a9a-9877-dca1deb326ad |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2208411117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_a on_wake_resume.2208411117 |
| Directory | /workspace/28.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/28.usbdev_av_buffer.2633736385 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 164088907 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:31:30 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-e56efe36-7ac6-4311-ac8e-c1790cd160c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26337 36385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_av_buffer.2633736385 |
| Directory | /workspace/28.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/28.usbdev_bitstuff_err.4224182741 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 144419373 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-0e203779-dcd4-4a83-91fb-0aa00c389188 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42241 82741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_bitstuff_err.4224182741 |
| Directory | /workspace/28.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_data_toggle_clear.1226499015 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 288711664 ps |
| CPU time | 1.21 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:31:52 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-e8e3baee-35d2-4ca2-a8ad-ce47bd0275ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12264 99015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_clear.1226499015 |
| Directory | /workspace/28.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/28.usbdev_data_toggle_restore.2808336580 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 690178548 ps |
| CPU time | 1.85 seconds |
| Started | Aug 15 05:31:55 PM PDT 24 |
| Finished | Aug 15 05:31:57 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-c0b52044-a8f4-42cc-b084-f556c371d9e6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2808336580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.2808336580 |
| Directory | /workspace/28.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/28.usbdev_device_address.585669572 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 43729176079 ps |
| CPU time | 63.21 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:32:43 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-b46dccd4-28d5-4025-9349-6e0736297e65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58566 9572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.585669572 |
| Directory | /workspace/28.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/28.usbdev_device_timeout.4083880778 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 836969612 ps |
| CPU time | 5.2 seconds |
| Started | Aug 15 05:31:37 PM PDT 24 |
| Finished | Aug 15 05:31:43 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-b3234516-2655-4819-bb2f-3232a6653243 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4083880778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.4083880778 |
| Directory | /workspace/28.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/28.usbdev_disable_endpoint.2434187424 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 837559359 ps |
| CPU time | 2.11 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:31:42 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-95cfcdd6-ee35-4933-9506-7fdcd069c329 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24341 87424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disable_endpoint.2434187424 |
| Directory | /workspace/28.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/28.usbdev_disconnected.2235969571 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 137788065 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:31:31 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-c17d7277-ea73-4f1b-9bd3-899fa766b5c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22359 69571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disconnected.2235969571 |
| Directory | /workspace/28.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/28.usbdev_enable.3606104472 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 38245175 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:31:37 PM PDT 24 |
| Finished | Aug 15 05:31:38 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-e00e0971-f21c-4128-8bad-8c0b54fdca15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36061 04472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_enable.3606104472 |
| Directory | /workspace/28.usbdev_enable/latest |
| Test location | /workspace/coverage/default/28.usbdev_endpoint_access.2889834893 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 914079923 ps |
| CPU time | 2.35 seconds |
| Started | Aug 15 05:31:29 PM PDT 24 |
| Finished | Aug 15 05:31:32 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-74b06a88-6071-4e39-86db-c9991f7e9c67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28898 34893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.2889834893 |
| Directory | /workspace/28.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/28.usbdev_endpoint_types.3520551464 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 214451114 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:38 PM PDT 24 |
| Finished | Aug 15 05:31:40 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-59092425-6783-4fce-8ffa-3f0abbb01cb9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3520551464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.3520551464 |
| Directory | /workspace/28.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/28.usbdev_fifo_rst.3248740297 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 151905370 ps |
| CPU time | 1.32 seconds |
| Started | Aug 15 05:32:01 PM PDT 24 |
| Finished | Aug 15 05:32:02 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-70ed4b72-7dfb-4a1a-8737-55b989338f84 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32487 40297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_fifo_rst.3248740297 |
| Directory | /workspace/28.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_iso.749654362 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 164595495 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:49 PM PDT 24 |
| Finished | Aug 15 05:31:50 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-80304d5a-3b0b-4ee4-9bc8-9f766eb3fe5d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=749654362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.749654362 |
| Directory | /workspace/28.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_stall.4293699784 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 135128455 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:44 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-ef332784-c8e5-497a-b8c7-b4fa52eff40d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42936 99784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_stall.4293699784 |
| Directory | /workspace/28.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_trans.3453857366 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 179609199 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:30 PM PDT 24 |
| Finished | Aug 15 05:31:31 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-4ee5a95e-ee9b-4d8a-9d68-ac006e7a75b7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34538 57366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_trans.3453857366 |
| Directory | /workspace/28.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_invalid_sync.3433751836 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 4860278809 ps |
| CPU time | 37.42 seconds |
| Started | Aug 15 05:31:46 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 218128 kb |
| Host | smart-6b9b8920-cfcb-4fe9-81ab-2d2f841fc3b7 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3433751836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.3433751836 |
| Directory | /workspace/28.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/28.usbdev_iso_retraction.3209120007 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 12003868704 ps |
| CPU time | 146.45 seconds |
| Started | Aug 15 05:31:49 PM PDT 24 |
| Finished | Aug 15 05:34:16 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-11dc10df-306b-404a-a0a4-9d4035690cfc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3209120007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.3209120007 |
| Directory | /workspace/28.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_in_err.2098983372 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 245508705 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:31:48 PM PDT 24 |
| Finished | Aug 15 05:31:49 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-c8c5b8e1-6b49-4ea7-8985-eb41e4951e95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20989 83372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_in_err.2098983372 |
| Directory | /workspace/28.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_resume.1067915798 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 25193408212 ps |
| CPU time | 41.18 seconds |
| Started | Aug 15 05:31:44 PM PDT 24 |
| Finished | Aug 15 05:32:26 PM PDT 24 |
| Peak memory | 216668 kb |
| Host | smart-3dc025b4-59f8-41cd-8ce9-c2c380dc7352 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10679 15798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_resume.1067915798 |
| Directory | /workspace/28.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_suspend.971746654 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 9526251948 ps |
| CPU time | 11.31 seconds |
| Started | Aug 15 05:31:39 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-10dcccef-0b38-48d4-83c0-c556ea1f1b9a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97174 6654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_suspend.971746654 |
| Directory | /workspace/28.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/28.usbdev_low_speed_traffic.2962966508 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 3093396588 ps |
| CPU time | 23.92 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:32:17 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-a06e4c5e-4a0b-4946-b665-f6c84a897929 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2962966508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.2962966508 |
| Directory | /workspace/28.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_inter_pkt_delay.2284991566 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 2067821227 ps |
| CPU time | 16.07 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:32:07 PM PDT 24 |
| Peak memory | 215812 kb |
| Host | smart-cd6d9eb3-5d55-4ce8-a8dd-e82aaa0550bd |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2284991566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.2284991566 |
| Directory | /workspace/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_length_in_transaction.3615028211 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 247958844 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:42 PM PDT 24 |
| Finished | Aug 15 05:31:44 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5a1736e4-fd69-439b-89a0-42b250fe8693 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3615028211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.3615028211 |
| Directory | /workspace/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_length_out_transaction.1158720539 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 193326415 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:40 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-2e17053d-59e1-4c23-ad17-021847c544b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11587 20539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.1158720539 |
| Directory | /workspace/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_inter_pkt_delay.2546158786 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 2076009698 ps |
| CPU time | 16.19 seconds |
| Started | Aug 15 05:31:56 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 215832 kb |
| Host | smart-17047c32-cdb0-4828-9745-dba5e0eb33b2 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2546158786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.2546158786 |
| Directory | /workspace/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_length_in_transaction.3164600501 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 162217023 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:31:52 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-80ee9e0a-b3a7-4c1d-9915-b32db2acf092 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3164600501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.3164600501 |
| Directory | /workspace/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_length_out_transaction.3364816235 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 163330970 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:54 PM PDT 24 |
| Finished | Aug 15 05:31:55 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-e03ff447-a39b-4539-9edc-68c55f85a57c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33648 16235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.3364816235 |
| Directory | /workspace/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_nak_trans.2143546621 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 217963946 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-56e3e471-42c8-4762-a908-cb05de3b997d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21435 46621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_nak_trans.2143546621 |
| Directory | /workspace/28.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_iso.3607339374 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 193769775 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-9310c9bf-b076-4f7e-9b54-fe75d63c4b1c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36073 39374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_iso.3607339374 |
| Directory | /workspace/28.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_stall.646043757 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 234475977 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d33ab242-dcaa-4bc4-b4a0-a9f15aab9866 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64604 3757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_stall.646043757 |
| Directory | /workspace/28.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_trans_nak.1802636431 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 178068513 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:45 PM PDT 24 |
| Finished | Aug 15 05:31:46 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-871b5c6e-ff42-4a56-a605-d81ebc42f30a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18026 36431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_trans_nak.1802636431 |
| Directory | /workspace/28.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/28.usbdev_pending_in_trans.592282478 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 162644011 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:31:49 PM PDT 24 |
| Finished | Aug 15 05:31:50 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-43242d58-e95c-4757-8665-cfdd9ed749f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59228 2478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pending_in_trans.592282478 |
| Directory | /workspace/28.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_config_pinflip.2657659356 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 237083991 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:49 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-27cbb9a5-9ce5-46a2-8219-537cba51ada5 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2657659356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.2657659356 |
| Directory | /workspace/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_config_usb_ref_disable.2086289971 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 148737021 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:44 PM PDT 24 |
| Finished | Aug 15 05:31:45 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-5ac57de6-d1cd-44dc-a902-90c870eeb511 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20862 89971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.2086289971 |
| Directory | /workspace/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_pins_sense.178063383 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 55629926 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:31:39 PM PDT 24 |
| Finished | Aug 15 05:31:41 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c2abe6e2-2a5d-4ecf-8dc5-c8a1be234d22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17806 3383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.178063383 |
| Directory | /workspace/28.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_buffer.3296345245 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 18083174616 ps |
| CPU time | 47.36 seconds |
| Started | Aug 15 05:32:00 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-f6e40702-e8df-4ba6-a8a1-acf5446caeef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32963 45245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_buffer.3296345245 |
| Directory | /workspace/28.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_received.1200368854 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 199293683 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-5595f7b1-8391-4a90-9ee3-35afe6055659 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12003 68854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_received.1200368854 |
| Directory | /workspace/28.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_sent.2865226577 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 213178596 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:32:04 PM PDT 24 |
| Finished | Aug 15 05:32:05 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-441b2e1c-94f1-4fa4-8bb2-276e41c93742 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28652 26577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_sent.2865226577 |
| Directory | /workspace/28.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/28.usbdev_random_length_in_transaction.633331781 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 197190920 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:31:46 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-f98e493e-714f-4aad-805d-b155dbcf3a5c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63333 1781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_in_transaction.633331781 |
| Directory | /workspace/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_random_length_out_transaction.1976942976 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 169433523 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:58 PM PDT 24 |
| Finished | Aug 15 05:31:59 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-c3dd46cf-aceb-45d8-aa58-a8ef1f89cc05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19769 42976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.1976942976 |
| Directory | /workspace/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_rx_crc_err.1932324254 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 145841450 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:47 PM PDT 24 |
| Finished | Aug 15 05:31:48 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-1fc1c148-0371-4d13-b377-6003ff3209f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19323 24254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_rx_crc_err.1932324254 |
| Directory | /workspace/28.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_rx_full.2947154598 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 259804761 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:31:52 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-7f503b01-e745-4baf-b5d8-18e31841d94a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29471 54598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_rx_full.2947154598 |
| Directory | /workspace/28.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/28.usbdev_setup_stage.2091871520 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 162784500 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:48 PM PDT 24 |
| Finished | Aug 15 05:31:49 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-707c66fb-8374-47a9-a9f7-188bef74ab22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20918 71520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_setup_stage.2091871520 |
| Directory | /workspace/28.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/28.usbdev_setup_trans_ignored.2170105919 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 157895991 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:55 PM PDT 24 |
| Finished | Aug 15 05:31:56 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-848a8c55-79ea-48e0-8e34-eb57495e5ef9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21701 05919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_setup_trans_ignored.2170105919 |
| Directory | /workspace/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/28.usbdev_smoke.2461126583 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 232920273 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:32:04 PM PDT 24 |
| Finished | Aug 15 05:32:05 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-32c5aa8c-fbd8-41ba-a02a-31433c26f341 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24611 26583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.2461126583 |
| Directory | /workspace/28.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/28.usbdev_spurious_pids_ignored.2305327190 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 2530379054 ps |
| CPU time | 72.91 seconds |
| Started | Aug 15 05:31:45 PM PDT 24 |
| Finished | Aug 15 05:32:58 PM PDT 24 |
| Peak memory | 217560 kb |
| Host | smart-55fc11e7-e209-464b-a632-52b6a95913c2 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2305327190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.2305327190 |
| Directory | /workspace/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/28.usbdev_stall_priority_over_nak.318943126 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 168996971 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:31:48 PM PDT 24 |
| Finished | Aug 15 05:31:49 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-cd850479-e8b4-444f-bc80-bb6d7e6ac6c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31894 3126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.318943126 |
| Directory | /workspace/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/28.usbdev_stall_trans.3768751698 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 187006973 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-1beb92ff-fd48-449e-a805-996291a2fb06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37687 51698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_trans.3768751698 |
| Directory | /workspace/28.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_stream_len_max.990517503 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 1069837695 ps |
| CPU time | 2.91 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-4a2292a8-2adf-49c8-a456-4a348e3f1391 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99051 7503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.990517503 |
| Directory | /workspace/28.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/28.usbdev_streaming_out.3450125416 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 2350237301 ps |
| CPU time | 18.13 seconds |
| Started | Aug 15 05:32:00 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207864 kb |
| Host | smart-a93832d6-f089-42fa-a7ef-efff0943b9d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34501 25416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_streaming_out.3450125416 |
| Directory | /workspace/28.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/28.usbdev_timeout_missing_host_handshake.3746097347 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 1997020682 ps |
| CPU time | 17.87 seconds |
| Started | Aug 15 05:31:37 PM PDT 24 |
| Finished | Aug 15 05:32:01 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-be5f288d-33da-49c0-b617-beced90c2b34 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3746097347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_hos t_handshake.3746097347 |
| Directory | /workspace/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/28.usbdev_tx_rx_disruption.1065145633 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 491344504 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-5de49344-4386-4a56-9f3f-6a464e46d06d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1065145633 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_tx_rx_disruption.1065145633 |
| Directory | /workspace/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/280.usbdev_tx_rx_disruption.717474645 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 475363125 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:42 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-bde81b37-5ba9-472b-b973-cde7095054ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=717474645 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 280.usbdev_tx_rx_disruption.717474645 |
| Directory | /workspace/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/281.usbdev_tx_rx_disruption.2667730996 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 640602732 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-89442dae-5e5e-4852-8ef1-f0615b7ae745 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2667730996 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 281.usbdev_tx_rx_disruption.2667730996 |
| Directory | /workspace/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/282.usbdev_tx_rx_disruption.1799354570 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 647437404 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:35:37 PM PDT 24 |
| Finished | Aug 15 05:35:39 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-533fe018-76f6-42d6-92b9-addacfc66d02 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1799354570 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 282.usbdev_tx_rx_disruption.1799354570 |
| Directory | /workspace/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/283.usbdev_tx_rx_disruption.3122988005 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 623003393 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:35:39 PM PDT 24 |
| Finished | Aug 15 05:35:41 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-f38deb7c-6690-44fb-8155-c9cd22f2e638 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3122988005 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 283.usbdev_tx_rx_disruption.3122988005 |
| Directory | /workspace/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/284.usbdev_tx_rx_disruption.3575119123 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 473216870 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-04848796-7c8b-4ee2-aed4-0c0dd128ac95 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3575119123 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 284.usbdev_tx_rx_disruption.3575119123 |
| Directory | /workspace/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/285.usbdev_tx_rx_disruption.411283705 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 586890163 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:40 PM PDT 24 |
| Finished | Aug 15 05:35:41 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-a9ada8de-a4c2-45ab-a29f-7d0842047635 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=411283705 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 285.usbdev_tx_rx_disruption.411283705 |
| Directory | /workspace/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/286.usbdev_tx_rx_disruption.3730012806 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 459328533 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-4d7ae68b-4bf2-4d07-bbc9-f0b7c57ecb98 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3730012806 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 286.usbdev_tx_rx_disruption.3730012806 |
| Directory | /workspace/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/287.usbdev_tx_rx_disruption.1257269388 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 545850595 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:40 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-43d5f3d5-9ef2-47e3-96ba-6f403e07f5df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1257269388 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 287.usbdev_tx_rx_disruption.1257269388 |
| Directory | /workspace/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/288.usbdev_tx_rx_disruption.737933609 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 499120268 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-abdb7350-005f-4560-a3dc-452b0f0dd49c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=737933609 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 288.usbdev_tx_rx_disruption.737933609 |
| Directory | /workspace/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/289.usbdev_tx_rx_disruption.3429782661 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 486250375 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:35:49 PM PDT 24 |
| Finished | Aug 15 05:35:55 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-cfbf5c7d-e734-46a7-8de1-1e9c0aa43623 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3429782661 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 289.usbdev_tx_rx_disruption.3429782661 |
| Directory | /workspace/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/29.usbdev_alert_test.1542996852 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 46435984 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:31:55 PM PDT 24 |
| Finished | Aug 15 05:31:56 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-09af98a9-d590-435a-9cfb-bd06f0c94123 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1542996852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.1542996852 |
| Directory | /workspace/29.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_disconnect.800878493 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 10846358199 ps |
| CPU time | 14.89 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:32:08 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-ce97b0a2-49a0-4d17-8cf9-6a535da0d459 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=800878493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_ao n_wake_disconnect.800878493 |
| Directory | /workspace/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_reset.4228274528 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 14159632853 ps |
| CPU time | 17.09 seconds |
| Started | Aug 15 05:31:55 PM PDT 24 |
| Finished | Aug 15 05:32:13 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-e72ffa28-d216-499d-a081-3fd3c6b67547 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4228274528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.4228274528 |
| Directory | /workspace/29.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_resume.3894543075 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 29573019292 ps |
| CPU time | 35.51 seconds |
| Started | Aug 15 05:32:02 PM PDT 24 |
| Finished | Aug 15 05:32:37 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-613a3148-fba0-45d3-9db6-527ab2873aec |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3894543075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_a on_wake_resume.3894543075 |
| Directory | /workspace/29.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/29.usbdev_av_buffer.4130520851 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 169003798 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-f27e0f98-192e-462a-9331-4852e910f589 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41305 20851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_av_buffer.4130520851 |
| Directory | /workspace/29.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/29.usbdev_bitstuff_err.1568702391 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 156422407 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:31:59 PM PDT 24 |
| Finished | Aug 15 05:32:00 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-08a99838-fec9-46d9-b1f7-fce655b12015 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15687 02391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_bitstuff_err.1568702391 |
| Directory | /workspace/29.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_data_toggle_clear.3870441015 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 505446904 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:52 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-f4c7bf55-8481-46e3-a346-caea413dd86b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38704 41015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_clear.3870441015 |
| Directory | /workspace/29.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/29.usbdev_data_toggle_restore.2889941396 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 719378557 ps |
| CPU time | 2.02 seconds |
| Started | Aug 15 05:31:45 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d91c0960-480f-4af2-9c8b-0b7966bad27a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2889941396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.2889941396 |
| Directory | /workspace/29.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/29.usbdev_device_address.3499490735 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 15055750794 ps |
| CPU time | 29.28 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:32:21 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-265c5d0f-98d4-4a92-9a94-da039f321d2b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34994 90735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.3499490735 |
| Directory | /workspace/29.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/29.usbdev_device_timeout.1964426430 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 1006944923 ps |
| CPU time | 22.97 seconds |
| Started | Aug 15 05:31:46 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-4fa1f94b-73e6-4a98-b266-3d0bcafdd0ac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1964426430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.1964426430 |
| Directory | /workspace/29.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/29.usbdev_disable_endpoint.3065087438 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 642066174 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:31:45 PM PDT 24 |
| Finished | Aug 15 05:31:47 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-6a9b1b4d-5fbe-4617-b3a4-06c6df0a838c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30650 87438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_disable_endpoint.3065087438 |
| Directory | /workspace/29.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/29.usbdev_disconnected.666336332 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 166310944 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-eff4f13a-1039-4a54-a3ef-a9069f90629b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66633 6332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_disconnected.666336332 |
| Directory | /workspace/29.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/29.usbdev_enable.2460256595 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 34162328 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:31:52 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-96fcf852-b42a-410d-85db-6c70d51e4fad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24602 56595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.2460256595 |
| Directory | /workspace/29.usbdev_enable/latest |
| Test location | /workspace/coverage/default/29.usbdev_endpoint_access.731828301 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 828090201 ps |
| CPU time | 2.25 seconds |
| Started | Aug 15 05:32:01 PM PDT 24 |
| Finished | Aug 15 05:32:03 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-8e6620ce-9cd9-4aeb-8219-b9af765d2dde |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73182 8301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.731828301 |
| Directory | /workspace/29.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/29.usbdev_endpoint_types.354063244 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 210865715 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:52 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-0c6be72c-ffb1-4d66-b8c9-ab90cf5807d6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=354063244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.354063244 |
| Directory | /workspace/29.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/29.usbdev_fifo_rst.1617267938 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 213732437 ps |
| CPU time | 2.7 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-f8c6575b-d920-4359-bb5f-f3f6ce7e89b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16172 67938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_fifo_rst.1617267938 |
| Directory | /workspace/29.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_iso.1339635372 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 199181462 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:31:52 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-44481b78-4563-4116-bb9d-e5bc582d3ea4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1339635372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.1339635372 |
| Directory | /workspace/29.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_stall.2458846396 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 145352246 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:58 PM PDT 24 |
| Finished | Aug 15 05:31:59 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-aedd8fb8-18db-4f3b-b542-c83bca731331 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24588 46396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_stall.2458846396 |
| Directory | /workspace/29.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_trans.1543490337 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 252334973 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-afa416b9-9ec3-459e-9305-5c27bc74ab96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15434 90337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_trans.1543490337 |
| Directory | /workspace/29.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_invalid_sync.2881037169 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 5514012491 ps |
| CPU time | 166.51 seconds |
| Started | Aug 15 05:32:03 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 218028 kb |
| Host | smart-00082348-0e18-480f-a33d-5c84a3ae5c20 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2881037169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.2881037169 |
| Directory | /workspace/29.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/29.usbdev_iso_retraction.3585345045 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 6539546521 ps |
| CPU time | 84.74 seconds |
| Started | Aug 15 05:31:54 PM PDT 24 |
| Finished | Aug 15 05:33:19 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-32fca6ca-44e1-4356-bd38-e455a01951e4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3585345045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.3585345045 |
| Directory | /workspace/29.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_in_err.2053500084 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 190790655 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:55 PM PDT 24 |
| Finished | Aug 15 05:31:56 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-1b78f743-7ad1-48f9-9b08-cbe7f8404a13 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20535 00084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_in_err.2053500084 |
| Directory | /workspace/29.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_resume.1168651055 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 24300830939 ps |
| CPU time | 45.69 seconds |
| Started | Aug 15 05:31:59 PM PDT 24 |
| Finished | Aug 15 05:32:45 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-890a9a34-b52e-4c37-96d1-91ef14f7917a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11686 51055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_resume.1168651055 |
| Directory | /workspace/29.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_suspend.2740350413 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 9332591135 ps |
| CPU time | 12.13 seconds |
| Started | Aug 15 05:32:07 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-efa2ad57-4218-4479-8c98-bae6a78dc76b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27403 50413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_suspend.2740350413 |
| Directory | /workspace/29.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/29.usbdev_low_speed_traffic.3141629716 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 4220019973 ps |
| CPU time | 130.18 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 218576 kb |
| Host | smart-0f7a73dc-f79a-4714-8ab2-5b97bfac854b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3141629716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.3141629716 |
| Directory | /workspace/29.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_inter_pkt_delay.2344663942 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 2614754599 ps |
| CPU time | 78.07 seconds |
| Started | Aug 15 05:31:59 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-84eb23ac-8501-441f-a5de-68589435092f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2344663942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.2344663942 |
| Directory | /workspace/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_length_in_transaction.4053145445 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 251117015 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:32:00 PM PDT 24 |
| Finished | Aug 15 05:32:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-521aa2dc-4403-4bc8-b3bc-a5477b1066ad |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=4053145445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.4053145445 |
| Directory | /workspace/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_length_out_transaction.1472519927 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 229860133 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:05 PM PDT 24 |
| Finished | Aug 15 05:32:06 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-4e9c99f3-54b5-46a3-9146-6a179ee4efed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14725 19927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.1472519927 |
| Directory | /workspace/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_inter_pkt_delay.1544908097 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 2463246543 ps |
| CPU time | 18.6 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 217456 kb |
| Host | smart-2c5e9abf-e560-4343-9911-40137adb1a1c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1544908097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.1544908097 |
| Directory | /workspace/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_length_in_transaction.2196248896 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 151744012 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-94ebb1d2-8ade-4a3c-b83e-b5bbf636fd5b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2196248896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.2196248896 |
| Directory | /workspace/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_length_out_transaction.2490796927 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 159507600 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:31:51 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-451c4755-174f-477b-8f25-59b4a8619df0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24907 96927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.2490796927 |
| Directory | /workspace/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_nak_trans.595076953 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 219027983 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-fd70f20f-8e0b-4717-9aff-d181b6755a32 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59507 6953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_nak_trans.595076953 |
| Directory | /workspace/29.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_iso.2982230691 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 180801315 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:15 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a07d94c9-004c-49e6-b8b8-ba2124f0f363 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29822 30691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_iso.2982230691 |
| Directory | /workspace/29.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_stall.3614224105 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 156701235 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-12863145-3fb2-4b2e-9b4c-9cc608c0e0db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36142 24105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_stall.3614224105 |
| Directory | /workspace/29.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_trans_nak.1286431147 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 163835891 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:06 PM PDT 24 |
| Finished | Aug 15 05:32:07 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-8230fc64-15b4-4908-87a1-39569d71f3c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12864 31147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_trans_nak.1286431147 |
| Directory | /workspace/29.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/29.usbdev_pending_in_trans.3921967268 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 164500314 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:31:52 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-c306072f-29d0-49cb-b9c8-2204ea041ade |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39219 67268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pending_in_trans.3921967268 |
| Directory | /workspace/29.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_config_pinflip.2076881432 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 296563639 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:31:57 PM PDT 24 |
| Finished | Aug 15 05:31:58 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-3efdd1bb-68a7-4802-a5aa-988d8af92743 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2076881432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.2076881432 |
| Directory | /workspace/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_config_usb_ref_disable.2662913595 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 227846325 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:13 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-8d1ec927-cee4-41b2-88c8-e1a26813c25f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26629 13595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.2662913595 |
| Directory | /workspace/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_pins_sense.3680469010 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 80160165 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-1a9595bc-ca7b-40b9-9c0b-2c04ab670960 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36804 69010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.3680469010 |
| Directory | /workspace/29.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_buffer.2516831858 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 14670011088 ps |
| CPU time | 39.25 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-84f6b497-4dd2-4e3c-8aca-a56adf2064d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25168 31858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_buffer.2516831858 |
| Directory | /workspace/29.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_received.2914722716 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 156623599 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:31:58 PM PDT 24 |
| Finished | Aug 15 05:31:59 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-aad4c512-3b1e-42d4-a3d4-2e953d370641 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29147 22716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_received.2914722716 |
| Directory | /workspace/29.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_sent.3503609128 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 205942165 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-96506e93-790e-4a8d-a29e-5493311d5106 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35036 09128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_sent.3503609128 |
| Directory | /workspace/29.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/29.usbdev_random_length_in_transaction.2142816927 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 186245824 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:31:59 PM PDT 24 |
| Finished | Aug 15 05:32:00 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-9260efd5-6a10-44a5-8c60-f81ac2b28de3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21428 16927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_in_transaction.2142816927 |
| Directory | /workspace/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_random_length_out_transaction.1638249686 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 227242720 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:32:07 PM PDT 24 |
| Finished | Aug 15 05:32:08 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-031f3e9c-f43a-41d5-88ab-896f947a1be7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16382 49686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.1638249686 |
| Directory | /workspace/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_rx_crc_err.1711271447 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 173017664 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-cde39f9e-293f-4b8e-af8b-62d526e6995f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17112 71447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_rx_crc_err.1711271447 |
| Directory | /workspace/29.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_setup_stage.2733135435 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 154268023 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:31:54 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-797a85b3-6375-4f6b-a885-eca41530e9fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27331 35435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_setup_stage.2733135435 |
| Directory | /workspace/29.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/29.usbdev_setup_trans_ignored.2907792784 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 152441765 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:05 PM PDT 24 |
| Finished | Aug 15 05:32:06 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6b99bbe5-bb61-4f49-96eb-4c689c13bd59 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29077 92784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_setup_trans_ignored.2907792784 |
| Directory | /workspace/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/29.usbdev_smoke.1135129858 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 229058055 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d66df7d3-be1f-4711-87d0-f34b2faa19e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11351 29858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.1135129858 |
| Directory | /workspace/29.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/29.usbdev_spurious_pids_ignored.1344617624 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 3589255366 ps |
| CPU time | 104.75 seconds |
| Started | Aug 15 05:32:05 PM PDT 24 |
| Finished | Aug 15 05:33:50 PM PDT 24 |
| Peak memory | 217540 kb |
| Host | smart-671c1976-5892-4e05-bb24-f16b085d72a8 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1344617624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.1344617624 |
| Directory | /workspace/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/29.usbdev_stall_priority_over_nak.669719980 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 187565772 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:31:56 PM PDT 24 |
| Finished | Aug 15 05:31:57 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-5953c1ab-12c3-4de5-8511-1ed2205a847a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66971 9980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.669719980 |
| Directory | /workspace/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/29.usbdev_stall_trans.4139989200 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 181634192 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:00 PM PDT 24 |
| Finished | Aug 15 05:32:01 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-52d8d894-760b-491e-8472-7c2031aa8296 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41399 89200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_trans.4139989200 |
| Directory | /workspace/29.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_stream_len_max.3987143685 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 434936298 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:31:53 PM PDT 24 |
| Finished | Aug 15 05:31:55 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e71311e1-0a8c-4298-ae13-f88d7028c8fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39871 43685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.3987143685 |
| Directory | /workspace/29.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/29.usbdev_streaming_out.283035490 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 1850002736 ps |
| CPU time | 14.5 seconds |
| Started | Aug 15 05:31:59 PM PDT 24 |
| Finished | Aug 15 05:32:14 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-e206c743-d936-4bcb-8160-f48fcff6257a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28303 5490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_streaming_out.283035490 |
| Directory | /workspace/29.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/29.usbdev_timeout_missing_host_handshake.1753319387 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 733476767 ps |
| CPU time | 15.63 seconds |
| Started | Aug 15 05:31:52 PM PDT 24 |
| Finished | Aug 15 05:32:07 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-c5dd50a1-44e3-4508-a607-7a7683088525 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1753319387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_hos t_handshake.1753319387 |
| Directory | /workspace/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/29.usbdev_tx_rx_disruption.3033878380 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 517807414 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:32:06 PM PDT 24 |
| Finished | Aug 15 05:32:08 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-0c3b4c5b-e3ad-46e8-badd-06ea00e42d7a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3033878380 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_tx_rx_disruption.3033878380 |
| Directory | /workspace/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/290.usbdev_tx_rx_disruption.4031126315 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 533105487 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:39 PM PDT 24 |
| Finished | Aug 15 05:35:41 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-d850f537-1816-478c-9dec-0b8e64eb6324 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4031126315 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 290.usbdev_tx_rx_disruption.4031126315 |
| Directory | /workspace/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/291.usbdev_tx_rx_disruption.4021086832 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 639101666 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:35:34 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-cb8a4211-5760-4d21-89b9-96c41a591aa8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4021086832 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 291.usbdev_tx_rx_disruption.4021086832 |
| Directory | /workspace/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/292.usbdev_tx_rx_disruption.3531576691 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 474592531 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-12742e77-85dd-4c54-b600-7ce749bdc96c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3531576691 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 292.usbdev_tx_rx_disruption.3531576691 |
| Directory | /workspace/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/293.usbdev_tx_rx_disruption.2002902031 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 513282536 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:40 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-12a156dc-5c02-4803-a957-2ab3588557e5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2002902031 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 293.usbdev_tx_rx_disruption.2002902031 |
| Directory | /workspace/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/294.usbdev_tx_rx_disruption.2848245018 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 487064681 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-8f9a3c05-7713-483d-b12e-10c5e786a661 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2848245018 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 294.usbdev_tx_rx_disruption.2848245018 |
| Directory | /workspace/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/295.usbdev_tx_rx_disruption.769604290 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 480233319 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:42 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-017ef9bc-980d-423b-baa1-a46d3871a9cd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=769604290 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 295.usbdev_tx_rx_disruption.769604290 |
| Directory | /workspace/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/296.usbdev_tx_rx_disruption.1751533164 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 600047439 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:34 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-862031b9-1da9-4b3f-9ece-14376aa56b5b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1751533164 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 296.usbdev_tx_rx_disruption.1751533164 |
| Directory | /workspace/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/297.usbdev_tx_rx_disruption.789922288 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 605231602 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-12d420e4-c01b-4373-9ca2-ebd56927389d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=789922288 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 297.usbdev_tx_rx_disruption.789922288 |
| Directory | /workspace/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/298.usbdev_tx_rx_disruption.779120077 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 670262494 ps |
| CPU time | 1.86 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:33 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-6a2d5980-f086-443e-b2dc-c70ec2a456e5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=779120077 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 298.usbdev_tx_rx_disruption.779120077 |
| Directory | /workspace/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/299.usbdev_tx_rx_disruption.2484147139 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 489799925 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-48b9b7c8-c614-447c-a072-9c1eeaf230ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2484147139 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 299.usbdev_tx_rx_disruption.2484147139 |
| Directory | /workspace/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/3.usbdev_alert_test.2848683431 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 49214636 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:27:58 PM PDT 24 |
| Finished | Aug 15 05:27:59 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-245dd987-5934-4ab0-b6e2-fb3c59d387d8 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2848683431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.2848683431 |
| Directory | /workspace/3.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_disconnect.4219821298 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 10859210277 ps |
| CPU time | 12.97 seconds |
| Started | Aug 15 05:28:03 PM PDT 24 |
| Finished | Aug 15 05:28:16 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-37ac3948-40d8-4f31-be10-1ae094d88d50 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4219821298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_ao n_wake_disconnect.4219821298 |
| Directory | /workspace/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_reset.1047120575 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 18916555046 ps |
| CPU time | 22.05 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:28:19 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-748edd35-496c-4d1c-990e-d7edeea1d4d9 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1047120575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.1047120575 |
| Directory | /workspace/3.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_resume.3496809782 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 24145861668 ps |
| CPU time | 27.77 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:28:15 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-7f4d0d9e-c24d-4c69-8204-d3c36e1d33f6 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3496809782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_ao n_wake_resume.3496809782 |
| Directory | /workspace/3.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_buffer.2337187283 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 184247134 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:28:03 PM PDT 24 |
| Finished | Aug 15 05:28:04 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b8a4f2f1-899a-4cc9-bb9c-4c40ebf7ce82 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23371 87283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_buffer.2337187283 |
| Directory | /workspace/3.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_empty.1706661710 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 140105731 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:27:48 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-1f6debcf-c4a2-4b78-837d-07c7a74f0c1d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17066 61710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_empty.1706661710 |
| Directory | /workspace/3.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_overflow.3463298225 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 139278641 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:27:52 PM PDT 24 |
| Finished | Aug 15 05:27:53 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-8d5fd40e-b157-46fe-a305-8f3c414de42a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34632 98225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_overflow.3463298225 |
| Directory | /workspace/3.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/3.usbdev_bitstuff_err.2322491104 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 151802178 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:27:51 PM PDT 24 |
| Finished | Aug 15 05:27:52 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-e5f6fa43-4e8e-4f30-956c-3df1f67ec712 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23224 91104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_bitstuff_err.2322491104 |
| Directory | /workspace/3.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_data_toggle_clear.541978804 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 514853106 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:27:56 PM PDT 24 |
| Finished | Aug 15 05:27:58 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-4620b91c-7889-460c-89d2-eb7cded059e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54197 8804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_clear.541978804 |
| Directory | /workspace/3.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/3.usbdev_data_toggle_restore.3924273425 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 1024021372 ps |
| CPU time | 2.82 seconds |
| Started | Aug 15 05:28:01 PM PDT 24 |
| Finished | Aug 15 05:28:04 PM PDT 24 |
| Peak memory | 207932 kb |
| Host | smart-19e11a71-1952-45ed-a21a-a61474519300 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3924273425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.3924273425 |
| Directory | /workspace/3.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/3.usbdev_device_address.3210711043 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 52210138416 ps |
| CPU time | 86.56 seconds |
| Started | Aug 15 05:27:46 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 206704 kb |
| Host | smart-ac638a82-c2c2-4056-9c90-74f5feb0dbdd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32107 11043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.3210711043 |
| Directory | /workspace/3.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/3.usbdev_device_timeout.869888727 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 3438538026 ps |
| CPU time | 28.65 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:28:31 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-c3ea11fd-65f0-47c7-b85e-1280d0bc0e24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=869888727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.869888727 |
| Directory | /workspace/3.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/3.usbdev_disable_endpoint.2216775989 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 536036488 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:27:59 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-aaea9a1d-223d-4ddd-8ac9-2255e0d733e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22167 75989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disable_endpoint.2216775989 |
| Directory | /workspace/3.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/3.usbdev_disconnected.3934049645 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 135853772 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:28:13 PM PDT 24 |
| Finished | Aug 15 05:28:14 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e3546058-b64f-4226-ac11-025e070e9a04 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39340 49645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disconnected.3934049645 |
| Directory | /workspace/3.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/3.usbdev_enable.2338620801 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 38181023 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:28:17 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-90d8befa-8350-444a-9c5e-36e92b514c67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23386 20801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_enable.2338620801 |
| Directory | /workspace/3.usbdev_enable/latest |
| Test location | /workspace/coverage/default/3.usbdev_endpoint_access.1147658921 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 861485654 ps |
| CPU time | 2.28 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:28:04 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-139197d0-a339-479a-a8bf-dfeb93004c09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11476 58921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.1147658921 |
| Directory | /workspace/3.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/3.usbdev_endpoint_types.1053402794 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 520731371 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:28:04 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-132a3366-acc1-4de8-a702-aa22a5dd0643 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1053402794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.1053402794 |
| Directory | /workspace/3.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/3.usbdev_fifo_rst.3852842109 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 353127063 ps |
| CPU time | 2.81 seconds |
| Started | Aug 15 05:28:03 PM PDT 24 |
| Finished | Aug 15 05:28:06 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-681b8f86-aa3e-4d60-828d-2bd2a2a76fcc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38528 42109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_fifo_rst.3852842109 |
| Directory | /workspace/3.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_hiclk.3731853136 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 90178824178 ps |
| CPU time | 136.66 seconds |
| Started | Aug 15 05:27:52 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-a3a006eb-be35-40cc-817e-00721ebade26 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3731853136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.3731853136 |
| Directory | /workspace/3.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_hiclk_max.2081693727 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 89388277108 ps |
| CPU time | 146.19 seconds |
| Started | Aug 15 05:27:56 PM PDT 24 |
| Finished | Aug 15 05:30:23 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-82331b96-a3ab-434a-ae91-b5f135001379 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2081693727 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk_max.2081693727 |
| Directory | /workspace/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_loclk.4132340732 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 100147195402 ps |
| CPU time | 155.83 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:30:52 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-87a0f96f-7467-4289-bcba-eeb82de72814 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=4132340732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.4132340732 |
| Directory | /workspace/3.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_loclk_max.568249128 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 112091289886 ps |
| CPU time | 171.54 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:31:08 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-65a3d1b7-f8a6-4509-b95d-504e0b6c817e |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=568249128 -assert no postproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspac e/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk_max.568249128 |
| Directory | /workspace/3.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_phase.1024223299 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 97144169737 ps |
| CPU time | 155.58 seconds |
| Started | Aug 15 05:28:18 PM PDT 24 |
| Finished | Aug 15 05:30:54 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-126a5dbb-5686-4349-84db-2b27f91aa7ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10242 23299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_phase.1024223299 |
| Directory | /workspace/3.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_iso.1691158474 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 234054120 ps |
| CPU time | 1.15 seconds |
| Started | Aug 15 05:27:50 PM PDT 24 |
| Finished | Aug 15 05:27:51 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-05122082-2e8a-44c8-a795-2a0c70b29de8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1691158474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.1691158474 |
| Directory | /workspace/3.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_stall.1869386445 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 139088906 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:46 PM PDT 24 |
| Peak memory | 207324 kb |
| Host | smart-077172c9-7de5-45c5-a274-8b1e59021af2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18693 86445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_stall.1869386445 |
| Directory | /workspace/3.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_trans.1749039217 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 265592346 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-49c08bb7-968f-4ac9-a1ef-5c36c8c34150 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17490 39217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_trans.1749039217 |
| Directory | /workspace/3.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_invalid_sync.3817456893 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 2743166276 ps |
| CPU time | 22.25 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:28:12 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-9530a470-5e2b-473c-95da-f9acd647dcb6 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3817456893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.3817456893 |
| Directory | /workspace/3.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/3.usbdev_iso_retraction.2247554654 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 12567034728 ps |
| CPU time | 81.84 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:29:09 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-06f963fe-2509-4ae8-be9a-7cd14964cf81 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2247554654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.2247554654 |
| Directory | /workspace/3.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_in_err.778278382 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 242021380 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:47 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-89986422-0930-4104-914c-c8d8d41fde9e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77827 8382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_in_err.778278382 |
| Directory | /workspace/3.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_resume.1281581928 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 10282266159 ps |
| CPU time | 14.5 seconds |
| Started | Aug 15 05:27:45 PM PDT 24 |
| Finished | Aug 15 05:27:59 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-ecb7f100-41f5-47eb-bfc7-6c1598a26c74 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12815 81928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_resume.1281581928 |
| Directory | /workspace/3.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_suspend.3257821912 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 10464835090 ps |
| CPU time | 16.21 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:28:05 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-f30e4531-567a-44e2-81d9-3ea200138bb5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32578 21912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_suspend.3257821912 |
| Directory | /workspace/3.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/3.usbdev_low_speed_traffic.492550233 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 4476377345 ps |
| CPU time | 139.27 seconds |
| Started | Aug 15 05:27:50 PM PDT 24 |
| Finished | Aug 15 05:30:09 PM PDT 24 |
| Peak memory | 218288 kb |
| Host | smart-b062a280-3f60-4d85-9c46-cab646997668 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=492550233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.492550233 |
| Directory | /workspace/3.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_inter_pkt_delay.1909752165 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 3973117991 ps |
| CPU time | 37.65 seconds |
| Started | Aug 15 05:28:05 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-408aa915-bb22-4270-93a5-3e6819bcdb8c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1909752165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.1909752165 |
| Directory | /workspace/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_length_in_transaction.2898171968 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 285082590 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:27:51 PM PDT 24 |
| Finished | Aug 15 05:27:57 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-04b793fe-c41b-4e57-bc32-f466ebb96386 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2898171968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.2898171968 |
| Directory | /workspace/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_length_out_transaction.4098911100 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 192315666 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:27:58 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c8515dca-add5-49e1-8684-9211fa14fdc5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40989 11100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.4098911100 |
| Directory | /workspace/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_non_iso_usb_traffic.532750976 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 1370548177 ps |
| CPU time | 14.3 seconds |
| Started | Aug 15 05:27:51 PM PDT 24 |
| Finished | Aug 15 05:28:05 PM PDT 24 |
| Peak memory | 217536 kb |
| Host | smart-5a1d3595-2880-4c4d-b044-3a70ecea3458 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53275 0976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.532750976 |
| Directory | /workspace/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_usb_traffic.678810405 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 1774358380 ps |
| CPU time | 52.12 seconds |
| Started | Aug 15 05:28:00 PM PDT 24 |
| Finished | Aug 15 05:28:53 PM PDT 24 |
| Peak memory | 218200 kb |
| Host | smart-7dbe987c-b664-4fec-b6d6-8fc027526a30 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=678810405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.678810405 |
| Directory | /workspace/3.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_inter_pkt_delay.3157436363 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 2604044135 ps |
| CPU time | 75.11 seconds |
| Started | Aug 15 05:27:47 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 217424 kb |
| Host | smart-3cda5fa9-432d-4d8a-8323-15384ca3b51a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3157436363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.3157436363 |
| Directory | /workspace/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_length_in_transaction.10925696 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 183983726 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:52 PM PDT 24 |
| Finished | Aug 15 05:27:58 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d4ffd103-52fb-42c1-b11f-4210d827559d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=10925696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.10925696 |
| Directory | /workspace/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_length_out_transaction.1108433592 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 152696566 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:56 PM PDT 24 |
| Finished | Aug 15 05:27:57 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e050aff8-90b0-44f2-83b9-1a1bb1545ef5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11084 33592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.1108433592 |
| Directory | /workspace/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_nak_trans.2784263304 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 195341329 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:27:58 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-491538a9-b7ee-4e85-be99-d38f1d651ca4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27842 63304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_nak_trans.2784263304 |
| Directory | /workspace/3.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_iso.2866075127 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 160305227 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:27:54 PM PDT 24 |
| Finished | Aug 15 05:27:55 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-3c9e121d-cb62-46da-9253-7d0386d426c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28660 75127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_iso.2866075127 |
| Directory | /workspace/3.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_stall.2775706644 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 145617181 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:27:51 PM PDT 24 |
| Finished | Aug 15 05:27:52 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-574004de-6dde-4289-bac9-f3e51d569914 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27757 06644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_stall.2775706644 |
| Directory | /workspace/3.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_trans_nak.3424108752 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 180182901 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-35e2a950-50d2-41d7-97f1-a0441a749db5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34241 08752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_trans_nak.3424108752 |
| Directory | /workspace/3.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/3.usbdev_pending_in_trans.3174564469 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 159832917 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:27:49 PM PDT 24 |
| Finished | Aug 15 05:27:50 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-91c6e1eb-24bc-4044-b24d-53394ea0e74d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31745 64469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.3174564469 |
| Directory | /workspace/3.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_pinflip.2277611712 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 215423341 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:27:58 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-27653165-723a-4812-8d98-8191b40262ee |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2277611712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.2277611712 |
| Directory | /workspace/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_rand_bus_type.77816137 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 215709259 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:27:55 PM PDT 24 |
| Finished | Aug 15 05:27:56 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-fa453893-426a-41de-96fa-1b72e706c536 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77816 137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.77816137 |
| Directory | /workspace/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_usb_ref_disable.636904035 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 176094663 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:27:48 PM PDT 24 |
| Finished | Aug 15 05:27:49 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-95c24d6b-4559-4f76-a16c-1b4c85b2e5ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63690 4035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.636904035 |
| Directory | /workspace/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_pins_sense.2774985989 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 42741765 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:27:51 PM PDT 24 |
| Finished | Aug 15 05:27:52 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-aaa78a49-81ed-4d4a-9e6d-f3ba439a0466 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27749 85989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.2774985989 |
| Directory | /workspace/3.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_buffer.2034927001 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 13358957850 ps |
| CPU time | 31.97 seconds |
| Started | Aug 15 05:28:14 PM PDT 24 |
| Finished | Aug 15 05:28:52 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-bfddc17d-5f7b-44d7-8c14-6687fe4778e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20349 27001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_buffer.2034927001 |
| Directory | /workspace/3.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_received.2621812229 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 164699945 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:18 PM PDT 24 |
| Finished | Aug 15 05:28:19 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-416587f0-2817-42d5-b764-ca5b3fd9b696 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26218 12229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_received.2621812229 |
| Directory | /workspace/3.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_sent.4011849515 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 238040119 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:28:07 PM PDT 24 |
| Finished | Aug 15 05:28:08 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-6d90432d-adcc-474b-b9f3-b769744c5919 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40118 49515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_sent.4011849515 |
| Directory | /workspace/3.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_bus_disconnects.1873928617 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 7933517397 ps |
| CPU time | 50.94 seconds |
| Started | Aug 15 05:28:17 PM PDT 24 |
| Finished | Aug 15 05:29:08 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-1075bb96-f448-4a5b-8fe5-887789b3208f |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1873928617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.1873928617 |
| Directory | /workspace/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_suspends.1503871987 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 9778880504 ps |
| CPU time | 69.03 seconds |
| Started | Aug 15 05:28:12 PM PDT 24 |
| Finished | Aug 15 05:29:21 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-a3c9a707-d615-4dba-87a5-871162bbb517 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1503871987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.1503871987 |
| Directory | /workspace/3.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/3.usbdev_random_length_in_transaction.1997474653 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 239443255 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:28:08 PM PDT 24 |
| Finished | Aug 15 05:28:09 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-461f6488-3d43-4626-ae0a-582a90513a4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19974 74653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_in_transaction.1997474653 |
| Directory | /workspace/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_random_length_out_transaction.2290883976 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 177678480 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:15 PM PDT 24 |
| Finished | Aug 15 05:28:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-41fc4b0a-c1f7-4d05-ab9f-bad4a10bf1b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22908 83976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.2290883976 |
| Directory | /workspace/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_resume_link_active.1753373285 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 20175624823 ps |
| CPU time | 25.23 seconds |
| Started | Aug 15 05:28:03 PM PDT 24 |
| Finished | Aug 15 05:28:28 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-94630740-729f-47ff-b2b6-57e99697f295 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17533 73285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_resume_link_active.1753373285 |
| Directory | /workspace/3.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_crc_err.1317415173 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 143284221 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:28:17 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-817e4544-aae0-46c6-addd-522dfbeaa695 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13174 15173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_crc_err.1317415173 |
| Directory | /workspace/3.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_full.4173683773 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 261733113 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:28:19 PM PDT 24 |
| Finished | Aug 15 05:28:20 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d6c7e16f-013e-4354-bec6-30e9a02aa7ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41736 83773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_full.4173683773 |
| Directory | /workspace/3.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_pid_err.3356565690 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 173821677 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:21 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-cd5578bd-75ff-4752-a41f-80c233d68fa3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33565 65690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_pid_err.3356565690 |
| Directory | /workspace/3.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_sec_cm.1880712519 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 327646875 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:28:03 PM PDT 24 |
| Finished | Aug 15 05:28:04 PM PDT 24 |
| Peak memory | 223252 kb |
| Host | smart-2a91d618-8dd9-42cb-9503-48025d90458d |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1880712519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.1880712519 |
| Directory | /workspace/3.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_priority.1302797884 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 412566282 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:28:14 PM PDT 24 |
| Finished | Aug 15 05:28:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ed5e88f8-c080-4e0e-a881-558e61aa27a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13027 97884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.1302797884 |
| Directory | /workspace/3.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_priority_over_stall_response.2876696917 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 191311814 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:27:58 PM PDT 24 |
| Finished | Aug 15 05:27:59 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-82fb0035-1d40-4ee1-bda7-803016439d9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28766 96917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.2876696917 |
| Directory | /workspace/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_stage.3015323233 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 165491836 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:09 PM PDT 24 |
| Finished | Aug 15 05:28:10 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-0238d10c-9ad3-400f-b108-5be1f4116da6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30153 23233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_stage.3015323233 |
| Directory | /workspace/3.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_trans_ignored.2381732935 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 168973973 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:28:03 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-525f7c2d-135b-4334-94ab-059479c5e696 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23817 32935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_trans_ignored.2381732935 |
| Directory | /workspace/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/3.usbdev_smoke.2896643558 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 259846298 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f7d99481-5ebd-46b3-8af5-9180dfbef5ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28966 43558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.2896643558 |
| Directory | /workspace/3.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/3.usbdev_spurious_pids_ignored.3966996657 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 2208639965 ps |
| CPU time | 61.06 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:28:59 PM PDT 24 |
| Peak memory | 217504 kb |
| Host | smart-16aa75a7-3a9f-41d3-a742-416a943b6242 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3966996657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.3966996657 |
| Directory | /workspace/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/3.usbdev_stall_priority_over_nak.749496058 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 199721522 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:28:21 PM PDT 24 |
| Finished | Aug 15 05:28:22 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-62a436be-1518-48ba-a57e-8a1c152689aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74949 6058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.749496058 |
| Directory | /workspace/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/3.usbdev_stall_trans.2045364781 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 167242006 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:27:56 PM PDT 24 |
| Finished | Aug 15 05:27:57 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a99b6747-7590-40ea-a871-0ce44a77c5a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20453 64781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_trans.2045364781 |
| Directory | /workspace/3.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_stream_len_max.191444690 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 877658522 ps |
| CPU time | 2.23 seconds |
| Started | Aug 15 05:28:14 PM PDT 24 |
| Finished | Aug 15 05:28:16 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-8138c24e-570d-4cc5-96c0-116fa1e83376 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19144 4690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.191444690 |
| Directory | /workspace/3.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/3.usbdev_streaming_out.3161014137 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 3047631424 ps |
| CPU time | 30.17 seconds |
| Started | Aug 15 05:28:12 PM PDT 24 |
| Finished | Aug 15 05:28:42 PM PDT 24 |
| Peak memory | 216036 kb |
| Host | smart-73b87809-c7bd-469f-954e-975aa397f5be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31610 14137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_streaming_out.3161014137 |
| Directory | /workspace/3.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/3.usbdev_timeout_missing_host_handshake.429611776 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 4810098007 ps |
| CPU time | 43.02 seconds |
| Started | Aug 15 05:27:59 PM PDT 24 |
| Finished | Aug 15 05:28:42 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-13178b5d-47d7-4568-9e1c-297482bed5b5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=429611776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_ handshake.429611776 |
| Directory | /workspace/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/3.usbdev_tx_rx_disruption.114021922 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 419377804 ps |
| CPU time | 1.36 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-80a2ef3b-3232-480a-8d7e-7ad467c17627 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=114021922 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 3.usbdev_tx_rx_disruption.114021922 |
| Directory | /workspace/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/30.usbdev_alert_test.948815384 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 63214778 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:32:13 PM PDT 24 |
| Finished | Aug 15 05:32:15 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-0d98c95d-d8d0-4e1f-b49e-5b0140df31d2 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=948815384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.948815384 |
| Directory | /workspace/30.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_disconnect.1549921281 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 12312236267 ps |
| CPU time | 17.03 seconds |
| Started | Aug 15 05:32:00 PM PDT 24 |
| Finished | Aug 15 05:32:17 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-7484fa29-6720-4a6c-a460-633430cd2690 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1549921281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_a on_wake_disconnect.1549921281 |
| Directory | /workspace/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_reset.3973911256 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 19065157246 ps |
| CPU time | 24.13 seconds |
| Started | Aug 15 05:31:54 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-56008b9d-9041-440b-84d1-af462b5b480a |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3973911256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.3973911256 |
| Directory | /workspace/30.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_resume.3716203305 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 29437833515 ps |
| CPU time | 41.33 seconds |
| Started | Aug 15 05:31:50 PM PDT 24 |
| Finished | Aug 15 05:32:32 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-4c8472bb-71e5-472a-9b7f-894fbbc62d62 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3716203305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_a on_wake_resume.3716203305 |
| Directory | /workspace/30.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/30.usbdev_av_buffer.2001759420 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 173002144 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-ad591f5e-2983-4a99-b978-1cac8a9ef697 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20017 59420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_av_buffer.2001759420 |
| Directory | /workspace/30.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/30.usbdev_bitstuff_err.494069512 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 147558962 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:20 PM PDT 24 |
| Finished | Aug 15 05:32:21 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-653dda07-9059-41dc-974f-df1e3769a226 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49406 9512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_bitstuff_err.494069512 |
| Directory | /workspace/30.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_data_toggle_clear.1304323316 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 391129989 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:32:07 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-88a5eb1f-bf4d-4ade-9281-a5ecd8cdc44b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13043 23316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_clear.1304323316 |
| Directory | /workspace/30.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/30.usbdev_data_toggle_restore.3693548016 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 647003147 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:32:05 PM PDT 24 |
| Finished | Aug 15 05:32:06 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-bb0218c3-229b-4063-ae64-807fee462333 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3693548016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.3693548016 |
| Directory | /workspace/30.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/30.usbdev_device_address.3286176922 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 30455656149 ps |
| CPU time | 56.46 seconds |
| Started | Aug 15 05:31:59 PM PDT 24 |
| Finished | Aug 15 05:32:56 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-64fd59d0-80e5-4231-ba0f-e1067dd43e60 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32861 76922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.3286176922 |
| Directory | /workspace/30.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/30.usbdev_device_timeout.1763692412 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 1986070187 ps |
| CPU time | 17.12 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:31 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-8da91e56-6194-4add-8a04-99b9673c015c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1763692412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.1763692412 |
| Directory | /workspace/30.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/30.usbdev_disable_endpoint.2620981120 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 792381087 ps |
| CPU time | 1.97 seconds |
| Started | Aug 15 05:32:17 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-8470c905-ab30-4f23-81f9-cdb1de4cb26e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26209 81120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disable_endpoint.2620981120 |
| Directory | /workspace/30.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/30.usbdev_disconnected.136697690 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 153696489 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-47e9b107-8d3d-415c-992f-abe45eb82458 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13669 7690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disconnected.136697690 |
| Directory | /workspace/30.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/30.usbdev_enable.2616563422 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 50991020 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:31:57 PM PDT 24 |
| Finished | Aug 15 05:31:58 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-3c6ea38d-3f76-4834-8bb6-04f0323b8498 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26165 63422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_enable.2616563422 |
| Directory | /workspace/30.usbdev_enable/latest |
| Test location | /workspace/coverage/default/30.usbdev_endpoint_access.379826370 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 989203520 ps |
| CPU time | 2.74 seconds |
| Started | Aug 15 05:32:07 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-411c106c-41e1-477b-b396-2826a6958772 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37982 6370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.379826370 |
| Directory | /workspace/30.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/30.usbdev_endpoint_types.3456887774 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 199018373 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:31:58 PM PDT 24 |
| Finished | Aug 15 05:31:59 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-1280b79d-08ed-469f-9d84-15032dc56185 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3456887774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.3456887774 |
| Directory | /workspace/30.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/30.usbdev_fifo_rst.4098990400 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 304083173 ps |
| CPU time | 2.61 seconds |
| Started | Aug 15 05:31:58 PM PDT 24 |
| Finished | Aug 15 05:32:01 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-0125827e-bb04-418c-b653-deccff59baeb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40989 90400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_fifo_rst.4098990400 |
| Directory | /workspace/30.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_iso.554884341 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 266736336 ps |
| CPU time | 1.31 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 215708 kb |
| Host | smart-e3a605ce-b6e6-41f3-81d7-934e2d0dcabc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=554884341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.554884341 |
| Directory | /workspace/30.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_stall.3735452701 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 147613628 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:07 PM PDT 24 |
| Finished | Aug 15 05:32:08 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-165a0856-cb4d-48ad-86bd-fad3d9c2d0c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37354 52701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_stall.3735452701 |
| Directory | /workspace/30.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_trans.2218624332 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 260953592 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:31:59 PM PDT 24 |
| Finished | Aug 15 05:32:00 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-1098f70f-2191-4660-b083-d792c3a03046 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22186 24332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_trans.2218624332 |
| Directory | /workspace/30.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_invalid_sync.2994433802 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 3597948516 ps |
| CPU time | 97.72 seconds |
| Started | Aug 15 05:31:58 PM PDT 24 |
| Finished | Aug 15 05:33:36 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-271a53ff-a063-4e79-a9b9-6add08bf459c |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2994433802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.2994433802 |
| Directory | /workspace/30.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/30.usbdev_iso_retraction.2717403718 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 5964386171 ps |
| CPU time | 43.64 seconds |
| Started | Aug 15 05:32:05 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-c3c23ea0-bfb1-4da5-b319-fb58eb73ccee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2717403718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.2717403718 |
| Directory | /workspace/30.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_in_err.2624591367 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 203578313 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:03 PM PDT 24 |
| Finished | Aug 15 05:32:04 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-1985a2c6-c2c7-4435-a0b5-246e4be7e653 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26245 91367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_in_err.2624591367 |
| Directory | /workspace/30.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_resume.3359061381 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 27714825155 ps |
| CPU time | 50.76 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-3828c668-16a3-49f5-ac96-74cda58a7519 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33590 61381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_resume.3359061381 |
| Directory | /workspace/30.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_suspend.1949212239 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 9039695978 ps |
| CPU time | 12.82 seconds |
| Started | Aug 15 05:32:03 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-c6333419-f224-49a0-90b8-90303d3e5882 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19492 12239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_suspend.1949212239 |
| Directory | /workspace/30.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/30.usbdev_low_speed_traffic.21686635 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 3971298876 ps |
| CPU time | 114.14 seconds |
| Started | Aug 15 05:32:03 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 218360 kb |
| Host | smart-0a06171b-ff62-44d5-b231-518201152cfe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=21686635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.21686635 |
| Directory | /workspace/30.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_inter_pkt_delay.3473803058 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 4103796583 ps |
| CPU time | 42.54 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:32:53 PM PDT 24 |
| Peak memory | 217536 kb |
| Host | smart-582927e9-bc0f-4eb7-82fd-04b7353ac258 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3473803058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.3473803058 |
| Directory | /workspace/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_length_in_transaction.3603544599 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 243930707 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:11 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-aa5b8b94-fedf-4c15-8615-434b45eb70aa |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3603544599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.3603544599 |
| Directory | /workspace/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_length_out_transaction.3898725691 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 191164322 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:15 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-3e9b2015-0199-4204-872d-a5d5555d6e55 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38987 25691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.3898725691 |
| Directory | /workspace/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_inter_pkt_delay.580739989 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 4120097941 ps |
| CPU time | 42.05 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:54 PM PDT 24 |
| Peak memory | 217556 kb |
| Host | smart-730dfb19-8902-4883-8c8b-397365c240f2 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=580739989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.580739989 |
| Directory | /workspace/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_length_in_transaction.2723403325 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 162722378 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:24 PM PDT 24 |
| Finished | Aug 15 05:32:25 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-1825b2c9-62ad-48fe-a77b-84561f9bd8aa |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2723403325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.2723403325 |
| Directory | /workspace/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_length_out_transaction.3173856448 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 147855063 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:04 PM PDT 24 |
| Finished | Aug 15 05:32:05 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-28c95726-8d8e-4bd1-9cb5-d01ea9ea442a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31738 56448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.3173856448 |
| Directory | /workspace/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_nak_trans.178299091 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 256023529 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:32:03 PM PDT 24 |
| Finished | Aug 15 05:32:04 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-930b788e-27eb-411d-9f7a-6e933ba3ea37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17829 9091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_nak_trans.178299091 |
| Directory | /workspace/30.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_iso.238779380 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 151935170 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:32:13 PM PDT 24 |
| Finished | Aug 15 05:32:14 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-06a5f901-e78a-441e-85fb-17990bfe0a57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23877 9380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_iso.238779380 |
| Directory | /workspace/30.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_stall.2865288392 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 226123606 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f8095d03-4235-48a7-a04f-20cf74192769 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28652 88392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_stall.2865288392 |
| Directory | /workspace/30.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_trans_nak.971451177 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 187188438 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:32:11 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-81cbff2c-9e16-4e6f-9be1-3fc035db8bd6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97145 1177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_trans_nak.971451177 |
| Directory | /workspace/30.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/30.usbdev_pending_in_trans.241733120 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 200189094 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:13 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f85f11e9-5559-4ea2-b891-42657882b3d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24173 3120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pending_in_trans.241733120 |
| Directory | /workspace/30.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_config_pinflip.302983404 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 181525160 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:32:15 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-97a3b9f2-88f7-4f7d-bc2b-beaa984e9e81 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=302983404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.302983404 |
| Directory | /workspace/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_config_usb_ref_disable.2606302825 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 142214696 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:18 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-f252f164-a6bb-471c-b02e-270652996d2f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26063 02825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.2606302825 |
| Directory | /workspace/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_pins_sense.399981743 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 31314219 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:32:04 PM PDT 24 |
| Finished | Aug 15 05:32:05 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-8a9d66de-49eb-4ea8-b86e-41545fd8a167 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39998 1743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.399981743 |
| Directory | /workspace/30.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_buffer.4137551338 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 8837943621 ps |
| CPU time | 21.58 seconds |
| Started | Aug 15 05:32:01 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-af58f10e-111b-440e-8cd0-eab5eff6f4f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41375 51338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_buffer.4137551338 |
| Directory | /workspace/30.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_received.1487509182 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 176097110 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:36 PM PDT 24 |
| Finished | Aug 15 05:32:37 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-cc1ef039-f30c-4621-86f8-e9f01d0c31e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14875 09182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_received.1487509182 |
| Directory | /workspace/30.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_sent.3528632356 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 253755450 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-0862462a-329d-49a2-b4f6-febc34215345 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35286 32356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_sent.3528632356 |
| Directory | /workspace/30.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/30.usbdev_random_length_in_transaction.2731927764 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 214215547 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:31:57 PM PDT 24 |
| Finished | Aug 15 05:31:58 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-76e1c4b7-2935-46ed-84f7-269fc88d78e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27319 27764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_in_transaction.2731927764 |
| Directory | /workspace/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_random_length_out_transaction.1891593426 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 171008533 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:31:55 PM PDT 24 |
| Finished | Aug 15 05:31:56 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-c1d23e03-7f8d-4343-94cf-48458d0b6d88 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18915 93426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.1891593426 |
| Directory | /workspace/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_rx_crc_err.3485098426 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 164531874 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-fdf3c99e-39be-41b6-aa6b-583a6af0236e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34850 98426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_rx_crc_err.3485098426 |
| Directory | /workspace/30.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_rx_full.3951689731 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 342543942 ps |
| CPU time | 1.19 seconds |
| Started | Aug 15 05:32:06 PM PDT 24 |
| Finished | Aug 15 05:32:07 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-2bb77fc6-0b6f-4497-af09-36360b4c836c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39516 89731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_rx_full.3951689731 |
| Directory | /workspace/30.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/30.usbdev_setup_stage.2640593090 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 151336917 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:04 PM PDT 24 |
| Finished | Aug 15 05:32:05 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-2ca6f743-5d18-42d4-9e3a-10f488412fc1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26405 93090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_setup_stage.2640593090 |
| Directory | /workspace/30.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/30.usbdev_setup_trans_ignored.1814687545 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 161033721 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:02 PM PDT 24 |
| Finished | Aug 15 05:32:03 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-b10c23b1-e455-40f9-a689-38d68a6a5c4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18146 87545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_setup_trans_ignored.1814687545 |
| Directory | /workspace/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/30.usbdev_smoke.1381790397 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 224312652 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:31:54 PM PDT 24 |
| Finished | Aug 15 05:31:55 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-efe50c92-e3b4-4c60-8ec3-e39e0a49573a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13817 90397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.1381790397 |
| Directory | /workspace/30.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/30.usbdev_spurious_pids_ignored.819294625 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 4038841225 ps |
| CPU time | 123.1 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:34:14 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-43515f1a-301d-4de0-b3b1-9f6f2938b699 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=819294625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.819294625 |
| Directory | /workspace/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/30.usbdev_stall_priority_over_nak.4118998051 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 163056160 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:31:59 PM PDT 24 |
| Finished | Aug 15 05:32:00 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-b86095d7-aefb-43c6-bb9d-3d04d0708210 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41189 98051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.4118998051 |
| Directory | /workspace/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/30.usbdev_stall_trans.1420471695 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 169667957 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:13 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-8eff05d3-6dbd-4688-8dcb-bf539c156140 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14204 71695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_trans.1420471695 |
| Directory | /workspace/30.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_stream_len_max.1590020658 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 324880280 ps |
| CPU time | 1.25 seconds |
| Started | Aug 15 05:32:02 PM PDT 24 |
| Finished | Aug 15 05:32:04 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-500e59f7-40ba-40e9-b028-806b94035a5e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15900 20658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.1590020658 |
| Directory | /workspace/30.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/30.usbdev_streaming_out.453059712 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 3146601148 ps |
| CPU time | 90.77 seconds |
| Started | Aug 15 05:32:19 PM PDT 24 |
| Finished | Aug 15 05:33:50 PM PDT 24 |
| Peak memory | 217460 kb |
| Host | smart-4409f1dd-779d-431e-820d-e46d944d6319 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45305 9712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_streaming_out.453059712 |
| Directory | /workspace/30.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/30.usbdev_timeout_missing_host_handshake.1672708623 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 1603010138 ps |
| CPU time | 13.65 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-307b3d9f-9cb7-4a07-b621-b9b9140a87e3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1672708623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_hos t_handshake.1672708623 |
| Directory | /workspace/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/30.usbdev_tx_rx_disruption.3356249599 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 521695263 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:31:51 PM PDT 24 |
| Finished | Aug 15 05:31:53 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-260a2606-2756-4db8-9493-97c4c98328e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3356249599 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_tx_rx_disruption.3356249599 |
| Directory | /workspace/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/300.usbdev_tx_rx_disruption.1448345015 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 592925581 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-a032d9b4-89c7-42f2-97eb-7a19009090e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1448345015 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 300.usbdev_tx_rx_disruption.1448345015 |
| Directory | /workspace/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/301.usbdev_tx_rx_disruption.635265878 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 635287187 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:35:42 PM PDT 24 |
| Finished | Aug 15 05:35:44 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-3162d2a8-c2ac-402c-ab17-a87dd28463f5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=635265878 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 301.usbdev_tx_rx_disruption.635265878 |
| Directory | /workspace/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/302.usbdev_tx_rx_disruption.3477845610 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 474714848 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-52b45e18-6706-4077-910a-414828d4fc70 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3477845610 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 302.usbdev_tx_rx_disruption.3477845610 |
| Directory | /workspace/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/303.usbdev_tx_rx_disruption.1993695794 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 423991413 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:40 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-53530551-e3df-4ae4-bcf2-ac53af22b083 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1993695794 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 303.usbdev_tx_rx_disruption.1993695794 |
| Directory | /workspace/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/304.usbdev_tx_rx_disruption.2213220791 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 459460902 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-159dc512-7c8c-4096-92ab-196ba790adb6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2213220791 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 304.usbdev_tx_rx_disruption.2213220791 |
| Directory | /workspace/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/305.usbdev_tx_rx_disruption.2164275669 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 583644108 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-e41e8d3e-0628-4579-b153-7dbd0e3d45a2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2164275669 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 305.usbdev_tx_rx_disruption.2164275669 |
| Directory | /workspace/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/306.usbdev_tx_rx_disruption.776058329 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 582799201 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-56553f90-b6b6-411d-acd6-c3e5091524fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=776058329 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 306.usbdev_tx_rx_disruption.776058329 |
| Directory | /workspace/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/307.usbdev_tx_rx_disruption.163161321 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 635981208 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:35:39 PM PDT 24 |
| Finished | Aug 15 05:35:41 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-dcfbcea3-5710-4bf5-a5d7-79c011cf0fc2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=163161321 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 307.usbdev_tx_rx_disruption.163161321 |
| Directory | /workspace/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/308.usbdev_tx_rx_disruption.658870792 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 599923253 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-d1a3f2c3-690e-4498-bbc8-4f2fbb891b9e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=658870792 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 308.usbdev_tx_rx_disruption.658870792 |
| Directory | /workspace/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/309.usbdev_tx_rx_disruption.2140216927 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 539227566 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:40 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-6ac90d2f-7562-4cec-b5e2-6024c6cb0cb3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2140216927 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 309.usbdev_tx_rx_disruption.2140216927 |
| Directory | /workspace/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/31.usbdev_alert_test.3454449718 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 78152288 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:32:24 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-b7edf4f8-8aed-4179-a393-586ea7530259 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3454449718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.3454449718 |
| Directory | /workspace/31.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_disconnect.486608556 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 9823693792 ps |
| CPU time | 13.89 seconds |
| Started | Aug 15 05:32:04 PM PDT 24 |
| Finished | Aug 15 05:32:18 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-f9cb0165-f1bf-459f-9c3a-d42059468aa4 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=486608556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_ao n_wake_disconnect.486608556 |
| Directory | /workspace/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_reset.3269098863 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 20243282704 ps |
| CPU time | 24.32 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:33 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-122856dd-8cdf-4c4f-9394-689338f4291c |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3269098863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.3269098863 |
| Directory | /workspace/31.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/31.usbdev_av_buffer.937654537 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 161804149 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:31:58 PM PDT 24 |
| Finished | Aug 15 05:31:59 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-541ca9ac-31b3-4180-bac5-27dcaefcfac1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93765 4537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_av_buffer.937654537 |
| Directory | /workspace/31.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/31.usbdev_bitstuff_err.1705757547 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 200071007 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:23 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-9163948b-2bfb-4dd6-8244-d259c0487357 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17057 57547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_bitstuff_err.1705757547 |
| Directory | /workspace/31.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_data_toggle_clear.2313276497 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 341453178 ps |
| CPU time | 1.26 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:13 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-b74ce582-6ca6-4055-a6d8-b170ebd516a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23132 76497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_clear.2313276497 |
| Directory | /workspace/31.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/31.usbdev_device_timeout.3803062418 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 726813975 ps |
| CPU time | 14.77 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:36 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-811f58f7-3dbd-4d60-8650-df5186d7e080 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3803062418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.3803062418 |
| Directory | /workspace/31.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/31.usbdev_disable_endpoint.2940466195 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 697553060 ps |
| CPU time | 1.91 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:11 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-189a630a-c1a4-4654-b8ff-16dad6d24977 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29404 66195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disable_endpoint.2940466195 |
| Directory | /workspace/31.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/31.usbdev_disconnected.3255482457 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 146555952 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:32:16 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0dfb653c-4187-4772-aae5-dbab6abb7303 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32554 82457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disconnected.3255482457 |
| Directory | /workspace/31.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/31.usbdev_enable.3844264868 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 46380272 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 05:32:06 PM PDT 24 |
| Finished | Aug 15 05:32:07 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-2935c53d-a978-4d3e-9e8d-a40bff92ee32 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38442 64868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_enable.3844264868 |
| Directory | /workspace/31.usbdev_enable/latest |
| Test location | /workspace/coverage/default/31.usbdev_endpoint_access.221724571 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 968121430 ps |
| CPU time | 2.63 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:11 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-2610b5ab-02b3-4506-a7e3-aa2eff4d52cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22172 4571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.221724571 |
| Directory | /workspace/31.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/31.usbdev_endpoint_types.2874579809 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 384561207 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6c879c8f-1911-4fe9-b1c7-4181b0188e48 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2874579809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.2874579809 |
| Directory | /workspace/31.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/31.usbdev_fifo_rst.2098644506 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 326347775 ps |
| CPU time | 2.24 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:32:13 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-4707456c-a6a1-46ae-a2a4-269231310001 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20986 44506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_fifo_rst.2098644506 |
| Directory | /workspace/31.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_iso.3237659134 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 259855618 ps |
| CPU time | 1.25 seconds |
| Started | Aug 15 05:32:03 PM PDT 24 |
| Finished | Aug 15 05:32:05 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-2ad6ad2b-fc8b-4152-a8f6-5d36d94c8851 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3237659134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.3237659134 |
| Directory | /workspace/31.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_stall.382295723 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 224396039 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:15 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-e6bedd70-ea6b-429f-b71c-63e9237e2677 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38229 5723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_stall.382295723 |
| Directory | /workspace/31.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_trans.3273877312 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 168416417 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:07 PM PDT 24 |
| Finished | Aug 15 05:32:08 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-6af3ddac-256b-4429-8b80-0a3aeec0aee4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32738 77312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_trans.3273877312 |
| Directory | /workspace/31.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_invalid_sync.1542153479 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 5250079533 ps |
| CPU time | 145.56 seconds |
| Started | Aug 15 05:32:25 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-a0c063af-fdc9-4f9e-81a7-aefea4eeea1b |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1542153479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.1542153479 |
| Directory | /workspace/31.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/31.usbdev_iso_retraction.3635114637 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 4980739211 ps |
| CPU time | 32.02 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:44 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-e9dfb90d-d933-465c-83df-23ee69119f4b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3635114637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.3635114637 |
| Directory | /workspace/31.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_in_err.415737130 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 250159911 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-200d1401-1c13-4ce5-bfee-9d713e563ecd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41573 7130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_in_err.415737130 |
| Directory | /workspace/31.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_resume.4020765534 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 26955768724 ps |
| CPU time | 36.87 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-d3ad92e1-be23-4ba3-8596-5d7be76580c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40207 65534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_resume.4020765534 |
| Directory | /workspace/31.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_suspend.4072150796 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 9477880625 ps |
| CPU time | 11.78 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:23 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-694d15a7-7da6-43f4-979e-5d8093482cd1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40721 50796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_suspend.4072150796 |
| Directory | /workspace/31.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/31.usbdev_low_speed_traffic.1126571259 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 3251924976 ps |
| CPU time | 32.63 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:32:43 PM PDT 24 |
| Peak memory | 218948 kb |
| Host | smart-98e8dab9-03c3-4624-aad0-66c1094532af |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1126571259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.1126571259 |
| Directory | /workspace/31.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_inter_pkt_delay.1158113203 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 2788300782 ps |
| CPU time | 27.7 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-9bdd165b-8b28-493f-89a5-25d885d93372 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1158113203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.1158113203 |
| Directory | /workspace/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_length_in_transaction.3043833683 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 253258097 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-847a9d17-ec06-46b8-810c-356598315278 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3043833683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.3043833683 |
| Directory | /workspace/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_length_out_transaction.3233197186 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 202951411 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-e5403991-7e88-4ed3-b1cb-9e7598fbf903 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32331 97186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.3233197186 |
| Directory | /workspace/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_inter_pkt_delay.675340555 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 3530519944 ps |
| CPU time | 109 seconds |
| Started | Aug 15 05:32:17 PM PDT 24 |
| Finished | Aug 15 05:34:06 PM PDT 24 |
| Peak memory | 217328 kb |
| Host | smart-7302934b-ee02-419b-8d7b-7864164a3f0a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=675340555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.675340555 |
| Directory | /workspace/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_length_in_transaction.894997946 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 203409998 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-a296e30b-383e-4088-af96-0684bb84a7ed |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=894997946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.894997946 |
| Directory | /workspace/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_length_out_transaction.2029474648 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 151073797 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-d179d620-a828-46c1-bbb7-12038f79ba38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20294 74648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.2029474648 |
| Directory | /workspace/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_nak_trans.2505306409 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 197727219 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:32:15 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-d603d9b7-0d72-4461-b858-80ac4d814f29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25053 06409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_nak_trans.2505306409 |
| Directory | /workspace/31.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_iso.2755425783 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 148800574 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:32:11 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-f3f3997a-73a0-4d9a-8bb4-b03d9c9b23a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27554 25783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_iso.2755425783 |
| Directory | /workspace/31.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_stall.3095864642 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 171153274 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:05 PM PDT 24 |
| Finished | Aug 15 05:32:06 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-94c611cd-f576-4b2e-8d81-b7180997a098 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30958 64642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_stall.3095864642 |
| Directory | /workspace/31.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_trans_nak.1158230817 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 198724561 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:32:11 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-65874457-d642-4b08-b56e-af204c560b0f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11582 30817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_trans_nak.1158230817 |
| Directory | /workspace/31.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/31.usbdev_pending_in_trans.336024723 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 163516994 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:32:35 PM PDT 24 |
| Finished | Aug 15 05:32:36 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-aac79b1c-cb49-4925-94d3-3d6f8778c2cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33602 4723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pending_in_trans.336024723 |
| Directory | /workspace/31.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_config_pinflip.3990522610 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 179575383 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:19 PM PDT 24 |
| Finished | Aug 15 05:32:20 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b239eaa1-adf0-4e5d-ad37-f026c9b97361 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3990522610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.3990522610 |
| Directory | /workspace/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_config_usb_ref_disable.1678017314 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 146392001 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7ec6c24c-0a55-461d-9fe2-65f95f95c92d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16780 17314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.1678017314 |
| Directory | /workspace/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_pins_sense.3863877381 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 32901404 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:32:02 PM PDT 24 |
| Finished | Aug 15 05:32:02 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-14b2c18f-46dc-499d-acbb-2e9ba6b2e323 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38638 77381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.3863877381 |
| Directory | /workspace/31.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_buffer.1363993875 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 21684250923 ps |
| CPU time | 64.08 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:33:19 PM PDT 24 |
| Peak memory | 220260 kb |
| Host | smart-02554fb1-0cce-4ed4-bae8-0720d400a515 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13639 93875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_buffer.1363993875 |
| Directory | /workspace/31.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_received.1412431524 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 188358777 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:32:40 PM PDT 24 |
| Finished | Aug 15 05:32:41 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-f546c199-4f77-46d0-996b-24971058a03f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14124 31524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_received.1412431524 |
| Directory | /workspace/31.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_sent.1600994560 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 212527730 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:34 PM PDT 24 |
| Finished | Aug 15 05:32:35 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-0a6e1e21-bac4-4c98-9428-7ca9b5f27637 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16009 94560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_sent.1600994560 |
| Directory | /workspace/31.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/31.usbdev_random_length_in_transaction.320976740 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 205785513 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-d582f661-1c02-4b4e-b71d-adf8a7c45dc9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32097 6740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_in_transaction.320976740 |
| Directory | /workspace/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_random_length_out_transaction.2225325100 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 165986858 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:16 PM PDT 24 |
| Finished | Aug 15 05:32:17 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-a370f52a-05f0-4970-9f37-fda82c5cc9ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22253 25100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.2225325100 |
| Directory | /workspace/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_rx_crc_err.3092575902 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 206856850 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:19 PM PDT 24 |
| Finished | Aug 15 05:32:20 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-ca772ac7-05e0-45c3-a0d2-4f648a52f4cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30925 75902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_rx_crc_err.3092575902 |
| Directory | /workspace/31.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_rx_full.470323470 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 342945438 ps |
| CPU time | 1.21 seconds |
| Started | Aug 15 05:32:04 PM PDT 24 |
| Finished | Aug 15 05:32:05 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-41937ec0-7584-4d67-9e78-4c1691a9226e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47032 3470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_rx_full.470323470 |
| Directory | /workspace/31.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/31.usbdev_setup_stage.3189392221 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 150244435 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:39 PM PDT 24 |
| Finished | Aug 15 05:32:40 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-03590808-8a3d-41d3-a7a4-b046e860db60 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31893 92221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_setup_stage.3189392221 |
| Directory | /workspace/31.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/31.usbdev_setup_trans_ignored.3765889302 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 182885440 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:32:44 PM PDT 24 |
| Peak memory | 207268 kb |
| Host | smart-cf951c6a-b9e8-4b50-bfcb-f54f3c804562 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37658 89302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_setup_trans_ignored.3765889302 |
| Directory | /workspace/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/31.usbdev_smoke.3570113992 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 211816906 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:32:03 PM PDT 24 |
| Finished | Aug 15 05:32:04 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-f2c63c86-8f8d-4ea5-b367-611329f1bd41 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35701 13992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.3570113992 |
| Directory | /workspace/31.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/31.usbdev_spurious_pids_ignored.4166255944 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 1752436388 ps |
| CPU time | 14.32 seconds |
| Started | Aug 15 05:32:23 PM PDT 24 |
| Finished | Aug 15 05:32:38 PM PDT 24 |
| Peak memory | 217556 kb |
| Host | smart-1f24dde4-f0e2-42da-8c18-2709adbfaa99 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4166255944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.4166255944 |
| Directory | /workspace/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/31.usbdev_stall_priority_over_nak.3635370809 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 175285417 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a53acdb6-9311-4016-aadb-bd6bef106c92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36353 70809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.3635370809 |
| Directory | /workspace/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/31.usbdev_stall_trans.895240044 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 166781373 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:06 PM PDT 24 |
| Finished | Aug 15 05:32:07 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d107034c-6848-4dfb-aa6b-742fe3fe8734 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89524 0044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_trans.895240044 |
| Directory | /workspace/31.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_stream_len_max.3906748824 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 607839583 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:32:26 PM PDT 24 |
| Finished | Aug 15 05:32:28 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-337f5737-5228-4258-977d-89f0d3654bbf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39067 48824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.3906748824 |
| Directory | /workspace/31.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/31.usbdev_streaming_out.3579520577 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 1710259337 ps |
| CPU time | 48.62 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:32:59 PM PDT 24 |
| Peak memory | 224020 kb |
| Host | smart-9392cc50-2b7b-4bd8-8352-8a2a715c87e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35795 20577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_streaming_out.3579520577 |
| Directory | /workspace/31.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/31.usbdev_timeout_missing_host_handshake.1717649472 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 1086167358 ps |
| CPU time | 8.9 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:20 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-de5b38e0-b69c-44b6-a31b-ac3433f5d62c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1717649472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_hos t_handshake.1717649472 |
| Directory | /workspace/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/31.usbdev_tx_rx_disruption.3721219622 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 586648659 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:32:13 PM PDT 24 |
| Finished | Aug 15 05:32:14 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-12d657df-7bb0-4e11-b06e-fde6c8dda859 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3721219622 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_tx_rx_disruption.3721219622 |
| Directory | /workspace/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/310.usbdev_tx_rx_disruption.3954588249 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 579130094 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:42 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-c19ace13-e8c0-46ff-b52e-e374a8d4ef17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3954588249 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 310.usbdev_tx_rx_disruption.3954588249 |
| Directory | /workspace/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/311.usbdev_tx_rx_disruption.320144164 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 699099518 ps |
| CPU time | 1.84 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:38 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-f6751a50-e160-49ef-94cb-7e7471f16a55 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=320144164 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 311.usbdev_tx_rx_disruption.320144164 |
| Directory | /workspace/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/312.usbdev_tx_rx_disruption.2466340960 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 540046710 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:54 PM PDT 24 |
| Finished | Aug 15 05:35:56 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b8d56024-307b-4e9f-a71b-33fba7c343e1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2466340960 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 312.usbdev_tx_rx_disruption.2466340960 |
| Directory | /workspace/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/313.usbdev_tx_rx_disruption.2078821828 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 516223633 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-1e55ca15-189f-46b0-8303-ec1ca5639398 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2078821828 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 313.usbdev_tx_rx_disruption.2078821828 |
| Directory | /workspace/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/314.usbdev_tx_rx_disruption.148271732 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 485186196 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:42 PM PDT 24 |
| Finished | Aug 15 05:35:44 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-3c4210e6-4ffd-400b-965a-2957f465e4d4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=148271732 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 314.usbdev_tx_rx_disruption.148271732 |
| Directory | /workspace/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/315.usbdev_tx_rx_disruption.2182597224 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 458307271 ps |
| CPU time | 1.39 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-12168bc3-10e5-4da3-b355-e77b53eb2970 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2182597224 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 315.usbdev_tx_rx_disruption.2182597224 |
| Directory | /workspace/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/316.usbdev_tx_rx_disruption.3315524087 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 524442320 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:40 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-13d96c82-d7bd-45ff-b586-d54b97e0922b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3315524087 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 316.usbdev_tx_rx_disruption.3315524087 |
| Directory | /workspace/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/317.usbdev_tx_rx_disruption.1319040687 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 645927030 ps |
| CPU time | 1.74 seconds |
| Started | Aug 15 05:35:40 PM PDT 24 |
| Finished | Aug 15 05:35:42 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-46469202-ad95-48ce-8e95-03ec23763994 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1319040687 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 317.usbdev_tx_rx_disruption.1319040687 |
| Directory | /workspace/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/318.usbdev_tx_rx_disruption.1182982957 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 648635788 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-44c1687e-533c-46f4-a4b5-b5337f2c1c26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1182982957 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 318.usbdev_tx_rx_disruption.1182982957 |
| Directory | /workspace/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/319.usbdev_tx_rx_disruption.730190316 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 555451357 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:35:40 PM PDT 24 |
| Finished | Aug 15 05:35:42 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-d8b380a3-52d5-4b70-b882-2d7f855c8d35 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=730190316 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 319.usbdev_tx_rx_disruption.730190316 |
| Directory | /workspace/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/32.usbdev_alert_test.239802638 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 42638891 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:15 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-b7ee1897-ebea-416b-bdc6-3544735d7073 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=239802638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.239802638 |
| Directory | /workspace/32.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_disconnect.2594948529 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 12211314839 ps |
| CPU time | 18.18 seconds |
| Started | Aug 15 05:32:02 PM PDT 24 |
| Finished | Aug 15 05:32:20 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-f65c2407-8fff-4dda-bd6b-5d1e886710fb |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2594948529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_a on_wake_disconnect.2594948529 |
| Directory | /workspace/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_reset.3609803395 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 19677671677 ps |
| CPU time | 27.34 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-0ddca64b-4234-4dfa-a828-683b8f306a68 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3609803395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3609803395 |
| Directory | /workspace/32.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_resume.2912914678 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 26108219580 ps |
| CPU time | 33.39 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-0815d5cc-986e-4d32-b051-a8039ede5b60 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2912914678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_a on_wake_resume.2912914678 |
| Directory | /workspace/32.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/32.usbdev_av_buffer.2656794122 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 186610702 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:04 PM PDT 24 |
| Finished | Aug 15 05:32:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-4e07ef52-a3cb-4ba0-9918-ce77491d2d87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26567 94122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_av_buffer.2656794122 |
| Directory | /workspace/32.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/32.usbdev_bitstuff_err.2460527097 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 155151473 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:32:15 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e48d0e27-b238-46f2-83a9-02de86712845 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24605 27097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_bitstuff_err.2460527097 |
| Directory | /workspace/32.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_data_toggle_clear.2810113743 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 176718048 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-75f643fb-febc-4114-a2a3-84633fbd1f1d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28101 13743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_clear.2810113743 |
| Directory | /workspace/32.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/32.usbdev_data_toggle_restore.3331744960 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 1282551316 ps |
| CPU time | 3.18 seconds |
| Started | Aug 15 05:32:29 PM PDT 24 |
| Finished | Aug 15 05:32:33 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-b3500417-df25-4848-be93-d813070480c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3331744960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.3331744960 |
| Directory | /workspace/32.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/32.usbdev_device_address.2003392304 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 32213258710 ps |
| CPU time | 55.53 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-b220864e-c978-44e4-93b0-4c295a849e2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20033 92304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.2003392304 |
| Directory | /workspace/32.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/32.usbdev_device_timeout.3546708936 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 699084112 ps |
| CPU time | 14.79 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:32:37 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-eb609f53-b25b-49e6-bab7-829d8e7fea81 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3546708936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.3546708936 |
| Directory | /workspace/32.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/32.usbdev_disable_endpoint.74430041 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 935124243 ps |
| CPU time | 2.29 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:15 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-3cf8ce40-9382-45e4-8a9d-2c3cd45bf307 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74430 041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disable_endpoint.74430041 |
| Directory | /workspace/32.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/32.usbdev_disconnected.2684350050 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 156528619 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:09 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-e4679226-0aa4-4ce8-b7c2-561bbd696a2d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26843 50050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disconnected.2684350050 |
| Directory | /workspace/32.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/32.usbdev_enable.126103534 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 33362724 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:32:36 PM PDT 24 |
| Finished | Aug 15 05:32:37 PM PDT 24 |
| Peak memory | 207244 kb |
| Host | smart-919f362f-3be8-4ad6-898f-66855395757c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12610 3534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_enable.126103534 |
| Directory | /workspace/32.usbdev_enable/latest |
| Test location | /workspace/coverage/default/32.usbdev_endpoint_access.976104816 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 933124704 ps |
| CPU time | 2.39 seconds |
| Started | Aug 15 05:32:27 PM PDT 24 |
| Finished | Aug 15 05:32:30 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-8e266208-2e9f-43a1-a927-2771559d6943 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97610 4816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.976104816 |
| Directory | /workspace/32.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/32.usbdev_fifo_rst.4218154405 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 279548460 ps |
| CPU time | 2.21 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:17 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-e61fe5b2-32f4-48b6-a205-0f3ff894330a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42181 54405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_fifo_rst.4218154405 |
| Directory | /workspace/32.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_iso.558253281 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 164295654 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:04 PM PDT 24 |
| Peak memory | 206500 kb |
| Host | smart-fd8e721c-6379-49eb-823a-b1766280c64a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=558253281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.558253281 |
| Directory | /workspace/32.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_stall.3358116435 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 142933664 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-697f8245-d10d-4350-8615-639da3f19469 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33581 16435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_stall.3358116435 |
| Directory | /workspace/32.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_trans.454075479 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 192631847 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:25 PM PDT 24 |
| Finished | Aug 15 05:32:26 PM PDT 24 |
| Peak memory | 207284 kb |
| Host | smart-59dfe352-c3c5-4be0-a5c9-38e438bd3c52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45407 5479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_trans.454075479 |
| Directory | /workspace/32.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_invalid_sync.4283684354 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 2501777183 ps |
| CPU time | 63.25 seconds |
| Started | Aug 15 05:32:25 PM PDT 24 |
| Finished | Aug 15 05:33:28 PM PDT 24 |
| Peak memory | 218116 kb |
| Host | smart-6e8635ac-e53e-43d3-98cb-89608e8b9633 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4283684354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.4283684354 |
| Directory | /workspace/32.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/32.usbdev_iso_retraction.2230160557 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 5466468867 ps |
| CPU time | 66.86 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:33:29 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-60c575b5-4a12-47d5-a3a6-ee90a6205961 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2230160557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.2230160557 |
| Directory | /workspace/32.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_in_err.678973859 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 237534512 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:32:48 PM PDT 24 |
| Finished | Aug 15 05:32:49 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-09a717be-83a8-4f41-a60c-8383484a9d9d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67897 3859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_in_err.678973859 |
| Directory | /workspace/32.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_resume.3318485995 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 11886269869 ps |
| CPU time | 17.12 seconds |
| Started | Aug 15 05:32:24 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-0035eee8-834b-45bb-8d3a-9fce72540e55 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33184 85995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_resume.3318485995 |
| Directory | /workspace/32.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_suspend.3587358729 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 8475256411 ps |
| CPU time | 11.16 seconds |
| Started | Aug 15 05:32:13 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-45aac417-9bbb-48c0-aee7-2b28b03a7414 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35873 58729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_suspend.3587358729 |
| Directory | /workspace/32.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/32.usbdev_low_speed_traffic.3356590074 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 2313032255 ps |
| CPU time | 17.47 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:31 PM PDT 24 |
| Peak memory | 219400 kb |
| Host | smart-8a13e3ef-92ab-49d1-8334-9c8f8c2c81ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3356590074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.3356590074 |
| Directory | /workspace/32.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_inter_pkt_delay.3276095484 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 4095662788 ps |
| CPU time | 42 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:53 PM PDT 24 |
| Peak memory | 217488 kb |
| Host | smart-692241aa-b759-4450-9cd6-b0cc7bd8a1a5 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3276095484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.3276095484 |
| Directory | /workspace/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_length_in_transaction.2127679539 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 241331140 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:32:09 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-67316829-5d27-43da-97f1-08c3beb95ce3 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2127679539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.2127679539 |
| Directory | /workspace/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_length_out_transaction.535797502 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 200254670 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-73dd5dd5-61d7-470f-bba8-f823cfeaa4a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53579 7502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.535797502 |
| Directory | /workspace/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_inter_pkt_delay.1312864342 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 2906197111 ps |
| CPU time | 27.76 seconds |
| Started | Aug 15 05:32:10 PM PDT 24 |
| Finished | Aug 15 05:32:38 PM PDT 24 |
| Peak memory | 217632 kb |
| Host | smart-eba0ecbc-71ca-4021-b75f-4016b8e3fd61 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1312864342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.1312864342 |
| Directory | /workspace/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_length_in_transaction.2831153909 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 154533934 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:13 PM PDT 24 |
| Finished | Aug 15 05:32:14 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-68be4ee8-99cd-4b7c-91ee-4d45c3c3e74e |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2831153909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.2831153909 |
| Directory | /workspace/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_length_out_transaction.2764336378 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 158518185 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:08 PM PDT 24 |
| Finished | Aug 15 05:32:10 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-f94de711-8a5d-4d4a-9d0c-c55ae1449a62 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27643 36378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.2764336378 |
| Directory | /workspace/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_nak_trans.227948118 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 243232756 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:13 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-8051d765-633f-4b16-ac07-14e7a4058595 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22794 8118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_nak_trans.227948118 |
| Directory | /workspace/32.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_iso.322103993 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 219087547 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:06 PM PDT 24 |
| Finished | Aug 15 05:32:07 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-6febf70a-9933-4312-a5b7-565afda4d65c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32210 3993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_iso.322103993 |
| Directory | /workspace/32.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_stall.3763548010 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 176514751 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:20 PM PDT 24 |
| Finished | Aug 15 05:32:21 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-f9205702-1ac6-49dd-ba71-9034e8880213 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37635 48010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_stall.3763548010 |
| Directory | /workspace/32.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_trans_nak.3247904774 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 184896114 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:16 PM PDT 24 |
| Finished | Aug 15 05:32:17 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-03c55940-d559-4061-8933-6cafbeef6f3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32479 04774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_trans_nak.3247904774 |
| Directory | /workspace/32.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/32.usbdev_pending_in_trans.2469592094 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 170732455 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-74c785e3-0b26-4b0f-84be-b990c6696bec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24695 92094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pending_in_trans.2469592094 |
| Directory | /workspace/32.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_config_pinflip.760229186 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 207561308 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:32:33 PM PDT 24 |
| Finished | Aug 15 05:32:35 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-18ff37b5-23d9-478a-9f9f-7e3e62dd828e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=760229186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.760229186 |
| Directory | /workspace/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_config_usb_ref_disable.1835616609 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 203493891 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:17 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-34872795-c7fa-4665-af1d-ea41fd4ded12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18356 16609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.1835616609 |
| Directory | /workspace/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_pins_sense.3240553187 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 46653960 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:32:07 PM PDT 24 |
| Finished | Aug 15 05:32:08 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-95a0d6e4-5749-4cb3-af4e-ac6cee6e1b4f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32405 53187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.3240553187 |
| Directory | /workspace/32.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_buffer.4105268683 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 20879169310 ps |
| CPU time | 53.18 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:33:07 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-bb6a133d-7081-4fc3-a9d4-db6b32965e73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41052 68683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_buffer.4105268683 |
| Directory | /workspace/32.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_received.1016201988 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 189393676 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:32:37 PM PDT 24 |
| Finished | Aug 15 05:32:38 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-245f5c2c-cf10-438a-b8fa-e09f53938c58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10162 01988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_received.1016201988 |
| Directory | /workspace/32.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_sent.752160949 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 177313201 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:32:11 PM PDT 24 |
| Finished | Aug 15 05:32:12 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-66936720-c695-45e2-846e-f3d2e559a699 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75216 0949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_sent.752160949 |
| Directory | /workspace/32.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/32.usbdev_random_length_in_transaction.354691690 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 170642280 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:32:39 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-db9eec35-0998-45bd-ae4d-23db57a17a44 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35469 1690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_in_transaction.354691690 |
| Directory | /workspace/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_random_length_out_transaction.855630333 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 175142304 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-1ef7dc53-86c4-4a2c-8f10-01618582dac2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85563 0333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.855630333 |
| Directory | /workspace/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_rx_crc_err.4026266791 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 144001210 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-429c0687-737a-43f9-8d5d-e53e0bc2d80e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40262 66791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_rx_crc_err.4026266791 |
| Directory | /workspace/32.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_rx_full.1456047472 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 394562912 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:32:07 PM PDT 24 |
| Finished | Aug 15 05:32:08 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-c76219bd-261a-47f6-af3f-46827776ac99 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14560 47472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_rx_full.1456047472 |
| Directory | /workspace/32.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/32.usbdev_setup_stage.1555716782 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 169543836 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:32:39 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b5e8864b-3d92-4b98-b76c-a92dfe83b42d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15557 16782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_setup_stage.1555716782 |
| Directory | /workspace/32.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/32.usbdev_setup_trans_ignored.3443664789 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 187708198 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-714467e7-e5ee-44d7-98e6-673abfe323ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34436 64789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_setup_trans_ignored.3443664789 |
| Directory | /workspace/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/32.usbdev_smoke.3650122683 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 272755070 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:32:55 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-85d68c09-a6ec-4523-a0e4-7b57c6a24ff2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36501 22683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.3650122683 |
| Directory | /workspace/32.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/32.usbdev_spurious_pids_ignored.2118277769 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 2345971499 ps |
| CPU time | 67.75 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:33:56 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-dadcc887-7742-4ead-b6ec-eeccf859e585 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2118277769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.2118277769 |
| Directory | /workspace/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/32.usbdev_stall_priority_over_nak.3338421843 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 179038533 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:41 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-e8555154-a23e-4110-837d-9bb2e387f2c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33384 21843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.3338421843 |
| Directory | /workspace/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/32.usbdev_stall_trans.1699121387 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 222282917 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:32:53 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-4ef72724-e1b8-4776-96e3-d16f85b2be86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16991 21387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_trans.1699121387 |
| Directory | /workspace/32.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_stream_len_max.2409294323 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 1116227102 ps |
| CPU time | 2.95 seconds |
| Started | Aug 15 05:32:42 PM PDT 24 |
| Finished | Aug 15 05:32:46 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-b915fd6d-14ca-4123-a618-b2c637adb12d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24092 94323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.2409294323 |
| Directory | /workspace/32.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/32.usbdev_streaming_out.2058952021 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 3228625264 ps |
| CPU time | 32.04 seconds |
| Started | Aug 15 05:32:26 PM PDT 24 |
| Finished | Aug 15 05:32:59 PM PDT 24 |
| Peak memory | 217620 kb |
| Host | smart-91fc8977-b48a-4b57-82ad-2f0ade6352c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20589 52021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_streaming_out.2058952021 |
| Directory | /workspace/32.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/32.usbdev_timeout_missing_host_handshake.182372311 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 1154422247 ps |
| CPU time | 25.33 seconds |
| Started | Aug 15 05:32:12 PM PDT 24 |
| Finished | Aug 15 05:32:38 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-626a8f5d-1c17-4b9c-9124-6d269e6e6205 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=182372311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host _handshake.182372311 |
| Directory | /workspace/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/32.usbdev_tx_rx_disruption.4108750131 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 578687256 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:32:23 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-c9539da3-c0ff-4651-8977-2d20e1daff30 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4108750131 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_tx_rx_disruption.4108750131 |
| Directory | /workspace/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/320.usbdev_tx_rx_disruption.2009251064 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 478586982 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:40 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-5acd5490-cf3e-467b-a2c2-fdc86d8c701d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2009251064 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 320.usbdev_tx_rx_disruption.2009251064 |
| Directory | /workspace/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/321.usbdev_tx_rx_disruption.3711667800 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 516513614 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-14dfb410-1344-42f7-8921-1463a4e8ad70 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3711667800 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 321.usbdev_tx_rx_disruption.3711667800 |
| Directory | /workspace/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/322.usbdev_tx_rx_disruption.669709972 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 463539616 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-2a35015c-8ca4-47dd-9818-ac162cd67e69 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=669709972 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 322.usbdev_tx_rx_disruption.669709972 |
| Directory | /workspace/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/323.usbdev_tx_rx_disruption.2868517789 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 622612672 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:35:31 PM PDT 24 |
| Finished | Aug 15 05:35:33 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-184d734d-8325-4de6-88c0-dff3d057337f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2868517789 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 323.usbdev_tx_rx_disruption.2868517789 |
| Directory | /workspace/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/324.usbdev_tx_rx_disruption.2911540341 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 592861618 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:42 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-241a2d66-f60f-454a-b2ee-cac8655c966c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2911540341 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 324.usbdev_tx_rx_disruption.2911540341 |
| Directory | /workspace/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/325.usbdev_tx_rx_disruption.2005640568 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 475847328 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-2433574b-0173-4e14-bd33-ac0af2b90b3a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2005640568 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 325.usbdev_tx_rx_disruption.2005640568 |
| Directory | /workspace/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/326.usbdev_tx_rx_disruption.1632170029 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 577312679 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-e9ff83f5-e7c9-4f81-bc88-d0b1944523bf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1632170029 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 326.usbdev_tx_rx_disruption.1632170029 |
| Directory | /workspace/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/327.usbdev_tx_rx_disruption.3777898849 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 482764299 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-53400961-29b5-4261-b40e-6e9a28e7a1fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3777898849 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 327.usbdev_tx_rx_disruption.3777898849 |
| Directory | /workspace/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/328.usbdev_tx_rx_disruption.3430583902 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 535653456 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:35:38 PM PDT 24 |
| Finished | Aug 15 05:35:40 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-e6c16320-0782-48f6-af5b-7efc70b01edc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3430583902 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 328.usbdev_tx_rx_disruption.3430583902 |
| Directory | /workspace/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/329.usbdev_tx_rx_disruption.1129107712 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 604487378 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c50d266e-b069-4a4d-a60c-1dba1ae27931 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1129107712 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 329.usbdev_tx_rx_disruption.1129107712 |
| Directory | /workspace/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/33.usbdev_alert_test.539758401 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 39517840 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d1c6f313-3b25-4dfa-aa5b-7f6b17163b5b |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=539758401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.539758401 |
| Directory | /workspace/33.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_disconnect.221255996 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 10065173581 ps |
| CPU time | 12.28 seconds |
| Started | Aug 15 05:33:49 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-904dfd91-ac6d-4ec8-af52-c6f10205aa61 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=221255996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_ao n_wake_disconnect.221255996 |
| Directory | /workspace/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_reset.4187468532 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 14895577188 ps |
| CPU time | 17.1 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:32:39 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-d98d855c-9e69-4e89-a13b-77f9d596ecfa |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4187468532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.4187468532 |
| Directory | /workspace/33.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_resume.4114327068 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 29224172245 ps |
| CPU time | 37.87 seconds |
| Started | Aug 15 05:32:32 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-5b013461-567a-4e4f-bdd7-74b3af7d0b6c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4114327068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_a on_wake_resume.4114327068 |
| Directory | /workspace/33.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/33.usbdev_av_buffer.2104747084 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 151752768 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2b431bac-3228-42c4-bf15-5800dc303ae6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21047 47084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_av_buffer.2104747084 |
| Directory | /workspace/33.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/33.usbdev_bitstuff_err.3402795669 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 166552877 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:29 PM PDT 24 |
| Finished | Aug 15 05:32:29 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-228fd54c-8743-4368-bb8f-f6b057d4ea15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34027 95669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_bitstuff_err.3402795669 |
| Directory | /workspace/33.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_data_toggle_clear.1061885723 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 261111165 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:32:26 PM PDT 24 |
| Finished | Aug 15 05:32:27 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-bf45de4c-f315-4065-99d0-62d9a2414634 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10618 85723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_clear.1061885723 |
| Directory | /workspace/33.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/33.usbdev_data_toggle_restore.277382124 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 884334362 ps |
| CPU time | 2.49 seconds |
| Started | Aug 15 05:32:20 PM PDT 24 |
| Finished | Aug 15 05:32:23 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-07ec9bc7-4983-467c-aad6-246e9c269a24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=277382124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.277382124 |
| Directory | /workspace/33.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/33.usbdev_device_address.690147295 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 22561022163 ps |
| CPU time | 35.97 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:57 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-8d819dee-f8ce-4459-ac24-87406b31c2e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69014 7295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.690147295 |
| Directory | /workspace/33.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/33.usbdev_device_timeout.2170942934 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 1527625657 ps |
| CPU time | 13.52 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:31 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-91128cef-b7ef-41b2-a433-0bcc5b45064c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2170942934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.2170942934 |
| Directory | /workspace/33.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/33.usbdev_disable_endpoint.3101269674 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 456975723 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:32:40 PM PDT 24 |
| Finished | Aug 15 05:32:41 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-bf7df599-5627-49dc-907c-53e89331b8d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31012 69674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disable_endpoint.3101269674 |
| Directory | /workspace/33.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/33.usbdev_disconnected.1776432725 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 142439643 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-a887f62a-fa1f-485d-b1f1-3001e6e4c9d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17764 32725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disconnected.1776432725 |
| Directory | /workspace/33.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/33.usbdev_enable.3004479626 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 65073600 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-88efd09f-07c8-4a52-b04d-da42303d28a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30044 79626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_enable.3004479626 |
| Directory | /workspace/33.usbdev_enable/latest |
| Test location | /workspace/coverage/default/33.usbdev_endpoint_access.564633856 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 883780837 ps |
| CPU time | 2.75 seconds |
| Started | Aug 15 05:32:51 PM PDT 24 |
| Finished | Aug 15 05:32:54 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-63e86767-1be1-4e53-a065-c0d109969d8b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56463 3856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.564633856 |
| Directory | /workspace/33.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/33.usbdev_fifo_rst.223168473 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 228711022 ps |
| CPU time | 2.28 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-093490b2-2a30-43ed-961c-3552fbcbe5c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22316 8473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_fifo_rst.223168473 |
| Directory | /workspace/33.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_iso.3013584123 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 184861290 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:32:49 PM PDT 24 |
| Peak memory | 215852 kb |
| Host | smart-bcb26548-9ac2-41d6-b492-8ea8b5f2722e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3013584123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.3013584123 |
| Directory | /workspace/33.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_stall.2695899732 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 165640197 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:32:20 PM PDT 24 |
| Finished | Aug 15 05:32:20 PM PDT 24 |
| Peak memory | 206960 kb |
| Host | smart-9909f86b-56cb-454b-9965-dd8ef87b8f32 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26958 99732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_stall.2695899732 |
| Directory | /workspace/33.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_trans.3632182079 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 191865265 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:15 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-c1ea6e41-2d91-41e5-867f-9229d52c7228 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36321 82079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_trans.3632182079 |
| Directory | /workspace/33.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_invalid_sync.2243829147 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 3696311971 ps |
| CPU time | 106.07 seconds |
| Started | Aug 15 05:32:16 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 223992 kb |
| Host | smart-8c7f3d16-85ab-4df4-8505-c0442c272d5c |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2243829147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.2243829147 |
| Directory | /workspace/33.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/33.usbdev_iso_retraction.2476446834 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 8344021205 ps |
| CPU time | 51.12 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:33:41 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-15c18d62-00fd-480f-ba0f-dd7ca01ee298 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2476446834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.2476446834 |
| Directory | /workspace/33.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_in_err.1780705461 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 246504953 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:32:44 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-e62d97d9-e7dd-455c-b3a6-e1f0e74d7b69 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17807 05461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_in_err.1780705461 |
| Directory | /workspace/33.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_resume.3421118709 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 22603800732 ps |
| CPU time | 35.62 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:54 PM PDT 24 |
| Peak memory | 216064 kb |
| Host | smart-4050ee52-2993-4502-bc8d-6964d1d68c9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34211 18709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_resume.3421118709 |
| Directory | /workspace/33.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_suspend.3480690067 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 9261314263 ps |
| CPU time | 12.55 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:32:56 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-8c219628-951a-4f0f-84e6-1061e1356239 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34806 90067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_suspend.3480690067 |
| Directory | /workspace/33.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/33.usbdev_low_speed_traffic.2796708298 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 4309958582 ps |
| CPU time | 124.11 seconds |
| Started | Aug 15 05:32:35 PM PDT 24 |
| Finished | Aug 15 05:34:39 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-d28a8050-7e5c-48f8-9e4c-46a1cfd1c989 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2796708298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.2796708298 |
| Directory | /workspace/33.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_inter_pkt_delay.3293112658 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 1819205054 ps |
| CPU time | 48.35 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:33:36 PM PDT 24 |
| Peak memory | 215728 kb |
| Host | smart-8ccfbb3c-59e4-4aac-a608-fccc710c000f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3293112658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.3293112658 |
| Directory | /workspace/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_length_in_transaction.2517875631 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 243325298 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:32:46 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-694c2484-6d47-4ffd-b363-6f224c7896a5 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2517875631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.2517875631 |
| Directory | /workspace/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_length_out_transaction.3605544124 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 255929492 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:32:14 PM PDT 24 |
| Finished | Aug 15 05:32:15 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-750ed77d-c668-4c7c-a8b2-51623e5eb8b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36055 44124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.3605544124 |
| Directory | /workspace/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_inter_pkt_delay.734741947 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 2493721172 ps |
| CPU time | 18.53 seconds |
| Started | Aug 15 05:32:37 PM PDT 24 |
| Finished | Aug 15 05:32:56 PM PDT 24 |
| Peak memory | 217628 kb |
| Host | smart-72a1d8e0-cbe4-4b14-97c1-4d09275c5c0f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=734741947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.734741947 |
| Directory | /workspace/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_length_in_transaction.3064931781 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 204893910 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:15 PM PDT 24 |
| Finished | Aug 15 05:32:16 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-28e2eeb0-47ea-40c7-b8d8-a5d242ba057b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3064931781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.3064931781 |
| Directory | /workspace/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_length_out_transaction.1957164899 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 149155588 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:42 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-36bfca94-8bda-4401-915e-eb2a880186e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19571 64899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.1957164899 |
| Directory | /workspace/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_nak_trans.3973029052 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 196610596 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:32:40 PM PDT 24 |
| Finished | Aug 15 05:32:41 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-98c7f153-fd56-458f-907f-e48862ce72da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39730 29052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_nak_trans.3973029052 |
| Directory | /workspace/33.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_iso.189786616 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 243536587 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-3aecd6da-9542-4f58-bee2-9526f9ff81aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18978 6616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_iso.189786616 |
| Directory | /workspace/33.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_stall.2553160950 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 158046125 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-297bd27f-e4ef-4d77-8704-3c55013b02f5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25531 60950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_stall.2553160950 |
| Directory | /workspace/33.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_trans_nak.3427723972 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 167629642 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:32:45 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-cee574d6-49de-45c5-9fa3-584445f7819f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34277 23972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_trans_nak.3427723972 |
| Directory | /workspace/33.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/33.usbdev_pending_in_trans.3845192119 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 167557941 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:32:46 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e71a5401-48d1-4d38-8ece-01f16ec76367 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38451 92119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pending_in_trans.3845192119 |
| Directory | /workspace/33.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_config_pinflip.2671781449 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 211570093 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:32:20 PM PDT 24 |
| Finished | Aug 15 05:32:21 PM PDT 24 |
| Peak memory | 207160 kb |
| Host | smart-9114cffa-a3e3-462f-b50e-a05bcba02d63 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2671781449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.2671781449 |
| Directory | /workspace/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_config_usb_ref_disable.496551371 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 136043758 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-0a32ff95-87a6-4c08-a452-7e8fc46bf5c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49655 1371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.496551371 |
| Directory | /workspace/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_buffer.954824438 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 17860858823 ps |
| CPU time | 47.9 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-6bbf6a29-8dd3-42a8-84ae-921c2e249385 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95482 4438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_buffer.954824438 |
| Directory | /workspace/33.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_received.1385864151 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 147699668 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:41 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-dc9d4b59-c058-477b-9be8-f8c7d077c534 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13858 64151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_received.1385864151 |
| Directory | /workspace/33.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_sent.1912230999 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 233801546 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:32:44 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-4ce420ad-6b7e-4521-91ab-b5795bcff6ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19122 30999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_sent.1912230999 |
| Directory | /workspace/33.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/33.usbdev_random_length_in_transaction.3170940825 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 191076401 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:33 PM PDT 24 |
| Finished | Aug 15 05:32:34 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4de4d34a-9477-442b-9701-6c8063e08572 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31709 40825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_in_transaction.3170940825 |
| Directory | /workspace/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_random_length_out_transaction.154837340 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 173747913 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:32:45 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-90f39e67-2d5f-4f41-b1a1-9566b73f4f81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15483 7340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.154837340 |
| Directory | /workspace/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_rx_crc_err.31460201 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 168747129 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:32:23 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-4bac8752-c29e-4bbf-bb6b-da8c29306ab5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31460 201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_rx_crc_err.31460201 |
| Directory | /workspace/33.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_rx_full.4080812293 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 246838918 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:32:39 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5ac0e26c-b5cd-43a6-9ded-5710cc101ca5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40808 12293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_rx_full.4080812293 |
| Directory | /workspace/33.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/33.usbdev_setup_stage.4219964794 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 150612539 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:41 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3ea6b867-edc3-443f-9488-e60f42a8acf4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42199 64794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_setup_stage.4219964794 |
| Directory | /workspace/33.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/33.usbdev_setup_trans_ignored.1734932572 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 153944111 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:19 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a61fc6b1-cca9-4f07-be41-49b5ce9aca46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17349 32572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_setup_trans_ignored.1734932572 |
| Directory | /workspace/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/33.usbdev_smoke.438278994 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 222795473 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:32:41 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-b608f1d5-8aed-43ba-9c4d-d44221b0aa29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43827 8994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.438278994 |
| Directory | /workspace/33.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/33.usbdev_spurious_pids_ignored.3145225588 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 3040060492 ps |
| CPU time | 23.95 seconds |
| Started | Aug 15 05:32:39 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 217784 kb |
| Host | smart-11ab3e04-aecd-45c3-ab1f-7d6692d23bfc |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3145225588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.3145225588 |
| Directory | /workspace/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/33.usbdev_stall_priority_over_nak.1897900128 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 159028940 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-c186275d-979c-405d-95be-fae8e45d5679 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18979 00128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.1897900128 |
| Directory | /workspace/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/33.usbdev_stall_trans.329222795 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 173252444 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:32:17 PM PDT 24 |
| Finished | Aug 15 05:32:18 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-5c307fe3-15f0-43cb-aa2b-08498b03c2ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32922 2795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_trans.329222795 |
| Directory | /workspace/33.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_stream_len_max.1495945311 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 1169099683 ps |
| CPU time | 2.72 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:32:55 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-c2018d0a-b438-4a2d-9efe-06c01134d9c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14959 45311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.1495945311 |
| Directory | /workspace/33.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/33.usbdev_streaming_out.2988731755 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 2574476306 ps |
| CPU time | 19.3 seconds |
| Started | Aug 15 05:32:41 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-d276b213-702f-4691-8132-569e5716fec1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29887 31755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_streaming_out.2988731755 |
| Directory | /workspace/33.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/33.usbdev_timeout_missing_host_handshake.2741343898 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 1307945678 ps |
| CPU time | 30.94 seconds |
| Started | Aug 15 05:32:18 PM PDT 24 |
| Finished | Aug 15 05:32:49 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-0265066f-e0e3-46b7-b054-9a9bed67bb95 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2741343898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_hos t_handshake.2741343898 |
| Directory | /workspace/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/33.usbdev_tx_rx_disruption.2376006609 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 502857428 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:32:46 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-17bc5807-3f9d-491f-84ed-af080520d844 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2376006609 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_tx_rx_disruption.2376006609 |
| Directory | /workspace/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/330.usbdev_tx_rx_disruption.1550221660 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 448843461 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:35:33 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-f15dd6df-3dc6-408e-84af-b05890a2133d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1550221660 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 330.usbdev_tx_rx_disruption.1550221660 |
| Directory | /workspace/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/331.usbdev_tx_rx_disruption.1562825897 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 581126881 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:40 PM PDT 24 |
| Finished | Aug 15 05:35:41 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-dc9c9841-f55f-413d-aa31-af7c3f7381b5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1562825897 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 331.usbdev_tx_rx_disruption.1562825897 |
| Directory | /workspace/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/332.usbdev_tx_rx_disruption.1682746191 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 602669359 ps |
| CPU time | 1.78 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-a90c5dfe-cfa9-4970-8c01-14de812052dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1682746191 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 332.usbdev_tx_rx_disruption.1682746191 |
| Directory | /workspace/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/333.usbdev_tx_rx_disruption.1770575179 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 555907540 ps |
| CPU time | 1.83 seconds |
| Started | Aug 15 05:35:39 PM PDT 24 |
| Finished | Aug 15 05:35:41 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4d7ea36e-29ef-4b1f-ae09-c85c28f5e4f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1770575179 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 333.usbdev_tx_rx_disruption.1770575179 |
| Directory | /workspace/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/334.usbdev_tx_rx_disruption.3925045629 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 517983857 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:35:34 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-b0f69f56-70c6-40fc-86ee-97a9477e2505 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3925045629 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 334.usbdev_tx_rx_disruption.3925045629 |
| Directory | /workspace/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/335.usbdev_tx_rx_disruption.4240734114 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 508345014 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:35:36 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-9766b4ce-61c6-4fd4-b062-823904f4a82f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4240734114 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 335.usbdev_tx_rx_disruption.4240734114 |
| Directory | /workspace/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/336.usbdev_tx_rx_disruption.3859586070 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 655917403 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-4a42c9a9-430c-4101-87b7-7dc67c9a132c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3859586070 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 336.usbdev_tx_rx_disruption.3859586070 |
| Directory | /workspace/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/337.usbdev_tx_rx_disruption.231036353 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 495013818 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-689449c8-546f-4abc-8bc4-0f3d80e0e856 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=231036353 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 337.usbdev_tx_rx_disruption.231036353 |
| Directory | /workspace/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/338.usbdev_tx_rx_disruption.488281799 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 637745698 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-2d578fc2-e7ba-4b8e-bf2f-45d4e85f4579 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=488281799 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 338.usbdev_tx_rx_disruption.488281799 |
| Directory | /workspace/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/339.usbdev_tx_rx_disruption.2731330236 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 513098657 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6cd5531a-52e1-4b87-ba84-6d1b502afac8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2731330236 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 339.usbdev_tx_rx_disruption.2731330236 |
| Directory | /workspace/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/34.usbdev_alert_test.2393908252 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 55857427 ps |
| CPU time | 0.66 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:32:46 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-dad3201e-0bb6-4604-a98f-40a3d7e7b000 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2393908252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.2393908252 |
| Directory | /workspace/34.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_disconnect.2320236631 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 4999414112 ps |
| CPU time | 6.69 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:32:29 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-5c6b338a-2afe-4659-8a87-a46123e5569a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2320236631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_a on_wake_disconnect.2320236631 |
| Directory | /workspace/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_reset.2051101485 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 21324238043 ps |
| CPU time | 24.48 seconds |
| Started | Aug 15 05:32:31 PM PDT 24 |
| Finished | Aug 15 05:32:55 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-e8b7c316-56ca-47f8-859b-e245da1cd767 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2051101485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.2051101485 |
| Directory | /workspace/34.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_resume.2597518419 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 29410284861 ps |
| CPU time | 37.58 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:33:24 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-72afd3ac-745d-4962-be2d-5a51ab98eda5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2597518419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_a on_wake_resume.2597518419 |
| Directory | /workspace/34.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/34.usbdev_av_buffer.2688351960 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 152952576 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:32 PM PDT 24 |
| Finished | Aug 15 05:32:33 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-a17f7bac-450a-457c-9713-607267ec3f0c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26883 51960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_av_buffer.2688351960 |
| Directory | /workspace/34.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/34.usbdev_bitstuff_err.623002093 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 151096541 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:32:39 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-671b366a-1d18-4d53-9256-33e4823ab4c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62300 2093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_bitstuff_err.623002093 |
| Directory | /workspace/34.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_data_toggle_clear.3931877398 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 260695298 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:32:39 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-ea2007cb-1f54-4ff5-bde8-63bcd485f28a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39318 77398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_clear.3931877398 |
| Directory | /workspace/34.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/34.usbdev_data_toggle_restore.1190673467 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 728800703 ps |
| CPU time | 2.33 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-0cb91e97-9ccc-4738-8b9b-d74ab525ecbc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1190673467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.1190673467 |
| Directory | /workspace/34.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/34.usbdev_device_address.1842140223 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 13637948827 ps |
| CPU time | 19.99 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:41 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-0d30cd10-a465-4bbe-8bb6-c211b4872020 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18421 40223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.1842140223 |
| Directory | /workspace/34.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/34.usbdev_device_timeout.2752011186 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 1170941817 ps |
| CPU time | 23.64 seconds |
| Started | Aug 15 05:33:28 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 206448 kb |
| Host | smart-984f0b8f-3811-4f69-875d-2fe5c2df4215 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2752011186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.2752011186 |
| Directory | /workspace/34.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/34.usbdev_disable_endpoint.2408779630 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 683728401 ps |
| CPU time | 1.81 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-93d7770c-36e3-462e-b460-04c31c0219d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24087 79630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_disable_endpoint.2408779630 |
| Directory | /workspace/34.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/34.usbdev_disconnected.3808209368 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 162780924 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:33:46 PM PDT 24 |
| Peak memory | 207336 kb |
| Host | smart-eacfcc2c-b2e4-48ae-923b-8adb919a582e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38082 09368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_disconnected.3808209368 |
| Directory | /workspace/34.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/34.usbdev_enable.3065874181 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 65540904 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:33:51 PM PDT 24 |
| Peak memory | 207256 kb |
| Host | smart-732aae67-8451-4b8a-91cb-ad628058c1d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30658 74181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_enable.3065874181 |
| Directory | /workspace/34.usbdev_enable/latest |
| Test location | /workspace/coverage/default/34.usbdev_endpoint_access.1046012935 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 827491106 ps |
| CPU time | 2.16 seconds |
| Started | Aug 15 05:32:34 PM PDT 24 |
| Finished | Aug 15 05:32:37 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-87b322e3-835c-4765-b7c2-77daa8f226e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10460 12935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.1046012935 |
| Directory | /workspace/34.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/34.usbdev_endpoint_types.1433724687 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 272382583 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:32:45 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a4760244-1c0f-4259-b1a2-04663656a578 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1433724687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.1433724687 |
| Directory | /workspace/34.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/34.usbdev_fifo_rst.3699254237 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 157882340 ps |
| CPU time | 1.28 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:32:23 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-f8eb0011-ec01-4bc4-99d4-e0c88274fe3f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36992 54237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_fifo_rst.3699254237 |
| Directory | /workspace/34.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_iso.882441631 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 235830396 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:32:39 PM PDT 24 |
| Finished | Aug 15 05:32:40 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-13c9d769-58c8-439d-8747-f0879bfa8efa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=882441631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.882441631 |
| Directory | /workspace/34.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_stall.1135426903 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 157858645 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:32:57 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-ac8038d1-d2f1-46f0-a547-fddb19a845ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11354 26903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_stall.1135426903 |
| Directory | /workspace/34.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_trans.3102301532 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 233212936 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:22 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-3f33561f-269a-4450-9d63-ab3fbf2e0b87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31023 01532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_trans.3102301532 |
| Directory | /workspace/34.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_invalid_sync.3381587601 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 4018536540 ps |
| CPU time | 104.55 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:35:25 PM PDT 24 |
| Peak memory | 218324 kb |
| Host | smart-498d537f-07b8-42fc-bdf7-5df2b7cdfadb |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3381587601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.3381587601 |
| Directory | /workspace/34.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/34.usbdev_iso_retraction.4109414917 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 8602440492 ps |
| CPU time | 106.55 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-69a36133-0c10-478c-98f3-b58ef0c94344 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4109414917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.4109414917 |
| Directory | /workspace/34.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_in_err.2296210834 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 174575829 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-db1a64d1-699d-45b9-a70e-05fb7c5d39ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22962 10834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_in_err.2296210834 |
| Directory | /workspace/34.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_resume.3690704141 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 32854523813 ps |
| CPU time | 54.75 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:33:51 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-2c3684a5-4670-4c45-a958-ed01b0e487bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36907 04141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_resume.3690704141 |
| Directory | /workspace/34.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_suspend.2460498927 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 9399643933 ps |
| CPU time | 13.5 seconds |
| Started | Aug 15 05:32:30 PM PDT 24 |
| Finished | Aug 15 05:32:44 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-b30594fe-ef7f-40e0-bede-7c87b80e4374 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24604 98927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_suspend.2460498927 |
| Directory | /workspace/34.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/34.usbdev_low_speed_traffic.980615626 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 4033846803 ps |
| CPU time | 109.52 seconds |
| Started | Aug 15 05:32:23 PM PDT 24 |
| Finished | Aug 15 05:34:12 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-90ecae1e-7a0c-4ebf-a681-59e79533074c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=980615626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.980615626 |
| Directory | /workspace/34.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_inter_pkt_delay.1211835448 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 1848747172 ps |
| CPU time | 53.46 seconds |
| Started | Aug 15 05:32:35 PM PDT 24 |
| Finished | Aug 15 05:33:28 PM PDT 24 |
| Peak memory | 215812 kb |
| Host | smart-d337dbab-a18a-499d-aec3-e1f277bb7fc6 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1211835448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.1211835448 |
| Directory | /workspace/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_length_in_transaction.1412288484 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 240381975 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:32:36 PM PDT 24 |
| Finished | Aug 15 05:32:37 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c9b06d80-dc56-4211-b045-b32e4896cd5d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1412288484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.1412288484 |
| Directory | /workspace/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_length_out_transaction.989640398 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 258298156 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:32:41 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-14cab905-54ff-41e7-b84b-c38aa67086d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98964 0398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.989640398 |
| Directory | /workspace/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_inter_pkt_delay.418792331 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 1679311227 ps |
| CPU time | 16.72 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:33:02 PM PDT 24 |
| Peak memory | 216508 kb |
| Host | smart-04c46d83-1ca8-45a9-a494-a212e177b211 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=418792331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.418792331 |
| Directory | /workspace/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_length_in_transaction.877358834 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 162462501 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:32:23 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-73bfe2ff-5e72-4ac7-9173-07f7b5305046 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=877358834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.877358834 |
| Directory | /workspace/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_length_out_transaction.2743100255 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 140622034 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:32:23 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-1412f2fe-aa3f-4138-a61a-f1fac5e31cb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27431 00255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.2743100255 |
| Directory | /workspace/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_iso.2183819180 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 198196055 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:32:33 PM PDT 24 |
| Finished | Aug 15 05:32:34 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-fb5d6a6a-9cbf-4e5e-a7ce-5f14a4798b09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21838 19180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_iso.2183819180 |
| Directory | /workspace/34.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_stall.1160905069 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 168477717 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:21 PM PDT 24 |
| Finished | Aug 15 05:32:21 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-b449da49-961a-4a76-9e91-8e7d3b27532f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11609 05069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_stall.1160905069 |
| Directory | /workspace/34.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_trans_nak.3479130387 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 203230734 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:42 PM PDT 24 |
| Finished | Aug 15 05:32:43 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-ad4b287a-4532-48cc-ac49-ef7300710387 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34791 30387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_trans_nak.3479130387 |
| Directory | /workspace/34.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/34.usbdev_pending_in_trans.88900638 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 165192395 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-cc7c095e-9322-4f63-865d-e3d846e9c63a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88900 638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pending_in_trans.88900638 |
| Directory | /workspace/34.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_config_pinflip.3757041987 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 250283289 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:32:32 PM PDT 24 |
| Finished | Aug 15 05:32:33 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-d5473f7d-2fa4-4101-aafe-0b8241c33fd2 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3757041987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.3757041987 |
| Directory | /workspace/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_config_usb_ref_disable.3027357177 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 188636252 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:22 PM PDT 24 |
| Finished | Aug 15 05:32:23 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-e5ff0df3-c79a-496a-a1b9-c70c5cc0034b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30273 57177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.3027357177 |
| Directory | /workspace/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_pins_sense.381827425 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 36621057 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:32:30 PM PDT 24 |
| Finished | Aug 15 05:32:31 PM PDT 24 |
| Peak memory | 207324 kb |
| Host | smart-8f6cbbee-c8e7-4054-885f-8ff72beea6ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38182 7425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.381827425 |
| Directory | /workspace/34.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_buffer.4165575362 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 14552588064 ps |
| CPU time | 37.12 seconds |
| Started | Aug 15 05:32:36 PM PDT 24 |
| Finished | Aug 15 05:33:13 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-90962aec-e874-4cce-976b-28acbdacda4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41655 75362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_buffer.4165575362 |
| Directory | /workspace/34.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_received.2081188447 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 198931406 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:20 PM PDT 24 |
| Finished | Aug 15 05:32:21 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-afa5ee7e-0981-4842-804a-1162ba0245c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20811 88447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_received.2081188447 |
| Directory | /workspace/34.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_sent.2781616710 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 204050557 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:32:30 PM PDT 24 |
| Finished | Aug 15 05:32:31 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f33bef59-d49c-4c4a-93f3-4f2af2496d26 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27816 16710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_sent.2781616710 |
| Directory | /workspace/34.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/34.usbdev_random_length_in_transaction.157382434 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 205413196 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:32:45 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e3bdae77-4850-4a78-a3ec-6c7d99538181 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15738 2434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_in_transaction.157382434 |
| Directory | /workspace/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_random_length_out_transaction.677706254 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 167028760 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:32:46 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-410eb358-644b-429a-9ecd-de8164563e3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67770 6254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.677706254 |
| Directory | /workspace/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_rx_crc_err.874470796 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 140817179 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 207244 kb |
| Host | smart-1ceffdc3-9b3f-4542-921e-ed2582d6a2d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87447 0796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_rx_crc_err.874470796 |
| Directory | /workspace/34.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_rx_full.3371527415 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 414339768 ps |
| CPU time | 1.38 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:32:49 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-25592828-5a66-4c53-a2de-217b65a14420 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33715 27415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_rx_full.3371527415 |
| Directory | /workspace/34.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/34.usbdev_setup_stage.2886962799 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 186957030 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-5557d12c-5c46-4dc2-bf9b-4031b8dbfe6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28869 62799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_setup_stage.2886962799 |
| Directory | /workspace/34.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/34.usbdev_setup_trans_ignored.804151421 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 208002045 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:23 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b320d7c3-30b7-49d9-a7ff-78354dd38884 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80415 1421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_setup_trans_ignored.804151421 |
| Directory | /workspace/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/34.usbdev_smoke.2405988806 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 214637714 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:32:23 PM PDT 24 |
| Finished | Aug 15 05:32:24 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-bbf10e93-c7bc-43f1-9e2c-75380e6b7d72 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24059 88806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.2405988806 |
| Directory | /workspace/34.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/34.usbdev_spurious_pids_ignored.2830614150 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 2131369480 ps |
| CPU time | 59.21 seconds |
| Started | Aug 15 05:32:20 PM PDT 24 |
| Finished | Aug 15 05:33:20 PM PDT 24 |
| Peak memory | 217504 kb |
| Host | smart-c6b74bd7-8dc9-48d8-8459-e0a81a2c6779 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2830614150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.2830614150 |
| Directory | /workspace/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/34.usbdev_stall_priority_over_nak.3034182384 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 268870498 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:32:24 PM PDT 24 |
| Finished | Aug 15 05:32:25 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e1414366-b790-49a5-9ec1-6bb53ec182d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30341 82384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.3034182384 |
| Directory | /workspace/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/34.usbdev_stall_trans.3616089582 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 187137689 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-222dc020-0b6e-4be7-8159-02695537f6fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36160 89582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_trans.3616089582 |
| Directory | /workspace/34.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_stream_len_max.1960065046 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 508130636 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-81defb90-303b-4e42-bfe7-541dfd37e24a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19600 65046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.1960065046 |
| Directory | /workspace/34.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/34.usbdev_streaming_out.1700938705 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 1949514883 ps |
| CPU time | 18.33 seconds |
| Started | Aug 15 05:32:30 PM PDT 24 |
| Finished | Aug 15 05:32:49 PM PDT 24 |
| Peak memory | 223876 kb |
| Host | smart-332d7621-c063-40a0-8f8b-fba0a81c4eb4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17009 38705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_streaming_out.1700938705 |
| Directory | /workspace/34.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/34.usbdev_timeout_missing_host_handshake.2755779378 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 1567425294 ps |
| CPU time | 34.72 seconds |
| Started | Aug 15 05:33:48 PM PDT 24 |
| Finished | Aug 15 05:34:23 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-b287a6ef-dfa3-41ca-a7c6-c5382b6dcfd1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2755779378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_hos t_handshake.2755779378 |
| Directory | /workspace/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/34.usbdev_tx_rx_disruption.321120888 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 569261901 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-1125ad2a-7757-48d9-9427-38e547fe8b0e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=321120888 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_tx_rx_disruption.321120888 |
| Directory | /workspace/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/340.usbdev_tx_rx_disruption.3874498825 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 555209731 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-9cf93621-0217-458e-904c-9eecf8e2951c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3874498825 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 340.usbdev_tx_rx_disruption.3874498825 |
| Directory | /workspace/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/341.usbdev_tx_rx_disruption.1238211001 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 495498901 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:28 PM PDT 24 |
| Finished | Aug 15 05:35:29 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-434e6764-4290-4105-a117-5e16914c19f6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1238211001 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 341.usbdev_tx_rx_disruption.1238211001 |
| Directory | /workspace/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/342.usbdev_tx_rx_disruption.856430003 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 460374507 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:26 PM PDT 24 |
| Finished | Aug 15 05:35:28 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-670d6aa8-3aa2-471a-b791-59c301ac361c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=856430003 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 342.usbdev_tx_rx_disruption.856430003 |
| Directory | /workspace/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/343.usbdev_tx_rx_disruption.522897472 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 579298027 ps |
| CPU time | 1.78 seconds |
| Started | Aug 15 05:35:58 PM PDT 24 |
| Finished | Aug 15 05:36:00 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-c31766e6-6c48-4898-a324-a0be88c73d70 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=522897472 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 343.usbdev_tx_rx_disruption.522897472 |
| Directory | /workspace/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/344.usbdev_tx_rx_disruption.802805654 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 475353040 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ff05d903-c76b-47e8-a172-00e17ce242ed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=802805654 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 344.usbdev_tx_rx_disruption.802805654 |
| Directory | /workspace/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/345.usbdev_tx_rx_disruption.3464042654 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 458960813 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-a8f3b92f-caa4-4fb9-8203-1b23bc9dbd3b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3464042654 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 345.usbdev_tx_rx_disruption.3464042654 |
| Directory | /workspace/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/346.usbdev_tx_rx_disruption.1485828353 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 570153592 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-db69b0e5-5daa-446c-891b-e387923b31ac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1485828353 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 346.usbdev_tx_rx_disruption.1485828353 |
| Directory | /workspace/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/347.usbdev_tx_rx_disruption.3718337317 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 633099063 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-bcb11622-daea-461d-932c-8185661ab715 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3718337317 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 347.usbdev_tx_rx_disruption.3718337317 |
| Directory | /workspace/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/348.usbdev_tx_rx_disruption.3931667552 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 603455291 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-505ca74e-d6d4-40b5-a95b-b33080243f63 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3931667552 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 348.usbdev_tx_rx_disruption.3931667552 |
| Directory | /workspace/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/349.usbdev_tx_rx_disruption.1488697220 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 438414594 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:35:37 PM PDT 24 |
| Finished | Aug 15 05:35:39 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-daa3c210-ac94-4ce4-a22e-cf79448a26a0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1488697220 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 349.usbdev_tx_rx_disruption.1488697220 |
| Directory | /workspace/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/35.usbdev_alert_test.70967185 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 47246962 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-f62a60ce-c1c2-42e7-8d2d-b0580cadc778 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=70967185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.70967185 |
| Directory | /workspace/35.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_disconnect.2173049736 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 5925513242 ps |
| CPU time | 7.47 seconds |
| Started | Aug 15 05:32:24 PM PDT 24 |
| Finished | Aug 15 05:32:32 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-2a1d9388-2a9c-4133-8191-46669c5507ab |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2173049736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_a on_wake_disconnect.2173049736 |
| Directory | /workspace/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_reset.4204201788 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 19319776447 ps |
| CPU time | 22.69 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-2fcd08ce-5810-451c-80c3-dea2acb2c122 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4204201788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.4204201788 |
| Directory | /workspace/35.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_resume.3076025491 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 25517670837 ps |
| CPU time | 29.08 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-50fe1c4b-3258-499b-9e68-1dbd4b3c59a4 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3076025491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_a on_wake_resume.3076025491 |
| Directory | /workspace/35.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/35.usbdev_av_buffer.3622340497 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 163008576 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:40 PM PDT 24 |
| Finished | Aug 15 05:32:41 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-f3362119-6eee-453f-8819-fe50b72e1926 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36223 40497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_av_buffer.3622340497 |
| Directory | /workspace/35.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/35.usbdev_bitstuff_err.2246839340 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 157752972 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-fdba7467-1910-463e-9c5a-306e8fdec1c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22468 39340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_bitstuff_err.2246839340 |
| Directory | /workspace/35.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/35.usbdev_data_toggle_clear.2223297930 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 197621998 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:33 PM PDT 24 |
| Finished | Aug 15 05:32:34 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-62d9cfd8-a073-4540-be8d-a33fe4c9b589 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22232 97930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_clear.2223297930 |
| Directory | /workspace/35.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/35.usbdev_data_toggle_restore.3385839395 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 478771822 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:32:45 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-5b44df51-874d-488f-a2cb-d7080edeba56 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3385839395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.3385839395 |
| Directory | /workspace/35.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/35.usbdev_device_timeout.553329163 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 3186619532 ps |
| CPU time | 22.26 seconds |
| Started | Aug 15 05:32:25 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207828 kb |
| Host | smart-3a94ebb3-d4ed-4d6e-9e3b-a5fdb9859876 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=553329163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.553329163 |
| Directory | /workspace/35.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/35.usbdev_disable_endpoint.1760831236 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 942867531 ps |
| CPU time | 2.2 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-1491a3f9-fa98-4842-b58b-42d2c3f2e636 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17608 31236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_disable_endpoint.1760831236 |
| Directory | /workspace/35.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/35.usbdev_disconnected.1663636748 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 147312121 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:24 PM PDT 24 |
| Finished | Aug 15 05:32:26 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-0e5d28fd-4a4c-4b71-933a-604ca3ead042 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16636 36748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_disconnected.1663636748 |
| Directory | /workspace/35.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/35.usbdev_enable.2397339289 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 41166295 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:32:26 PM PDT 24 |
| Finished | Aug 15 05:32:27 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-5b3eaa19-7fb5-4c8c-b57f-76f73e53513a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23973 39289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_enable.2397339289 |
| Directory | /workspace/35.usbdev_enable/latest |
| Test location | /workspace/coverage/default/35.usbdev_endpoint_access.51769084 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 768943377 ps |
| CPU time | 2.1 seconds |
| Started | Aug 15 05:32:27 PM PDT 24 |
| Finished | Aug 15 05:32:29 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-3cef65d2-6a89-4c98-8808-7e4d88bb1ce1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51769 084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.51769084 |
| Directory | /workspace/35.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/35.usbdev_endpoint_types.1149937599 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 338314212 ps |
| CPU time | 1.33 seconds |
| Started | Aug 15 05:33:27 PM PDT 24 |
| Finished | Aug 15 05:33:30 PM PDT 24 |
| Peak memory | 206108 kb |
| Host | smart-2f01ce8e-59fb-4cad-8a0f-78554d13dee9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1149937599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.1149937599 |
| Directory | /workspace/35.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/35.usbdev_fifo_rst.2965023376 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 343405365 ps |
| CPU time | 2.29 seconds |
| Started | Aug 15 05:32:27 PM PDT 24 |
| Finished | Aug 15 05:32:29 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-399b64bb-9ac8-40ad-89b9-d903e37ffb86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29650 23376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_fifo_rst.2965023376 |
| Directory | /workspace/35.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_iso.1958477403 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 174557976 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:30 PM PDT 24 |
| Finished | Aug 15 05:32:31 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-90654ab7-f839-424c-9335-93c2c31218a1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1958477403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.1958477403 |
| Directory | /workspace/35.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_stall.897582791 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 168419898 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:26 PM PDT 24 |
| Finished | Aug 15 05:32:27 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-4cf15155-3f0a-4224-990a-262756827a2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89758 2791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_stall.897582791 |
| Directory | /workspace/35.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_trans.3665146682 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 207213283 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:50 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-410edb34-ff37-422f-8500-d23eccfb4910 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36651 46682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_trans.3665146682 |
| Directory | /workspace/35.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_invalid_sync.181939974 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 2426677881 ps |
| CPU time | 68.11 seconds |
| Started | Aug 15 05:32:25 PM PDT 24 |
| Finished | Aug 15 05:33:33 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-2b278d3c-2a93-4403-bca6-cd33dc23ba9e |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=181939974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.181939974 |
| Directory | /workspace/35.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/35.usbdev_iso_retraction.293341682 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 7133265523 ps |
| CPU time | 53.8 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:33:40 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-906498a7-9187-45aa-b6bb-c3763e422a45 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=293341682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.293341682 |
| Directory | /workspace/35.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_in_err.2651566616 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 231711829 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-038ec8d5-1676-4c7e-87b1-6efa811f9975 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26515 66616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_in_err.2651566616 |
| Directory | /workspace/35.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_resume.2034080102 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 8922925984 ps |
| CPU time | 11.54 seconds |
| Started | Aug 15 05:32:31 PM PDT 24 |
| Finished | Aug 15 05:32:43 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-c57110ba-a39f-4b80-93d2-94b02e25f517 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20340 80102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_resume.2034080102 |
| Directory | /workspace/35.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_suspend.2783495467 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 8639670611 ps |
| CPU time | 12.43 seconds |
| Started | Aug 15 05:32:48 PM PDT 24 |
| Finished | Aug 15 05:33:01 PM PDT 24 |
| Peak memory | 207968 kb |
| Host | smart-6deb8513-4349-44c6-ae90-d5840315bdb8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27834 95467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_suspend.2783495467 |
| Directory | /workspace/35.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/35.usbdev_low_speed_traffic.1897034108 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 3929005199 ps |
| CPU time | 115.79 seconds |
| Started | Aug 15 05:32:26 PM PDT 24 |
| Finished | Aug 15 05:34:22 PM PDT 24 |
| Peak memory | 218656 kb |
| Host | smart-5b50bb8e-60c5-407f-9442-3f3b03ed8f48 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1897034108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.1897034108 |
| Directory | /workspace/35.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_inter_pkt_delay.2376836321 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 3288441738 ps |
| CPU time | 32.89 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:33:19 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-c12df393-52a9-4c01-98b5-83ba14a589fa |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2376836321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.2376836321 |
| Directory | /workspace/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_length_in_transaction.390373333 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 238733010 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:33:48 PM PDT 24 |
| Finished | Aug 15 05:33:50 PM PDT 24 |
| Peak memory | 207272 kb |
| Host | smart-56fa420a-4fe5-4be5-a83a-9666f309f4db |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=390373333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.390373333 |
| Directory | /workspace/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_length_out_transaction.3378519226 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 187557288 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-464c94ba-9b1d-4985-9365-842723b48a31 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33785 19226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.3378519226 |
| Directory | /workspace/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_inter_pkt_delay.1612562150 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 2879291683 ps |
| CPU time | 80.86 seconds |
| Started | Aug 15 05:32:26 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 217416 kb |
| Host | smart-80bcdcc0-d018-442d-ac9d-3347679b661f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1612562150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.1612562150 |
| Directory | /workspace/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_length_in_transaction.3884677307 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 163649966 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-3488a977-55dc-46c7-b572-821282bd4f67 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3884677307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.3884677307 |
| Directory | /workspace/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_length_out_transaction.1923907700 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 148482139 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:32 PM PDT 24 |
| Finished | Aug 15 05:32:33 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-d5290807-5d52-4aa4-863b-b6a8960b8e42 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19239 07700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.1923907700 |
| Directory | /workspace/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_nak_trans.1311571098 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 210591040 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:32:25 PM PDT 24 |
| Finished | Aug 15 05:32:26 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a48d63f8-ad18-4592-8c11-9116e7c0c4c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13115 71098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_nak_trans.1311571098 |
| Directory | /workspace/35.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_iso.2352769203 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 181636587 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:32:25 PM PDT 24 |
| Finished | Aug 15 05:32:26 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-27e93fb9-eddb-4ede-910a-92ee14e1484d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23527 69203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_iso.2352769203 |
| Directory | /workspace/35.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_stall.837355563 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 162226993 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:32:32 PM PDT 24 |
| Finished | Aug 15 05:32:33 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-bfa71a70-57ed-4f38-ba91-7dc47b8a1e07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83735 5563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_stall.837355563 |
| Directory | /workspace/35.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_trans_nak.3212658686 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 165220445 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-a6279af3-9a75-42e0-bd57-6a983d485343 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32126 58686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_trans_nak.3212658686 |
| Directory | /workspace/35.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/35.usbdev_pending_in_trans.1001436252 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 227923244 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:41 PM PDT 24 |
| Finished | Aug 15 05:32:42 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-70053ec4-a7f3-4670-b1cc-66a9b0560faa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10014 36252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.1001436252 |
| Directory | /workspace/35.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_config_pinflip.3172250431 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 244532070 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:32:39 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-e195713b-6679-4d88-99e4-904b61ab3838 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3172250431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.3172250431 |
| Directory | /workspace/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_config_usb_ref_disable.3004112213 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 142088113 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:28 PM PDT 24 |
| Finished | Aug 15 05:32:29 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-881a6f03-2b08-4b2d-9457-e64ceb8552b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30041 12213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.3004112213 |
| Directory | /workspace/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_pins_sense.233714654 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 42162290 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:32:51 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-475af0e8-87b5-4fd3-9598-d3a4507729c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23371 4654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.233714654 |
| Directory | /workspace/35.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_buffer.2501103957 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 11806256599 ps |
| CPU time | 28.2 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-dea0828a-43b4-47d3-8f97-aa832f2536c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25011 03957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_buffer.2501103957 |
| Directory | /workspace/35.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_received.419822088 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 164669734 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:32:42 PM PDT 24 |
| Finished | Aug 15 05:32:43 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-7ea52097-feae-494e-bd8e-f21775a36a39 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41982 2088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_received.419822088 |
| Directory | /workspace/35.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_sent.2685520624 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 219411741 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:32:28 PM PDT 24 |
| Finished | Aug 15 05:32:29 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9e2b16ef-a879-4792-bdc0-d7f64b59dbe0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26855 20624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_sent.2685520624 |
| Directory | /workspace/35.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/35.usbdev_random_length_in_transaction.3695689305 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 260207612 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-35dbb875-966a-4a44-a761-6560b1e280d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36956 89305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_in_transaction.3695689305 |
| Directory | /workspace/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_random_length_out_transaction.590107921 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 169539879 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:50 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-b1653ca7-1d8b-4993-9491-553855f24e98 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59010 7921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.590107921 |
| Directory | /workspace/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_rx_full.1846566843 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 273741797 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-b4df1e89-e0ab-48cb-8c31-f560b451f76f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18465 66843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_rx_full.1846566843 |
| Directory | /workspace/35.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/35.usbdev_setup_stage.668975078 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 158705854 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:32:41 PM PDT 24 |
| Finished | Aug 15 05:32:41 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-e0f50598-c6e8-4b76-94ed-7b9033051d11 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66897 5078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_setup_stage.668975078 |
| Directory | /workspace/35.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/35.usbdev_setup_trans_ignored.3383070824 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 178860496 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:32:33 PM PDT 24 |
| Finished | Aug 15 05:32:34 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-3e154bd0-6476-43a5-8cbc-f4dc114ed176 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33830 70824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_setup_trans_ignored.3383070824 |
| Directory | /workspace/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/35.usbdev_smoke.3216534557 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 267412729 ps |
| CPU time | 1.16 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:32:40 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-c516e8ec-1b53-435f-8721-c40d13c68792 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32165 34557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3216534557 |
| Directory | /workspace/35.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/35.usbdev_spurious_pids_ignored.2843524816 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 2547128892 ps |
| CPU time | 24.81 seconds |
| Started | Aug 15 05:32:53 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-015fec86-d6b5-4e17-8c39-a1a38b48de37 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2843524816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.2843524816 |
| Directory | /workspace/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/35.usbdev_stall_priority_over_nak.138921403 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 227695427 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-723f984e-e47f-48bc-9b23-59f92f138bf7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13892 1403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.138921403 |
| Directory | /workspace/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/35.usbdev_stall_trans.3951266013 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 191490720 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:33:46 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-e8d9f9cc-5c78-4f9a-ad3a-2c0af045e25d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39512 66013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_trans.3951266013 |
| Directory | /workspace/35.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_stream_len_max.3208572618 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 1430349565 ps |
| CPU time | 3.4 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:32:46 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-2caf864a-6972-421c-875b-54c4f1d70013 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32085 72618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3208572618 |
| Directory | /workspace/35.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/35.usbdev_streaming_out.3617653998 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 2542854130 ps |
| CPU time | 25.15 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:33:11 PM PDT 24 |
| Peak memory | 217604 kb |
| Host | smart-ace5f640-5d9f-46aa-9e22-67b100f50a04 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36176 53998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_streaming_out.3617653998 |
| Directory | /workspace/35.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/35.usbdev_timeout_missing_host_handshake.1792122087 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 3637471165 ps |
| CPU time | 23.35 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-b1743ff0-af07-466b-9b1a-41d7107975fe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1792122087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_hos t_handshake.1792122087 |
| Directory | /workspace/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/35.usbdev_tx_rx_disruption.655973718 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 486349924 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-edad58a7-2ede-4aa3-b4af-e501f824911c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=655973718 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 35.usbdev_tx_rx_disruption.655973718 |
| Directory | /workspace/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/350.usbdev_tx_rx_disruption.2125784798 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 463847585 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-b133416d-b0f7-4cf2-97ee-31713be2169a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2125784798 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 350.usbdev_tx_rx_disruption.2125784798 |
| Directory | /workspace/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/351.usbdev_tx_rx_disruption.1159345521 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 610560894 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:36:26 PM PDT 24 |
| Finished | Aug 15 05:36:28 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-67ce3ef4-2293-47cf-a3de-e46d38e9e4c7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1159345521 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 351.usbdev_tx_rx_disruption.1159345521 |
| Directory | /workspace/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/352.usbdev_tx_rx_disruption.3197870230 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 493181713 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-2b96ff3c-d031-41aa-bb20-ff568a5ecd9b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3197870230 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 352.usbdev_tx_rx_disruption.3197870230 |
| Directory | /workspace/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/353.usbdev_tx_rx_disruption.3284246765 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 555062855 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:57 PM PDT 24 |
| Finished | Aug 15 05:35:59 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-df34d0d9-d5b6-4f79-8fe6-2d2bbc2f1d2f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3284246765 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 353.usbdev_tx_rx_disruption.3284246765 |
| Directory | /workspace/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/354.usbdev_tx_rx_disruption.3675636415 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 510847053 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-26860a75-4dca-4336-9212-cd8a97f936ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3675636415 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 354.usbdev_tx_rx_disruption.3675636415 |
| Directory | /workspace/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/355.usbdev_tx_rx_disruption.1849181764 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 692825732 ps |
| CPU time | 1.87 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-1c7a3869-c0d1-491b-958e-4b2697712a36 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1849181764 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 355.usbdev_tx_rx_disruption.1849181764 |
| Directory | /workspace/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/356.usbdev_tx_rx_disruption.355131617 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 595413776 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:49 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-2cb86dbf-f5d2-4845-80e2-9a50dd1ed070 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=355131617 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 356.usbdev_tx_rx_disruption.355131617 |
| Directory | /workspace/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/357.usbdev_tx_rx_disruption.3960891225 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 477259032 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:56 PM PDT 24 |
| Finished | Aug 15 05:35:58 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-de720300-3662-4302-8eb9-ebd296349443 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3960891225 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 357.usbdev_tx_rx_disruption.3960891225 |
| Directory | /workspace/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/358.usbdev_tx_rx_disruption.2879878466 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 588597742 ps |
| CPU time | 1.66 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-f25725fc-ebdc-49c5-bb22-fd66dfaf8d67 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2879878466 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 358.usbdev_tx_rx_disruption.2879878466 |
| Directory | /workspace/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/359.usbdev_tx_rx_disruption.655806318 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 538965020 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:54 PM PDT 24 |
| Finished | Aug 15 05:35:56 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-2af6beed-44fc-4129-bd89-255ac95eea2c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=655806318 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 359.usbdev_tx_rx_disruption.655806318 |
| Directory | /workspace/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/36.usbdev_alert_test.4213650399 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 98257022 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:32:55 PM PDT 24 |
| Finished | Aug 15 05:32:56 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-9a277960-cebc-4fc1-90f7-6d128983f920 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4213650399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.4213650399 |
| Directory | /workspace/36.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_disconnect.3869236414 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 5652893592 ps |
| CPU time | 8.56 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:58 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-94fea7ad-f2f5-4018-ac02-8017b091fe96 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3869236414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_a on_wake_disconnect.3869236414 |
| Directory | /workspace/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_reset.4247246427 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 15084385387 ps |
| CPU time | 17.72 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:33:12 PM PDT 24 |
| Peak memory | 216012 kb |
| Host | smart-8bf1960d-6088-404a-a7f5-08d771a91368 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4247246427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.4247246427 |
| Directory | /workspace/36.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_resume.4247053880 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 29575395451 ps |
| CPU time | 37.23 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:33:23 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-e7e7f870-fd7a-4af8-a8ed-a92c23d2e057 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4247053880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_a on_wake_resume.4247053880 |
| Directory | /workspace/36.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/36.usbdev_av_buffer.2117034927 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 186166904 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-d2ba4d83-a258-4a8e-b65d-10222dbb6088 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21170 34927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_av_buffer.2117034927 |
| Directory | /workspace/36.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/36.usbdev_bitstuff_err.1627746852 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 144886688 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-7a0049d9-25ed-4c30-8b10-ee79c43d18dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16277 46852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_bitstuff_err.1627746852 |
| Directory | /workspace/36.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_data_toggle_clear.1314333745 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 234295590 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-cedab825-adb5-4d0f-90fe-71a0e706820c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13143 33745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_clear.1314333745 |
| Directory | /workspace/36.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/36.usbdev_data_toggle_restore.4131008563 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 661744696 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:32:53 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-f7ea9b4e-25f9-4518-ba0d-cb89be641e44 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4131008563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.4131008563 |
| Directory | /workspace/36.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/36.usbdev_device_address.434328668 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 27161393129 ps |
| CPU time | 42.23 seconds |
| Started | Aug 15 05:32:53 PM PDT 24 |
| Finished | Aug 15 05:33:35 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-76ff965e-d6e0-4f39-8af5-1915954b98eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43432 8668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.434328668 |
| Directory | /workspace/36.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/36.usbdev_device_timeout.408515846 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 1547689978 ps |
| CPU time | 9.83 seconds |
| Started | Aug 15 05:32:53 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-39cab3be-325c-4405-a724-e9f85e91476b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=408515846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.408515846 |
| Directory | /workspace/36.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/36.usbdev_disable_endpoint.682369395 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 544989963 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:32:45 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-1dffe49b-f0db-4bcf-b53b-05f3a7de9602 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68236 9395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disable_endpoint.682369395 |
| Directory | /workspace/36.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/36.usbdev_disconnected.3154935398 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 218422109 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-5c8d16b7-08d3-478c-a87a-4bda230f35f5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31549 35398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disconnected.3154935398 |
| Directory | /workspace/36.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/36.usbdev_enable.877951578 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 34504017 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-14df4fad-ea51-4872-82cc-2ba59c8d23bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87795 1578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_enable.877951578 |
| Directory | /workspace/36.usbdev_enable/latest |
| Test location | /workspace/coverage/default/36.usbdev_endpoint_access.1110000897 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 781148431 ps |
| CPU time | 2.37 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:32:55 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-58ef1288-b5f3-48f9-a750-71c1e0f7bd41 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11100 00897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.1110000897 |
| Directory | /workspace/36.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/36.usbdev_fifo_rst.4224146046 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 216971770 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:32:58 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-0eff1972-ba4f-4b95-8ebf-b1de34542d35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42241 46046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_fifo_rst.4224146046 |
| Directory | /workspace/36.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_iso.1001971074 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 253218224 ps |
| CPU time | 1.23 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 215836 kb |
| Host | smart-23ff3f2a-a4e2-4c8c-94e8-45bb631bf723 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1001971074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.1001971074 |
| Directory | /workspace/36.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_stall.3329804775 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 171581541 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:32:57 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-8d3aba6a-6dff-48c1-989a-d32a34b30ffa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33298 04775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_stall.3329804775 |
| Directory | /workspace/36.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_trans.2834268051 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 168821930 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:32:39 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-ad2fa65d-5e27-41fb-8d83-44a9af64c637 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28342 68051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_trans.2834268051 |
| Directory | /workspace/36.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_invalid_sync.2177180520 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 4902758812 ps |
| CPU time | 48.58 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:33:33 PM PDT 24 |
| Peak memory | 218212 kb |
| Host | smart-6edcebb5-b3af-4b7a-85f2-18ea93570587 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2177180520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.2177180520 |
| Directory | /workspace/36.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/36.usbdev_iso_retraction.2224986931 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 5387723450 ps |
| CPU time | 37.34 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:33:28 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-8b5f1777-3d58-45d3-85e7-1b459fea78e6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2224986931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.2224986931 |
| Directory | /workspace/36.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_in_err.1140964243 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 209668773 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ea1cabd4-8c15-400d-adff-0a025e23c013 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11409 64243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_in_err.1140964243 |
| Directory | /workspace/36.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_resume.564547714 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 12966292328 ps |
| CPU time | 19.16 seconds |
| Started | Aug 15 05:32:57 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-6c6b8e07-c83d-4069-978f-820a32284d3f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56454 7714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_resume.564547714 |
| Directory | /workspace/36.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/36.usbdev_low_speed_traffic.697928652 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 2885487867 ps |
| CPU time | 84.93 seconds |
| Started | Aug 15 05:32:38 PM PDT 24 |
| Finished | Aug 15 05:34:03 PM PDT 24 |
| Peak memory | 218296 kb |
| Host | smart-dd0eeecf-63ba-41b7-8a7b-7c2bf823db66 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=697928652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.697928652 |
| Directory | /workspace/36.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_inter_pkt_delay.3500152868 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 2536540770 ps |
| CPU time | 25.16 seconds |
| Started | Aug 15 05:32:45 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-73104d48-2404-4e2e-9f86-71c242101bea |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3500152868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.3500152868 |
| Directory | /workspace/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_length_in_transaction.2257108723 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 247519790 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:50 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-42ba060d-de46-48f9-b13c-4128f09c5bc7 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2257108723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.2257108723 |
| Directory | /workspace/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_length_out_transaction.3828140746 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 237685734 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-db2e4fa9-676f-418c-8f87-5c358e9f053c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38281 40746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.3828140746 |
| Directory | /workspace/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_inter_pkt_delay.2650439684 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 4170136532 ps |
| CPU time | 43.76 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:33:33 PM PDT 24 |
| Peak memory | 215856 kb |
| Host | smart-66aced58-b5d2-4498-9c86-4548a3b1faca |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2650439684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.2650439684 |
| Directory | /workspace/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_length_in_transaction.1973421003 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 163890128 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:51 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2207bc16-7bf0-4436-93c0-f675d68be075 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1973421003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.1973421003 |
| Directory | /workspace/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_length_out_transaction.1454202126 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 144002781 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:32:57 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-17e9ea6a-f83f-42f3-9dd0-b0170d50a99f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14542 02126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.1454202126 |
| Directory | /workspace/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_nak_trans.2204289420 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 244349052 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:32:55 PM PDT 24 |
| Finished | Aug 15 05:32:56 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bdb07597-8b82-48d0-9ecf-eb9890bb0d45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22042 89420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_nak_trans.2204289420 |
| Directory | /workspace/36.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_iso.3340862014 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 196799159 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:32:42 PM PDT 24 |
| Finished | Aug 15 05:32:43 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-899fceb4-7933-4bb0-af53-59f1739ebdcf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33408 62014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_iso.3340862014 |
| Directory | /workspace/36.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_stall.604584749 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 167099247 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:32:55 PM PDT 24 |
| Finished | Aug 15 05:32:56 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-7b27acb7-1c78-4877-bf4f-ed5c9f0269a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60458 4749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_stall.604584749 |
| Directory | /workspace/36.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_trans_nak.1820207142 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 190305626 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:32:48 PM PDT 24 |
| Finished | Aug 15 05:32:49 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-eed381b1-3ad9-486c-a944-da6ddc75acd8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18202 07142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_trans_nak.1820207142 |
| Directory | /workspace/36.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/36.usbdev_pending_in_trans.830966343 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 144126637 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-c3dfc2ae-faa8-4f1c-9194-5212458108d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83096 6343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.830966343 |
| Directory | /workspace/36.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_config_pinflip.1021898756 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 210109672 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:32:58 PM PDT 24 |
| Finished | Aug 15 05:32:59 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-2a638139-649c-43b9-a4f5-bf9c127766a9 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1021898756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.1021898756 |
| Directory | /workspace/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_config_usb_ref_disable.3862585004 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 151826430 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:32:53 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-d8b1b89a-2f29-41d3-be31-15f3cb1bb596 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38625 85004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.3862585004 |
| Directory | /workspace/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_pins_sense.3750514042 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 57436959 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:50 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9df5683c-f8a3-4968-aa01-53cec3b6a8d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37505 14042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3750514042 |
| Directory | /workspace/36.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/36.usbdev_pkt_buffer.3210923768 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 18118496065 ps |
| CPU time | 48.5 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:33:37 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-aa669baf-059c-4a43-8544-2c92deb87061 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32109 23768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_buffer.3210923768 |
| Directory | /workspace/36.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/36.usbdev_pkt_received.745799559 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 178883577 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:32:48 PM PDT 24 |
| Finished | Aug 15 05:32:49 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-f72dd13e-63db-4fe5-98f0-c1ea1c05bb3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74579 9559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_received.745799559 |
| Directory | /workspace/36.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/36.usbdev_pkt_sent.4223716005 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 237637610 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-b88449f0-3f9e-40fe-bc49-f889561b14aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42237 16005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_sent.4223716005 |
| Directory | /workspace/36.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/36.usbdev_random_length_in_transaction.2467148545 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 241249378 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-95d006e9-6a4b-4865-a501-e50f40f12d9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24671 48545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_in_transaction.2467148545 |
| Directory | /workspace/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_random_length_out_transaction.4261092499 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 200547440 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:32:44 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-cc7c2ad3-763a-43f1-ab54-ddb53b9bd733 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42610 92499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.4261092499 |
| Directory | /workspace/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_rx_crc_err.2482635912 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 138157831 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-60e6bc25-cbfb-4868-a959-e16f4def7d68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24826 35912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_rx_crc_err.2482635912 |
| Directory | /workspace/36.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_rx_full.1976690968 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 259428288 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:50 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-e459782d-f96f-435a-b95e-7304efd72945 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19766 90968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_rx_full.1976690968 |
| Directory | /workspace/36.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/36.usbdev_setup_stage.581367967 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 185115724 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:48 PM PDT 24 |
| Finished | Aug 15 05:32:49 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-bce714d0-d2cc-4dc5-9998-b1cadb10c875 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58136 7967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_setup_stage.581367967 |
| Directory | /workspace/36.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/36.usbdev_setup_trans_ignored.2529467144 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 151646043 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:00 PM PDT 24 |
| Finished | Aug 15 05:33:01 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-33c9a9cc-d35a-49bc-b999-96ec76589834 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25294 67144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_setup_trans_ignored.2529467144 |
| Directory | /workspace/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/36.usbdev_smoke.399440227 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 227099592 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:32:57 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-270bfb0b-4fce-45de-868c-be33ca646620 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39944 0227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.399440227 |
| Directory | /workspace/36.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/36.usbdev_spurious_pids_ignored.1436741016 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 1901925851 ps |
| CPU time | 20.11 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:33:07 PM PDT 24 |
| Peak memory | 217164 kb |
| Host | smart-d46796fb-b7bb-4da5-874b-f268148ee6c9 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1436741016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.1436741016 |
| Directory | /workspace/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/36.usbdev_stall_priority_over_nak.1556173277 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 142242099 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:50 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-eac64e68-43f4-4018-85f1-94168ceb1f20 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15561 73277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.1556173277 |
| Directory | /workspace/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/36.usbdev_stall_trans.2704390326 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 214160654 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:57 PM PDT 24 |
| Finished | Aug 15 05:32:58 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-e481a672-cb9b-48d4-bbed-e0cd09e24f9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27043 90326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_trans.2704390326 |
| Directory | /workspace/36.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_stream_len_max.256830364 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 1440445639 ps |
| CPU time | 3.22 seconds |
| Started | Aug 15 05:32:48 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-ce5a03a2-2c25-4030-bc77-71d5eed5937b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25683 0364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.256830364 |
| Directory | /workspace/36.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/36.usbdev_streaming_out.3866997477 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 3150557164 ps |
| CPU time | 30.39 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:33:24 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-5ba86bc4-0a39-447f-8c86-3790b276e6e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38669 97477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_streaming_out.3866997477 |
| Directory | /workspace/36.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/36.usbdev_timeout_missing_host_handshake.217950777 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 3444998089 ps |
| CPU time | 29.46 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:33:23 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-6613ed60-e307-4cc9-89a1-50db529b3320 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=217950777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host _handshake.217950777 |
| Directory | /workspace/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/36.usbdev_tx_rx_disruption.4076780860 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 592739640 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b7f0b480-bbcc-4047-801b-b48a9f73e84e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4076780860 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_tx_rx_disruption.4076780860 |
| Directory | /workspace/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/361.usbdev_tx_rx_disruption.4122575074 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 522335052 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:42 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6653f843-f2ea-4579-b4a5-1b74273804b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4122575074 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 361.usbdev_tx_rx_disruption.4122575074 |
| Directory | /workspace/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/362.usbdev_tx_rx_disruption.368662969 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 583075788 ps |
| CPU time | 1.74 seconds |
| Started | Aug 15 05:36:11 PM PDT 24 |
| Finished | Aug 15 05:36:13 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-7456dba1-68dc-4277-af51-baf4d81cfb5a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=368662969 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 362.usbdev_tx_rx_disruption.368662969 |
| Directory | /workspace/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/363.usbdev_tx_rx_disruption.1815279162 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 592602214 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-7af491d5-2e5e-4dcf-90d2-27ff4ced4385 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1815279162 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 363.usbdev_tx_rx_disruption.1815279162 |
| Directory | /workspace/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/364.usbdev_tx_rx_disruption.2824079225 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 585650825 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-9f36e7be-e722-432f-9ebb-d788f6da4317 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2824079225 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 364.usbdev_tx_rx_disruption.2824079225 |
| Directory | /workspace/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/365.usbdev_tx_rx_disruption.3917933321 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 554215312 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d0bd2b20-4e9e-4936-8350-66aba670257b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3917933321 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 365.usbdev_tx_rx_disruption.3917933321 |
| Directory | /workspace/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/366.usbdev_tx_rx_disruption.2378297763 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 440795861 ps |
| CPU time | 1.37 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-5bbae5d6-98c2-4bf2-892c-13279748ac18 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2378297763 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 366.usbdev_tx_rx_disruption.2378297763 |
| Directory | /workspace/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/367.usbdev_tx_rx_disruption.1211822433 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 621501681 ps |
| CPU time | 1.86 seconds |
| Started | Aug 15 05:35:54 PM PDT 24 |
| Finished | Aug 15 05:35:56 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-cf8f354f-f27e-4463-955e-abc65bcde917 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1211822433 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 367.usbdev_tx_rx_disruption.1211822433 |
| Directory | /workspace/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/368.usbdev_tx_rx_disruption.1684912764 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 536756492 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:36:30 PM PDT 24 |
| Finished | Aug 15 05:36:32 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-616291e6-defd-4bca-881b-d08ff45bb10e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1684912764 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 368.usbdev_tx_rx_disruption.1684912764 |
| Directory | /workspace/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/369.usbdev_tx_rx_disruption.3395228014 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 607416234 ps |
| CPU time | 1.88 seconds |
| Started | Aug 15 05:36:02 PM PDT 24 |
| Finished | Aug 15 05:36:04 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-61bf493f-5c2c-4b07-8330-08c04fbdfac7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3395228014 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 369.usbdev_tx_rx_disruption.3395228014 |
| Directory | /workspace/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/37.usbdev_alert_test.3905180978 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 50985926 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:33:24 PM PDT 24 |
| Finished | Aug 15 05:33:25 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-c252d7ef-616e-4adc-abef-3fa419b9e836 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3905180978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.3905180978 |
| Directory | /workspace/37.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_disconnect.3266963881 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 11300284228 ps |
| CPU time | 14.99 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-b0e926da-353a-4dd7-a1c8-ed05155e5adf |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3266963881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_a on_wake_disconnect.3266963881 |
| Directory | /workspace/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_reset.811209347 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 19676595733 ps |
| CPU time | 24.8 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-270dc8a2-734f-4aef-86ec-53f67b950b3b |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=811209347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.811209347 |
| Directory | /workspace/37.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_resume.1440913066 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 29196318092 ps |
| CPU time | 39.82 seconds |
| Started | Aug 15 05:32:51 PM PDT 24 |
| Finished | Aug 15 05:33:31 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-c6df7335-d896-4329-80e9-35ffa3d81c4d |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1440913066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_a on_wake_resume.1440913066 |
| Directory | /workspace/37.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/37.usbdev_av_buffer.3348242191 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 156144764 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:32:55 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-2c0fee27-4aa9-4a55-a262-128bd3f7e3ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33482 42191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_av_buffer.3348242191 |
| Directory | /workspace/37.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/37.usbdev_data_toggle_clear.581841713 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 184336616 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:46 PM PDT 24 |
| Finished | Aug 15 05:32:47 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-92bce2a2-1637-411a-9b0b-23f115155dc9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58184 1713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_clear.581841713 |
| Directory | /workspace/37.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/37.usbdev_data_toggle_restore.2840592914 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 1004385271 ps |
| CPU time | 2.8 seconds |
| Started | Aug 15 05:32:44 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-ddbd56f4-9141-46b2-a4d9-ea6c9650cefc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2840592914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.2840592914 |
| Directory | /workspace/37.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/37.usbdev_device_address.1138507578 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 21614116087 ps |
| CPU time | 33.74 seconds |
| Started | Aug 15 05:32:43 PM PDT 24 |
| Finished | Aug 15 05:33:17 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-8684c099-6df5-493f-806e-9d1452fc28b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11385 07578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.1138507578 |
| Directory | /workspace/37.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/37.usbdev_device_timeout.250614040 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 9044233218 ps |
| CPU time | 60.64 seconds |
| Started | Aug 15 05:33:22 PM PDT 24 |
| Finished | Aug 15 05:34:23 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-02037cd7-46c8-452c-810d-92c01ee2620c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=250614040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.250614040 |
| Directory | /workspace/37.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/37.usbdev_disable_endpoint.259346314 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 831988564 ps |
| CPU time | 1.95 seconds |
| Started | Aug 15 05:33:24 PM PDT 24 |
| Finished | Aug 15 05:33:26 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-5e6c39a1-8942-4324-84b2-64ffe49eb454 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25934 6314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disable_endpoint.259346314 |
| Directory | /workspace/37.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/37.usbdev_disconnected.1523634244 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 132243077 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:19 PM PDT 24 |
| Finished | Aug 15 05:33:20 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-01068c15-a2bf-464a-9af0-fdc001e2f01e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15236 34244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disconnected.1523634244 |
| Directory | /workspace/37.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/37.usbdev_enable.1762010829 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 69646564 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 05:32:57 PM PDT 24 |
| Finished | Aug 15 05:32:58 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-0699aaf1-d1d7-461c-86eb-814b91c530e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17620 10829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_enable.1762010829 |
| Directory | /workspace/37.usbdev_enable/latest |
| Test location | /workspace/coverage/default/37.usbdev_endpoint_access.2813350107 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 976002443 ps |
| CPU time | 2.65 seconds |
| Started | Aug 15 05:32:55 PM PDT 24 |
| Finished | Aug 15 05:32:58 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-91aeaedb-d1a1-4594-aa94-22d4034ef4df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28133 50107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.2813350107 |
| Directory | /workspace/37.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/37.usbdev_endpoint_types.3036864026 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 279042318 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:32:58 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c34f0ab4-0575-4b3d-b5b0-82a68421a0b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3036864026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.3036864026 |
| Directory | /workspace/37.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/37.usbdev_fifo_rst.2455795560 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 307667007 ps |
| CPU time | 2.66 seconds |
| Started | Aug 15 05:32:58 PM PDT 24 |
| Finished | Aug 15 05:33:01 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-d7e1a97a-256d-4a19-91c4-81179e191924 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24557 95560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_fifo_rst.2455795560 |
| Directory | /workspace/37.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_iso.2191232086 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 238005468 ps |
| CPU time | 1.25 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-85ad127d-20ec-4701-83f8-2f0e4adf98b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2191232086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.2191232086 |
| Directory | /workspace/37.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_stall.4053406188 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 137867509 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:32:49 PM PDT 24 |
| Finished | Aug 15 05:32:50 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-737413f0-cfb8-4318-9fce-34cec67add00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40534 06188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_stall.4053406188 |
| Directory | /workspace/37.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_trans.3546748156 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 180686086 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:32:58 PM PDT 24 |
| Finished | Aug 15 05:32:59 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-f3aad16d-3346-4876-a201-95df09b24f46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35467 48156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_trans.3546748156 |
| Directory | /workspace/37.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_invalid_sync.2480603138 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 4719720200 ps |
| CPU time | 143.11 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 218312 kb |
| Host | smart-fdd6077a-7c0c-4370-ac0a-0aec72358e68 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2480603138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.2480603138 |
| Directory | /workspace/37.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/37.usbdev_iso_retraction.2756547215 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 9289007174 ps |
| CPU time | 60.17 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-05144032-f729-43c2-937a-81380ed546df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2756547215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.2756547215 |
| Directory | /workspace/37.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_in_err.618700676 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 152277387 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:32:55 PM PDT 24 |
| Finished | Aug 15 05:32:56 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-e56e1dac-0d15-48c2-abb7-e4b887f399f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61870 0676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_in_err.618700676 |
| Directory | /workspace/37.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_resume.1718936448 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 12602578877 ps |
| CPU time | 17.71 seconds |
| Started | Aug 15 05:33:00 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-958e4785-0b99-4c0e-b763-d5c4f30bc121 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17189 36448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_resume.1718936448 |
| Directory | /workspace/37.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_suspend.3354766903 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 11271829596 ps |
| CPU time | 16.25 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:33:11 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-a74b58f5-1c11-469e-acd7-38204a124d53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33547 66903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_suspend.3354766903 |
| Directory | /workspace/37.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/37.usbdev_low_speed_traffic.2238021065 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 3258118367 ps |
| CPU time | 96.69 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:34:41 PM PDT 24 |
| Peak memory | 218720 kb |
| Host | smart-5f05b197-1423-4212-ae33-b15867aa4f1d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2238021065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.2238021065 |
| Directory | /workspace/37.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_inter_pkt_delay.1701064363 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 1609479695 ps |
| CPU time | 15.19 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:22 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-05365cb6-ee89-4919-a122-aad6eaefd699 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1701064363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.1701064363 |
| Directory | /workspace/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_length_in_transaction.2382122972 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 254172056 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-40552bde-5942-4a50-adf6-c7e6bf6da8a2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2382122972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.2382122972 |
| Directory | /workspace/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_length_out_transaction.586392855 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 257396636 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:32:53 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-9fb1e0ac-215e-4a10-851d-f8f4db8b728a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58639 2855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.586392855 |
| Directory | /workspace/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_inter_pkt_delay.2275343085 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 2870330747 ps |
| CPU time | 22.52 seconds |
| Started | Aug 15 05:32:55 PM PDT 24 |
| Finished | Aug 15 05:33:17 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-46705f0a-4167-4e40-ab5d-ff40ec45efd8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2275343085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.2275343085 |
| Directory | /workspace/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_length_in_transaction.3568427641 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 153536503 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:32:47 PM PDT 24 |
| Finished | Aug 15 05:32:48 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-e12de6f6-a063-4b20-acb5-a346579eb62f |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3568427641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.3568427641 |
| Directory | /workspace/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_length_out_transaction.229155343 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 145618091 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c9d1ee48-b40d-4d04-955d-9eb119aab1dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22915 5343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.229155343 |
| Directory | /workspace/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_nak_trans.337974553 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 205449920 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:32:51 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-15451057-0675-4816-a74b-3cb0b575497f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33797 4553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_nak_trans.337974553 |
| Directory | /workspace/37.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_iso.1143360013 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 172521422 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:32:59 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-de519e06-52c5-4433-8271-fda4fa40d5c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11433 60013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_iso.1143360013 |
| Directory | /workspace/37.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_stall.689680299 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 211212866 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:01 PM PDT 24 |
| Finished | Aug 15 05:33:02 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-61777884-dec6-4db7-bd4b-5c5b55dd618f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68968 0299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_stall.689680299 |
| Directory | /workspace/37.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_trans_nak.4088883754 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 178996803 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-d50c1755-73a2-41c3-b95c-f11d025162f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40888 83754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_trans_nak.4088883754 |
| Directory | /workspace/37.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/37.usbdev_pending_in_trans.2094813309 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 165097040 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:32:53 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-2c711076-368f-4cc9-9551-6aef6ac34c38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20948 13309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pending_in_trans.2094813309 |
| Directory | /workspace/37.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_config_pinflip.687395851 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 248357304 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8eeb37cb-56eb-4e9e-b5ab-3a2e3ed1dc0f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=687395851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.687395851 |
| Directory | /workspace/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_config_usb_ref_disable.2300151080 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 138818183 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:32:53 PM PDT 24 |
| Finished | Aug 15 05:32:54 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ed1c59a1-43a7-425f-b424-fc118aedc1fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23001 51080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.2300151080 |
| Directory | /workspace/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_pins_sense.1129510000 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 55887056 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:04 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-aeeb31c9-b35c-436e-862d-7bea572c625c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11295 10000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.1129510000 |
| Directory | /workspace/37.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_buffer.1268340088 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 7276583654 ps |
| CPU time | 17.48 seconds |
| Started | Aug 15 05:33:12 PM PDT 24 |
| Finished | Aug 15 05:33:30 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-9fa9b36e-f501-4a24-8969-3600663f8f8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12683 40088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_buffer.1268340088 |
| Directory | /workspace/37.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_received.1056531768 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 153597051 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:01 PM PDT 24 |
| Finished | Aug 15 05:33:02 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-db160997-1ec3-4ccc-884d-33d0d6a3c13d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10565 31768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_received.1056531768 |
| Directory | /workspace/37.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_sent.3458515136 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 276988529 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ca8a120e-cfd2-479e-b614-26ad571f0d07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34585 15136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_sent.3458515136 |
| Directory | /workspace/37.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/37.usbdev_random_length_in_transaction.2875803305 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 257613684 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:32:57 PM PDT 24 |
| Finished | Aug 15 05:32:58 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-5ae4389b-5403-454b-bae0-dc9b0cae5480 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28758 03305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_in_transaction.2875803305 |
| Directory | /workspace/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_random_length_out_transaction.1861925612 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 162494434 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:32:58 PM PDT 24 |
| Finished | Aug 15 05:32:59 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-d7a87ba6-acd2-4748-9e4f-852b3c344470 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18619 25612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.1861925612 |
| Directory | /workspace/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_rx_crc_err.3238568132 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 185432493 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:04 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-15367f0b-3e06-4d6c-b5eb-59415a5736ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32385 68132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_rx_crc_err.3238568132 |
| Directory | /workspace/37.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/37.usbdev_rx_full.3030635753 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 262842379 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:32:51 PM PDT 24 |
| Finished | Aug 15 05:32:52 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-933560d4-2262-4bfa-bfd2-a2388910cc71 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30306 35753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_rx_full.3030635753 |
| Directory | /workspace/37.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/37.usbdev_setup_stage.1458854051 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 148625105 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a1c298f5-0ac1-4ecb-9fa4-cbfcd8a41ab9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14588 54051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_setup_stage.1458854051 |
| Directory | /workspace/37.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/37.usbdev_setup_trans_ignored.320630054 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 159050941 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:32:55 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-d92b5054-f7a3-46ec-90e8-f6ba313867a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32063 0054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_setup_trans_ignored.320630054 |
| Directory | /workspace/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/37.usbdev_smoke.649923213 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 263352492 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:33:01 PM PDT 24 |
| Finished | Aug 15 05:33:02 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-1d8e0ed9-bbfd-44df-8674-6b669e820d4a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64992 3213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.649923213 |
| Directory | /workspace/37.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/37.usbdev_spurious_pids_ignored.2128344942 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 2699595553 ps |
| CPU time | 28 seconds |
| Started | Aug 15 05:32:50 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 217888 kb |
| Host | smart-bd839ba8-651b-4739-82ab-98efd0de39e4 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2128344942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.2128344942 |
| Directory | /workspace/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/37.usbdev_stall_priority_over_nak.1921035609 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 188119537 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:07 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-27ccdd26-a16c-49bf-b269-f36c8ee7a746 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19210 35609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.1921035609 |
| Directory | /workspace/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/37.usbdev_stall_trans.2663928376 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 195868448 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:23 PM PDT 24 |
| Finished | Aug 15 05:33:24 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-01be9bb3-91d3-4c41-9a53-cde22a16fecd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26639 28376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_trans.2663928376 |
| Directory | /workspace/37.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_stream_len_max.2538355261 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 203080617 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:15 PM PDT 24 |
| Peak memory | 207300 kb |
| Host | smart-31fc1a9d-7cab-4c04-9f46-aab9699e327c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25383 55261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.2538355261 |
| Directory | /workspace/37.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/37.usbdev_streaming_out.3864988199 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 2514281646 ps |
| CPU time | 75.81 seconds |
| Started | Aug 15 05:33:22 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 217504 kb |
| Host | smart-7ee54af8-7118-42d0-ab6e-19ae9556f321 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38649 88199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_streaming_out.3864988199 |
| Directory | /workspace/37.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/37.usbdev_timeout_missing_host_handshake.3207526835 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 915122714 ps |
| CPU time | 18.98 seconds |
| Started | Aug 15 05:33:00 PM PDT 24 |
| Finished | Aug 15 05:33:19 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-8af65fd6-048c-4afa-880c-6a5a04fffca9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3207526835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_hos t_handshake.3207526835 |
| Directory | /workspace/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/37.usbdev_tx_rx_disruption.1777956662 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 486688508 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-4e186566-89b5-4d25-9a10-0ba9efd63725 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1777956662 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_tx_rx_disruption.1777956662 |
| Directory | /workspace/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/370.usbdev_tx_rx_disruption.159765092 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 502609769 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e8b2448c-cf57-43c9-9785-aaef2ffeea17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=159765092 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 370.usbdev_tx_rx_disruption.159765092 |
| Directory | /workspace/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/371.usbdev_tx_rx_disruption.3827152909 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 565509210 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-428dbc50-ce32-46e8-8e8d-cf5e9577fd9e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3827152909 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 371.usbdev_tx_rx_disruption.3827152909 |
| Directory | /workspace/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/372.usbdev_tx_rx_disruption.4232636247 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 433337288 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-ba6daef9-7b26-4135-ad7f-82d82736b358 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4232636247 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 372.usbdev_tx_rx_disruption.4232636247 |
| Directory | /workspace/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/373.usbdev_tx_rx_disruption.1097479367 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 443249991 ps |
| CPU time | 1.39 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-852de780-d35b-4ae6-bff5-661b8017c8b8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1097479367 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 373.usbdev_tx_rx_disruption.1097479367 |
| Directory | /workspace/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/374.usbdev_tx_rx_disruption.3079199850 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 549138735 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-7ab110cb-b32d-48dc-8ee8-ea4b86aa5511 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3079199850 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 374.usbdev_tx_rx_disruption.3079199850 |
| Directory | /workspace/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/375.usbdev_tx_rx_disruption.372722803 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 521901624 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-540d85e5-f6d9-42dd-b01a-7d46b9c6b683 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=372722803 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 375.usbdev_tx_rx_disruption.372722803 |
| Directory | /workspace/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/376.usbdev_tx_rx_disruption.2328489588 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 449569125 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:36:13 PM PDT 24 |
| Finished | Aug 15 05:36:15 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-24da1b5b-287c-4a37-bdf3-d6b3be1af1f2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2328489588 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 376.usbdev_tx_rx_disruption.2328489588 |
| Directory | /workspace/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/377.usbdev_tx_rx_disruption.1421228421 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 471376017 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:50 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-0ff20c87-efe6-484b-8196-640ea9a58dd9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1421228421 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 377.usbdev_tx_rx_disruption.1421228421 |
| Directory | /workspace/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/378.usbdev_tx_rx_disruption.777201860 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 499301300 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-17c8f2e7-bab1-4406-b9f2-d4f64bb31915 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=777201860 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 378.usbdev_tx_rx_disruption.777201860 |
| Directory | /workspace/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/379.usbdev_tx_rx_disruption.1758743493 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 655310813 ps |
| CPU time | 1.87 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-bb71ba6b-1584-4b23-bedd-64465092a451 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1758743493 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 379.usbdev_tx_rx_disruption.1758743493 |
| Directory | /workspace/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/38.usbdev_alert_test.2424392144 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 48551937 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-17491ff4-78ea-4878-a2b5-c3200046c64d |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2424392144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.2424392144 |
| Directory | /workspace/38.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_disconnect.4112993066 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 6361785273 ps |
| CPU time | 8.42 seconds |
| Started | Aug 15 05:33:00 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 215840 kb |
| Host | smart-add94f76-5b6a-4573-938e-8858817053a1 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4112993066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_a on_wake_disconnect.4112993066 |
| Directory | /workspace/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_reset.3797746788 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 13756023632 ps |
| CPU time | 15.43 seconds |
| Started | Aug 15 05:33:24 PM PDT 24 |
| Finished | Aug 15 05:33:40 PM PDT 24 |
| Peak memory | 215788 kb |
| Host | smart-9b4eab2e-a3e2-4d3a-9556-b6d7b59badef |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3797746788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.3797746788 |
| Directory | /workspace/38.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_resume.2916649844 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 30084121469 ps |
| CPU time | 36.13 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:33:32 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-d38d8090-ad37-4ac0-95f7-e238b75aa87c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2916649844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_a on_wake_resume.2916649844 |
| Directory | /workspace/38.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/38.usbdev_av_buffer.3401640987 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 172736905 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:21 PM PDT 24 |
| Finished | Aug 15 05:33:22 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-3a028065-2597-4b6c-b146-d307cfb8fc9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34016 40987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_av_buffer.3401640987 |
| Directory | /workspace/38.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/38.usbdev_bitstuff_err.1847779643 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 152203656 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-550167ca-059e-4062-9d9b-2d708dc2b04e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18477 79643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_bitstuff_err.1847779643 |
| Directory | /workspace/38.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_data_toggle_clear.1386572350 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 378080364 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:32:59 PM PDT 24 |
| Finished | Aug 15 05:33:01 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-9aecb120-2fa1-4524-9245-96167f2e3b35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13865 72350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_clear.1386572350 |
| Directory | /workspace/38.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/38.usbdev_data_toggle_restore.3193541568 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 947226334 ps |
| CPU time | 2.49 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-2a27409d-b8a8-4a15-b0db-32d871d325e3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3193541568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.3193541568 |
| Directory | /workspace/38.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/38.usbdev_device_address.3922536711 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 46975375019 ps |
| CPU time | 70.46 seconds |
| Started | Aug 15 05:33:01 PM PDT 24 |
| Finished | Aug 15 05:34:12 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-21fa3ee2-ca12-4761-a4e8-287abdae7dd7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39225 36711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.3922536711 |
| Directory | /workspace/38.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/38.usbdev_device_timeout.1824460573 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 579521366 ps |
| CPU time | 12.25 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-c5e2afbf-8d28-46e3-8dcc-21b2d722a57c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1824460573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.1824460573 |
| Directory | /workspace/38.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/38.usbdev_disable_endpoint.976530655 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 659217803 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-a5254d78-824b-45fd-9752-9d453436ac8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97653 0655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_disable_endpoint.976530655 |
| Directory | /workspace/38.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/38.usbdev_disconnected.2083942520 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 135757521 ps |
| CPU time | 0.78 seconds |
| Started | Aug 15 05:33:11 PM PDT 24 |
| Finished | Aug 15 05:33:12 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-bafff1a9-c506-4b28-af18-e9403f8dbb07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20839 42520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_disconnected.2083942520 |
| Directory | /workspace/38.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/38.usbdev_enable.961459020 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 33876345 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:32:59 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-f9779d4e-6fd3-47e5-a16f-388b32ca70ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96145 9020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_enable.961459020 |
| Directory | /workspace/38.usbdev_enable/latest |
| Test location | /workspace/coverage/default/38.usbdev_endpoint_access.812006161 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 879104422 ps |
| CPU time | 2.28 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-5c71e7cc-f76c-475e-8d81-25480e7ab445 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81200 6161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.812006161 |
| Directory | /workspace/38.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/38.usbdev_endpoint_types.3193708435 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 322076790 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:32:59 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-dc55e3fb-cee6-41f7-9629-1a447a01174b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3193708435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.3193708435 |
| Directory | /workspace/38.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/38.usbdev_fifo_rst.2427010965 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 188277604 ps |
| CPU time | 2.04 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-b24a48c0-2939-4765-bf63-efff23fa2a44 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24270 10965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_fifo_rst.2427010965 |
| Directory | /workspace/38.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_iso.2136737570 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 218598218 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 215824 kb |
| Host | smart-dcfd4bfb-c690-472e-9175-9315001277a2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2136737570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.2136737570 |
| Directory | /workspace/38.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_stall.1602332277 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 138374113 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207280 kb |
| Host | smart-c8e20cde-c7f5-41e7-8df7-ad00225b7244 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16023 32277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_stall.1602332277 |
| Directory | /workspace/38.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_trans.2947634219 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 202453497 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:15 PM PDT 24 |
| Peak memory | 207268 kb |
| Host | smart-21acb174-2701-440d-acb9-3bffebcdc0ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29476 34219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_trans.2947634219 |
| Directory | /workspace/38.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_invalid_sync.4272664391 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 3776802470 ps |
| CPU time | 30.28 seconds |
| Started | Aug 15 05:33:20 PM PDT 24 |
| Finished | Aug 15 05:33:50 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-b123ed64-8db1-4241-94af-b11e6e9d6b67 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4272664391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.4272664391 |
| Directory | /workspace/38.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/38.usbdev_iso_retraction.1311533722 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 5160086615 ps |
| CPU time | 57.36 seconds |
| Started | Aug 15 05:33:23 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-e44659f8-4ec8-4010-b581-889c2a283d9d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1311533722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.1311533722 |
| Directory | /workspace/38.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_in_err.1736323204 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 203589184 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:32:57 PM PDT 24 |
| Finished | Aug 15 05:32:58 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-dfd5787a-d344-45cf-a56c-048fd8b14bea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17363 23204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_in_err.1736323204 |
| Directory | /workspace/38.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_resume.47776747 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 27481566768 ps |
| CPU time | 32.52 seconds |
| Started | Aug 15 05:33:18 PM PDT 24 |
| Finished | Aug 15 05:33:51 PM PDT 24 |
| Peak memory | 215800 kb |
| Host | smart-adea04ae-6231-4580-8c7c-f9bce59ad0a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47776 747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_resume.47776747 |
| Directory | /workspace/38.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_suspend.2632269012 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 5263264644 ps |
| CPU time | 8.05 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:22 PM PDT 24 |
| Peak memory | 216636 kb |
| Host | smart-5ca5e23e-f0cd-45e8-9a53-89ee51930a31 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26322 69012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_suspend.2632269012 |
| Directory | /workspace/38.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/38.usbdev_low_speed_traffic.2152788549 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 3134998027 ps |
| CPU time | 29.74 seconds |
| Started | Aug 15 05:32:56 PM PDT 24 |
| Finished | Aug 15 05:33:26 PM PDT 24 |
| Peak memory | 224204 kb |
| Host | smart-0c93070f-006b-4594-aee8-cd371f1a818f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2152788549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.2152788549 |
| Directory | /workspace/38.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_inter_pkt_delay.40358385 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 1697604270 ps |
| CPU time | 11.94 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:17 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-ec1365d7-3191-466a-8184-a0a737338e9f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=40358385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.40358385 |
| Directory | /workspace/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_length_in_transaction.3547225942 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 236917462 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-94ee74fa-a9d1-4dfa-9213-3a669d16113b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3547225942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.3547225942 |
| Directory | /workspace/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_length_out_transaction.1352572833 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 197385005 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6be7a122-a2cc-45fd-914d-e15678f5abc2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13525 72833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.1352572833 |
| Directory | /workspace/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_inter_pkt_delay.650486526 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 2888831419 ps |
| CPU time | 26.99 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:32 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-47549e2b-48b7-46fe-89ed-0c93849dc2f2 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=650486526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.650486526 |
| Directory | /workspace/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_length_in_transaction.1343748971 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 192738693 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-be518a5d-1644-4e7c-8e02-8085b1731d5d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1343748971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.1343748971 |
| Directory | /workspace/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_length_out_transaction.811079964 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 154056569 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-abf835f4-3a6c-4732-adbc-fcb1efe64971 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81107 9964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.811079964 |
| Directory | /workspace/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_nak_trans.3458577770 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 229011954 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:32:59 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ba3ad9d0-1b2b-4f6e-a4ac-a18cc85fb24b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34585 77770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_nak_trans.3458577770 |
| Directory | /workspace/38.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_iso.999746580 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 165524944 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-d1fbffff-6997-4be8-ae38-f59cd071a4ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99974 6580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_iso.999746580 |
| Directory | /workspace/38.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_stall.2824046880 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 164136534 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:00 PM PDT 24 |
| Finished | Aug 15 05:33:01 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-0c5d69bb-ae29-4f8d-b7a2-3703b161a974 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28240 46880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_stall.2824046880 |
| Directory | /workspace/38.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_trans_nak.2122951540 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 144491297 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:04 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-6d9dc079-1beb-48fb-9b6a-a70fd6098ce2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21229 51540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_trans_nak.2122951540 |
| Directory | /workspace/38.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/38.usbdev_pending_in_trans.1376786858 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 161172534 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-f6ce5878-af9a-4959-94a7-7acad4e2e0dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13767 86858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pending_in_trans.1376786858 |
| Directory | /workspace/38.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_config_pinflip.4091480644 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 227468465 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-d1bf1838-97d6-4644-8fea-cfd8560d222e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4091480644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.4091480644 |
| Directory | /workspace/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_config_usb_ref_disable.345253931 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 158092949 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:04 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-f291b9d1-9ac2-43a9-ab97-61eecfeaa942 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34525 3931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.345253931 |
| Directory | /workspace/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_pins_sense.3072481283 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 36218704 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:02 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-e14ee72b-bfd3-4ab6-b19e-68d67448c11d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30724 81283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.3072481283 |
| Directory | /workspace/38.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_buffer.3665378893 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 15898925815 ps |
| CPU time | 45.67 seconds |
| Started | Aug 15 05:32:54 PM PDT 24 |
| Finished | Aug 15 05:33:40 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-46fcca71-ffaf-4cd0-aa8b-735b656321ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36653 78893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_buffer.3665378893 |
| Directory | /workspace/38.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_received.168953957 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 176414112 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:33:09 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6ca1dc32-40aa-42a5-b44d-5a49fe602b93 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16895 3957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_received.168953957 |
| Directory | /workspace/38.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_sent.485935774 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 164356858 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-9b189ab1-5fc4-477c-b061-b239ee2782a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48593 5774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_sent.485935774 |
| Directory | /workspace/38.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/38.usbdev_random_length_in_transaction.4111652751 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 290959765 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-6505d203-60d1-4c9d-8c3a-f4d0b8decb40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41116 52751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_in_transaction.4111652751 |
| Directory | /workspace/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_random_length_out_transaction.3491864530 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 170279140 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:16 PM PDT 24 |
| Finished | Aug 15 05:33:17 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bf6fb9fe-2f4b-47fb-9708-ce54257629cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34918 64530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.3491864530 |
| Directory | /workspace/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_rx_crc_err.805393563 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 138170122 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:04 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-3e791ce9-be90-43ac-8d03-71ee727b133a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80539 3563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_rx_crc_err.805393563 |
| Directory | /workspace/38.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_rx_full.4205604414 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 267281439 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:32:59 PM PDT 24 |
| Finished | Aug 15 05:33:00 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d3019f5f-76fb-47f2-bf3d-ce26fb715807 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42056 04414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_rx_full.4205604414 |
| Directory | /workspace/38.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/38.usbdev_setup_stage.1876150505 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 163329709 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:32:57 PM PDT 24 |
| Finished | Aug 15 05:32:58 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-55b9c068-bb56-47a1-8504-735ec805de27 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18761 50505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_setup_stage.1876150505 |
| Directory | /workspace/38.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/38.usbdev_setup_trans_ignored.355964150 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 165224873 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:14 PM PDT 24 |
| Finished | Aug 15 05:33:15 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-5125e319-34f8-4b75-8a4c-b55a9cc45849 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35596 4150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_setup_trans_ignored.355964150 |
| Directory | /workspace/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/38.usbdev_smoke.1029188929 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 244431495 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:33:20 PM PDT 24 |
| Finished | Aug 15 05:33:21 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-09038fbb-6809-4320-9434-c17f30875344 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10291 88929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.1029188929 |
| Directory | /workspace/38.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/38.usbdev_spurious_pids_ignored.2793902430 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 2797829641 ps |
| CPU time | 21.17 seconds |
| Started | Aug 15 05:33:28 PM PDT 24 |
| Finished | Aug 15 05:33:50 PM PDT 24 |
| Peak memory | 215852 kb |
| Host | smart-6bdefb2b-29fe-46ca-b2c2-857b6598eed6 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2793902430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.2793902430 |
| Directory | /workspace/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/38.usbdev_stall_priority_over_nak.1813230762 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 165573846 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:26 PM PDT 24 |
| Finished | Aug 15 05:33:27 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-04d9bf1e-e02e-413b-81f2-943d8f8dc5e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18132 30762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.1813230762 |
| Directory | /workspace/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/38.usbdev_stall_trans.681170023 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 146080489 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:21 PM PDT 24 |
| Finished | Aug 15 05:33:22 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a459ed94-3d14-483f-ab6c-230af2c6777f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68117 0023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_trans.681170023 |
| Directory | /workspace/38.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_stream_len_max.3821668727 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 376636146 ps |
| CPU time | 1.28 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:07 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-5478a9b4-3871-4366-a97d-e3653b3924a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38216 68727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.3821668727 |
| Directory | /workspace/38.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/38.usbdev_streaming_out.3244816200 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 2940328327 ps |
| CPU time | 77.37 seconds |
| Started | Aug 15 05:34:17 PM PDT 24 |
| Finished | Aug 15 05:35:34 PM PDT 24 |
| Peak memory | 215772 kb |
| Host | smart-ea919212-a5aa-4c6d-99e1-054c3788f037 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32448 16200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_streaming_out.3244816200 |
| Directory | /workspace/38.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/38.usbdev_timeout_missing_host_handshake.2021572511 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 2235743948 ps |
| CPU time | 14.5 seconds |
| Started | Aug 15 05:32:52 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-3cb162c2-443d-4856-91cb-26bc379b1710 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2021572511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_hos t_handshake.2021572511 |
| Directory | /workspace/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/38.usbdev_tx_rx_disruption.3385319070 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 460729433 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:17 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-87a59cec-d44b-464d-abf0-8a9601a531dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3385319070 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_tx_rx_disruption.3385319070 |
| Directory | /workspace/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/380.usbdev_tx_rx_disruption.667489238 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 552415500 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:36:04 PM PDT 24 |
| Finished | Aug 15 05:36:06 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-58134341-bb51-47c7-98b6-76f402f2ae06 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=667489238 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 380.usbdev_tx_rx_disruption.667489238 |
| Directory | /workspace/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/381.usbdev_tx_rx_disruption.842219551 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 516355700 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:35:49 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-747f5ce1-7d8a-4451-ac64-a1eb97b0410d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=842219551 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 381.usbdev_tx_rx_disruption.842219551 |
| Directory | /workspace/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/382.usbdev_tx_rx_disruption.2384035348 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 529388510 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-c2fb8357-55ef-41a5-86e4-0ed0484395fb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2384035348 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 382.usbdev_tx_rx_disruption.2384035348 |
| Directory | /workspace/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/383.usbdev_tx_rx_disruption.238091191 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 637846316 ps |
| CPU time | 1.84 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-860fe98d-cf0c-47eb-8d3b-442a37595b39 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=238091191 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 383.usbdev_tx_rx_disruption.238091191 |
| Directory | /workspace/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/384.usbdev_tx_rx_disruption.3419918045 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 541496764 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-5ca0165c-c478-4741-8b9c-d718a7b48862 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3419918045 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 384.usbdev_tx_rx_disruption.3419918045 |
| Directory | /workspace/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/385.usbdev_tx_rx_disruption.2804966945 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 697828074 ps |
| CPU time | 2.08 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-3075baa9-2eb3-4496-93de-f9edd117275d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2804966945 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 385.usbdev_tx_rx_disruption.2804966945 |
| Directory | /workspace/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/386.usbdev_tx_rx_disruption.2996978272 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 493504942 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:35:58 PM PDT 24 |
| Finished | Aug 15 05:36:00 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b167eab7-1da2-4deb-8751-b994423b95dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2996978272 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 386.usbdev_tx_rx_disruption.2996978272 |
| Directory | /workspace/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/387.usbdev_tx_rx_disruption.3601405755 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 521728080 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:36:05 PM PDT 24 |
| Finished | Aug 15 05:36:07 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-18b95f3b-9dcf-4a57-a788-10c65ab396e9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3601405755 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 387.usbdev_tx_rx_disruption.3601405755 |
| Directory | /workspace/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/388.usbdev_tx_rx_disruption.23802129 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 559295645 ps |
| CPU time | 1.74 seconds |
| Started | Aug 15 05:35:49 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-6ab0fe8f-28c3-4931-9249-5bdee8cb129f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23802129 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 388.usbdev_tx_rx_disruption.23802129 |
| Directory | /workspace/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/389.usbdev_tx_rx_disruption.1630593813 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 646649981 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:36:00 PM PDT 24 |
| Finished | Aug 15 05:36:02 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-e8891894-47ed-4a49-a213-e5d7ff3777b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1630593813 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 389.usbdev_tx_rx_disruption.1630593813 |
| Directory | /workspace/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/39.usbdev_alert_test.1557329838 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 37171287 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-079a768c-410f-4b18-9afb-fb5d40df25ce |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1557329838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.1557329838 |
| Directory | /workspace/39.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_disconnect.1960874771 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 5423843269 ps |
| CPU time | 7.34 seconds |
| Started | Aug 15 05:32:57 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-e5006669-366c-47f0-9829-a571ae1ce34e |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1960874771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_a on_wake_disconnect.1960874771 |
| Directory | /workspace/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_reset.1554239459 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 13680582000 ps |
| CPU time | 15.61 seconds |
| Started | Aug 15 05:34:14 PM PDT 24 |
| Finished | Aug 15 05:34:30 PM PDT 24 |
| Peak memory | 215776 kb |
| Host | smart-68ee4c34-9850-4074-914a-d8f7a1da5328 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1554239459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.1554239459 |
| Directory | /workspace/39.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_resume.1677245094 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 24473149751 ps |
| CPU time | 29.24 seconds |
| Started | Aug 15 05:34:26 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 215772 kb |
| Host | smart-99772c72-6995-45eb-8bd8-85f8ac797c23 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1677245094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_a on_wake_resume.1677245094 |
| Directory | /workspace/39.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/39.usbdev_av_buffer.1705872125 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 150232272 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:04 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-e1766989-4554-4532-830f-0bee8909c519 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17058 72125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_av_buffer.1705872125 |
| Directory | /workspace/39.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/39.usbdev_bitstuff_err.3521835141 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 146985593 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-d55fbeef-16d6-4909-9bc5-3df6ab833c8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35218 35141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_bitstuff_err.3521835141 |
| Directory | /workspace/39.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_data_toggle_clear.2103725010 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 582486802 ps |
| CPU time | 1.83 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:15 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-959df8cc-e863-4897-8a0a-756e604e3784 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21037 25010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_clear.2103725010 |
| Directory | /workspace/39.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/39.usbdev_data_toggle_restore.545899922 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 1086791246 ps |
| CPU time | 2.88 seconds |
| Started | Aug 15 05:33:23 PM PDT 24 |
| Finished | Aug 15 05:33:26 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-417e2838-f291-4b1a-b383-daa352e2666c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=545899922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.545899922 |
| Directory | /workspace/39.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/39.usbdev_device_address.1384594677 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 25392381343 ps |
| CPU time | 39.08 seconds |
| Started | Aug 15 05:33:12 PM PDT 24 |
| Finished | Aug 15 05:33:51 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-782febb8-e9a6-4324-80aa-87f18aad5df6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13845 94677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.1384594677 |
| Directory | /workspace/39.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/39.usbdev_device_timeout.472684796 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 574237221 ps |
| CPU time | 11.59 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:17 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-e950fa0c-b442-48d7-9cfe-870f57178ec4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=472684796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.472684796 |
| Directory | /workspace/39.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/39.usbdev_disable_endpoint.3075988400 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 642595743 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:33:41 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-cfd2cb41-c217-40ee-9a79-216db763dfb8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30759 88400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disable_endpoint.3075988400 |
| Directory | /workspace/39.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/39.usbdev_disconnected.1956846176 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 139885724 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-354a4430-b79a-4a55-a980-2766f1708e81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19568 46176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disconnected.1956846176 |
| Directory | /workspace/39.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/39.usbdev_enable.3599800417 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 42159644 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:33:22 PM PDT 24 |
| Finished | Aug 15 05:33:23 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-0b84106b-76c4-4bb5-9fde-51755103215b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35998 00417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_enable.3599800417 |
| Directory | /workspace/39.usbdev_enable/latest |
| Test location | /workspace/coverage/default/39.usbdev_endpoint_access.2284543435 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 922671544 ps |
| CPU time | 2.42 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-22b95109-2bc5-4157-8275-05c77649c1a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22845 43435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.2284543435 |
| Directory | /workspace/39.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/39.usbdev_endpoint_types.290844081 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 451184715 ps |
| CPU time | 1.39 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-733141b9-b75f-4b96-a0a1-ef3fe42137eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=290844081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.290844081 |
| Directory | /workspace/39.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/39.usbdev_fifo_rst.2530263013 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 168105709 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-dc795143-749b-44eb-9fc2-9ceff7f09ee3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25302 63013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_fifo_rst.2530263013 |
| Directory | /workspace/39.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_iso.3552845390 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 186545779 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-317fc590-f0af-4c32-84f8-8668bb7216fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3552845390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.3552845390 |
| Directory | /workspace/39.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_stall.4164171228 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 141336697 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-0b2ea8f2-4902-414e-a163-9614103d7f16 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41641 71228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_stall.4164171228 |
| Directory | /workspace/39.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_trans.1760120350 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 228441596 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-775bc323-54ea-4224-8c6b-303b3dec087a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17601 20350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_trans.1760120350 |
| Directory | /workspace/39.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_invalid_sync.2594812761 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 4491719857 ps |
| CPU time | 43.96 seconds |
| Started | Aug 15 05:32:59 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 217188 kb |
| Host | smart-d4500d88-694c-44a7-b582-4182ea2b6ca1 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2594812761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.2594812761 |
| Directory | /workspace/39.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/39.usbdev_iso_retraction.2479036309 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 12001864034 ps |
| CPU time | 78.31 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:34:26 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-98737d69-c4a4-4ec1-8763-b47667928fd2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2479036309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.2479036309 |
| Directory | /workspace/39.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_in_err.4254813198 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 228768216 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:33:16 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-a4edec5d-4eeb-462b-a303-4497c8f880b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42548 13198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_in_err.4254813198 |
| Directory | /workspace/39.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_resume.444809611 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 16285166493 ps |
| CPU time | 21.98 seconds |
| Started | Aug 15 05:33:01 PM PDT 24 |
| Finished | Aug 15 05:33:23 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-c37ec1ef-5c6b-49ad-ab56-13b6857c3a33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44480 9611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_resume.444809611 |
| Directory | /workspace/39.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_suspend.1685337696 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 9804367286 ps |
| CPU time | 13.35 seconds |
| Started | Aug 15 05:33:18 PM PDT 24 |
| Finished | Aug 15 05:33:31 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-acaa46b1-7d5e-47a4-90ec-1498794e38ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16853 37696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_suspend.1685337696 |
| Directory | /workspace/39.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/39.usbdev_low_speed_traffic.3728087709 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 4013457628 ps |
| CPU time | 30.89 seconds |
| Started | Aug 15 05:33:12 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 218568 kb |
| Host | smart-0aeac0ad-9b98-4d28-af3e-2d83c03fdc23 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3728087709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3728087709 |
| Directory | /workspace/39.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_inter_pkt_delay.1421593183 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 2461682652 ps |
| CPU time | 24 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:30 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-71221302-2507-441c-af58-6bd4df4e49d4 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1421593183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1421593183 |
| Directory | /workspace/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_length_in_transaction.847455052 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 236745004 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:33:26 PM PDT 24 |
| Finished | Aug 15 05:33:27 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-64ea34b9-6c9c-4b41-bd2d-84ba2aec184b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=847455052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.847455052 |
| Directory | /workspace/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_length_out_transaction.3928958915 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 185290344 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-ca6cb630-4733-496d-bd58-77adade1f432 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39289 58915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.3928958915 |
| Directory | /workspace/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_inter_pkt_delay.2517546386 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 2013884721 ps |
| CPU time | 20.27 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:26 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-10164ffd-b629-46b6-bf9c-8ba8606ae035 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2517546386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.2517546386 |
| Directory | /workspace/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_length_in_transaction.911223646 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 153965501 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-92984cd3-8c37-456a-8c44-3fcc67bf1f23 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=911223646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.911223646 |
| Directory | /workspace/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_length_out_transaction.708103636 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 197221395 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-77508685-dfa0-4d69-8254-537933eecbca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70810 3636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.708103636 |
| Directory | /workspace/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_nak_trans.1680719314 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 237736001 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:04 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-730f04fc-05e1-4174-978c-c9610b3c45fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16807 19314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_nak_trans.1680719314 |
| Directory | /workspace/39.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_iso.3669943499 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 197255770 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:12 PM PDT 24 |
| Finished | Aug 15 05:33:13 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-9336b4ec-5cf0-4d22-871d-8d668f2ad4d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36699 43499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_iso.3669943499 |
| Directory | /workspace/39.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_stall.1534277010 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 186798612 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:01 PM PDT 24 |
| Finished | Aug 15 05:33:02 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-0b565021-e459-48e8-8a05-dde89a7edcb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15342 77010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_stall.1534277010 |
| Directory | /workspace/39.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_trans_nak.1989165866 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 199271767 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-76b50227-349c-4be9-b2e9-9e4f6aafd674 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19891 65866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_trans_nak.1989165866 |
| Directory | /workspace/39.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/39.usbdev_pending_in_trans.3084193216 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 152847498 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:01 PM PDT 24 |
| Finished | Aug 15 05:33:02 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-525e7bea-8fba-467b-b513-3db0c293b7a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30841 93216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pending_in_trans.3084193216 |
| Directory | /workspace/39.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_config_pinflip.1607634627 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 338210419 ps |
| CPU time | 1.28 seconds |
| Started | Aug 15 05:33:18 PM PDT 24 |
| Finished | Aug 15 05:33:20 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-fff4f67d-5bfe-4db8-8fe7-254702a70e6e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1607634627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.1607634627 |
| Directory | /workspace/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_config_usb_ref_disable.1986660468 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 174087953 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:04 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-22a19876-cdad-40f2-a096-e5e50ddd4be1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19866 60468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.1986660468 |
| Directory | /workspace/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_pins_sense.1439471157 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 41774880 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-8d1ca233-56f4-43fe-b97e-2259430f0718 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14394 71157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.1439471157 |
| Directory | /workspace/39.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_buffer.2240596352 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 7749806189 ps |
| CPU time | 19.49 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:26 PM PDT 24 |
| Peak memory | 215736 kb |
| Host | smart-d8b738d8-9b39-4bda-9efa-cda74b9b9dd5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22405 96352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_buffer.2240596352 |
| Directory | /workspace/39.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_received.3029743437 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 185352044 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:31 PM PDT 24 |
| Finished | Aug 15 05:33:32 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-885e9e0e-2730-454f-bb6c-a5ce126ed477 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30297 43437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_received.3029743437 |
| Directory | /workspace/39.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_sent.3977538697 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 218399919 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:09 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-9fa0b2cb-321a-4527-810c-63eaff12b4ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39775 38697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_sent.3977538697 |
| Directory | /workspace/39.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/39.usbdev_random_length_in_transaction.563098842 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 218293048 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:33:16 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d0c864ed-bec7-4315-b6d9-aa44368a6ad5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56309 8842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_in_transaction.563098842 |
| Directory | /workspace/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_random_length_out_transaction.3502191354 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 187064493 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:19 PM PDT 24 |
| Finished | Aug 15 05:33:20 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-4be850a3-2d00-4d6a-b68b-9ef13e4590b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35021 91354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.3502191354 |
| Directory | /workspace/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_rx_crc_err.59423336 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 167772809 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-99568bdd-7b2e-43a2-a866-41e7ce3b9dea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59423 336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_rx_crc_err.59423336 |
| Directory | /workspace/39.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_rx_full.589858283 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 253691810 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-49473d27-c8c0-48cd-9048-87f9ffc443ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58985 8283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_rx_full.589858283 |
| Directory | /workspace/39.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/39.usbdev_setup_stage.2885582320 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 152995100 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-8d041d4a-00de-4c89-a7aa-6c281b28cbfc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28855 82320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_setup_stage.2885582320 |
| Directory | /workspace/39.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/39.usbdev_setup_trans_ignored.2977667317 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 179091740 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:26 PM PDT 24 |
| Finished | Aug 15 05:33:27 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-456a0bf1-adc0-4f96-9eca-d5e3da504f26 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29776 67317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_setup_trans_ignored.2977667317 |
| Directory | /workspace/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/39.usbdev_smoke.93894736 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 227130772 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ba041a89-76aa-498f-b23d-a7726d6c67dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93894 736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /works pace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.93894736 |
| Directory | /workspace/39.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/39.usbdev_spurious_pids_ignored.429910784 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 2597656384 ps |
| CPU time | 23.83 seconds |
| Started | Aug 15 05:33:19 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 224056 kb |
| Host | smart-2f250df3-2137-499f-9277-bc3fb40e81a3 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=429910784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.429910784 |
| Directory | /workspace/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/39.usbdev_stall_priority_over_nak.3105015305 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 147629200 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:28 PM PDT 24 |
| Finished | Aug 15 05:33:29 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-e32a0f9a-dfa3-4b6a-a126-c2dee9c57a6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31050 15305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.3105015305 |
| Directory | /workspace/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/39.usbdev_stall_trans.3982952721 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 187579867 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6b183ea8-33ca-4334-a253-993497cab75c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39829 52721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_trans.3982952721 |
| Directory | /workspace/39.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_stream_len_max.2899630012 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 300480985 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:33:03 PM PDT 24 |
| Finished | Aug 15 05:33:05 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-5c80d500-bec4-45d5-9049-2b16f3112fac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28996 30012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.2899630012 |
| Directory | /workspace/39.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/39.usbdev_streaming_out.247187477 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 2429731427 ps |
| CPU time | 70.88 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:34:17 PM PDT 24 |
| Peak memory | 217632 kb |
| Host | smart-d4d2b10f-a5b2-4cf9-9d07-4299f66a2894 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24718 7477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_streaming_out.247187477 |
| Directory | /workspace/39.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/39.usbdev_timeout_missing_host_handshake.535163047 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 166663141 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:29 PM PDT 24 |
| Finished | Aug 15 05:33:30 PM PDT 24 |
| Peak memory | 207328 kb |
| Host | smart-3b8ff520-2df3-40aa-922f-aecad198dc51 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=535163047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host _handshake.535163047 |
| Directory | /workspace/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/39.usbdev_tx_rx_disruption.380899492 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 466748985 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-8c1b75e2-6d0b-40bd-8798-a4816e80156e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=380899492 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 39.usbdev_tx_rx_disruption.380899492 |
| Directory | /workspace/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/390.usbdev_tx_rx_disruption.49905722 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 472618596 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:36:20 PM PDT 24 |
| Finished | Aug 15 05:36:22 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-33f928be-d7c3-4655-ab62-fbe58d46e896 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49905722 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 390.usbdev_tx_rx_disruption.49905722 |
| Directory | /workspace/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/391.usbdev_tx_rx_disruption.166897567 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 479958483 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:35 PM PDT 24 |
| Finished | Aug 15 05:35:37 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-db9a438c-ef7a-4105-84f6-31290d29762e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=166897567 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 391.usbdev_tx_rx_disruption.166897567 |
| Directory | /workspace/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/392.usbdev_tx_rx_disruption.1353689988 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 616106840 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:55 PM PDT 24 |
| Finished | Aug 15 05:35:57 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-ed7956ee-4ce0-40bf-9c95-33c21f1b881f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1353689988 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 392.usbdev_tx_rx_disruption.1353689988 |
| Directory | /workspace/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/393.usbdev_tx_rx_disruption.1341891403 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 636213210 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:50 PM PDT 24 |
| Finished | Aug 15 05:35:52 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-eec73141-29bc-4bfd-8e90-c07d1e74a76e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1341891403 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 393.usbdev_tx_rx_disruption.1341891403 |
| Directory | /workspace/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/394.usbdev_tx_rx_disruption.1796097840 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 655547049 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-cb995846-e2e9-4743-87a2-186763bd1963 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1796097840 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 394.usbdev_tx_rx_disruption.1796097840 |
| Directory | /workspace/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/395.usbdev_tx_rx_disruption.2131396374 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 498953385 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:36:03 PM PDT 24 |
| Finished | Aug 15 05:36:04 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-456daa77-81ed-4f37-9959-cdac3c562b2f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2131396374 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 395.usbdev_tx_rx_disruption.2131396374 |
| Directory | /workspace/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/396.usbdev_tx_rx_disruption.554789415 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 667442711 ps |
| CPU time | 1.87 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-e396c2f3-43b2-4af3-81d7-a4645cbc7421 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=554789415 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 396.usbdev_tx_rx_disruption.554789415 |
| Directory | /workspace/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/397.usbdev_tx_rx_disruption.1661392395 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 521902423 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:36:03 PM PDT 24 |
| Finished | Aug 15 05:36:04 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-3c80e677-9302-48f4-b35a-f7cadf923c26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1661392395 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 397.usbdev_tx_rx_disruption.1661392395 |
| Directory | /workspace/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/398.usbdev_tx_rx_disruption.71377042 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 526291078 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:56 PM PDT 24 |
| Finished | Aug 15 05:35:58 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d7c3e498-2ddc-4b1a-840e-98670cb8c351 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71377042 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 398.usbdev_tx_rx_disruption.71377042 |
| Directory | /workspace/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/399.usbdev_tx_rx_disruption.2218466782 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 557221703 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:48 PM PDT 24 |
| Finished | Aug 15 05:35:50 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-65bcde13-d42d-4341-95d1-a6493075044a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2218466782 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 399.usbdev_tx_rx_disruption.2218466782 |
| Directory | /workspace/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/4.usbdev_alert_test.3108682610 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 41557034 ps |
| CPU time | 0.65 seconds |
| Started | Aug 15 05:28:08 PM PDT 24 |
| Finished | Aug 15 05:28:09 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-4782b9d5-9ea9-4de7-91ef-417eaa14b25b |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3108682610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.3108682610 |
| Directory | /workspace/4.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_disconnect.2520180972 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 6440463523 ps |
| CPU time | 8.12 seconds |
| Started | Aug 15 05:28:00 PM PDT 24 |
| Finished | Aug 15 05:28:09 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-22ae0298-a5d0-4bde-8463-7d4a068bc818 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2520180972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_ao n_wake_disconnect.2520180972 |
| Directory | /workspace/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_reset.4198301077 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 13633129571 ps |
| CPU time | 18.13 seconds |
| Started | Aug 15 05:28:12 PM PDT 24 |
| Finished | Aug 15 05:28:31 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-98ea38fb-aca0-4026-8886-b85d9e67cf97 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4198301077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.4198301077 |
| Directory | /workspace/4.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_resume.3204385144 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 30396551168 ps |
| CPU time | 43.85 seconds |
| Started | Aug 15 05:28:18 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 207836 kb |
| Host | smart-4ac16422-0c58-44e1-995d-0976426a711b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3204385144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_ao n_wake_resume.3204385144 |
| Directory | /workspace/4.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_buffer.3679953979 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 268597422 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:28:18 PM PDT 24 |
| Finished | Aug 15 05:28:19 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-80c7dcec-0842-4165-9061-1b07412d1faf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36799 53979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_buffer.3679953979 |
| Directory | /workspace/4.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_empty.162180195 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 148428240 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:28:11 PM PDT 24 |
| Finished | Aug 15 05:28:12 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-979527bc-5569-4846-b381-7a0f7a10acd0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16218 0195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_empty.162180195 |
| Directory | /workspace/4.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_overflow.2819357622 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 143195792 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:27:56 PM PDT 24 |
| Finished | Aug 15 05:27:57 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-05d43c3a-4537-47ed-9d7e-5a7242a4abd2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28193 57622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_overflow.2819357622 |
| Directory | /workspace/4.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/4.usbdev_bitstuff_err.4059871972 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 190097738 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:08 PM PDT 24 |
| Finished | Aug 15 05:28:09 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-9f030d68-fca1-4230-8a66-d9260c02a41d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40598 71972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_bitstuff_err.4059871972 |
| Directory | /workspace/4.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_data_toggle_clear.2237871866 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 454484536 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:28:14 PM PDT 24 |
| Finished | Aug 15 05:28:16 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-a59b8dde-1929-44fe-8ae2-e5e63335c34e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22378 71866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_clear.2237871866 |
| Directory | /workspace/4.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/4.usbdev_data_toggle_restore.2257916532 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 1020984016 ps |
| CPU time | 2.75 seconds |
| Started | Aug 15 05:27:59 PM PDT 24 |
| Finished | Aug 15 05:28:02 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-6a41bbce-574c-48e9-84fc-ceddfb929700 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2257916532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.2257916532 |
| Directory | /workspace/4.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/4.usbdev_device_address.3769421321 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 21166088653 ps |
| CPU time | 36.26 seconds |
| Started | Aug 15 05:28:11 PM PDT 24 |
| Finished | Aug 15 05:28:48 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-f7c9d539-a734-4057-8df1-71e8a7d0eb22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37694 21321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.3769421321 |
| Directory | /workspace/4.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/4.usbdev_device_timeout.3378115927 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 5273008030 ps |
| CPU time | 46.89 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:29:03 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-19d21474-6b93-49b0-a8c8-6ae2e523d45b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3378115927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.3378115927 |
| Directory | /workspace/4.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/4.usbdev_disable_endpoint.1858978149 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 827236721 ps |
| CPU time | 2.13 seconds |
| Started | Aug 15 05:28:19 PM PDT 24 |
| Finished | Aug 15 05:28:22 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-17ada76c-a828-4c1a-b77a-a00ee3f93c62 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18589 78149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disable_endpoint.1858978149 |
| Directory | /workspace/4.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/4.usbdev_disconnected.870304991 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 139930453 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:28:17 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-73a5bcb6-7146-4f76-a11a-5ac15f9e77d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87030 4991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disconnected.870304991 |
| Directory | /workspace/4.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/4.usbdev_enable.3742287982 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 37574553 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:27:56 PM PDT 24 |
| Finished | Aug 15 05:27:56 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-b33752a0-88be-4223-a377-55d46fc521b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37422 87982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_enable.3742287982 |
| Directory | /workspace/4.usbdev_enable/latest |
| Test location | /workspace/coverage/default/4.usbdev_endpoint_access.2023258980 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 757977214 ps |
| CPU time | 2.24 seconds |
| Started | Aug 15 05:28:19 PM PDT 24 |
| Finished | Aug 15 05:28:24 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-b828d140-9633-42f7-9adb-c757a540758b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20232 58980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.2023258980 |
| Directory | /workspace/4.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/4.usbdev_endpoint_types.4289317548 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 257632811 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:28:14 PM PDT 24 |
| Finished | Aug 15 05:28:16 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-8623d0ff-921e-4a24-b457-b436e7b96191 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4289317548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.4289317548 |
| Directory | /workspace/4.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/4.usbdev_fifo_rst.3380130924 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 325014684 ps |
| CPU time | 2.21 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-35564c6c-ecd6-4e30-8cda-d5775872dab8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33801 30924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_fifo_rst.3380130924 |
| Directory | /workspace/4.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_hiclk.1843540086 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 112188570416 ps |
| CPU time | 187.87 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:31:10 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-c8d89c15-b257-4e76-8e7f-05d5ecc07e6e |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1843540086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.1843540086 |
| Directory | /workspace/4.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_hiclk_max.3259902819 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 115140761564 ps |
| CPU time | 169.03 seconds |
| Started | Aug 15 05:28:18 PM PDT 24 |
| Finished | Aug 15 05:31:07 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-a1891e29-16b2-4589-a519-5802fb3eaeb6 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3259902819 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk_max.3259902819 |
| Directory | /workspace/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_loclk.2407401489 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 115122770762 ps |
| CPU time | 182.29 seconds |
| Started | Aug 15 05:28:09 PM PDT 24 |
| Finished | Aug 15 05:31:12 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-25f046a8-defc-4ecf-88e8-3a71e60b20b1 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2407401489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.2407401489 |
| Directory | /workspace/4.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_loclk_max.3526096244 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 102911931007 ps |
| CPU time | 184.22 seconds |
| Started | Aug 15 05:28:13 PM PDT 24 |
| Finished | Aug 15 05:31:17 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-09fd99cd-cc69-497b-97ec-9db324db9e31 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3526096244 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk_max.3526096244 |
| Directory | /workspace/4.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_phase.3399008742 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 112162197879 ps |
| CPU time | 186.35 seconds |
| Started | Aug 15 05:27:57 PM PDT 24 |
| Finished | Aug 15 05:31:03 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-1ea8e72d-7879-4618-9e7d-151af4ad7815 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33990 08742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_phase.3399008742 |
| Directory | /workspace/4.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_iso.1405756254 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 187422984 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:28:25 PM PDT 24 |
| Finished | Aug 15 05:28:26 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-fd7cb6ca-fdce-4970-93a4-e5314e6388e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1405756254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.1405756254 |
| Directory | /workspace/4.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_stall.2705426247 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 177909820 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:34 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-b3be4494-39e0-4932-a5f1-567b54d808aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27054 26247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_stall.2705426247 |
| Directory | /workspace/4.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_trans.2914076226 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 198698056 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:28:13 PM PDT 24 |
| Finished | Aug 15 05:28:14 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a1dbaad8-a3b4-4425-9238-39a04470e26b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29140 76226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_trans.2914076226 |
| Directory | /workspace/4.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_invalid_sync.722162525 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 4331207461 ps |
| CPU time | 43.09 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:29:18 PM PDT 24 |
| Peak memory | 217472 kb |
| Host | smart-00079449-149b-44d3-bcd9-95be5402e0ec |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=722162525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.722162525 |
| Directory | /workspace/4.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/4.usbdev_iso_retraction.3916408846 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 6647608811 ps |
| CPU time | 77.43 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:29:19 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-1a1ef2ef-563f-41c9-b010-068d14efbc10 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3916408846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.3916408846 |
| Directory | /workspace/4.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_in_err.2699751410 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 222526822 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:28:18 PM PDT 24 |
| Finished | Aug 15 05:28:19 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-323a18a0-8b74-44a7-af40-7f962f39d648 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26997 51410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_in_err.2699751410 |
| Directory | /workspace/4.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_resume.1241423178 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 8004783979 ps |
| CPU time | 10.52 seconds |
| Started | Aug 15 05:28:09 PM PDT 24 |
| Finished | Aug 15 05:28:20 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-ac3e02a1-b3e8-4c79-88b3-26f0f764feab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12414 23178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_resume.1241423178 |
| Directory | /workspace/4.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_suspend.242408929 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 4270132411 ps |
| CPU time | 6.29 seconds |
| Started | Aug 15 05:28:10 PM PDT 24 |
| Finished | Aug 15 05:28:16 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-ae3e13a9-9aab-4b58-ae92-5f31420b3f16 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24240 8929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_suspend.242408929 |
| Directory | /workspace/4.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/4.usbdev_low_speed_traffic.1576288950 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 4152008167 ps |
| CPU time | 119.79 seconds |
| Started | Aug 15 05:28:19 PM PDT 24 |
| Finished | Aug 15 05:30:19 PM PDT 24 |
| Peak memory | 219048 kb |
| Host | smart-85037fd4-27b3-403c-b184-0b95f699e0a4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1576288950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.1576288950 |
| Directory | /workspace/4.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_inter_pkt_delay.294412171 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 1470847737 ps |
| CPU time | 39.72 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 217424 kb |
| Host | smart-e7168e44-2839-4f1c-9fca-36e20b2b1746 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=294412171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.294412171 |
| Directory | /workspace/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_length_in_transaction.1825358723 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 260289965 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:28:34 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-6bdc9c14-62f5-4808-8eb0-f17b10f4a63e |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1825358723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.1825358723 |
| Directory | /workspace/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_length_out_transaction.2414618191 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 249071229 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:28:21 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-72854bbb-a860-4c49-a89a-f00706183ec5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24146 18191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.2414618191 |
| Directory | /workspace/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_non_iso_usb_traffic.1791555995 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 2036808618 ps |
| CPU time | 15.18 seconds |
| Started | Aug 15 05:28:17 PM PDT 24 |
| Finished | Aug 15 05:28:33 PM PDT 24 |
| Peak memory | 215796 kb |
| Host | smart-84ed0460-ac54-40b6-b47d-0fb686f46901 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17915 55995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.1791555995 |
| Directory | /workspace/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_usb_traffic.2231520948 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 2090178175 ps |
| CPU time | 22.93 seconds |
| Started | Aug 15 05:28:19 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 217976 kb |
| Host | smart-a6abac0e-94c4-4fc4-834c-19f771cea1eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2231520948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.2231520948 |
| Directory | /workspace/4.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_inter_pkt_delay.824602563 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 1720823624 ps |
| CPU time | 48.08 seconds |
| Started | Aug 15 05:28:00 PM PDT 24 |
| Finished | Aug 15 05:28:48 PM PDT 24 |
| Peak memory | 214824 kb |
| Host | smart-d1b354ae-eb71-49ad-93c5-25a876ab3c73 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=824602563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.824602563 |
| Directory | /workspace/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_length_in_transaction.3756463306 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 155216576 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:01 PM PDT 24 |
| Finished | Aug 15 05:28:02 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d705f3f8-207a-4dec-903b-e2490a56c0db |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3756463306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.3756463306 |
| Directory | /workspace/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_length_out_transaction.1920014320 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 174045173 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:28:28 PM PDT 24 |
| Finished | Aug 15 05:28:29 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-404d4622-22b9-4e6a-acfc-e8dde163400f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19200 14320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.1920014320 |
| Directory | /workspace/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_iso.3694282022 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 178579286 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:28:34 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-8c908a57-82ce-476a-b04c-2e692f9ac61d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36942 82022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_iso.3694282022 |
| Directory | /workspace/4.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_stall.586581753 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 189508999 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:28:32 PM PDT 24 |
| Finished | Aug 15 05:28:33 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-a9cc64fa-fa22-4158-9df5-eaee055aed0c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58658 1753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_stall.586581753 |
| Directory | /workspace/4.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_trans_nak.1967266330 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 259837958 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:28:32 PM PDT 24 |
| Finished | Aug 15 05:28:33 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-5dea2871-48cb-4ced-bafc-de17914f84c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19672 66330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_trans_nak.1967266330 |
| Directory | /workspace/4.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/4.usbdev_pending_in_trans.1500107561 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 157413263 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:10 PM PDT 24 |
| Finished | Aug 15 05:28:11 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6b1b7313-545b-4d34-8676-d8b10e1afcfb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15001 07561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pending_in_trans.1500107561 |
| Directory | /workspace/4.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_pinflip.1200974423 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 247021707 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-111c6357-1e98-4880-914c-d347f13870e1 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1200974423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.1200974423 |
| Directory | /workspace/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_rand_bus_type.3498089842 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 216930413 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:28:19 PM PDT 24 |
| Finished | Aug 15 05:28:21 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d1ff2c56-50cc-4d2f-8e04-7d92d3e3a3f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34980 89842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.3498089842 |
| Directory | /workspace/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_usb_ref_disable.613154568 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 136221045 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:28:22 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-768e6760-68fb-42b0-b238-dc0ce8b697fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61315 4568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.613154568 |
| Directory | /workspace/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_pins_sense.3160781965 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 32491665 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:28:06 PM PDT 24 |
| Finished | Aug 15 05:28:07 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-778fcf27-de0f-4135-9d9b-a6eb198bd3ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31607 81965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.3160781965 |
| Directory | /workspace/4.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_buffer.1793190251 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 18306407375 ps |
| CPU time | 47.79 seconds |
| Started | Aug 15 05:28:02 PM PDT 24 |
| Finished | Aug 15 05:28:50 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-7f0e1858-ce7c-4378-a63b-c626d8861de0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17931 90251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_buffer.1793190251 |
| Directory | /workspace/4.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_received.1704891613 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 187316025 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:09 PM PDT 24 |
| Finished | Aug 15 05:28:10 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-a32bd206-c1b1-441a-a10d-cd113e94f624 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17048 91613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_received.1704891613 |
| Directory | /workspace/4.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_sent.1221758811 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 235143851 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:22 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-9c9afda9-910e-4cee-a3c6-6dcc5fb293af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12217 58811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_sent.1221758811 |
| Directory | /workspace/4.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_bus_disconnects.4203216682 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 5084610171 ps |
| CPU time | 17.79 seconds |
| Started | Aug 15 05:28:09 PM PDT 24 |
| Finished | Aug 15 05:28:27 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-bae9adf2-c437-478c-8175-1335816ab582 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=4203216682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.4203216682 |
| Directory | /workspace/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_bus_resets.1952375174 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 4114962149 ps |
| CPU time | 33.92 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:29:09 PM PDT 24 |
| Peak memory | 218288 kb |
| Host | smart-4ff41181-e5a0-41e5-ba21-e2049900ea00 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1952375174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.1952375174 |
| Directory | /workspace/4.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_suspends.1314608574 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 5941717790 ps |
| CPU time | 57.58 seconds |
| Started | Aug 15 05:28:11 PM PDT 24 |
| Finished | Aug 15 05:29:09 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-1d5b882a-1e6f-4c59-935b-4c2567b18209 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1314608574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.1314608574 |
| Directory | /workspace/4.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/4.usbdev_random_length_in_transaction.1824933166 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 226075431 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:28:11 PM PDT 24 |
| Finished | Aug 15 05:28:12 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-f1dba445-3c94-4ae3-a688-c394e243c218 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18249 33166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_in_transaction.1824933166 |
| Directory | /workspace/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_random_length_out_transaction.3538790457 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 139356036 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:12 PM PDT 24 |
| Finished | Aug 15 05:28:13 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-00313c60-8657-4617-a4d1-e028ce5efef2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35387 90457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.3538790457 |
| Directory | /workspace/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_resume_link_active.3830554945 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 20175735853 ps |
| CPU time | 25.42 seconds |
| Started | Aug 15 05:28:28 PM PDT 24 |
| Finished | Aug 15 05:28:54 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-3754014e-9bf6-4aa5-b882-a45dca430c21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38305 54945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_resume_link_active.3830554945 |
| Directory | /workspace/4.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_crc_err.2024622269 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 187128080 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:28:07 PM PDT 24 |
| Finished | Aug 15 05:28:08 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-1609b0bc-e4b8-478d-8473-bcf8d2e8d1a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20246 22269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_crc_err.2024622269 |
| Directory | /workspace/4.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_full.467444331 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 271345267 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-d4b5de16-3a5e-46a8-9575-033bd2a2f98a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46744 4331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_full.467444331 |
| Directory | /workspace/4.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_pid_err.4046977354 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 160209430 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:17 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-a33c7880-4d3d-4e0c-b47a-e9f02452ae46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40469 77354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_pid_err.4046977354 |
| Directory | /workspace/4.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_sec_cm.4291243227 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 323746542 ps |
| CPU time | 1.19 seconds |
| Started | Aug 15 05:28:09 PM PDT 24 |
| Finished | Aug 15 05:28:11 PM PDT 24 |
| Peak memory | 223144 kb |
| Host | smart-3254e8a9-a382-45fa-bd8e-255da7a0ebea |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4291243227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.4291243227 |
| Directory | /workspace/4.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_priority.2779930427 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 460468426 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:22 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-6ea3dc33-02c4-43dc-92d1-bd6cc2c6aaea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27799 30427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.2779930427 |
| Directory | /workspace/4.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_priority_over_stall_response.3664454704 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 229236405 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:28:19 PM PDT 24 |
| Finished | Aug 15 05:28:25 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-c21b137b-1758-45bf-847d-819d274631a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36644 54704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.3664454704 |
| Directory | /workspace/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_stage.782787500 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 159271248 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:28:17 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-a03c9a09-4e0d-4232-b6d5-fb09747bb5a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78278 7500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_stage.782787500 |
| Directory | /workspace/4.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_trans_ignored.868281538 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 153359674 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:30 PM PDT 24 |
| Finished | Aug 15 05:28:31 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d29ff3c8-e5be-4bb2-82d7-f16865efc5e8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86828 1538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_trans_ignored.868281538 |
| Directory | /workspace/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/4.usbdev_smoke.3879039974 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 230641834 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:28:22 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-ade21496-1605-47cb-a792-909539a7963b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38790 39974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.3879039974 |
| Directory | /workspace/4.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/4.usbdev_spurious_pids_ignored.680882091 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 2088567960 ps |
| CPU time | 16.79 seconds |
| Started | Aug 15 05:28:09 PM PDT 24 |
| Finished | Aug 15 05:28:26 PM PDT 24 |
| Peak memory | 224004 kb |
| Host | smart-1dbafe74-b7b8-4332-a105-d65a30486e5c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=680882091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.680882091 |
| Directory | /workspace/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/4.usbdev_stall_priority_over_nak.4245367251 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 180622121 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:28:32 PM PDT 24 |
| Finished | Aug 15 05:28:33 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-525e29cf-ea4e-4d46-8d92-d574fbf22bc2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42453 67251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.4245367251 |
| Directory | /workspace/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/4.usbdev_stall_trans.1745050283 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 237537893 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:27 PM PDT 24 |
| Finished | Aug 15 05:28:28 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-9727d32e-518d-4e1e-8489-2c54874f044f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17450 50283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_trans.1745050283 |
| Directory | /workspace/4.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_stream_len_max.3287741465 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 1367914638 ps |
| CPU time | 3.03 seconds |
| Started | Aug 15 05:28:26 PM PDT 24 |
| Finished | Aug 15 05:28:29 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-8afd80fd-31e5-4ef5-a7eb-f2ab45a41fd7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32877 41465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.3287741465 |
| Directory | /workspace/4.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_streaming_out.1462206358 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 2631554260 ps |
| CPU time | 19.69 seconds |
| Started | Aug 15 05:28:10 PM PDT 24 |
| Finished | Aug 15 05:28:30 PM PDT 24 |
| Peak memory | 217776 kb |
| Host | smart-d124fec1-174c-493d-9143-5f36f896d254 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14622 06358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_streaming_out.1462206358 |
| Directory | /workspace/4.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/4.usbdev_timeout_missing_host_handshake.1421530030 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 384237370 ps |
| CPU time | 4.6 seconds |
| Started | Aug 15 05:28:08 PM PDT 24 |
| Finished | Aug 15 05:28:12 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-90748162-9c78-48bf-9667-1773f976c2ff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1421530030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host _handshake.1421530030 |
| Directory | /workspace/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/4.usbdev_tx_rx_disruption.2146022683 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 413431708 ps |
| CPU time | 1.31 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:22 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-ceb450bd-a741-44fe-9413-6a10c76625ed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2146022683 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_tx_rx_disruption.2146022683 |
| Directory | /workspace/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/40.usbdev_alert_test.3936642357 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 119268685 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:33:38 PM PDT 24 |
| Finished | Aug 15 05:33:39 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-ae0fc796-2d11-43cf-af9e-6a350cdb994c |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3936642357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.3936642357 |
| Directory | /workspace/40.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_disconnect.1893473110 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 6612011286 ps |
| CPU time | 9.21 seconds |
| Started | Aug 15 05:33:33 PM PDT 24 |
| Finished | Aug 15 05:33:42 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-254dd21b-a8f1-43ff-ac87-3361ad5e8a28 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1893473110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_a on_wake_disconnect.1893473110 |
| Directory | /workspace/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_reset.2439383578 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 15865859202 ps |
| CPU time | 21.82 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:30 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-05042927-fd8c-43c0-afd1-13c1be111dc0 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2439383578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.2439383578 |
| Directory | /workspace/40.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/40.usbdev_av_buffer.225555831 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 176126591 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:21 PM PDT 24 |
| Finished | Aug 15 05:33:22 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-b783f042-2fd2-486d-a6f8-cff76bf53bca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22555 5831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_av_buffer.225555831 |
| Directory | /workspace/40.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/40.usbdev_bitstuff_err.1452568490 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 147094420 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:00 PM PDT 24 |
| Finished | Aug 15 05:33:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-51b2375d-6192-4097-a1fd-d748bcc34428 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14525 68490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_bitstuff_err.1452568490 |
| Directory | /workspace/40.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_data_toggle_clear.441233500 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 313874299 ps |
| CPU time | 1.32 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:07 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-55182be4-0f0c-49ec-bf96-49c8d8b905b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44123 3500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_clear.441233500 |
| Directory | /workspace/40.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/40.usbdev_data_toggle_restore.2927198490 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 1016240260 ps |
| CPU time | 2.8 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-ba27661f-9009-4cf6-805d-03b70cf492ae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2927198490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.2927198490 |
| Directory | /workspace/40.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/40.usbdev_device_address.2223479383 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 28836076806 ps |
| CPU time | 49.28 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-5b23969f-9ffa-49b2-a152-3b981e19e7f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22234 79383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.2223479383 |
| Directory | /workspace/40.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/40.usbdev_device_timeout.2597120464 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 313076770 ps |
| CPU time | 4.46 seconds |
| Started | Aug 15 05:33:10 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-fb32013e-8ca0-4dac-be64-77458bc6b9ac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2597120464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.2597120464 |
| Directory | /workspace/40.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/40.usbdev_disable_endpoint.1609586539 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 861568877 ps |
| CPU time | 1.84 seconds |
| Started | Aug 15 05:33:23 PM PDT 24 |
| Finished | Aug 15 05:33:25 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-5b3b38ef-5b22-4713-b0e1-45940e862259 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16095 86539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disable_endpoint.1609586539 |
| Directory | /workspace/40.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/40.usbdev_disconnected.2066720153 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 148865299 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:33:06 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-eaba569c-b544-454e-bfde-672c5103a458 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20667 20153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disconnected.2066720153 |
| Directory | /workspace/40.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/40.usbdev_enable.1809533795 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 39148683 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:33:37 PM PDT 24 |
| Finished | Aug 15 05:33:38 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-828fd8b4-1e97-4355-b44e-f056e1b6a701 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18095 33795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_enable.1809533795 |
| Directory | /workspace/40.usbdev_enable/latest |
| Test location | /workspace/coverage/default/40.usbdev_endpoint_access.1319234844 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 954459634 ps |
| CPU time | 2.77 seconds |
| Started | Aug 15 05:33:21 PM PDT 24 |
| Finished | Aug 15 05:33:25 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-ebad7837-d03d-4047-b545-13383a912453 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13192 34844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.1319234844 |
| Directory | /workspace/40.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/40.usbdev_endpoint_types.1821952297 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 204818693 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:34 PM PDT 24 |
| Finished | Aug 15 05:33:35 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f3fc065a-5507-4111-a8c6-7abdb568f604 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1821952297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.1821952297 |
| Directory | /workspace/40.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/40.usbdev_fifo_rst.616851721 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 324693878 ps |
| CPU time | 2.73 seconds |
| Started | Aug 15 05:33:10 PM PDT 24 |
| Finished | Aug 15 05:33:13 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-7989c694-bd0a-45e7-ab6a-3dab8c6283d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61685 1721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_fifo_rst.616851721 |
| Directory | /workspace/40.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_iso.1326838752 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 197086149 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:33:32 PM PDT 24 |
| Finished | Aug 15 05:33:33 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-5d208742-c1df-49d1-9271-5b3d0e509a81 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1326838752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.1326838752 |
| Directory | /workspace/40.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_stall.3850082697 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 141814069 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:02 PM PDT 24 |
| Finished | Aug 15 05:33:03 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-cb685bc5-0862-4793-b0a6-cfdcf58ab6e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38500 82697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_stall.3850082697 |
| Directory | /workspace/40.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_trans.629725291 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 273745180 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-e06d67be-56df-4e7a-88dd-d0349d729b21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62972 5291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_trans.629725291 |
| Directory | /workspace/40.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_invalid_sync.133745302 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 4064726788 ps |
| CPU time | 117.13 seconds |
| Started | Aug 15 05:33:05 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 223048 kb |
| Host | smart-6529f324-0a5b-4e7d-b107-153c8b033c08 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=133745302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.133745302 |
| Directory | /workspace/40.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/40.usbdev_iso_retraction.1831081866 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 10872595677 ps |
| CPU time | 127.96 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:35:15 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-f295e1e1-a5e3-424b-a495-8277fa337f3b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1831081866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.1831081866 |
| Directory | /workspace/40.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_in_err.2362686210 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 186470332 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-6738416b-9062-43db-8ad4-91dfe207f79b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23626 86210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_in_err.2362686210 |
| Directory | /workspace/40.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_resume.3109457874 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 7356355108 ps |
| CPU time | 10.45 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:24 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-32e64567-ce01-4654-adef-c9e23a72c8d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31094 57874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_resume.3109457874 |
| Directory | /workspace/40.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_suspend.1189623570 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 9604775186 ps |
| CPU time | 12.63 seconds |
| Started | Aug 15 05:33:41 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-64735d42-aedf-4b88-8e8d-74be555f223c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11896 23570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_suspend.1189623570 |
| Directory | /workspace/40.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/40.usbdev_low_speed_traffic.3855314724 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 4781454672 ps |
| CPU time | 38.25 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:46 PM PDT 24 |
| Peak memory | 219484 kb |
| Host | smart-d8ea1e7b-ca0f-4f9e-83e5-3fa92b7fde0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3855314724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.3855314724 |
| Directory | /workspace/40.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_inter_pkt_delay.3338104577 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 3498220248 ps |
| CPU time | 102.58 seconds |
| Started | Aug 15 05:33:29 PM PDT 24 |
| Finished | Aug 15 05:35:12 PM PDT 24 |
| Peak memory | 217268 kb |
| Host | smart-e45eb2ff-c1dc-478d-ad84-a8d889f3b76d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3338104577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.3338104577 |
| Directory | /workspace/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_length_in_transaction.2186427504 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 238058479 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:33:22 PM PDT 24 |
| Finished | Aug 15 05:33:23 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-0f943398-86fc-43a8-8b6a-4f2429526e20 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2186427504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.2186427504 |
| Directory | /workspace/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_length_out_transaction.4134288520 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 191410517 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:33:14 PM PDT 24 |
| Finished | Aug 15 05:33:15 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-856495dd-2354-4755-afdb-ddf8086c5d59 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41342 88520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.4134288520 |
| Directory | /workspace/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_inter_pkt_delay.1040361335 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 2443455503 ps |
| CPU time | 25.29 seconds |
| Started | Aug 15 05:33:21 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-33431bac-8b8d-485b-9c30-fbc1a38e6442 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1040361335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.1040361335 |
| Directory | /workspace/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_length_in_transaction.532870418 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 157110556 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:06 PM PDT 24 |
| Finished | Aug 15 05:33:07 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-d82e4b7f-0f0c-49bf-ac04-694a404645d4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=532870418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.532870418 |
| Directory | /workspace/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_length_out_transaction.2940049750 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 156352788 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-f597b05e-725e-4f46-8528-3779721c8441 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29400 49750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.2940049750 |
| Directory | /workspace/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_nak_trans.2118999527 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 196340171 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:12 PM PDT 24 |
| Finished | Aug 15 05:33:13 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7e395831-5c30-459b-bc53-1507c87e8c1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21189 99527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_nak_trans.2118999527 |
| Directory | /workspace/40.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_iso.1971914688 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 157714247 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:11 PM PDT 24 |
| Finished | Aug 15 05:33:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-947d9fe6-e6e6-40f3-98e4-aecec5a4709c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19719 14688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_iso.1971914688 |
| Directory | /workspace/40.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_stall.4066580153 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 229898224 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:33:32 PM PDT 24 |
| Finished | Aug 15 05:33:33 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-a2b10584-9e3e-4f98-b1cf-189334f3483c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40665 80153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_stall.4066580153 |
| Directory | /workspace/40.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_trans_nak.3845043702 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 237398070 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:08 PM PDT 24 |
| Finished | Aug 15 05:33:09 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-59d55c09-3f7b-4556-9f3e-d969879d3b73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38450 43702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_trans_nak.3845043702 |
| Directory | /workspace/40.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/40.usbdev_pending_in_trans.231173495 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 177970929 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:14 PM PDT 24 |
| Finished | Aug 15 05:33:15 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-2b4d4dc4-4535-444b-bdf4-a05b6fd7d594 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23117 3495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pending_in_trans.231173495 |
| Directory | /workspace/40.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_config_pinflip.2033112241 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 253415678 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:33:14 PM PDT 24 |
| Finished | Aug 15 05:33:15 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-a3f2fd99-4ba2-4f4b-a2e4-961a91e5edf6 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2033112241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.2033112241 |
| Directory | /workspace/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_config_usb_ref_disable.4132463602 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 187479677 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:17 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e792a8bd-67a8-4b16-8e9d-0533870a387d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41324 63602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.4132463602 |
| Directory | /workspace/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_pins_sense.2547184850 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 80819927 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:33:14 PM PDT 24 |
| Finished | Aug 15 05:33:15 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d9ce5b29-4eb9-470f-a67b-c372fa39698b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25471 84850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.2547184850 |
| Directory | /workspace/40.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_buffer.3951595083 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 16417894448 ps |
| CPU time | 44.5 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-bfc9d807-8b21-48d1-a340-30cfb4f8ae72 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39515 95083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_buffer.3951595083 |
| Directory | /workspace/40.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_received.499655093 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 191497279 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-f170f082-ef9c-4b21-beb6-9d79d3041388 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49965 5093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_received.499655093 |
| Directory | /workspace/40.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_sent.4257869267 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 240697731 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:33:07 PM PDT 24 |
| Finished | Aug 15 05:33:08 PM PDT 24 |
| Peak memory | 206376 kb |
| Host | smart-639b8b7c-5431-4786-8dcb-0d871fc07e40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42578 69267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_sent.4257869267 |
| Directory | /workspace/40.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/40.usbdev_random_length_in_transaction.2011750883 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 246801707 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:33:38 PM PDT 24 |
| Finished | Aug 15 05:33:39 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-f530b211-b051-4972-ae2c-861816236087 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20117 50883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_in_transaction.2011750883 |
| Directory | /workspace/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_random_length_out_transaction.2472375528 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 197517745 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-eb932ac1-acf2-4ea8-9201-3c8f71373ede |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24723 75528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2472375528 |
| Directory | /workspace/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_rx_crc_err.2189734199 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 176522321 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:19 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-6fe087bc-55aa-482c-85f1-265d94c4f793 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21897 34199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_rx_crc_err.2189734199 |
| Directory | /workspace/40.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_rx_full.205000767 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 338963868 ps |
| CPU time | 1.28 seconds |
| Started | Aug 15 05:33:17 PM PDT 24 |
| Finished | Aug 15 05:33:18 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-06247347-4cff-4194-b644-36900c68b109 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20500 0767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_rx_full.205000767 |
| Directory | /workspace/40.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/40.usbdev_setup_stage.3217945948 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 172684066 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-123fadcd-8e7b-4437-9331-1d5e4c97df0e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32179 45948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_setup_stage.3217945948 |
| Directory | /workspace/40.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/40.usbdev_setup_trans_ignored.3209099418 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 152943654 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:28 PM PDT 24 |
| Finished | Aug 15 05:33:29 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-7972c20b-0feb-4174-8534-fc519a2e1c2a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32090 99418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_setup_trans_ignored.3209099418 |
| Directory | /workspace/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/40.usbdev_smoke.289824193 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 221246140 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:33:23 PM PDT 24 |
| Finished | Aug 15 05:33:24 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-bb115f0f-860c-4884-9c6d-5059d902fefb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28982 4193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.289824193 |
| Directory | /workspace/40.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/40.usbdev_spurious_pids_ignored.1941872467 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 2429121632 ps |
| CPU time | 71.33 seconds |
| Started | Aug 15 05:33:25 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 217560 kb |
| Host | smart-8e18e187-6c50-4df8-a900-b6948b09c477 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1941872467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.1941872467 |
| Directory | /workspace/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/40.usbdev_stall_priority_over_nak.2160843948 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 148499736 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:33:09 PM PDT 24 |
| Finished | Aug 15 05:33:10 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-11db8fca-23c9-4665-af3f-f1385d282c47 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21608 43948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.2160843948 |
| Directory | /workspace/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/40.usbdev_stall_trans.3573457008 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 159867996 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:33:48 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-049fa024-8137-4992-8140-ed2c56551be7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35734 57008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_trans.3573457008 |
| Directory | /workspace/40.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_stream_len_max.1861044248 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 327273410 ps |
| CPU time | 1.15 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-a08a95b5-4056-4137-8fc8-6d930c002e9a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18610 44248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.1861044248 |
| Directory | /workspace/40.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/40.usbdev_streaming_out.183159182 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 3228547426 ps |
| CPU time | 32.87 seconds |
| Started | Aug 15 05:33:32 PM PDT 24 |
| Finished | Aug 15 05:34:05 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-741f60d4-0d46-4ce4-a7a3-3dd45c32e1ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18315 9182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_streaming_out.183159182 |
| Directory | /workspace/40.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/40.usbdev_timeout_missing_host_handshake.3537369202 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 627365163 ps |
| CPU time | 4.97 seconds |
| Started | Aug 15 05:33:22 PM PDT 24 |
| Finished | Aug 15 05:33:28 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-3077d796-39a3-42f5-9f48-ffe88dba118c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3537369202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_hos t_handshake.3537369202 |
| Directory | /workspace/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/40.usbdev_tx_rx_disruption.4189960111 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 611825379 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:33:14 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-b664f23d-24ed-47f3-a17e-0abeca15b1a0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4189960111 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_tx_rx_disruption.4189960111 |
| Directory | /workspace/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/400.usbdev_tx_rx_disruption.498135369 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 416713423 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:45 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-ce4aa87a-642b-43e0-8557-d14091f2269f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=498135369 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 400.usbdev_tx_rx_disruption.498135369 |
| Directory | /workspace/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/401.usbdev_tx_rx_disruption.1951819823 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 594743068 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:35:55 PM PDT 24 |
| Finished | Aug 15 05:35:56 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-466fab38-a117-4693-b07e-8f092647737c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1951819823 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 401.usbdev_tx_rx_disruption.1951819823 |
| Directory | /workspace/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/402.usbdev_tx_rx_disruption.987031978 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 532278699 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-ae907903-8aa6-4f07-8cb9-81e3dece1387 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=987031978 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 402.usbdev_tx_rx_disruption.987031978 |
| Directory | /workspace/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/403.usbdev_tx_rx_disruption.4224590226 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 603966201 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-948eda13-e323-4589-b88d-11cfba9b2330 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4224590226 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 403.usbdev_tx_rx_disruption.4224590226 |
| Directory | /workspace/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/404.usbdev_tx_rx_disruption.677934491 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 628826836 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:54 PM PDT 24 |
| Finished | Aug 15 05:35:55 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-be7dfda2-4937-449a-a128-a66340262dd2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=677934491 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 404.usbdev_tx_rx_disruption.677934491 |
| Directory | /workspace/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/405.usbdev_tx_rx_disruption.3879181691 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 455146958 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-ff8e0a2b-f568-4ee0-a692-a8cedace9169 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3879181691 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 405.usbdev_tx_rx_disruption.3879181691 |
| Directory | /workspace/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/406.usbdev_tx_rx_disruption.2922784679 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 536599952 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:36:00 PM PDT 24 |
| Finished | Aug 15 05:36:02 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-401384e3-1b56-4728-b46b-c244eeba3928 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2922784679 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 406.usbdev_tx_rx_disruption.2922784679 |
| Directory | /workspace/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/407.usbdev_tx_rx_disruption.1396700528 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 603798346 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-5a9a6986-8f73-46d0-9085-65953d982e42 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1396700528 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 407.usbdev_tx_rx_disruption.1396700528 |
| Directory | /workspace/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/408.usbdev_tx_rx_disruption.2448058562 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 607037525 ps |
| CPU time | 1.77 seconds |
| Started | Aug 15 05:36:15 PM PDT 24 |
| Finished | Aug 15 05:36:17 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-dd7fe04c-32a8-4b4a-a2ce-dd3077ef7559 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2448058562 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 408.usbdev_tx_rx_disruption.2448058562 |
| Directory | /workspace/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/409.usbdev_tx_rx_disruption.1970298283 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 533353032 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:36:16 PM PDT 24 |
| Finished | Aug 15 05:36:18 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8478b6ad-9cfd-442f-900f-058aa7af614a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1970298283 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 409.usbdev_tx_rx_disruption.1970298283 |
| Directory | /workspace/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/41.usbdev_alert_test.221811024 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 51271208 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-09178677-e2b4-4b7d-80f7-55137329c730 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=221811024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.221811024 |
| Directory | /workspace/41.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_reset.636248315 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 14845957869 ps |
| CPU time | 17.61 seconds |
| Started | Aug 15 05:33:28 PM PDT 24 |
| Finished | Aug 15 05:33:46 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-4878f9f9-4aea-4760-bb48-33d7025b063b |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=636248315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.636248315 |
| Directory | /workspace/41.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_resume.2827575060 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 25317852587 ps |
| CPU time | 33.37 seconds |
| Started | Aug 15 05:33:11 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-fdcf844f-6685-44cb-8f8e-808290000884 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2827575060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_a on_wake_resume.2827575060 |
| Directory | /workspace/41.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/41.usbdev_av_buffer.2306915284 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 153048072 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:33:29 PM PDT 24 |
| Finished | Aug 15 05:33:30 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-aa5ecd71-f280-4bc2-9b5e-8fe4be1be8cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23069 15284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_av_buffer.2306915284 |
| Directory | /workspace/41.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/41.usbdev_bitstuff_err.3416875265 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 155584270 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:26 PM PDT 24 |
| Finished | Aug 15 05:33:27 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c5cf581a-d487-4f3e-b103-b2a6166a0e86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34168 75265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_bitstuff_err.3416875265 |
| Directory | /workspace/41.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_data_toggle_clear.1646835571 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 208605671 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:33:24 PM PDT 24 |
| Finished | Aug 15 05:33:26 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-0f4e77cd-b6d0-4d75-bf67-bd19edf1fb6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16468 35571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_clear.1646835571 |
| Directory | /workspace/41.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/41.usbdev_data_toggle_restore.2907760870 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 333827238 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:33:25 PM PDT 24 |
| Finished | Aug 15 05:33:26 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-6e258a86-322e-4af9-8fc0-fd4ac8a999ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2907760870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.2907760870 |
| Directory | /workspace/41.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/41.usbdev_device_address.61757222 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 34028591289 ps |
| CPU time | 55.33 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-c158b23e-b3e8-4cc2-a0a8-ef3f3446592b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61757 222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.61757222 |
| Directory | /workspace/41.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/41.usbdev_device_timeout.1258621771 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 3432593254 ps |
| CPU time | 28.98 seconds |
| Started | Aug 15 05:33:46 PM PDT 24 |
| Finished | Aug 15 05:34:15 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-e29adb2b-b96b-44a0-b563-0b44e69d7dda |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1258621771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.1258621771 |
| Directory | /workspace/41.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/41.usbdev_disable_endpoint.1114522364 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 709653407 ps |
| CPU time | 1.77 seconds |
| Started | Aug 15 05:33:36 PM PDT 24 |
| Finished | Aug 15 05:33:38 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-5243f4c9-cc77-4f3f-b8f1-d6c2fffc2d40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11145 22364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_disable_endpoint.1114522364 |
| Directory | /workspace/41.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/41.usbdev_disconnected.2024938430 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 137315246 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:33:26 PM PDT 24 |
| Finished | Aug 15 05:33:27 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-35d28a34-c246-491d-8892-42f10db693a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20249 38430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_disconnected.2024938430 |
| Directory | /workspace/41.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/41.usbdev_enable.419449694 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 33271866 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:33:36 PM PDT 24 |
| Finished | Aug 15 05:33:37 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-c0c1cf81-e6b0-4c85-b59c-080454f781fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41944 9694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_enable.419449694 |
| Directory | /workspace/41.usbdev_enable/latest |
| Test location | /workspace/coverage/default/41.usbdev_endpoint_access.671909383 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 915104876 ps |
| CPU time | 2.63 seconds |
| Started | Aug 15 05:33:27 PM PDT 24 |
| Finished | Aug 15 05:33:30 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-66285451-e126-40ce-9eed-f0173c0399d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67190 9383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.671909383 |
| Directory | /workspace/41.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/41.usbdev_fifo_rst.2244999902 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 189123147 ps |
| CPU time | 2.3 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-f72c4a08-b6be-4908-901f-c1ed594f43a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22449 99902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_fifo_rst.2244999902 |
| Directory | /workspace/41.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_iso.4169318 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 186643398 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:15 PM PDT 24 |
| Peak memory | 215840 kb |
| Host | smart-05b88bc6-ba97-4b58-981d-11651bab6e51 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4169318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.4169318 |
| Directory | /workspace/41.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_stall.485677153 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 148325892 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-84bc5ab8-a9b6-4d0a-a4a9-68903064412b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48567 7153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_stall.485677153 |
| Directory | /workspace/41.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_trans.406593965 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 178044569 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:30 PM PDT 24 |
| Finished | Aug 15 05:33:31 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4558f14b-a783-4d0b-8f65-c30af6d0d213 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40659 3965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_trans.406593965 |
| Directory | /workspace/41.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_invalid_sync.1289437966 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 2882741436 ps |
| CPU time | 21.62 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:37 PM PDT 24 |
| Peak memory | 218128 kb |
| Host | smart-55d6460d-350a-4423-86a6-30a9153c36ce |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1289437966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.1289437966 |
| Directory | /workspace/41.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/41.usbdev_iso_retraction.423945013 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 6331453619 ps |
| CPU time | 45.05 seconds |
| Started | Aug 15 05:33:14 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-a9573183-3fa8-4793-ab5b-5ac7d7ab307f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=423945013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.423945013 |
| Directory | /workspace/41.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_in_err.1339710117 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 225914494 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:33:39 PM PDT 24 |
| Finished | Aug 15 05:33:40 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-da86a75f-f982-4874-a31d-b1eb40187b6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13397 10117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_in_err.1339710117 |
| Directory | /workspace/41.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_resume.2514301924 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 22831889876 ps |
| CPU time | 42.08 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 216012 kb |
| Host | smart-c5081649-dad1-457c-b49c-9d88f5521413 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25143 01924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_resume.2514301924 |
| Directory | /workspace/41.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_suspend.869214019 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 11334006016 ps |
| CPU time | 16.91 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:31 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-bb5c7428-72f5-4943-b77b-4b898474e859 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86921 4019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_suspend.869214019 |
| Directory | /workspace/41.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/41.usbdev_low_speed_traffic.1979520727 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 2469348763 ps |
| CPU time | 73.51 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:35:09 PM PDT 24 |
| Peak memory | 218340 kb |
| Host | smart-979b13d1-8170-4c04-b6a3-6616cd5c9d24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1979520727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.1979520727 |
| Directory | /workspace/41.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_inter_pkt_delay.3110559862 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 1581462401 ps |
| CPU time | 44.56 seconds |
| Started | Aug 15 05:33:27 PM PDT 24 |
| Finished | Aug 15 05:34:11 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-e8a5905b-34f8-4edb-a3ed-a81e8cc8bdc7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3110559862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.3110559862 |
| Directory | /workspace/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_length_in_transaction.719688761 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 252750854 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:33:14 PM PDT 24 |
| Finished | Aug 15 05:33:15 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-9d5a8c0e-084d-4402-ab21-52511c4091ca |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=719688761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.719688761 |
| Directory | /workspace/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_length_out_transaction.3371749501 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 190178225 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-605ad467-895a-4f9c-84f1-cb9cc0543f2b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33717 49501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.3371749501 |
| Directory | /workspace/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_inter_pkt_delay.3000160401 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 2252268217 ps |
| CPU time | 18.04 seconds |
| Started | Aug 15 05:33:28 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 224008 kb |
| Host | smart-c72eeae7-4649-475e-895c-a1d911528538 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3000160401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.3000160401 |
| Directory | /workspace/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_length_in_transaction.2892895512 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 174721974 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:33 PM PDT 24 |
| Finished | Aug 15 05:33:34 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-ab2db75c-6a29-432e-a4d1-86bbfc194666 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2892895512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.2892895512 |
| Directory | /workspace/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_length_out_transaction.3085188372 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 165960625 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-531a65d4-086f-4347-9a68-73dccbd38298 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30851 88372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3085188372 |
| Directory | /workspace/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_nak_trans.3796071566 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 232663530 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:33:25 PM PDT 24 |
| Finished | Aug 15 05:33:26 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7008459b-73a7-4b9e-8877-6060f074bded |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37960 71566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_nak_trans.3796071566 |
| Directory | /workspace/41.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_iso.748175625 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 176853931 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:33 PM PDT 24 |
| Finished | Aug 15 05:33:34 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b21a36a1-aae3-46bf-94b8-fd95553d9bbc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74817 5625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_iso.748175625 |
| Directory | /workspace/41.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_stall.3111760593 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 173422710 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:18 PM PDT 24 |
| Finished | Aug 15 05:33:19 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3ef8111a-8e0b-4bfc-9143-b460b8b443cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31117 60593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_stall.3111760593 |
| Directory | /workspace/41.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_trans_nak.1983560880 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 149609876 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:34 PM PDT 24 |
| Finished | Aug 15 05:33:35 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-e95515f0-48ef-49d1-a3fe-b8ab724e8579 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19835 60880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_trans_nak.1983560880 |
| Directory | /workspace/41.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/41.usbdev_pending_in_trans.2890723199 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 183312698 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-235dd515-8ec6-4330-9668-bc3bee97459d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28907 23199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pending_in_trans.2890723199 |
| Directory | /workspace/41.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_config_pinflip.2572491868 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 224334647 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:33:27 PM PDT 24 |
| Finished | Aug 15 05:33:29 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-7879c1b1-bc44-459b-afab-fad7e07e6925 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2572491868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.2572491868 |
| Directory | /workspace/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_config_usb_ref_disable.462943915 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 154449233 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:33 PM PDT 24 |
| Finished | Aug 15 05:33:34 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-4366e362-96cf-4cc9-ba54-650d262b2a23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46294 3915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.462943915 |
| Directory | /workspace/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_pins_sense.3670812618 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 43196433 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:33:13 PM PDT 24 |
| Finished | Aug 15 05:33:14 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-34319e46-e5ba-4fbf-80f7-b535af060e20 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36708 12618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.3670812618 |
| Directory | /workspace/41.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_buffer.3054495123 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 11817391856 ps |
| CPU time | 29.27 seconds |
| Started | Aug 15 05:33:31 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-756359cb-1455-400c-952b-d24bfb73447e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30544 95123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_buffer.3054495123 |
| Directory | /workspace/41.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_received.1198494591 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 181350111 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:33:15 PM PDT 24 |
| Finished | Aug 15 05:33:16 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-7c354baa-1b9b-4ad9-ba72-018bf92601ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11984 94591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_received.1198494591 |
| Directory | /workspace/41.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_sent.3981172933 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 183049070 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:21 PM PDT 24 |
| Finished | Aug 15 05:33:22 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d0a7c5e3-87aa-45bd-a3dd-b99adb6bc6d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39811 72933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_sent.3981172933 |
| Directory | /workspace/41.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/41.usbdev_random_length_in_transaction.1519778099 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 203442585 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:12 PM PDT 24 |
| Finished | Aug 15 05:33:13 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-fd5852a2-9bcf-4efb-be74-8cb9ca969fe6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15197 78099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_in_transaction.1519778099 |
| Directory | /workspace/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_random_length_out_transaction.2891495295 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 161353264 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:35 PM PDT 24 |
| Finished | Aug 15 05:33:36 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-95dffe6a-f6be-4ef8-9d3e-baab30cf6285 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28914 95295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.2891495295 |
| Directory | /workspace/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_rx_crc_err.2207550351 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 142811145 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:34 PM PDT 24 |
| Finished | Aug 15 05:33:35 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-6200f03f-79c4-4a38-bcb9-6ccaec75924c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22075 50351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_rx_crc_err.2207550351 |
| Directory | /workspace/41.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_rx_full.4009373667 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 357660464 ps |
| CPU time | 1.26 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-10fd6360-c01b-4428-b00c-eb13441bc921 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40093 73667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_rx_full.4009373667 |
| Directory | /workspace/41.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/41.usbdev_setup_stage.1415063073 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 153844908 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:33:43 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-33eb7736-ad6d-4316-ba19-a0d9bc6c2a8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14150 63073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_setup_stage.1415063073 |
| Directory | /workspace/41.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/41.usbdev_setup_trans_ignored.3910763768 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 175236139 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:43 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-45c48f5b-95df-4996-bdd2-f34b4db889d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39107 63768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_setup_trans_ignored.3910763768 |
| Directory | /workspace/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/41.usbdev_smoke.2519185166 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 237745573 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-7988ca99-8103-4fd7-a45e-7c316bc2e486 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25191 85166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.2519185166 |
| Directory | /workspace/41.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/41.usbdev_spurious_pids_ignored.4252697090 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 3394697447 ps |
| CPU time | 24.98 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:34:12 PM PDT 24 |
| Peak memory | 218000 kb |
| Host | smart-c01519ed-b848-44dc-af4c-2062729460d3 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4252697090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.4252697090 |
| Directory | /workspace/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/41.usbdev_stall_priority_over_nak.346577996 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 179063223 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-e67587f2-a696-4b96-bf97-e48bf3429892 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34657 7996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.346577996 |
| Directory | /workspace/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/41.usbdev_stall_trans.3916551837 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 163660238 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:33 PM PDT 24 |
| Finished | Aug 15 05:33:34 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ccd08cb3-a2b7-4076-b65c-f0445e8ccf04 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39165 51837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_trans.3916551837 |
| Directory | /workspace/41.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_stream_len_max.3843959839 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 271525110 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:33:41 PM PDT 24 |
| Finished | Aug 15 05:33:42 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a701b94a-38ab-4bc0-8fb7-50307a0801e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38439 59839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.3843959839 |
| Directory | /workspace/41.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/41.usbdev_streaming_out.1811806549 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 2652281678 ps |
| CPU time | 18.82 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:34:03 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-3e185125-0acc-4de0-8236-4b6a6f644b75 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18118 06549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_streaming_out.1811806549 |
| Directory | /workspace/41.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/41.usbdev_timeout_missing_host_handshake.3466861811 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 2011890555 ps |
| CPU time | 17.64 seconds |
| Started | Aug 15 05:33:27 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-8c4fe289-2fb4-45df-8484-e114d9ad20bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3466861811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_hos t_handshake.3466861811 |
| Directory | /workspace/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/41.usbdev_tx_rx_disruption.1750134743 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 513807163 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-4627cc6f-c573-4276-ad47-05b4e84b6b2d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1750134743 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_tx_rx_disruption.1750134743 |
| Directory | /workspace/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/410.usbdev_tx_rx_disruption.3533005401 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 546423310 ps |
| CPU time | 1.85 seconds |
| Started | Aug 15 05:36:06 PM PDT 24 |
| Finished | Aug 15 05:36:08 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b8b8769b-7dce-4e58-aa3f-0fb37c28dee6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3533005401 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 410.usbdev_tx_rx_disruption.3533005401 |
| Directory | /workspace/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/411.usbdev_tx_rx_disruption.1687755401 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 525680877 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:42 PM PDT 24 |
| Finished | Aug 15 05:35:44 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-bd5bc6a9-0aae-4888-810b-09056b59256b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1687755401 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 411.usbdev_tx_rx_disruption.1687755401 |
| Directory | /workspace/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/412.usbdev_tx_rx_disruption.1088650139 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 533774742 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:36:11 PM PDT 24 |
| Finished | Aug 15 05:36:13 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-83172aad-012a-4786-8dc3-c1a0f163de29 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1088650139 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 412.usbdev_tx_rx_disruption.1088650139 |
| Directory | /workspace/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/413.usbdev_tx_rx_disruption.2078870816 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 465615612 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:35:48 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-82ef41bc-ffc9-4b40-bb94-a048edb03f94 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2078870816 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 413.usbdev_tx_rx_disruption.2078870816 |
| Directory | /workspace/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/414.usbdev_tx_rx_disruption.1732339720 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 504519034 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:36:02 PM PDT 24 |
| Finished | Aug 15 05:36:04 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-2a0d2912-ea2f-42c5-90b7-87928f6e4c3d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1732339720 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 414.usbdev_tx_rx_disruption.1732339720 |
| Directory | /workspace/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/415.usbdev_tx_rx_disruption.2995120535 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 545650943 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:36:06 PM PDT 24 |
| Finished | Aug 15 05:36:08 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-8b298473-d77c-40bc-bac6-0a013df98bf8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2995120535 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 415.usbdev_tx_rx_disruption.2995120535 |
| Directory | /workspace/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/416.usbdev_tx_rx_disruption.2367814219 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 534235005 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:35:59 PM PDT 24 |
| Finished | Aug 15 05:36:01 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-358baf84-b329-464b-8fd5-fc77b87e3d4c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2367814219 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 416.usbdev_tx_rx_disruption.2367814219 |
| Directory | /workspace/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/417.usbdev_tx_rx_disruption.2411051103 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 584974775 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-d832a3ce-e9bb-4105-964e-8627bae041a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2411051103 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 417.usbdev_tx_rx_disruption.2411051103 |
| Directory | /workspace/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/418.usbdev_tx_rx_disruption.152601883 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 636027647 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:36:09 PM PDT 24 |
| Finished | Aug 15 05:36:11 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-a6f882e6-5689-4c21-9e44-ba871d700c90 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=152601883 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 418.usbdev_tx_rx_disruption.152601883 |
| Directory | /workspace/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/419.usbdev_tx_rx_disruption.3059806083 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 572980046 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:36:00 PM PDT 24 |
| Finished | Aug 15 05:36:01 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-1e20998a-171c-4baa-b10d-5f5ad390c36f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3059806083 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 419.usbdev_tx_rx_disruption.3059806083 |
| Directory | /workspace/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/42.usbdev_alert_test.1854003943 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 51622760 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:33:48 PM PDT 24 |
| Finished | Aug 15 05:33:48 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-4b6111ed-40af-4166-a715-65f0a81abc7f |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1854003943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.1854003943 |
| Directory | /workspace/42.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_disconnect.3883110510 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 6786126302 ps |
| CPU time | 9.44 seconds |
| Started | Aug 15 05:33:35 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-6eafd7cb-dd6b-4420-afbe-75d0a4d10e1d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3883110510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_a on_wake_disconnect.3883110510 |
| Directory | /workspace/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_reset.2981581032 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 14302474586 ps |
| CPU time | 16.42 seconds |
| Started | Aug 15 05:33:30 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-27d982bf-a206-4fdb-aa84-cc1b9d1d9685 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2981581032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.2981581032 |
| Directory | /workspace/42.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_resume.3705982743 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 24279367759 ps |
| CPU time | 33.68 seconds |
| Started | Aug 15 05:33:35 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-6b5662f0-f7ff-4681-ae95-7f90bcaac7e8 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3705982743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_a on_wake_resume.3705982743 |
| Directory | /workspace/42.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/42.usbdev_av_buffer.4204814704 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 142750707 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:38 PM PDT 24 |
| Finished | Aug 15 05:33:40 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-86e1c7bc-0d1f-4552-9a96-a0a3271ab386 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42048 14704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_av_buffer.4204814704 |
| Directory | /workspace/42.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/42.usbdev_bitstuff_err.1622872310 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 174514853 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:33:41 PM PDT 24 |
| Finished | Aug 15 05:33:42 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-fbde813c-b2ac-4d87-b6af-4d55f0a88dad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16228 72310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_bitstuff_err.1622872310 |
| Directory | /workspace/42.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_data_toggle_clear.3701304344 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 321934612 ps |
| CPU time | 1.21 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ccbd89e2-198e-4148-9f64-a10629de1ada |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37013 04344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_clear.3701304344 |
| Directory | /workspace/42.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/42.usbdev_data_toggle_restore.4255318739 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 853583563 ps |
| CPU time | 2.56 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-1e4d6736-d564-4581-9e10-f77ff549af29 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4255318739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.4255318739 |
| Directory | /workspace/42.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/42.usbdev_device_address.2707973274 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 18733409657 ps |
| CPU time | 28.75 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-517fa92f-8f31-4684-ae29-e8bcb99290a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27079 73274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.2707973274 |
| Directory | /workspace/42.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/42.usbdev_device_timeout.1859748201 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 649832937 ps |
| CPU time | 5 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-eef2d3f1-aa1e-44b1-b142-6a7cc00ebf2c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1859748201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.1859748201 |
| Directory | /workspace/42.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/42.usbdev_disable_endpoint.3349627847 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 912943646 ps |
| CPU time | 2.24 seconds |
| Started | Aug 15 05:33:43 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-fbd2625f-666a-4e74-bde2-cc016818b444 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33496 27847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disable_endpoint.3349627847 |
| Directory | /workspace/42.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/42.usbdev_disconnected.1273786813 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 139111272 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:36 PM PDT 24 |
| Finished | Aug 15 05:33:37 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-45cbf000-5617-466e-8866-0071dcb8314c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12737 86813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disconnected.1273786813 |
| Directory | /workspace/42.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/42.usbdev_enable.1835176054 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 27775715 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:33:41 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-354abbbb-9e0c-4625-9b55-8a525be240c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18351 76054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_enable.1835176054 |
| Directory | /workspace/42.usbdev_enable/latest |
| Test location | /workspace/coverage/default/42.usbdev_endpoint_access.1280850360 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 742528393 ps |
| CPU time | 2.11 seconds |
| Started | Aug 15 05:33:46 PM PDT 24 |
| Finished | Aug 15 05:33:49 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-5c5191a1-c8a7-4bba-9e7f-db936f024dba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12808 50360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.1280850360 |
| Directory | /workspace/42.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/42.usbdev_endpoint_types.3143898915 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 380608932 ps |
| CPU time | 1.24 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-cd5394fa-5fd6-4ec4-b7fd-0a1fc8be1f17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3143898915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.3143898915 |
| Directory | /workspace/42.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/42.usbdev_fifo_rst.1081357290 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 313949358 ps |
| CPU time | 2.06 seconds |
| Started | Aug 15 05:33:38 PM PDT 24 |
| Finished | Aug 15 05:33:41 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-a5334fa6-bcc3-448b-8367-051883ba863b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10813 57290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_fifo_rst.1081357290 |
| Directory | /workspace/42.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_iso.1940971402 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 220425939 ps |
| CPU time | 1.16 seconds |
| Started | Aug 15 05:33:37 PM PDT 24 |
| Finished | Aug 15 05:33:38 PM PDT 24 |
| Peak memory | 215840 kb |
| Host | smart-cd5541f9-9ef6-4582-b2de-ea43c1b9ba2b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1940971402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.1940971402 |
| Directory | /workspace/42.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_stall.454640139 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 150945444 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:37 PM PDT 24 |
| Finished | Aug 15 05:33:38 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-a315881e-e3a7-4277-b777-4ce3bef46101 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45464 0139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_stall.454640139 |
| Directory | /workspace/42.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_trans.1161894777 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 171115381 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9f037c4d-4ca3-4d35-81ea-5cd7d18e8310 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11618 94777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_trans.1161894777 |
| Directory | /workspace/42.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_invalid_sync.435984687 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 5371569347 ps |
| CPU time | 51.93 seconds |
| Started | Aug 15 05:33:36 PM PDT 24 |
| Finished | Aug 15 05:34:28 PM PDT 24 |
| Peak memory | 224116 kb |
| Host | smart-61c98842-420d-45e5-a3ba-6ba906e02330 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=435984687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.435984687 |
| Directory | /workspace/42.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/42.usbdev_iso_retraction.3597166882 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 11005818037 ps |
| CPU time | 80.52 seconds |
| Started | Aug 15 05:33:34 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-dd745ccd-82c5-4330-be72-cdd0249d4173 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3597166882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.3597166882 |
| Directory | /workspace/42.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_in_err.2915523780 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 210847053 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-558b9f84-1e78-426d-ab2e-3ad0955122a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29155 23780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_in_err.2915523780 |
| Directory | /workspace/42.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_resume.2201106151 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 13986665134 ps |
| CPU time | 20.43 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:34:06 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-90feb396-1faf-43df-97b1-92c481466bf3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22011 06151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_resume.2201106151 |
| Directory | /workspace/42.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_suspend.2080082504 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 11308908554 ps |
| CPU time | 14.23 seconds |
| Started | Aug 15 05:33:36 PM PDT 24 |
| Finished | Aug 15 05:33:51 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-fd924811-9af7-4860-9abf-1af5f430e2d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20800 82504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_suspend.2080082504 |
| Directory | /workspace/42.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/42.usbdev_low_speed_traffic.2351484072 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 4954832257 ps |
| CPU time | 52.06 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:34:33 PM PDT 24 |
| Peak memory | 218896 kb |
| Host | smart-3028da4b-76a5-4c03-8a38-16bfc58b4ac4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2351484072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.2351484072 |
| Directory | /workspace/42.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_inter_pkt_delay.1113537375 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 2855427082 ps |
| CPU time | 28.41 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:34:14 PM PDT 24 |
| Peak memory | 217528 kb |
| Host | smart-bca7252e-56bc-4423-892f-644e777ac619 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1113537375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.1113537375 |
| Directory | /workspace/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_length_in_transaction.1161310631 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 242474441 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:33:48 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-8384a616-00b2-44a3-91b5-16d8b9ef6ddf |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1161310631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.1161310631 |
| Directory | /workspace/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_length_out_transaction.2449940201 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 198461651 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-2775d6d9-82fa-4f9a-8189-e4199a50711f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24499 40201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.2449940201 |
| Directory | /workspace/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_inter_pkt_delay.2358264188 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 3441936994 ps |
| CPU time | 27.36 seconds |
| Started | Aug 15 05:33:28 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 217684 kb |
| Host | smart-71cc68ee-c064-4f8f-b821-35441c46170e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2358264188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.2358264188 |
| Directory | /workspace/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_length_in_transaction.1384629621 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 177264202 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:27 PM PDT 24 |
| Finished | Aug 15 05:33:28 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-32c5651a-fcda-42fc-a86c-fa0116365cb1 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1384629621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.1384629621 |
| Directory | /workspace/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_length_out_transaction.972294770 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 143400248 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:33:48 PM PDT 24 |
| Finished | Aug 15 05:33:49 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-daee26c9-f408-434f-bbe0-2307d1e73316 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97229 4770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.972294770 |
| Directory | /workspace/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_nak_trans.134924603 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 183284290 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:48 PM PDT 24 |
| Finished | Aug 15 05:33:49 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-e46d5901-0f62-47c2-b88c-8e47ffe093ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13492 4603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_nak_trans.134924603 |
| Directory | /workspace/42.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_iso.4287780337 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 184684079 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-acc4f960-fc58-4190-851b-bdc2e8b123e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42877 80337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_iso.4287780337 |
| Directory | /workspace/42.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_stall.2784617414 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 172638510 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:32 PM PDT 24 |
| Finished | Aug 15 05:33:33 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-19279361-c3c8-425a-b643-70720361a3ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27846 17414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_stall.2784617414 |
| Directory | /workspace/42.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_trans_nak.2130862574 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 147638522 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:34 PM PDT 24 |
| Finished | Aug 15 05:33:35 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-b9769144-b53d-4ef3-921f-d4f75b660219 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21308 62574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_trans_nak.2130862574 |
| Directory | /workspace/42.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/42.usbdev_pending_in_trans.821542008 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 203281972 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:48 PM PDT 24 |
| Finished | Aug 15 05:33:49 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-e5f87cf2-f671-49ff-af8f-32e2086a6761 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82154 2008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pending_in_trans.821542008 |
| Directory | /workspace/42.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_config_pinflip.1454860591 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 185025974 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:32 PM PDT 24 |
| Finished | Aug 15 05:33:33 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-acbbc866-fcfa-4069-b17f-b2d992704b54 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1454860591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.1454860591 |
| Directory | /workspace/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_config_usb_ref_disable.3729396312 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 157056725 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-1f266e11-85f2-4d70-a2c8-e90311e0de73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37293 96312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.3729396312 |
| Directory | /workspace/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_pins_sense.1081637481 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 65445633 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:33:37 PM PDT 24 |
| Finished | Aug 15 05:33:38 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-eb272adb-5cfe-4e93-a3b3-6c7aa1402910 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10816 37481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.1081637481 |
| Directory | /workspace/42.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_buffer.2387416571 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 17521576378 ps |
| CPU time | 42.41 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-0850400e-0c04-4bc6-b024-9ab3e6c37a2b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23874 16571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_buffer.2387416571 |
| Directory | /workspace/42.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_received.211503046 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 148148096 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-af2bb208-d9da-4386-9c0d-059def6c99cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21150 3046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_received.211503046 |
| Directory | /workspace/42.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_sent.3583389662 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 173267300 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:43 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-3cfd1e9a-5378-47fc-8a83-541d8d97cbb8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35833 89662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_sent.3583389662 |
| Directory | /workspace/42.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/42.usbdev_random_length_in_transaction.1194294267 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 214677896 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:33:41 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-2652d874-8463-43a1-8f57-611d276d1199 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11942 94267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_in_transaction.1194294267 |
| Directory | /workspace/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_random_length_out_transaction.4063974635 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 174801405 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-41bc4039-9dec-4958-9516-8e5be37b060a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40639 74635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.4063974635 |
| Directory | /workspace/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_rx_crc_err.39612458 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 161459207 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:33:46 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-8a02c3ba-2f75-4ec0-a58a-a5f76bfdc4bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39612 458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_rx_crc_err.39612458 |
| Directory | /workspace/42.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_rx_full.3574095088 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 404013500 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:33:49 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a95c27cc-55ba-4cb0-a151-5b849c3107d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35740 95088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_rx_full.3574095088 |
| Directory | /workspace/42.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/42.usbdev_setup_stage.1634161101 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 170100458 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-3a2dc289-750d-4064-9649-74b2bdb82d7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16341 61101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_setup_stage.1634161101 |
| Directory | /workspace/42.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/42.usbdev_setup_trans_ignored.644618416 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 156534466 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-ed8d5b7b-45e2-45fc-8d90-587540ffca4f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64461 8416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_setup_trans_ignored.644618416 |
| Directory | /workspace/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/42.usbdev_smoke.1913841765 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 243217564 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:33:56 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-34c5bb9b-6e55-49e5-b09c-a3664bea533d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19138 41765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.1913841765 |
| Directory | /workspace/42.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/42.usbdev_spurious_pids_ignored.2457195058 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 1940401522 ps |
| CPU time | 19.23 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 217476 kb |
| Host | smart-6c525738-5ba5-415d-afa2-91a6f9189335 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2457195058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.2457195058 |
| Directory | /workspace/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/42.usbdev_stall_priority_over_nak.1520714536 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 162571577 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:49 PM PDT 24 |
| Finished | Aug 15 05:33:50 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ce469a28-4ea6-4ea6-9abe-a79e9fcbd404 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15207 14536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.1520714536 |
| Directory | /workspace/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/42.usbdev_stall_trans.32026597 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 184544888 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:33:41 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-aa9edce8-4787-4042-aa47-ce9622d5bea0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32026 597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_trans.32026597 |
| Directory | /workspace/42.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_stream_len_max.2134061080 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 926051924 ps |
| CPU time | 2.46 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:56 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-431bfd7f-e8d1-41fb-aae0-a263f10512b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21340 61080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.2134061080 |
| Directory | /workspace/42.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/42.usbdev_streaming_out.2488265187 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 3430731674 ps |
| CPU time | 34 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:34:28 PM PDT 24 |
| Peak memory | 217492 kb |
| Host | smart-79e19186-f448-4e5a-99ad-07eb864a4392 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24882 65187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_streaming_out.2488265187 |
| Directory | /workspace/42.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/42.usbdev_timeout_missing_host_handshake.2045282568 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 708336761 ps |
| CPU time | 15.45 seconds |
| Started | Aug 15 05:33:49 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-65ebf430-3616-467c-bdf1-e5e70d80cc23 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2045282568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_hos t_handshake.2045282568 |
| Directory | /workspace/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/42.usbdev_tx_rx_disruption.1160783252 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 538062463 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-61fd3000-860c-4f60-b627-1ed63d918395 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1160783252 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_tx_rx_disruption.1160783252 |
| Directory | /workspace/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/420.usbdev_tx_rx_disruption.2093869369 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 633767818 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:35:54 PM PDT 24 |
| Finished | Aug 15 05:35:56 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f6ef1dd3-6145-454b-bdd5-59e9395cb328 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2093869369 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 420.usbdev_tx_rx_disruption.2093869369 |
| Directory | /workspace/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/421.usbdev_tx_rx_disruption.608429737 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 541612617 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-25541b7e-4b51-4643-a402-2864873bc67a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=608429737 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 421.usbdev_tx_rx_disruption.608429737 |
| Directory | /workspace/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/422.usbdev_tx_rx_disruption.4280565273 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 591633992 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:36:14 PM PDT 24 |
| Finished | Aug 15 05:36:16 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b3a355f2-8e9f-4948-8f28-a075427bd050 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4280565273 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 422.usbdev_tx_rx_disruption.4280565273 |
| Directory | /workspace/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/423.usbdev_tx_rx_disruption.3585245267 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 521078315 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:35:49 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-f1fc9c60-626c-4418-9f17-a138ebad1621 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3585245267 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 423.usbdev_tx_rx_disruption.3585245267 |
| Directory | /workspace/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/424.usbdev_tx_rx_disruption.444219980 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 585821051 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d42c0bca-f413-4410-886d-bab099d4ed32 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=444219980 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 424.usbdev_tx_rx_disruption.444219980 |
| Directory | /workspace/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/425.usbdev_tx_rx_disruption.507956673 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 459853803 ps |
| CPU time | 1.43 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-09a0c622-56ef-413e-9705-6eecf09ec903 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=507956673 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 425.usbdev_tx_rx_disruption.507956673 |
| Directory | /workspace/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/426.usbdev_tx_rx_disruption.1123569026 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 490895550 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-c6850a97-b92d-4e7d-ab93-55aa41d6c13d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1123569026 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 426.usbdev_tx_rx_disruption.1123569026 |
| Directory | /workspace/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/427.usbdev_tx_rx_disruption.2204263356 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 506523109 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-e09fe5b6-e5de-4cbe-bda9-d0446e814a0a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2204263356 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 427.usbdev_tx_rx_disruption.2204263356 |
| Directory | /workspace/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/428.usbdev_tx_rx_disruption.3151200582 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 517268193 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-ea7c28b3-24c7-431e-9cea-0733c5a1f04c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3151200582 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 428.usbdev_tx_rx_disruption.3151200582 |
| Directory | /workspace/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/429.usbdev_tx_rx_disruption.342705599 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 518888398 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:36:10 PM PDT 24 |
| Finished | Aug 15 05:36:11 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-32a0e970-3409-4821-b02a-14a5d300aad8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=342705599 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 429.usbdev_tx_rx_disruption.342705599 |
| Directory | /workspace/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/43.usbdev_alert_test.3608718463 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 51595455 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-96d29d29-0483-4152-8f1b-415f94bbc860 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3608718463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.3608718463 |
| Directory | /workspace/43.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_disconnect.3385821675 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 10313789647 ps |
| CPU time | 12.28 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:33:56 PM PDT 24 |
| Peak memory | 207840 kb |
| Host | smart-e250ee07-c14c-4e90-a970-4e10f5d9dd70 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3385821675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_a on_wake_disconnect.3385821675 |
| Directory | /workspace/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_reset.3448801828 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 20247336785 ps |
| CPU time | 24.81 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:34:12 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-1c4e17c5-1005-4bf7-b801-5a443726ab98 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3448801828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.3448801828 |
| Directory | /workspace/43.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_resume.3262716211 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 23966074658 ps |
| CPU time | 31.61 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:34:24 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-71390546-c436-4630-b484-fbad8cf3bd8d |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3262716211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_a on_wake_resume.3262716211 |
| Directory | /workspace/43.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/43.usbdev_av_buffer.2083950309 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 184257794 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-e3183cfd-ac48-4dcc-9065-60fa50601664 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20839 50309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_av_buffer.2083950309 |
| Directory | /workspace/43.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/43.usbdev_bitstuff_err.421685313 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 213998184 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-0332e338-11c2-4123-867c-ca2043c7b6fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42168 5313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_bitstuff_err.421685313 |
| Directory | /workspace/43.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_data_toggle_clear.1709978672 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 510951840 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-ce18cd0d-fbb7-492b-8047-0c14d97ccb36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17099 78672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_clear.1709978672 |
| Directory | /workspace/43.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/43.usbdev_data_toggle_restore.4123756770 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 849552058 ps |
| CPU time | 2.34 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:33:53 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-2120dec1-db1c-4314-bf3d-5c6d4415f19f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4123756770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.4123756770 |
| Directory | /workspace/43.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/43.usbdev_device_address.405171109 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 12789260085 ps |
| CPU time | 21.34 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:34:07 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-58473cc0-c64e-4be6-b5a5-fb38baa319ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40517 1109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.405171109 |
| Directory | /workspace/43.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/43.usbdev_device_timeout.3602959095 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 734103133 ps |
| CPU time | 15.77 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:34:06 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-9859bb9d-7d7f-4681-b2b2-462c2e166f39 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3602959095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.3602959095 |
| Directory | /workspace/43.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/43.usbdev_disable_endpoint.69328035 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 719467481 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:33:49 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-343fe085-89aa-4f5b-ab72-bd9dc3a05e50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69328 035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_disable_endpoint.69328035 |
| Directory | /workspace/43.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/43.usbdev_disconnected.3865532678 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 142322075 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-16c8bfce-e589-4ff8-b74b-613cf20e4be8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38655 32678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_disconnected.3865532678 |
| Directory | /workspace/43.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/43.usbdev_enable.3370892047 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 49637192 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:33:46 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-37944d73-023a-4f0b-9270-c3b6318c588c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33708 92047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_enable.3370892047 |
| Directory | /workspace/43.usbdev_enable/latest |
| Test location | /workspace/coverage/default/43.usbdev_endpoint_access.451977249 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 857479758 ps |
| CPU time | 2.06 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:33:46 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-8261b20c-9e95-4f75-938e-e0fba7405443 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45197 7249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.451977249 |
| Directory | /workspace/43.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/43.usbdev_endpoint_types.2685466644 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 808052765 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-769c9165-ac49-4707-921d-b559ba3d74f3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2685466644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.2685466644 |
| Directory | /workspace/43.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/43.usbdev_fifo_rst.1991150828 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 275941179 ps |
| CPU time | 1.99 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-7c197ac8-d6ea-4d16-91cc-14446402ffc5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19911 50828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_fifo_rst.1991150828 |
| Directory | /workspace/43.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_iso.3348818186 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 283613560 ps |
| CPU time | 1.31 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:56 PM PDT 24 |
| Peak memory | 215908 kb |
| Host | smart-3d0c71dc-504f-422e-8c5f-f6b18494b16d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3348818186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.3348818186 |
| Directory | /workspace/43.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_stall.891915459 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 157326389 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:33:48 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-3cdb86d7-3b19-4ade-b2f4-f79091cbe80c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89191 5459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_stall.891915459 |
| Directory | /workspace/43.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_trans.318150270 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 202753448 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-afdd7038-61e7-4abf-be44-31eca4efc193 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31815 0270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_trans.318150270 |
| Directory | /workspace/43.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_invalid_sync.2635287851 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 3697686061 ps |
| CPU time | 105.91 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:35:40 PM PDT 24 |
| Peak memory | 224112 kb |
| Host | smart-4b673514-210c-4856-9efb-9d31b8b74889 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2635287851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.2635287851 |
| Directory | /workspace/43.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/43.usbdev_iso_retraction.2326732922 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 3676533501 ps |
| CPU time | 41.38 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:34:32 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-23a2a90a-0c56-455a-b50e-05d90c9f221a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2326732922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.2326732922 |
| Directory | /workspace/43.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_in_err.3058226997 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 224009078 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:33:46 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-9970c2b9-aa2d-4c4f-b609-6fa1b19e6318 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30582 26997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_in_err.3058226997 |
| Directory | /workspace/43.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_resume.2710042680 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 25403854383 ps |
| CPU time | 41.05 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:34:29 PM PDT 24 |
| Peak memory | 216120 kb |
| Host | smart-2561a959-a715-42b8-a185-f4674e0850ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27100 42680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_resume.2710042680 |
| Directory | /workspace/43.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_suspend.1348265880 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 8499451343 ps |
| CPU time | 12.76 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-f11de270-5ad5-4984-b3a5-43a4fa841d0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13482 65880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_suspend.1348265880 |
| Directory | /workspace/43.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/43.usbdev_low_speed_traffic.1480920894 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 2797421926 ps |
| CPU time | 29.7 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 224152 kb |
| Host | smart-97a14c1c-073c-475e-aa86-a4c686d21028 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1480920894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.1480920894 |
| Directory | /workspace/43.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_inter_pkt_delay.2401845352 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 2510793867 ps |
| CPU time | 20.56 seconds |
| Started | Aug 15 05:33:52 PM PDT 24 |
| Finished | Aug 15 05:34:13 PM PDT 24 |
| Peak memory | 217184 kb |
| Host | smart-de4c1451-a75d-4bc9-9282-c224c7ade961 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2401845352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.2401845352 |
| Directory | /workspace/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_length_in_transaction.2579278315 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 241419062 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:33:37 PM PDT 24 |
| Finished | Aug 15 05:33:38 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-12ccfd13-73be-4b0d-aabd-a892ec140fb6 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2579278315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.2579278315 |
| Directory | /workspace/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_length_out_transaction.2001522051 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 199054513 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:33:48 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-0ce30c09-eee0-4534-b05d-a3af0c3833f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20015 22051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.2001522051 |
| Directory | /workspace/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_inter_pkt_delay.2069847891 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 2260320531 ps |
| CPU time | 23.12 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:34:13 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-ed77c22f-1336-4626-a2de-f9fb37eae89b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2069847891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.2069847891 |
| Directory | /workspace/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_length_in_transaction.117441338 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 153818491 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:47 PM PDT 24 |
| Finished | Aug 15 05:33:48 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4331f633-85bd-4dce-b012-92b88428d1c2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=117441338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.117441338 |
| Directory | /workspace/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_length_out_transaction.844334511 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 173549135 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:48 PM PDT 24 |
| Finished | Aug 15 05:33:50 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-b50d05aa-bab7-41bb-a3c2-7a8323711020 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84433 4511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.844334511 |
| Directory | /workspace/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_nak_trans.724749426 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 210406251 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:33:40 PM PDT 24 |
| Finished | Aug 15 05:33:41 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-98e0901a-0033-4aad-a7ed-c88b1bc1f19d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72474 9426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_nak_trans.724749426 |
| Directory | /workspace/43.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_iso.1078428497 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 167920347 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-3edc9f2a-5bff-4a19-af4c-68ec028ec7ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10784 28497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_iso.1078428497 |
| Directory | /workspace/43.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_stall.4200089293 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 190825916 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-f491aef8-6578-4958-be37-d5a8d843cd55 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42000 89293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_stall.4200089293 |
| Directory | /workspace/43.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_trans_nak.2643140617 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 182959619 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:41 PM PDT 24 |
| Finished | Aug 15 05:33:42 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-6d935f86-5ef1-4d31-ba0d-7129a16238ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26431 40617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_trans_nak.2643140617 |
| Directory | /workspace/43.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/43.usbdev_pending_in_trans.3675085385 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 146230756 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c431cc95-ed8b-48db-874f-1f42e0905e96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36750 85385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pending_in_trans.3675085385 |
| Directory | /workspace/43.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_config_pinflip.1140122168 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 225557980 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-383d593c-c6fb-492c-8013-682e534ef1a0 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1140122168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.1140122168 |
| Directory | /workspace/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_config_usb_ref_disable.2175119815 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 170116577 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-448c8265-20e7-49e7-806a-24c31e2d7c6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21751 19815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.2175119815 |
| Directory | /workspace/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_pins_sense.1341373018 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 70505119 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:33:43 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-10ef9b85-ab74-4292-99f7-0ebb3ca09b52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13413 73018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.1341373018 |
| Directory | /workspace/43.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_buffer.1842312093 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 12317154640 ps |
| CPU time | 31.26 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:34:29 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-756d315c-4372-4187-9490-a35b1fe29719 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18423 12093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_buffer.1842312093 |
| Directory | /workspace/43.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_received.1319599184 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 180287507 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:33:51 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-76fa6621-1c46-49e4-97cf-14cfcf16d782 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13195 99184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_received.1319599184 |
| Directory | /workspace/43.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_sent.2711375842 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 230837756 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:45 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-bebc13be-4c60-4b40-b4d2-20e7925f3c8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27113 75842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_sent.2711375842 |
| Directory | /workspace/43.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/43.usbdev_random_length_in_transaction.3605602337 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 203379540 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:48 PM PDT 24 |
| Finished | Aug 15 05:33:49 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-53da55c9-9bf3-4fff-9345-214ed0851a79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36056 02337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_in_transaction.3605602337 |
| Directory | /workspace/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_random_length_out_transaction.4224966679 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 198034034 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:43 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-d506c2b0-23d3-4cbc-a63b-476bea0609a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42249 66679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.4224966679 |
| Directory | /workspace/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_rx_crc_err.2081387178 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 224316356 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:33:46 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-77f17da3-140c-4e4a-af7d-460317b19d9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20813 87178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_rx_crc_err.2081387178 |
| Directory | /workspace/43.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_rx_full.625050698 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 313184560 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:33:52 PM PDT 24 |
| Finished | Aug 15 05:33:53 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-6c07d009-1394-4ccf-821d-12af70a936b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62505 0698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_rx_full.625050698 |
| Directory | /workspace/43.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/43.usbdev_setup_stage.3940825378 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 181485791 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-1a8fa774-a7b7-4037-97d9-00553307e86a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39408 25378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_setup_stage.3940825378 |
| Directory | /workspace/43.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/43.usbdev_setup_trans_ignored.3905474269 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 156466484 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-c1717099-c10a-4a94-ab13-7cb551202dc6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39054 74269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_setup_trans_ignored.3905474269 |
| Directory | /workspace/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/43.usbdev_smoke.2402958886 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 309509681 ps |
| CPU time | 1.15 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-41036ae7-dae0-486a-ab2f-e7ea56ace7d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24029 58886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.2402958886 |
| Directory | /workspace/43.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/43.usbdev_spurious_pids_ignored.3611819167 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 1980038177 ps |
| CPU time | 53.55 seconds |
| Started | Aug 15 05:33:49 PM PDT 24 |
| Finished | Aug 15 05:34:43 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-ec661122-06ca-4bf8-871e-9af524d5701e |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3611819167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.3611819167 |
| Directory | /workspace/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/43.usbdev_stall_priority_over_nak.4224873324 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 209723897 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-e290c756-41d1-43d5-952f-d97ed29aff73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42248 73324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.4224873324 |
| Directory | /workspace/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/43.usbdev_stall_trans.764752887 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 149547815 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:34:00 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-5a8994b6-85fa-49b1-b27f-232ccb6cbb47 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76475 2887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_trans.764752887 |
| Directory | /workspace/43.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_stream_len_max.708380421 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 560474723 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-7a12611a-c48f-414b-b534-544656fb01d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70838 0421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.708380421 |
| Directory | /workspace/43.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/43.usbdev_streaming_out.4007209158 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 3135884000 ps |
| CPU time | 25.35 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:34:20 PM PDT 24 |
| Peak memory | 217856 kb |
| Host | smart-8f766fe2-901d-4b26-b27b-2a8618b9fa35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40072 09158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_streaming_out.4007209158 |
| Directory | /workspace/43.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/43.usbdev_timeout_missing_host_handshake.2860652293 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 1357639686 ps |
| CPU time | 9.82 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-80eaf0da-230c-4a68-a79d-2487e39425ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2860652293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_hos t_handshake.2860652293 |
| Directory | /workspace/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/43.usbdev_tx_rx_disruption.2877523886 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 536673155 ps |
| CPU time | 1.8 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:44 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-c55eb02b-8ed8-4e25-a532-96f537a44ad7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2877523886 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_tx_rx_disruption.2877523886 |
| Directory | /workspace/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/430.usbdev_tx_rx_disruption.3448201823 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 641576624 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:36:08 PM PDT 24 |
| Finished | Aug 15 05:36:10 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-45aa8d80-64fa-4054-9571-588bb8a2fbab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3448201823 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 430.usbdev_tx_rx_disruption.3448201823 |
| Directory | /workspace/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/431.usbdev_tx_rx_disruption.4219712110 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 531641810 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:35:49 PM PDT 24 |
| Finished | Aug 15 05:35:50 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d1eaf1ce-1678-442f-af25-66cf76dcdc0e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4219712110 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 431.usbdev_tx_rx_disruption.4219712110 |
| Directory | /workspace/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/432.usbdev_tx_rx_disruption.157896868 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 502221669 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:35:55 PM PDT 24 |
| Finished | Aug 15 05:35:57 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6299ff25-5e95-40e3-8406-6ab3ac57ba5d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=157896868 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 432.usbdev_tx_rx_disruption.157896868 |
| Directory | /workspace/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/433.usbdev_tx_rx_disruption.3657699780 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 595269693 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:36:12 PM PDT 24 |
| Finished | Aug 15 05:36:14 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-3b9c6815-ae8d-445d-9f82-bc348634f523 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3657699780 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 433.usbdev_tx_rx_disruption.3657699780 |
| Directory | /workspace/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/434.usbdev_tx_rx_disruption.3042308201 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 597100479 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-c8470d92-cce8-4263-b949-24483d6d2c0c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3042308201 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 434.usbdev_tx_rx_disruption.3042308201 |
| Directory | /workspace/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/435.usbdev_tx_rx_disruption.2411910234 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 483308701 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:36:01 PM PDT 24 |
| Finished | Aug 15 05:36:02 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-ddb71a80-1d7a-4786-876c-b9966a56a1aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2411910234 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 435.usbdev_tx_rx_disruption.2411910234 |
| Directory | /workspace/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/436.usbdev_tx_rx_disruption.2887139666 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 502626856 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:36:12 PM PDT 24 |
| Finished | Aug 15 05:36:13 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-90709b2a-6c21-4482-8858-04eb0d034c34 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2887139666 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 436.usbdev_tx_rx_disruption.2887139666 |
| Directory | /workspace/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/437.usbdev_tx_rx_disruption.3563887574 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 565636710 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:50 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-3dcd0002-9e8a-4068-b870-668380ada30b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3563887574 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 437.usbdev_tx_rx_disruption.3563887574 |
| Directory | /workspace/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/438.usbdev_tx_rx_disruption.2620379004 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 645183390 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:35:41 PM PDT 24 |
| Finished | Aug 15 05:35:43 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-7164f606-af49-488e-a16e-e65e9b09c3e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2620379004 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 438.usbdev_tx_rx_disruption.2620379004 |
| Directory | /workspace/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/439.usbdev_tx_rx_disruption.2479596391 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 466517380 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:36:13 PM PDT 24 |
| Finished | Aug 15 05:36:15 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-302f3504-9f7c-4b9f-bc3f-e2c95e4a33d1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2479596391 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 439.usbdev_tx_rx_disruption.2479596391 |
| Directory | /workspace/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/44.usbdev_alert_test.211963767 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 41864439 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:00 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-ea82c95a-14ab-4ad5-bf68-d511cf2a9eea |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=211963767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.211963767 |
| Directory | /workspace/44.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_disconnect.662744335 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 4127420435 ps |
| CPU time | 6.55 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:10 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-33ac4a6f-98a9-4dd2-b363-65528f39c42c |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=662744335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_ao n_wake_disconnect.662744335 |
| Directory | /workspace/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_reset.100065028 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 20889618496 ps |
| CPU time | 28.57 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:34:24 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-20034f3c-4243-47ed-b0ca-47dd2479b770 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=100065028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.100065028 |
| Directory | /workspace/44.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_resume.1549754083 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 29697932806 ps |
| CPU time | 36.76 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-18e9a6c8-e0b6-4f47-8bb1-2a42f4536158 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1549754083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_a on_wake_resume.1549754083 |
| Directory | /workspace/44.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/44.usbdev_av_buffer.1357727590 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 150837089 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-136092a3-e08f-4a52-99aa-28d2655c404f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13577 27590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_av_buffer.1357727590 |
| Directory | /workspace/44.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/44.usbdev_bitstuff_err.4283968624 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 146182878 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-6ca20402-16c1-47fd-aecb-5375adb2bbbe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42839 68624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_bitstuff_err.4283968624 |
| Directory | /workspace/44.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_data_toggle_clear.4136074158 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 209891476 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:00 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-89a5279b-598e-43aa-97b3-81a5e85173c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41360 74158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_clear.4136074158 |
| Directory | /workspace/44.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/44.usbdev_data_toggle_restore.4060623879 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 762693553 ps |
| CPU time | 2.22 seconds |
| Started | Aug 15 05:33:43 PM PDT 24 |
| Finished | Aug 15 05:33:46 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-a7bffb57-3902-4963-a43a-45930126dc55 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4060623879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.4060623879 |
| Directory | /workspace/44.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/44.usbdev_device_address.2308961472 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 45712758708 ps |
| CPU time | 79.58 seconds |
| Started | Aug 15 05:33:46 PM PDT 24 |
| Finished | Aug 15 05:35:05 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-804c88ff-d432-4bd3-b4e6-271d1f833862 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23089 61472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.2308961472 |
| Directory | /workspace/44.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/44.usbdev_device_timeout.3702533117 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 1458355938 ps |
| CPU time | 34.33 seconds |
| Started | Aug 15 05:33:52 PM PDT 24 |
| Finished | Aug 15 05:34:27 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-a49cb8aa-790d-47d9-adad-936eb4f6245b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3702533117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.3702533117 |
| Directory | /workspace/44.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/44.usbdev_disable_endpoint.1190107931 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 955946901 ps |
| CPU time | 2.34 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:12 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-1db678e4-782c-41ca-b864-5ba1d3acf9d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11901 07931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_disable_endpoint.1190107931 |
| Directory | /workspace/44.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/44.usbdev_disconnected.2692110013 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 137764570 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:03 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e4230660-709c-4a8f-a9ef-435d56694669 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26921 10013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_disconnected.2692110013 |
| Directory | /workspace/44.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/44.usbdev_enable.1561563833 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 47190162 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-b422a443-65fe-4c9c-9f20-dd47a2cb464b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15615 63833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_enable.1561563833 |
| Directory | /workspace/44.usbdev_enable/latest |
| Test location | /workspace/coverage/default/44.usbdev_endpoint_access.1716587162 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 998907509 ps |
| CPU time | 2.64 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:06 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-41b300cb-0e3d-471b-9813-efec8b5fc196 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17165 87162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.1716587162 |
| Directory | /workspace/44.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/44.usbdev_fifo_rst.3026971435 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 331446604 ps |
| CPU time | 2.43 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:05 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-dd4c752e-13e7-4a22-ae99-36ab40e4cb8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30269 71435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_fifo_rst.3026971435 |
| Directory | /workspace/44.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_iso.2689265997 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 170344280 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:34:06 PM PDT 24 |
| Finished | Aug 15 05:34:07 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-2bb9163c-9fdf-4990-8f43-e627aab17607 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2689265997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.2689265997 |
| Directory | /workspace/44.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_stall.645586565 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 147694467 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-4bc068d3-af8f-48b7-b8ee-211d2feb4278 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64558 6565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_stall.645586565 |
| Directory | /workspace/44.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_trans.3871674379 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 202765395 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-39c9a217-c8c9-45c3-9e7e-b4ad4546c5e8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38716 74379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_trans.3871674379 |
| Directory | /workspace/44.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_invalid_sync.665398142 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 5002322861 ps |
| CPU time | 50.13 seconds |
| Started | Aug 15 05:34:11 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 217872 kb |
| Host | smart-6c01fd2a-59e0-4632-9bca-da17f811217d |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=665398142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.665398142 |
| Directory | /workspace/44.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/44.usbdev_iso_retraction.140919648 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 5907548601 ps |
| CPU time | 69.86 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-71bc3ee9-f387-409e-8e21-17c7d2a44e2e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=140919648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.140919648 |
| Directory | /workspace/44.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_in_err.1789651660 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 219662334 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:33:45 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-74cff52b-4ed4-4190-98e9-a9a84bb7926d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17896 51660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_in_err.1789651660 |
| Directory | /workspace/44.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_resume.172277952 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 32813408300 ps |
| CPU time | 47.96 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:34:41 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-5346ab00-473f-4201-b246-5b35cd7a3c3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17227 7952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_resume.172277952 |
| Directory | /workspace/44.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_suspend.305679130 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 9507981388 ps |
| CPU time | 15.09 seconds |
| Started | Aug 15 05:33:49 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-df51b2af-e5fd-4c49-89e3-c588cf6e8b70 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30567 9130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_suspend.305679130 |
| Directory | /workspace/44.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/44.usbdev_low_speed_traffic.357321896 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 4326792667 ps |
| CPU time | 44.97 seconds |
| Started | Aug 15 05:34:11 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-3faa540e-52d9-4539-9ac7-12aadbe65199 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=357321896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.357321896 |
| Directory | /workspace/44.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_inter_pkt_delay.3252382805 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 2673450867 ps |
| CPU time | 27.15 seconds |
| Started | Aug 15 05:33:49 PM PDT 24 |
| Finished | Aug 15 05:34:16 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-b3e4efe7-482b-4772-8937-344c3df7c35f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3252382805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.3252382805 |
| Directory | /workspace/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_length_in_transaction.1869465760 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 259648182 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-3943559c-3012-4304-b4f9-1c2f454fc862 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1869465760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.1869465760 |
| Directory | /workspace/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_length_out_transaction.3248681922 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 187936200 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-dd46c991-a465-40ce-b3f9-d2af445f65ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32486 81922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.3248681922 |
| Directory | /workspace/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_inter_pkt_delay.3863530383 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 2464649542 ps |
| CPU time | 18.14 seconds |
| Started | Aug 15 05:33:44 PM PDT 24 |
| Finished | Aug 15 05:34:03 PM PDT 24 |
| Peak memory | 224020 kb |
| Host | smart-c5b0eef2-d84a-4645-a8e0-f7d1bc700c04 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3863530383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.3863530383 |
| Directory | /workspace/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_length_in_transaction.745689004 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 160572297 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:34:07 PM PDT 24 |
| Finished | Aug 15 05:34:08 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-866542a0-427c-4174-957c-ca2a5b702bac |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=745689004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.745689004 |
| Directory | /workspace/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_length_out_transaction.2450517484 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 144217419 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-de89a54c-96ed-4c0d-8d70-8b2f4c5a2a6a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24505 17484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.2450517484 |
| Directory | /workspace/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_iso.2795470096 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 183319223 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-cf53c7c1-c03d-49a2-8ba7-1caa7fb6facc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27954 70096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_iso.2795470096 |
| Directory | /workspace/44.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_stall.3160251384 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 153331528 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-815c74d6-be11-4e1e-a8e9-7059b2b2900c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31602 51384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_stall.3160251384 |
| Directory | /workspace/44.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_trans_nak.1637876833 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 246530092 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:33:52 PM PDT 24 |
| Finished | Aug 15 05:33:53 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-369a7e33-490a-4947-80be-ab2899cb8978 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16378 76833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_trans_nak.1637876833 |
| Directory | /workspace/44.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/44.usbdev_pending_in_trans.968133439 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 180323559 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-2b952abe-b19d-4243-bee4-8247c0976a14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96813 3439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pending_in_trans.968133439 |
| Directory | /workspace/44.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_config_pinflip.163124982 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 246467931 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:56 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-b4ec1445-b9c6-4441-ad77-8dd3f1877e4f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=163124982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.163124982 |
| Directory | /workspace/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_config_usb_ref_disable.1054456493 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 143404552 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:33:50 PM PDT 24 |
| Finished | Aug 15 05:33:51 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-66c8d3f1-8877-41f1-94df-0843417640ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10544 56493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.1054456493 |
| Directory | /workspace/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_pins_sense.3239436986 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 35194648 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-2d81c33d-951b-4022-832d-d0a6496d974d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32394 36986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.3239436986 |
| Directory | /workspace/44.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_buffer.3550849212 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 8041669325 ps |
| CPU time | 21.16 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:34:16 PM PDT 24 |
| Peak memory | 220524 kb |
| Host | smart-932dd534-279a-49c7-8cca-303702c8b751 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35508 49212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_buffer.3550849212 |
| Directory | /workspace/44.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_received.4058511606 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 186322523 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-7efbea16-b857-4608-af14-9563f67edb17 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40585 11606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_received.4058511606 |
| Directory | /workspace/44.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_sent.3659472564 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 275531589 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-93d2642f-8d2f-4896-a275-1d2e8a128cf3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36594 72564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_sent.3659472564 |
| Directory | /workspace/44.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/44.usbdev_random_length_in_transaction.324402126 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 191304628 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:46 PM PDT 24 |
| Finished | Aug 15 05:33:47 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-275dc5f1-afd3-43ab-b2ae-6967df00c029 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32440 2126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_in_transaction.324402126 |
| Directory | /workspace/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_random_length_out_transaction.2340537886 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 214894386 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-da3fca40-23c1-49e9-a08a-32fcf61efa80 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23405 37886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.2340537886 |
| Directory | /workspace/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_rx_crc_err.1049587635 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 190845809 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-e4d44f1b-0006-496c-9e57-8fa225f0c063 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10495 87635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_rx_crc_err.1049587635 |
| Directory | /workspace/44.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_rx_full.2758114934 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 363681297 ps |
| CPU time | 1.25 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-655752bb-2dd0-4706-95ac-428c8f5519b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27581 14934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_rx_full.2758114934 |
| Directory | /workspace/44.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/44.usbdev_setup_stage.1906321107 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 148888488 ps |
| CPU time | 0.79 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-1895a605-cebb-4857-8090-6e1f4efb6c78 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19063 21107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_setup_stage.1906321107 |
| Directory | /workspace/44.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/44.usbdev_setup_trans_ignored.1152339440 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 162258250 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:00 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-aaa42c51-afcc-484c-8004-b71ffd5901dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11523 39440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_setup_trans_ignored.1152339440 |
| Directory | /workspace/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/44.usbdev_smoke.1316507233 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 242212978 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-f18440b2-c699-4c0e-b9b0-d25d9d5867df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13165 07233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.1316507233 |
| Directory | /workspace/44.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/44.usbdev_spurious_pids_ignored.231964340 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 3012812651 ps |
| CPU time | 22.94 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:34:18 PM PDT 24 |
| Peak memory | 217776 kb |
| Host | smart-2549dd7b-2aef-4aef-bfc6-6b84fb76a8e1 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=231964340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.231964340 |
| Directory | /workspace/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/44.usbdev_stall_priority_over_nak.2101675193 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 154677685 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:33:42 PM PDT 24 |
| Finished | Aug 15 05:33:43 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-4e471bcd-00c4-4bba-a3da-fbf78085e09a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21016 75193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2101675193 |
| Directory | /workspace/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/44.usbdev_stall_trans.2510946569 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 212067709 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-daa2411f-183b-40ea-a34c-df4d041ae3f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25109 46569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_trans.2510946569 |
| Directory | /workspace/44.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_stream_len_max.2321394139 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 811557045 ps |
| CPU time | 2.21 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-04268bd3-1bdf-44b1-bfcc-349ad6e94ab1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23213 94139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.2321394139 |
| Directory | /workspace/44.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/44.usbdev_streaming_out.447115690 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 3688437026 ps |
| CPU time | 38.01 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 217564 kb |
| Host | smart-7ab76467-e5cc-46f5-8691-31f4a0ccabc9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44711 5690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_streaming_out.447115690 |
| Directory | /workspace/44.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/44.usbdev_timeout_missing_host_handshake.1943325749 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 1106341039 ps |
| CPU time | 9.27 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-451e37ba-ef54-4802-92cf-a09abcd8b74a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1943325749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_hos t_handshake.1943325749 |
| Directory | /workspace/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/44.usbdev_tx_rx_disruption.4012273210 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 613116608 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:34:11 PM PDT 24 |
| Finished | Aug 15 05:34:13 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b1861052-3d33-437e-932d-f1546886b66c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4012273210 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_tx_rx_disruption.4012273210 |
| Directory | /workspace/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/440.usbdev_tx_rx_disruption.3632921592 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 559575961 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:48 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-29b013a0-1e4c-48c8-9c1d-e05ad6496506 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3632921592 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 440.usbdev_tx_rx_disruption.3632921592 |
| Directory | /workspace/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/441.usbdev_tx_rx_disruption.2330343236 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 500696266 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-e625d53e-d562-4853-a35e-4d9737c4fc91 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2330343236 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 441.usbdev_tx_rx_disruption.2330343236 |
| Directory | /workspace/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/442.usbdev_tx_rx_disruption.921012542 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 597978786 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:36:03 PM PDT 24 |
| Finished | Aug 15 05:36:05 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-d88bea5e-2f3c-40d3-9a97-36016cd1aba1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=921012542 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 442.usbdev_tx_rx_disruption.921012542 |
| Directory | /workspace/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/443.usbdev_tx_rx_disruption.1583184226 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 703083755 ps |
| CPU time | 1.83 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-cb205abe-944b-4e94-94f0-0f7f776e170e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1583184226 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 443.usbdev_tx_rx_disruption.1583184226 |
| Directory | /workspace/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/444.usbdev_tx_rx_disruption.3652959868 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 469289691 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:36:13 PM PDT 24 |
| Finished | Aug 15 05:36:15 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-abd4b7ea-34ea-41c5-a0df-ec8116bdfd8d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3652959868 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 444.usbdev_tx_rx_disruption.3652959868 |
| Directory | /workspace/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/445.usbdev_tx_rx_disruption.803259209 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 476431187 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:44 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-14ca637a-bd9d-48d8-9a9c-770c1d93e738 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=803259209 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 445.usbdev_tx_rx_disruption.803259209 |
| Directory | /workspace/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/446.usbdev_tx_rx_disruption.1206310326 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 623338062 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-572e5fc4-837d-4037-b579-f0489e1ae6a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1206310326 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 446.usbdev_tx_rx_disruption.1206310326 |
| Directory | /workspace/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/447.usbdev_tx_rx_disruption.1169921203 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 543231498 ps |
| CPU time | 1.49 seconds |
| Started | Aug 15 05:35:48 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-4ae97920-a9e5-4c37-ab1f-58b0b571b492 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1169921203 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 447.usbdev_tx_rx_disruption.1169921203 |
| Directory | /workspace/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/449.usbdev_tx_rx_disruption.1388121675 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 636088021 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b9730172-49ff-4608-b0b0-73d2eb896c2a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1388121675 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 449.usbdev_tx_rx_disruption.1388121675 |
| Directory | /workspace/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/45.usbdev_alert_test.898319217 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 74132900 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:34:17 PM PDT 24 |
| Finished | Aug 15 05:34:18 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-044ea23c-fe4f-4128-9f7f-a1c805f3e7f0 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=898319217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.898319217 |
| Directory | /workspace/45.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_disconnect.1862054205 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 4360927694 ps |
| CPU time | 6.47 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-b776d2e6-19b2-4b26-8dd3-c4c26a48f3fb |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1862054205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_a on_wake_disconnect.1862054205 |
| Directory | /workspace/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_reset.118104730 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 18900589319 ps |
| CPU time | 21.79 seconds |
| Started | Aug 15 05:34:11 PM PDT 24 |
| Finished | Aug 15 05:34:34 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-e8bb3654-fe3e-4076-abbe-843e5eb5d9f5 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=118104730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.118104730 |
| Directory | /workspace/45.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_resume.2016322600 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 24826671803 ps |
| CPU time | 31.26 seconds |
| Started | Aug 15 05:34:04 PM PDT 24 |
| Finished | Aug 15 05:34:35 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-91684f35-9d26-4541-aae6-44da103eb270 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2016322600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_a on_wake_resume.2016322600 |
| Directory | /workspace/45.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/45.usbdev_av_buffer.1031525962 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 190085045 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:11 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-41ea5d6c-f72d-4714-a67e-eaed49fee8bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10315 25962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_av_buffer.1031525962 |
| Directory | /workspace/45.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/45.usbdev_bitstuff_err.352112467 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 149218469 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-cb8b2edc-de41-4d22-bb5d-0994bebe5cde |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35211 2467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_bitstuff_err.352112467 |
| Directory | /workspace/45.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_data_toggle_clear.2368808152 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 623753157 ps |
| CPU time | 1.94 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-7ba588dd-86ae-4d7a-a1ff-07161fc2d393 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23688 08152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_clear.2368808152 |
| Directory | /workspace/45.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/45.usbdev_data_toggle_restore.1901220846 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 332273080 ps |
| CPU time | 1.23 seconds |
| Started | Aug 15 05:34:25 PM PDT 24 |
| Finished | Aug 15 05:34:26 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-2614cf68-2a31-4dbe-8ecf-34babc1d2474 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1901220846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.1901220846 |
| Directory | /workspace/45.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/45.usbdev_device_address.3765477296 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 21300168642 ps |
| CPU time | 32.5 seconds |
| Started | Aug 15 05:34:00 PM PDT 24 |
| Finished | Aug 15 05:34:33 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-2cd11d93-96f0-41d6-a748-03e60d6bf38b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37654 77296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.3765477296 |
| Directory | /workspace/45.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/45.usbdev_device_timeout.3849770542 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 2195929846 ps |
| CPU time | 14.41 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:34:12 PM PDT 24 |
| Peak memory | 207848 kb |
| Host | smart-7cb75ea3-a85b-415e-b09d-66004620187a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3849770542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.3849770542 |
| Directory | /workspace/45.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/45.usbdev_disable_endpoint.3835066028 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 594217364 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:34:00 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-a4a5115f-20f3-446c-a5f2-118ccb4147b7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38350 66028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disable_endpoint.3835066028 |
| Directory | /workspace/45.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/45.usbdev_disconnected.4257586270 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 170868324 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a462e951-0b43-4570-950c-2a03d0bb4364 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42575 86270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disconnected.4257586270 |
| Directory | /workspace/45.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/45.usbdev_enable.1779040098 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 103041715 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-a80b22b2-2246-43c1-ae28-bdd60ff5e121 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17790 40098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_enable.1779040098 |
| Directory | /workspace/45.usbdev_enable/latest |
| Test location | /workspace/coverage/default/45.usbdev_endpoint_access.1068202242 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 1006801661 ps |
| CPU time | 2.97 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-3b66aee6-c6c6-443c-810e-93c011a3e7cf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10682 02242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.1068202242 |
| Directory | /workspace/45.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/45.usbdev_endpoint_types.3370559086 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 489163403 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:14 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5cc0908b-b4fe-4b72-a596-a4ae2bc6a74f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3370559086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.3370559086 |
| Directory | /workspace/45.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/45.usbdev_fifo_rst.4172189653 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 188551023 ps |
| CPU time | 2.57 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-2755e1e0-87e2-46f2-aca9-aaaed75bca87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41721 89653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_fifo_rst.4172189653 |
| Directory | /workspace/45.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_iso.3380448987 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 168701731 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:33:55 PM PDT 24 |
| Finished | Aug 15 05:33:56 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9146a51c-674c-4c65-a29e-7de576d03963 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3380448987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.3380448987 |
| Directory | /workspace/45.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_stall.2927327078 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 147564785 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-fb2b4557-1ced-4154-bb06-b53b2af141f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29273 27078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_stall.2927327078 |
| Directory | /workspace/45.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_trans.2587785538 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 243487103 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-fbaca858-ba4a-4607-b76c-922db0854295 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25877 85538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_trans.2587785538 |
| Directory | /workspace/45.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_invalid_sync.2210538701 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 2575722891 ps |
| CPU time | 74.73 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:35:16 PM PDT 24 |
| Peak memory | 224088 kb |
| Host | smart-789da3d1-b97b-4cb9-abd4-611733dc10a2 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2210538701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.2210538701 |
| Directory | /workspace/45.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/45.usbdev_iso_retraction.2191507189 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 4959994386 ps |
| CPU time | 33.44 seconds |
| Started | Aug 15 05:34:07 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-26d3b096-04dc-4b6f-97f2-f65a77d9ef82 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2191507189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.2191507189 |
| Directory | /workspace/45.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_in_err.4190864059 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 188981101 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c65c2f09-fc12-4fd5-ae69-7829ea0629d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41908 64059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_in_err.4190864059 |
| Directory | /workspace/45.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_resume.4153770293 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 13302854727 ps |
| CPU time | 18.58 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:20 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-675c71e3-7e61-4f7a-aa6d-89113556eb6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41537 70293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_resume.4153770293 |
| Directory | /workspace/45.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_suspend.2009239815 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 5122780848 ps |
| CPU time | 6.84 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 216096 kb |
| Host | smart-b4da718c-a2c2-41b9-93ee-503c7990373a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20092 39815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_suspend.2009239815 |
| Directory | /workspace/45.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/45.usbdev_low_speed_traffic.4037005354 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 2912831906 ps |
| CPU time | 30.69 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:34:28 PM PDT 24 |
| Peak memory | 224204 kb |
| Host | smart-0d6d4bb5-4f16-4eb8-b4bb-0b2ebe406f94 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4037005354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.4037005354 |
| Directory | /workspace/45.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_inter_pkt_delay.4056794848 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 3844893643 ps |
| CPU time | 113.86 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:35:53 PM PDT 24 |
| Peak memory | 217284 kb |
| Host | smart-194cf1ef-c6d8-4eb9-8714-191dd6eb66b3 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4056794848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.4056794848 |
| Directory | /workspace/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_length_in_transaction.979785380 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 236290232 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:33:53 PM PDT 24 |
| Finished | Aug 15 05:33:54 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b30f46bb-d8a5-4446-978a-5c4f9d98a07b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=979785380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.979785380 |
| Directory | /workspace/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_length_out_transaction.672439694 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 194566531 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-2459fe45-a8ed-4b28-869c-2b064449efdb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67243 9694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.672439694 |
| Directory | /workspace/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_inter_pkt_delay.1050979018 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 3458792630 ps |
| CPU time | 35.53 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:34:30 PM PDT 24 |
| Peak memory | 217628 kb |
| Host | smart-a0c20078-65eb-4f11-a04b-6fa612d0619d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1050979018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.1050979018 |
| Directory | /workspace/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_length_in_transaction.458545639 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 176701818 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:13 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-56e3518d-2b18-48d1-8d47-48ca73dbe15f |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=458545639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.458545639 |
| Directory | /workspace/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_length_out_transaction.2942848876 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 142145262 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bb9c43d1-f9f1-4069-a76a-60aa6b1b1fe2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29428 48876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.2942848876 |
| Directory | /workspace/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_nak_trans.2475133088 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 234876702 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:10 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-c2545ca7-09ba-4825-ae5c-70345f136d5d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24751 33088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_nak_trans.2475133088 |
| Directory | /workspace/45.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_iso.960199323 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 188542675 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:00 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-fe4da39b-a3b9-40e6-ba36-e29f5b375fdb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96019 9323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_iso.960199323 |
| Directory | /workspace/45.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_stall.3844862265 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 157021214 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:52 PM PDT 24 |
| Finished | Aug 15 05:33:53 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-153e4567-0bd1-4f48-a849-eb9e1dffad16 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38448 62265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_stall.3844862265 |
| Directory | /workspace/45.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_trans_nak.1701921158 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 188939906 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-99d379f0-4cf8-4b87-8638-bb5ff6c73651 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17019 21158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_trans_nak.1701921158 |
| Directory | /workspace/45.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/45.usbdev_pending_in_trans.1580780723 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 145650799 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-9378737d-122f-406f-9dca-908ed6dd814e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15807 80723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pending_in_trans.1580780723 |
| Directory | /workspace/45.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_config_pinflip.951847669 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 192921391 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:15 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-53454086-d5ca-4fc0-a79d-7747648d03de |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=951847669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.951847669 |
| Directory | /workspace/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_config_usb_ref_disable.4182318852 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 145850775 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-24ebe16b-2870-4697-beba-2581d127b53c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41823 18852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.4182318852 |
| Directory | /workspace/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_pins_sense.786488405 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 33340323 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-28aeb203-e79d-4aff-b49b-bef44ddfe618 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78648 8405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.786488405 |
| Directory | /workspace/45.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_buffer.1621712516 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 10465293827 ps |
| CPU time | 25.88 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:29 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-400a135e-2148-4fea-a351-c9040c040b96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16217 12516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_buffer.1621712516 |
| Directory | /workspace/45.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_received.965263925 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 159140963 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:16 PM PDT 24 |
| Finished | Aug 15 05:34:17 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f4190d86-e043-4daa-aa48-1abd23a45a0d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96526 3925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_received.965263925 |
| Directory | /workspace/45.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_sent.1658750901 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 209899338 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:33:58 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-ac3bdd92-99c4-4aa0-91d0-a11bf647231c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16587 50901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_sent.1658750901 |
| Directory | /workspace/45.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/45.usbdev_random_length_in_transaction.1781715041 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 230482301 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:34:20 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-36d32d4f-3e12-4ee7-a974-88ea2cab96b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17817 15041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_in_transaction.1781715041 |
| Directory | /workspace/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_random_length_out_transaction.740359210 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 200254680 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:05 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-7e55fec8-4ac5-4dd7-a230-207c537196d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74035 9210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.740359210 |
| Directory | /workspace/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_rx_crc_err.3766116398 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 147766346 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:10 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4849bc41-1f43-4bf6-a350-ea9cb12eed90 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37661 16398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_rx_crc_err.3766116398 |
| Directory | /workspace/45.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_rx_full.3760543242 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 330616788 ps |
| CPU time | 1.31 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:11 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-efec935b-1441-4eab-bf72-3c2079fd3f9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37605 43242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_rx_full.3760543242 |
| Directory | /workspace/45.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/45.usbdev_setup_stage.349518317 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 183723564 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:21 PM PDT 24 |
| Finished | Aug 15 05:34:22 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-6770e87c-3fd7-47bd-8cfb-50afb98fa076 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34951 8317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_setup_stage.349518317 |
| Directory | /workspace/45.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/45.usbdev_setup_trans_ignored.3630052919 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 181403159 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:33:57 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-35d01d85-9432-46f6-a931-7c57d0f3120e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36300 52919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_setup_trans_ignored.3630052919 |
| Directory | /workspace/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/45.usbdev_smoke.563684694 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 220341540 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-fd78666e-fc8e-4de4-b232-29ec34a598a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56368 4694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.563684694 |
| Directory | /workspace/45.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/45.usbdev_spurious_pids_ignored.1165869233 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 2198741704 ps |
| CPU time | 22.03 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 223988 kb |
| Host | smart-3a0d1de1-b238-43cc-8312-fc7ff2ef443e |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1165869233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.1165869233 |
| Directory | /workspace/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/45.usbdev_stall_priority_over_nak.184223155 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 198030860 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-872826fd-5717-42e6-919a-34e3aa47ef36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18422 3155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.184223155 |
| Directory | /workspace/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/45.usbdev_stall_trans.3230620169 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 215163173 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:00 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-0ec7d3ca-9da8-43a2-980c-e544cffe87ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32306 20169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_trans.3230620169 |
| Directory | /workspace/45.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_stream_len_max.3171573376 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 844416532 ps |
| CPU time | 2.24 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:33:59 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-39c2b670-693c-410b-ad98-a918e51dcbda |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31715 73376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.3171573376 |
| Directory | /workspace/45.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/45.usbdev_streaming_out.2264535263 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 2394353061 ps |
| CPU time | 18.5 seconds |
| Started | Aug 15 05:34:22 PM PDT 24 |
| Finished | Aug 15 05:34:41 PM PDT 24 |
| Peak memory | 217760 kb |
| Host | smart-7ef98350-9fdf-46c9-8144-24ba622c0816 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22645 35263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_streaming_out.2264535263 |
| Directory | /workspace/45.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/45.usbdev_timeout_missing_host_handshake.792658444 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 2222332200 ps |
| CPU time | 13.93 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-96b9b8f6-46b8-49ee-a4d5-0f2b718b60f0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=792658444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host _handshake.792658444 |
| Directory | /workspace/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/45.usbdev_tx_rx_disruption.3805160768 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 441829636 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:34:05 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-0ff4d587-3b02-409b-82db-f5577ecf1bf4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3805160768 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_tx_rx_disruption.3805160768 |
| Directory | /workspace/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/450.usbdev_tx_rx_disruption.2648340408 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 488858766 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:35:50 PM PDT 24 |
| Finished | Aug 15 05:35:52 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-4a2472f5-6f07-4783-8682-5d89ee341c47 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2648340408 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 450.usbdev_tx_rx_disruption.2648340408 |
| Directory | /workspace/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/451.usbdev_tx_rx_disruption.1458293642 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 422502131 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-2fdf078a-05bd-411b-a6f0-027b3e64cdc5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1458293642 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 451.usbdev_tx_rx_disruption.1458293642 |
| Directory | /workspace/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/452.usbdev_tx_rx_disruption.4058964908 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 490594289 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:36:24 PM PDT 24 |
| Finished | Aug 15 05:36:25 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-5b8b072a-0c99-430a-a6f0-435048dfafca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4058964908 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 452.usbdev_tx_rx_disruption.4058964908 |
| Directory | /workspace/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/453.usbdev_tx_rx_disruption.3482109580 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 538151333 ps |
| CPU time | 1.72 seconds |
| Started | Aug 15 05:35:59 PM PDT 24 |
| Finished | Aug 15 05:36:01 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-046fb758-c877-4915-8927-595a014ee1b9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3482109580 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 453.usbdev_tx_rx_disruption.3482109580 |
| Directory | /workspace/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/454.usbdev_tx_rx_disruption.1260827229 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 540001088 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:35:48 PM PDT 24 |
| Finished | Aug 15 05:35:50 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-fc42abec-1f15-4909-b40b-c458c905bb09 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1260827229 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 454.usbdev_tx_rx_disruption.1260827229 |
| Directory | /workspace/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/455.usbdev_tx_rx_disruption.276267104 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 562864988 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:50 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-1ba4b1a3-6c24-4bed-b155-5dfe89e8cd84 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=276267104 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 455.usbdev_tx_rx_disruption.276267104 |
| Directory | /workspace/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/456.usbdev_tx_rx_disruption.1664086165 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 613666288 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:36:11 PM PDT 24 |
| Finished | Aug 15 05:36:12 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-8fce6a75-ee6d-427b-b166-d8364cb07b87 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1664086165 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 456.usbdev_tx_rx_disruption.1664086165 |
| Directory | /workspace/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/457.usbdev_tx_rx_disruption.2618397040 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 560919470 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:35:58 PM PDT 24 |
| Finished | Aug 15 05:36:00 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-ffaa2c4b-9255-4a61-a6d5-5a54162733c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2618397040 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 457.usbdev_tx_rx_disruption.2618397040 |
| Directory | /workspace/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/458.usbdev_tx_rx_disruption.2498769276 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 516168703 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:35:45 PM PDT 24 |
| Finished | Aug 15 05:35:47 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-469c8a86-647a-43c8-99de-b5a6d73f9c14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2498769276 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 458.usbdev_tx_rx_disruption.2498769276 |
| Directory | /workspace/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/459.usbdev_tx_rx_disruption.3551932766 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 465931690 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:36:16 PM PDT 24 |
| Finished | Aug 15 05:36:17 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d25b7280-1b62-4a42-8117-3fcfc4420f8b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3551932766 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 459.usbdev_tx_rx_disruption.3551932766 |
| Directory | /workspace/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/46.usbdev_alert_test.2665791354 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 53662056 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207276 kb |
| Host | smart-2f05df9f-4673-4ff8-a7ae-8fa6e087e52b |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2665791354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.2665791354 |
| Directory | /workspace/46.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_disconnect.821142378 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 5343672200 ps |
| CPU time | 7.42 seconds |
| Started | Aug 15 05:34:16 PM PDT 24 |
| Finished | Aug 15 05:34:23 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-a98e5e98-1601-4c0f-835a-08eea8629bf0 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=821142378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_ao n_wake_disconnect.821142378 |
| Directory | /workspace/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_reset.1146418686 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 14544384089 ps |
| CPU time | 16.57 seconds |
| Started | Aug 15 05:34:04 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-e329defa-8a11-4800-8529-ef414023a85f |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1146418686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.1146418686 |
| Directory | /workspace/46.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_resume.1534395798 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 30078401284 ps |
| CPU time | 38.92 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-9b99166a-d2e9-467c-b4b2-befbbd6768bb |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1534395798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_a on_wake_resume.1534395798 |
| Directory | /workspace/46.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/46.usbdev_av_buffer.3454295434 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 157396772 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:07 PM PDT 24 |
| Finished | Aug 15 05:34:08 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-ae0144e1-4a7c-4a74-85b5-b2c33e0305f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34542 95434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_av_buffer.3454295434 |
| Directory | /workspace/46.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/46.usbdev_bitstuff_err.775165047 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 147356474 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:34:17 PM PDT 24 |
| Finished | Aug 15 05:34:18 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-ffe97e19-7955-40d5-b677-903ec6933496 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77516 5047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_bitstuff_err.775165047 |
| Directory | /workspace/46.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_data_toggle_clear.994933936 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 302145134 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-7f0f686a-514c-40c1-878f-4ce6169cb3fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99493 3936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_clear.994933936 |
| Directory | /workspace/46.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/46.usbdev_data_toggle_restore.3071672164 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 344053659 ps |
| CPU time | 1.19 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:14 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-afa5b165-d506-4c6b-a09f-7432a3d887cf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3071672164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.3071672164 |
| Directory | /workspace/46.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/46.usbdev_device_address.3852966603 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 26184868862 ps |
| CPU time | 43.29 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:46 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-45cbcd96-848a-4d93-9031-a0c939c4dedd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38529 66603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.3852966603 |
| Directory | /workspace/46.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/46.usbdev_device_timeout.3636161086 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 3886983358 ps |
| CPU time | 34.5 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:34 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-b617c693-917e-4e41-a0c5-60f3827dbda1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3636161086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.3636161086 |
| Directory | /workspace/46.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/46.usbdev_disable_endpoint.1954179650 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 1008492975 ps |
| CPU time | 2.14 seconds |
| Started | Aug 15 05:34:00 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-484c22c6-aa75-4a66-b8bd-da545deb18a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19541 79650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disable_endpoint.1954179650 |
| Directory | /workspace/46.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/46.usbdev_disconnected.190239366 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 133160237 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-e01e58c6-7d8c-48e6-9cbb-8eb34128f627 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19023 9366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disconnected.190239366 |
| Directory | /workspace/46.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/46.usbdev_enable.1420066800 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 109269823 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:33:51 PM PDT 24 |
| Finished | Aug 15 05:33:52 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-8d1b2fd5-6ee3-42da-b978-e0b3d9359ae5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14200 66800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_enable.1420066800 |
| Directory | /workspace/46.usbdev_enable/latest |
| Test location | /workspace/coverage/default/46.usbdev_endpoint_access.3892221622 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 897328011 ps |
| CPU time | 2.43 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:04 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-467c7af9-3d97-47ee-b9a5-dd44339f8328 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38922 21622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.3892221622 |
| Directory | /workspace/46.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/46.usbdev_endpoint_types.2905866711 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 175905704 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:34:15 PM PDT 24 |
| Finished | Aug 15 05:34:16 PM PDT 24 |
| Peak memory | 207164 kb |
| Host | smart-3f8af38c-4d66-44c0-9b77-4c624bfd3c44 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2905866711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.2905866711 |
| Directory | /workspace/46.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/46.usbdev_fifo_rst.3133234805 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 182693415 ps |
| CPU time | 2.07 seconds |
| Started | Aug 15 05:34:23 PM PDT 24 |
| Finished | Aug 15 05:34:25 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-c8920c62-6b97-4252-8c6c-65d478514180 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31332 34805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_fifo_rst.3133234805 |
| Directory | /workspace/46.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_iso.234188700 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 179727814 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:34:24 PM PDT 24 |
| Finished | Aug 15 05:34:26 PM PDT 24 |
| Peak memory | 215816 kb |
| Host | smart-f65b3d5c-e3d3-4d8d-bdec-7bc399c0dfbe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=234188700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.234188700 |
| Directory | /workspace/46.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_stall.3282164480 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 141117263 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:10 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-61ea54c6-a02f-4a88-b8d2-b5ed8937dd5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32821 64480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_stall.3282164480 |
| Directory | /workspace/46.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_trans.1390152635 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 250760867 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:11 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-bda05be8-056d-437b-8fbf-88e118bcef35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13901 52635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_trans.1390152635 |
| Directory | /workspace/46.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_invalid_sync.3979819078 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 3355598044 ps |
| CPU time | 32.56 seconds |
| Started | Aug 15 05:34:22 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 218200 kb |
| Host | smart-41f0d0a2-3ac3-4e0b-b520-233d483e6368 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3979819078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.3979819078 |
| Directory | /workspace/46.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/46.usbdev_iso_retraction.1784602692 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 9428363443 ps |
| CPU time | 64.14 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:35:09 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-c3b0515d-4607-4a66-bd22-4863d0e9e3c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1784602692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.1784602692 |
| Directory | /workspace/46.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_in_err.2546933181 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 194290195 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-1fadc3e5-d1cf-438b-a424-4f8078f76435 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25469 33181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_in_err.2546933181 |
| Directory | /workspace/46.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_resume.1446737119 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 7486777247 ps |
| CPU time | 12.22 seconds |
| Started | Aug 15 05:34:16 PM PDT 24 |
| Finished | Aug 15 05:34:28 PM PDT 24 |
| Peak memory | 216136 kb |
| Host | smart-92df7c0c-541f-4619-9167-b25fde5573ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14467 37119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_resume.1446737119 |
| Directory | /workspace/46.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_suspend.2483559956 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 9795056510 ps |
| CPU time | 12.59 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:15 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-9cb83328-147f-4325-8096-c5e000892b2c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24835 59956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_suspend.2483559956 |
| Directory | /workspace/46.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/46.usbdev_low_speed_traffic.3413698793 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 3906735352 ps |
| CPU time | 112.5 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 218396 kb |
| Host | smart-b3630c99-e5b0-4e7f-b8a1-080856336ba0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3413698793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.3413698793 |
| Directory | /workspace/46.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_inter_pkt_delay.3002634229 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 2267854783 ps |
| CPU time | 17.3 seconds |
| Started | Aug 15 05:34:14 PM PDT 24 |
| Finished | Aug 15 05:34:32 PM PDT 24 |
| Peak memory | 216992 kb |
| Host | smart-91a87ec6-cdf6-41d5-bd14-ed998797db33 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3002634229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.3002634229 |
| Directory | /workspace/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_length_in_transaction.2975042487 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 242344838 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:34:16 PM PDT 24 |
| Finished | Aug 15 05:34:17 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f972d354-6f87-40fe-8cd6-3d98ca3ef4dc |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2975042487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.2975042487 |
| Directory | /workspace/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_length_out_transaction.337928987 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 191963148 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:04 PM PDT 24 |
| Finished | Aug 15 05:34:10 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-1b3cacc7-d009-4562-ab0e-35b17c8b0ddb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33792 8987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.337928987 |
| Directory | /workspace/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_inter_pkt_delay.2755038571 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 3155644362 ps |
| CPU time | 25.92 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:25 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-beea7f66-31fc-41c0-885f-3b44baeee5f3 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2755038571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.2755038571 |
| Directory | /workspace/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_length_in_transaction.3741657022 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 159446329 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:25 PM PDT 24 |
| Finished | Aug 15 05:34:26 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-9158c14a-456a-494b-bcc4-c76cc5e1e1e4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3741657022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.3741657022 |
| Directory | /workspace/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_length_out_transaction.4174769190 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 185861181 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:03 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-6dbbb575-7772-4f48-916b-2d272851e55c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41747 69190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.4174769190 |
| Directory | /workspace/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_nak_trans.1287284065 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 220030069 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:34:15 PM PDT 24 |
| Finished | Aug 15 05:34:16 PM PDT 24 |
| Peak memory | 207188 kb |
| Host | smart-96c824d7-4a9d-465a-94bf-06c20a2ddb70 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12872 84065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_nak_trans.1287284065 |
| Directory | /workspace/46.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_iso.3858058895 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 191258034 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:21 PM PDT 24 |
| Finished | Aug 15 05:34:22 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-fac20a7b-6ddd-4c51-9f64-8b7efa661010 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38580 58895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_iso.3858058895 |
| Directory | /workspace/46.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_stall.273374727 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 171600974 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:34:06 PM PDT 24 |
| Finished | Aug 15 05:34:07 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-778d159c-0e90-45c7-b1ae-f714cc1b7b66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27337 4727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_stall.273374727 |
| Directory | /workspace/46.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_trans_nak.2087823932 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 197598315 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:14 PM PDT 24 |
| Finished | Aug 15 05:34:15 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-59e0dc18-eaff-4adb-8b67-fbc92bb3b9c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20878 23932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_trans_nak.2087823932 |
| Directory | /workspace/46.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/46.usbdev_pending_in_trans.730694067 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 148532193 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:33:54 PM PDT 24 |
| Finished | Aug 15 05:33:55 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-dcc19eb3-e0bf-486c-a82b-1019845b2025 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73069 4067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pending_in_trans.730694067 |
| Directory | /workspace/46.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_config_pinflip.2473438897 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 237784697 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:34:06 PM PDT 24 |
| Finished | Aug 15 05:34:08 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-6552447a-a5e0-4e5b-af4f-ba72083e6b3e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2473438897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.2473438897 |
| Directory | /workspace/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_config_usb_ref_disable.1473604557 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 140042406 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:23 PM PDT 24 |
| Finished | Aug 15 05:34:24 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-19ea97e7-5ce6-4150-98de-594617da86d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14736 04557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.1473604557 |
| Directory | /workspace/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_pins_sense.1977500428 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 83411177 ps |
| CPU time | 0.77 seconds |
| Started | Aug 15 05:34:16 PM PDT 24 |
| Finished | Aug 15 05:34:17 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-afa29d7e-5e5b-4672-a83a-16ae89ce101f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19775 00428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.1977500428 |
| Directory | /workspace/46.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_buffer.2317994574 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 24049609780 ps |
| CPU time | 62.54 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:35:04 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-9f9d1a63-9e22-4c88-b841-3bd0de87c7ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23179 94574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_buffer.2317994574 |
| Directory | /workspace/46.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_received.2859786831 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 194924456 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:20 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d6ed05df-087a-43d6-a501-e974753a9ad0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28597 86831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_received.2859786831 |
| Directory | /workspace/46.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_sent.2293788040 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 178378138 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:17 PM PDT 24 |
| Finished | Aug 15 05:34:18 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-d4a81608-ec45-44d8-b505-64a1f3cb75a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22937 88040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_sent.2293788040 |
| Directory | /workspace/46.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/46.usbdev_random_length_in_transaction.1004873612 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 244864770 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:34:18 PM PDT 24 |
| Finished | Aug 15 05:34:19 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6dde12bc-cc13-41dc-8613-40de7b36a8c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10048 73612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_in_transaction.1004873612 |
| Directory | /workspace/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_random_length_out_transaction.2876090319 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 184102411 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:34:00 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-82e954d1-7515-4872-8c91-c600d491f947 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28760 90319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.2876090319 |
| Directory | /workspace/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_rx_crc_err.2589800943 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 168788648 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:34:23 PM PDT 24 |
| Finished | Aug 15 05:34:25 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-ff9d4119-5786-4046-a941-d7a778d3c528 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25898 00943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_rx_crc_err.2589800943 |
| Directory | /workspace/46.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_rx_full.4149906556 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 358226673 ps |
| CPU time | 1.36 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6bacd0fb-7d61-4450-9fcf-a3b62cdc834a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41499 06556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_rx_full.4149906556 |
| Directory | /workspace/46.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/46.usbdev_setup_stage.2237835334 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 158010082 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:34:19 PM PDT 24 |
| Finished | Aug 15 05:34:20 PM PDT 24 |
| Peak memory | 207336 kb |
| Host | smart-cea77ccf-b9ac-4e89-ba51-5516d7e2a1d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22378 35334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_setup_stage.2237835334 |
| Directory | /workspace/46.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/46.usbdev_setup_trans_ignored.1052540544 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 162125532 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-a4d635f6-7267-410e-8c9b-0576f7dab3d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10525 40544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_setup_trans_ignored.1052540544 |
| Directory | /workspace/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/46.usbdev_smoke.1430891455 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 185263520 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:44 PM PDT 24 |
| Finished | Aug 15 05:34:45 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-4823f716-c539-4acc-a7ff-6e3ecaf1ebe3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14308 91455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.1430891455 |
| Directory | /workspace/46.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/46.usbdev_spurious_pids_ignored.2254717762 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 1674117202 ps |
| CPU time | 44.56 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 217408 kb |
| Host | smart-fe2c5a02-c8e9-434d-8e8f-d8c9fc141de4 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2254717762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.2254717762 |
| Directory | /workspace/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/46.usbdev_stall_priority_over_nak.4020720935 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 239218877 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:00 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-7b2bffe2-f9cc-4949-b4db-75c240f23f30 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40207 20935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.4020720935 |
| Directory | /workspace/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/46.usbdev_stall_trans.1972283561 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 188229556 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:03 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-82c5bebe-096c-4885-ab3e-89e042aea5f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19722 83561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_trans.1972283561 |
| Directory | /workspace/46.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_stream_len_max.67909581 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 1261625317 ps |
| CPU time | 2.88 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-654f6b8f-b556-4c68-b04d-f7345ac95523 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67909 581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.67909581 |
| Directory | /workspace/46.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/46.usbdev_streaming_out.1080110368 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 2624251775 ps |
| CPU time | 72.82 seconds |
| Started | Aug 15 05:34:11 PM PDT 24 |
| Finished | Aug 15 05:35:24 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-bebd8b14-d9f2-4b75-9baa-e6da611fc487 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10801 10368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_streaming_out.1080110368 |
| Directory | /workspace/46.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/46.usbdev_timeout_missing_host_handshake.1611981751 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 3663845180 ps |
| CPU time | 25.99 seconds |
| Started | Aug 15 05:34:19 PM PDT 24 |
| Finished | Aug 15 05:34:45 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-db05d08c-ff7b-48ea-bbe7-2b77fe1a9c2e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1611981751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_hos t_handshake.1611981751 |
| Directory | /workspace/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/46.usbdev_tx_rx_disruption.647638594 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 571914405 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:14 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-19160940-9c4d-43db-a152-13cff409b8aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=647638594 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 46.usbdev_tx_rx_disruption.647638594 |
| Directory | /workspace/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/460.usbdev_tx_rx_disruption.2770552571 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 568296487 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:36:06 PM PDT 24 |
| Finished | Aug 15 05:36:08 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-fff1a308-d2fe-442c-ae2b-104ed68006b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2770552571 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 460.usbdev_tx_rx_disruption.2770552571 |
| Directory | /workspace/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/461.usbdev_tx_rx_disruption.1326476014 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 547542442 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:36:12 PM PDT 24 |
| Finished | Aug 15 05:36:14 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-e86b9956-4129-477e-aa51-e5df2c8109e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1326476014 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 461.usbdev_tx_rx_disruption.1326476014 |
| Directory | /workspace/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/462.usbdev_tx_rx_disruption.1894020081 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 509709926 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:36:03 PM PDT 24 |
| Finished | Aug 15 05:36:04 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-5eedceaf-412b-428a-bff6-2aa54d28de19 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1894020081 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 462.usbdev_tx_rx_disruption.1894020081 |
| Directory | /workspace/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/463.usbdev_tx_rx_disruption.3779184989 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 619215698 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:36:13 PM PDT 24 |
| Finished | Aug 15 05:36:15 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-fed74583-77fa-4e53-a618-3cbeaed3e85a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3779184989 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 463.usbdev_tx_rx_disruption.3779184989 |
| Directory | /workspace/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/464.usbdev_tx_rx_disruption.2052794627 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 530493247 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:49 PM PDT 24 |
| Finished | Aug 15 05:35:50 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-7a97ff3d-f2d7-4a53-a13f-1efb53748c6e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2052794627 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 464.usbdev_tx_rx_disruption.2052794627 |
| Directory | /workspace/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/465.usbdev_tx_rx_disruption.2832206336 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 646661275 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:36:12 PM PDT 24 |
| Finished | Aug 15 05:36:14 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-325bfe60-326f-4fac-8152-938a1091b89c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2832206336 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 465.usbdev_tx_rx_disruption.2832206336 |
| Directory | /workspace/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/466.usbdev_tx_rx_disruption.4110352417 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 482069003 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:35:57 PM PDT 24 |
| Finished | Aug 15 05:35:59 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-4a2a4d17-8854-4609-9c45-770ee0158e90 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4110352417 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 466.usbdev_tx_rx_disruption.4110352417 |
| Directory | /workspace/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/467.usbdev_tx_rx_disruption.1928761274 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 610026373 ps |
| CPU time | 1.83 seconds |
| Started | Aug 15 05:36:21 PM PDT 24 |
| Finished | Aug 15 05:36:23 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-e3d51cca-f3ff-42b8-8d4b-e54af9ece123 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1928761274 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 467.usbdev_tx_rx_disruption.1928761274 |
| Directory | /workspace/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/468.usbdev_tx_rx_disruption.856867387 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 465147910 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:46 PM PDT 24 |
| Finished | Aug 15 05:35:48 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-b907d17b-fa58-41fb-9244-6be3bd7b39d4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=856867387 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 468.usbdev_tx_rx_disruption.856867387 |
| Directory | /workspace/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/469.usbdev_tx_rx_disruption.1870405153 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 531308415 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:51 PM PDT 24 |
| Finished | Aug 15 05:35:53 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-a6c8ce26-c0d8-4bb7-a235-0b67ba454ef5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1870405153 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 469.usbdev_tx_rx_disruption.1870405153 |
| Directory | /workspace/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/47.usbdev_alert_test.1518662246 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 38307543 ps |
| CPU time | 0.67 seconds |
| Started | Aug 15 05:34:08 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-83e8e633-85af-4c1a-93bc-36a3e0af353f |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1518662246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.1518662246 |
| Directory | /workspace/47.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_disconnect.644154441 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 9453845206 ps |
| CPU time | 12.81 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:12 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-1752ce01-ea06-4f40-a4ed-69d9a15776a7 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=644154441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_ao n_wake_disconnect.644154441 |
| Directory | /workspace/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_reset.37460390 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 20591832813 ps |
| CPU time | 26.27 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:29 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-fd3dd1fd-3fb9-4c1b-ab1f-c3f4f2269a7c |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=37460390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.37460390 |
| Directory | /workspace/47.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_resume.1165629952 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 25243522842 ps |
| CPU time | 34.66 seconds |
| Started | Aug 15 05:33:56 PM PDT 24 |
| Finished | Aug 15 05:34:31 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-e3b0ef47-9732-42f5-bb1d-cefc3204055b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1165629952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_a on_wake_resume.1165629952 |
| Directory | /workspace/47.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/47.usbdev_av_buffer.1021565931 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 164114357 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:34:20 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-3f154d19-e553-4c95-9ba7-a55a27f1e74b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10215 65931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_av_buffer.1021565931 |
| Directory | /workspace/47.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/47.usbdev_bitstuff_err.570433693 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 148642417 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:03 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-03b322f8-8fc1-42a9-bd47-b94f4d90e130 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57043 3693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_bitstuff_err.570433693 |
| Directory | /workspace/47.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_data_toggle_clear.3765410431 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 385991560 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:34:00 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-077908f0-9b72-4dda-9ff2-fa1a942384c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37654 10431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_clear.3765410431 |
| Directory | /workspace/47.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/47.usbdev_data_toggle_restore.1616442862 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 513239822 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:34:03 PM PDT 24 |
| Finished | Aug 15 05:34:05 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-8d2e5b05-51ef-4f95-95bf-e728ab857aa2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1616442862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.1616442862 |
| Directory | /workspace/47.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/47.usbdev_device_address.48469056 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 13362561955 ps |
| CPU time | 23.37 seconds |
| Started | Aug 15 05:34:16 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-6f003cfe-4b66-43da-b4c3-3db54fce6058 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48469 056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.48469056 |
| Directory | /workspace/47.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/47.usbdev_device_timeout.2119021556 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 1375107746 ps |
| CPU time | 32.85 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:34 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-30486ac4-480f-44cd-9787-0cc2dc572aab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2119021556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.2119021556 |
| Directory | /workspace/47.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/47.usbdev_disable_endpoint.2339144559 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 893381675 ps |
| CPU time | 2.18 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-8b691769-5b8f-486e-ac9f-619545534ae1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23391 44559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_disable_endpoint.2339144559 |
| Directory | /workspace/47.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/47.usbdev_disconnected.4163103194 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 162829705 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:33:59 PM PDT 24 |
| Finished | Aug 15 05:34:00 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-bd3bf3c9-3000-4ed6-acce-417cd71b5902 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41631 03194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_disconnected.4163103194 |
| Directory | /workspace/47.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/47.usbdev_enable.1107339099 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 65213890 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 05:34:17 PM PDT 24 |
| Finished | Aug 15 05:34:18 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-1fce4a10-8f0d-4184-a7dc-0ea3aa4c1eb2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11073 39099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_enable.1107339099 |
| Directory | /workspace/47.usbdev_enable/latest |
| Test location | /workspace/coverage/default/47.usbdev_endpoint_access.4265062882 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 1013767040 ps |
| CPU time | 2.6 seconds |
| Started | Aug 15 05:34:25 PM PDT 24 |
| Finished | Aug 15 05:34:28 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-08ae285b-ae99-4019-9b08-027707e6e039 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42650 62882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.4265062882 |
| Directory | /workspace/47.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/47.usbdev_endpoint_types.3042302060 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 336527803 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:34:00 PM PDT 24 |
| Finished | Aug 15 05:34:06 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-158cb85b-1540-4018-9b4e-3ef593b4c571 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3042302060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.3042302060 |
| Directory | /workspace/47.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/47.usbdev_fifo_rst.3815683031 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 320572618 ps |
| CPU time | 2.8 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:16 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-1082378b-75b5-4c33-a7c9-b56546e292fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38156 83031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_fifo_rst.3815683031 |
| Directory | /workspace/47.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_iso.3156348450 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 224987561 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:11 PM PDT 24 |
| Peak memory | 215816 kb |
| Host | smart-fa993ba7-eb10-484b-ac6b-4d7c2d0d930a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3156348450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.3156348450 |
| Directory | /workspace/47.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_stall.3930883863 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 151147375 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-f10acc47-3e23-4678-8130-ce67c1c67c6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39308 83863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_stall.3930883863 |
| Directory | /workspace/47.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_trans.4081970305 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 243539941 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:34:01 PM PDT 24 |
| Finished | Aug 15 05:34:02 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-dd701a14-0b0c-4886-b8dc-fd34d3b7e4ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40819 70305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_trans.4081970305 |
| Directory | /workspace/47.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_invalid_sync.3407775408 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 4125117074 ps |
| CPU time | 31.25 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:34 PM PDT 24 |
| Peak memory | 218268 kb |
| Host | smart-230b2a79-2373-4a4f-ad5f-855dd77354e2 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3407775408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.3407775408 |
| Directory | /workspace/47.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_in_err.2218483610 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 195264613 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:00 PM PDT 24 |
| Finished | Aug 15 05:34:01 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-037890c8-e6fc-40d7-b174-b03a49c4ddea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22184 83610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_in_err.2218483610 |
| Directory | /workspace/47.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_resume.3932530816 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 11674016676 ps |
| CPU time | 16.2 seconds |
| Started | Aug 15 05:33:57 PM PDT 24 |
| Finished | Aug 15 05:34:13 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-61029844-5df4-440b-9eac-2367ee39b2af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39325 30816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_resume.3932530816 |
| Directory | /workspace/47.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_suspend.124869499 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 4783561369 ps |
| CPU time | 6.92 seconds |
| Started | Aug 15 05:34:14 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-e30b08c5-f5f3-49a4-acac-033b6569a703 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12486 9499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_suspend.124869499 |
| Directory | /workspace/47.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/47.usbdev_low_speed_traffic.333635565 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 3015720564 ps |
| CPU time | 23.87 seconds |
| Started | Aug 15 05:34:31 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 219060 kb |
| Host | smart-6cb6cc83-5768-4a8a-8778-2be88f480fbd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=333635565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.333635565 |
| Directory | /workspace/47.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_inter_pkt_delay.3936469600 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 4217561832 ps |
| CPU time | 33.3 seconds |
| Started | Aug 15 05:34:02 PM PDT 24 |
| Finished | Aug 15 05:34:35 PM PDT 24 |
| Peak memory | 217576 kb |
| Host | smart-7c663c75-11bb-49bd-a6d4-1d7a4431456b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3936469600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.3936469600 |
| Directory | /workspace/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_length_in_transaction.656274020 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 241820508 ps |
| CPU time | 1.08 seconds |
| Started | Aug 15 05:34:10 PM PDT 24 |
| Finished | Aug 15 05:34:11 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-80efcbed-b1f4-4360-98c3-f78d8c782d85 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=656274020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.656274020 |
| Directory | /workspace/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_length_out_transaction.4260665373 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 183316299 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:15 PM PDT 24 |
| Finished | Aug 15 05:34:16 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-543d92db-def5-4b5d-aad0-15b306068ca7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42606 65373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.4260665373 |
| Directory | /workspace/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_inter_pkt_delay.352492463 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 2493072784 ps |
| CPU time | 25.04 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 217504 kb |
| Host | smart-d041f425-ad63-44d3-8a9d-65cbe3979c9e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=352492463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.352492463 |
| Directory | /workspace/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_length_in_transaction.1067992956 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 160057215 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:34:08 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-cf62d72c-3e43-42bc-8b46-b60fc9e2cc53 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1067992956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.1067992956 |
| Directory | /workspace/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_length_out_transaction.1499947724 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 138939203 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:34:04 PM PDT 24 |
| Finished | Aug 15 05:34:05 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-bf05185b-88c9-46ea-b4e2-a6f2b13d9652 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14999 47724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.1499947724 |
| Directory | /workspace/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_nak_trans.2881744250 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 223908071 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:25 PM PDT 24 |
| Finished | Aug 15 05:34:26 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8952778d-afcc-43cc-a432-bbc099282ad5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28817 44250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_nak_trans.2881744250 |
| Directory | /workspace/47.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_iso.2656452014 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 155828522 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:21 PM PDT 24 |
| Finished | Aug 15 05:34:22 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-ec7a0651-e78d-40ab-96c0-5148d7f72684 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26564 52014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_iso.2656452014 |
| Directory | /workspace/47.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_stall.979373874 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 219702912 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:34:16 PM PDT 24 |
| Finished | Aug 15 05:34:17 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-e2785b08-53a2-493c-9d5f-f2e7feb9bc23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97937 3874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_stall.979373874 |
| Directory | /workspace/47.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_trans_nak.17855585 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 192253666 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:20 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-60430e56-50b6-4e12-879b-cd8a326ad0e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17855 585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_trans_nak.17855585 |
| Directory | /workspace/47.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/47.usbdev_pending_in_trans.2614871966 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 175229720 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:08 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-864380cc-532e-42f1-87ef-d185f96d69fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26148 71966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pending_in_trans.2614871966 |
| Directory | /workspace/47.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_config_pinflip.4158710223 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 223986918 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:34:39 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-763a8bdb-7156-4000-a88e-0240b6ae400f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4158710223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.4158710223 |
| Directory | /workspace/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_config_usb_ref_disable.1210200358 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 147554144 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:34:11 PM PDT 24 |
| Finished | Aug 15 05:34:12 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-03ced8a3-00fd-42a9-92bd-fe270f7f7ec8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12102 00358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.1210200358 |
| Directory | /workspace/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_pins_sense.988834574 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 107412060 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:34:31 PM PDT 24 |
| Finished | Aug 15 05:34:32 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-96deb9ca-3ae1-42d1-8405-4b30df76f327 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98883 4574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.988834574 |
| Directory | /workspace/47.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_buffer.2740223664 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 18233992410 ps |
| CPU time | 43.8 seconds |
| Started | Aug 15 05:34:33 PM PDT 24 |
| Finished | Aug 15 05:35:17 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-8380920f-ccfe-4eca-9677-909cbfe4ddf6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27402 23664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_buffer.2740223664 |
| Directory | /workspace/47.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_received.2236712557 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 161762951 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:14 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-2cdb8bb0-4d36-4dd7-8570-15a493254124 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22367 12557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_received.2236712557 |
| Directory | /workspace/47.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_sent.3692687631 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 223225230 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:09 PM PDT 24 |
| Finished | Aug 15 05:34:10 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8059f905-8950-4d0b-bc60-c8d9edf1ceac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36926 87631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_sent.3692687631 |
| Directory | /workspace/47.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/47.usbdev_random_length_in_transaction.3988571068 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 217837649 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:34:06 PM PDT 24 |
| Finished | Aug 15 05:34:07 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-95382409-bcec-4bf3-ac82-2b555c1888a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39885 71068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_in_transaction.3988571068 |
| Directory | /workspace/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_random_length_out_transaction.1854821631 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 183538482 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:28 PM PDT 24 |
| Finished | Aug 15 05:34:29 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-65963bd3-760b-437c-a8a1-d319e956ace5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18548 21631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.1854821631 |
| Directory | /workspace/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_rx_crc_err.2532988798 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 205656422 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:27 PM PDT 24 |
| Finished | Aug 15 05:34:28 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-2ca5d1ff-941b-47e0-83fc-85a45b898341 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25329 88798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_rx_crc_err.2532988798 |
| Directory | /workspace/47.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_rx_full.2780383296 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 252649314 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:34:27 PM PDT 24 |
| Finished | Aug 15 05:34:28 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b1447a05-3a46-454e-93e7-b0de44286065 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27803 83296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_rx_full.2780383296 |
| Directory | /workspace/47.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/47.usbdev_setup_stage.1039983691 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 145709941 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:34:20 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-d95b333a-c8ff-4c6d-bb65-966675e276ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10399 83691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_setup_stage.1039983691 |
| Directory | /workspace/47.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/47.usbdev_setup_trans_ignored.485637716 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 207717386 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:14 PM PDT 24 |
| Finished | Aug 15 05:34:20 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-84a3a0c5-2429-4a26-ada0-4561db1051e8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48563 7716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_setup_trans_ignored.485637716 |
| Directory | /workspace/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/47.usbdev_smoke.217423541 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 203456664 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:34:07 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-353ee390-1c8c-4c6f-bdd4-97d4fac9038f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21742 3541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.217423541 |
| Directory | /workspace/47.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/47.usbdev_spurious_pids_ignored.795278152 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 2050171736 ps |
| CPU time | 58.66 seconds |
| Started | Aug 15 05:34:29 PM PDT 24 |
| Finished | Aug 15 05:35:28 PM PDT 24 |
| Peak memory | 217264 kb |
| Host | smart-3f3febe6-3ef9-4132-b2c6-f80a7a1c1890 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=795278152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.795278152 |
| Directory | /workspace/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/47.usbdev_stall_priority_over_nak.673539886 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 147584000 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:07 PM PDT 24 |
| Finished | Aug 15 05:34:08 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-60d56af7-18a0-4e66-b1a1-4902f270df00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67353 9886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.673539886 |
| Directory | /workspace/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/47.usbdev_stall_trans.3222610485 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 155735337 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:13 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3331f49d-1fac-40d8-850f-fbc6a7e0e0af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32226 10485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_trans.3222610485 |
| Directory | /workspace/47.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_stream_len_max.602625733 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 732745877 ps |
| CPU time | 1.81 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:14 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f928118e-2710-4263-b6e3-94c8a8581514 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60262 5733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.602625733 |
| Directory | /workspace/47.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/47.usbdev_streaming_out.370013257 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 3302064087 ps |
| CPU time | 25.51 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 217648 kb |
| Host | smart-65ab8154-5807-44e8-917b-fad3b26c7eaa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37001 3257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_streaming_out.370013257 |
| Directory | /workspace/47.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/47.usbdev_timeout_missing_host_handshake.2882255383 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 991119326 ps |
| CPU time | 21.72 seconds |
| Started | Aug 15 05:33:58 PM PDT 24 |
| Finished | Aug 15 05:34:20 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-28af5b30-10ed-461c-9652-451815a1c89f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2882255383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_hos t_handshake.2882255383 |
| Directory | /workspace/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/47.usbdev_tx_rx_disruption.373330222 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 499325668 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:14 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-c24c3788-71a1-4dd0-847f-d127e60d4590 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=373330222 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_tx_rx_disruption.373330222 |
| Directory | /workspace/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/470.usbdev_tx_rx_disruption.1620167679 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 482269137 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:36:18 PM PDT 24 |
| Finished | Aug 15 05:36:20 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-de201b29-fdd3-41d0-96d1-f7bfbaf7898f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1620167679 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 470.usbdev_tx_rx_disruption.1620167679 |
| Directory | /workspace/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/471.usbdev_tx_rx_disruption.2981388751 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 592577629 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:36:26 PM PDT 24 |
| Finished | Aug 15 05:36:27 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-d5be0794-299d-4fb9-8e4c-bab60282ebf6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2981388751 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 471.usbdev_tx_rx_disruption.2981388751 |
| Directory | /workspace/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/472.usbdev_tx_rx_disruption.2389864679 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 504348022 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:58 PM PDT 24 |
| Finished | Aug 15 05:36:00 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7a9f7bd5-a28b-4329-b999-559727a7f0b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2389864679 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 472.usbdev_tx_rx_disruption.2389864679 |
| Directory | /workspace/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/473.usbdev_tx_rx_disruption.3210140007 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 686751029 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:36:18 PM PDT 24 |
| Finished | Aug 15 05:36:20 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-c562e5dd-9cb2-4b36-8861-c62a19739fa8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3210140007 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 473.usbdev_tx_rx_disruption.3210140007 |
| Directory | /workspace/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/474.usbdev_tx_rx_disruption.2381420153 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 498391043 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:35:51 PM PDT 24 |
| Finished | Aug 15 05:35:52 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-6db50b61-f154-4385-b69c-05b793133eba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2381420153 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 474.usbdev_tx_rx_disruption.2381420153 |
| Directory | /workspace/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/475.usbdev_tx_rx_disruption.1134349076 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 623974974 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-bb2c2b37-fba0-42f6-af15-75d5c072ac2a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1134349076 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 475.usbdev_tx_rx_disruption.1134349076 |
| Directory | /workspace/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/476.usbdev_tx_rx_disruption.3175716804 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 503261100 ps |
| CPU time | 1.53 seconds |
| Started | Aug 15 05:36:22 PM PDT 24 |
| Finished | Aug 15 05:36:24 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c4c5445c-9140-4af7-872b-3ea88d43bd5d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3175716804 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 476.usbdev_tx_rx_disruption.3175716804 |
| Directory | /workspace/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/477.usbdev_tx_rx_disruption.566740367 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 656833615 ps |
| CPU time | 1.77 seconds |
| Started | Aug 15 05:36:18 PM PDT 24 |
| Finished | Aug 15 05:36:20 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-e625688a-b9f7-4eca-b4e9-20ba6ee9e604 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=566740367 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 477.usbdev_tx_rx_disruption.566740367 |
| Directory | /workspace/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/478.usbdev_tx_rx_disruption.3557462906 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 468833899 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:36:23 PM PDT 24 |
| Finished | Aug 15 05:36:25 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-3a4ece79-74ea-4757-99a3-9daf06724879 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3557462906 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 478.usbdev_tx_rx_disruption.3557462906 |
| Directory | /workspace/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/479.usbdev_tx_rx_disruption.3429913459 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 529979932 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:35:50 PM PDT 24 |
| Finished | Aug 15 05:35:52 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-72fbd0f5-4f9e-401c-89f2-284ee389fe0e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3429913459 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 479.usbdev_tx_rx_disruption.3429913459 |
| Directory | /workspace/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/48.usbdev_alert_test.2964000521 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 78316536 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:34:32 PM PDT 24 |
| Finished | Aug 15 05:34:33 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-b582b0c2-50fa-43b9-9b9f-78934fc428fd |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2964000521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.2964000521 |
| Directory | /workspace/48.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_disconnect.1068668432 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 11854709819 ps |
| CPU time | 14.25 seconds |
| Started | Aug 15 05:34:37 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-add605f7-61e2-4004-8937-bafcff6fdaae |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1068668432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_a on_wake_disconnect.1068668432 |
| Directory | /workspace/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_reset.650214956 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 18900172443 ps |
| CPU time | 24.66 seconds |
| Started | Aug 15 05:34:20 PM PDT 24 |
| Finished | Aug 15 05:34:45 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-567d4d2d-4c17-4526-a835-d56e043da5cc |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=650214956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.650214956 |
| Directory | /workspace/48.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_resume.2900005421 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 25846737613 ps |
| CPU time | 32.19 seconds |
| Started | Aug 15 05:34:12 PM PDT 24 |
| Finished | Aug 15 05:34:45 PM PDT 24 |
| Peak memory | 215852 kb |
| Host | smart-f80fc5ad-f8af-4caa-8b3f-b402f2dcd289 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2900005421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_a on_wake_resume.2900005421 |
| Directory | /workspace/48.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/48.usbdev_av_buffer.2372471971 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 155683904 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:34:20 PM PDT 24 |
| Finished | Aug 15 05:34:21 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-9d405d9d-5dd3-414c-8252-81e3e3f885d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23724 71971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_av_buffer.2372471971 |
| Directory | /workspace/48.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/48.usbdev_bitstuff_err.3086307597 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 167142012 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:34:08 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-b018a1fe-f0d1-45fe-a746-2738c1810cd1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30863 07597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_bitstuff_err.3086307597 |
| Directory | /workspace/48.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_data_toggle_clear.1167741569 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 576743378 ps |
| CPU time | 1.88 seconds |
| Started | Aug 15 05:34:25 PM PDT 24 |
| Finished | Aug 15 05:34:27 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-36a8f3ce-07eb-4e1e-9aff-4604a60ae15c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11677 41569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_clear.1167741569 |
| Directory | /workspace/48.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/48.usbdev_data_toggle_restore.1231376459 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 398191963 ps |
| CPU time | 1.36 seconds |
| Started | Aug 15 05:34:32 PM PDT 24 |
| Finished | Aug 15 05:34:34 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-dfc94cf8-b7a7-41ee-a0bb-9a61223edcc7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1231376459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.1231376459 |
| Directory | /workspace/48.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/48.usbdev_device_address.143311011 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 37100286958 ps |
| CPU time | 66.94 seconds |
| Started | Aug 15 05:34:28 PM PDT 24 |
| Finished | Aug 15 05:35:35 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-b66e7142-16be-4f1c-a1ab-ab27f64feb48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14331 1011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.143311011 |
| Directory | /workspace/48.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/48.usbdev_device_timeout.2946612655 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 2046919766 ps |
| CPU time | 17.25 seconds |
| Started | Aug 15 05:34:13 PM PDT 24 |
| Finished | Aug 15 05:34:30 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-a5c0c872-3a53-43fc-8345-d9d82597ad6a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2946612655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.2946612655 |
| Directory | /workspace/48.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/48.usbdev_disable_endpoint.3677675631 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 763920789 ps |
| CPU time | 1.95 seconds |
| Started | Aug 15 05:34:07 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-a557f7a7-dce1-4b2f-929b-ca1a9d3a7b80 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36776 75631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.3677675631 |
| Directory | /workspace/48.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/48.usbdev_disconnected.4117733886 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 140673911 ps |
| CPU time | 0.79 seconds |
| Started | Aug 15 05:34:15 PM PDT 24 |
| Finished | Aug 15 05:34:16 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-3aaef18a-f5b0-4ce9-8ba7-d5ab9236a379 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41177 33886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disconnected.4117733886 |
| Directory | /workspace/48.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/48.usbdev_enable.2844035919 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 51965965 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:34:07 PM PDT 24 |
| Finished | Aug 15 05:34:08 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a62b73ac-234f-4099-af7f-e8ac03fd370b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28440 35919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_enable.2844035919 |
| Directory | /workspace/48.usbdev_enable/latest |
| Test location | /workspace/coverage/default/48.usbdev_endpoint_types.631059475 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 263038885 ps |
| CPU time | 1.15 seconds |
| Started | Aug 15 05:34:31 PM PDT 24 |
| Finished | Aug 15 05:34:32 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-7c972796-d081-4bc6-8b1a-56c969c8e58d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=631059475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.631059475 |
| Directory | /workspace/48.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/48.usbdev_fifo_rst.1952639998 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 206733713 ps |
| CPU time | 2.49 seconds |
| Started | Aug 15 05:34:43 PM PDT 24 |
| Finished | Aug 15 05:34:45 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-2e4fc8b1-6cf1-41c1-a9dd-cbaa2bffe7c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19526 39998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_fifo_rst.1952639998 |
| Directory | /workspace/48.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_iso.1783008506 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 180651491 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:34:08 PM PDT 24 |
| Finished | Aug 15 05:34:09 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d7e2e629-a6cb-4ca5-851c-68a2d214c734 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1783008506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.1783008506 |
| Directory | /workspace/48.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_stall.3987392120 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 147145139 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:34:31 PM PDT 24 |
| Finished | Aug 15 05:34:32 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ea13cdf6-edde-401b-a7e5-8d6a1c514ca4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39873 92120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_stall.3987392120 |
| Directory | /workspace/48.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_trans.1088605045 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 230782911 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:34:25 PM PDT 24 |
| Finished | Aug 15 05:34:26 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-6bbda9d6-9b42-47e3-9cf8-91a1b117c558 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10886 05045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_trans.1088605045 |
| Directory | /workspace/48.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_invalid_sync.2404101771 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 4690856933 ps |
| CPU time | 139.52 seconds |
| Started | Aug 15 05:34:10 PM PDT 24 |
| Finished | Aug 15 05:36:29 PM PDT 24 |
| Peak memory | 217724 kb |
| Host | smart-f91177cb-078d-4f86-a118-d1b9fa9c8608 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2404101771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.2404101771 |
| Directory | /workspace/48.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/48.usbdev_iso_retraction.3123350447 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 9123455331 ps |
| CPU time | 111.13 seconds |
| Started | Aug 15 05:34:26 PM PDT 24 |
| Finished | Aug 15 05:36:17 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-8d4658eb-0d74-4787-8c31-c3f841468d03 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3123350447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.3123350447 |
| Directory | /workspace/48.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_in_err.1844133283 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 290053068 ps |
| CPU time | 1.07 seconds |
| Started | Aug 15 05:34:16 PM PDT 24 |
| Finished | Aug 15 05:34:17 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-1b50c26d-5f37-4424-a653-37aff9f86371 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18441 33283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_in_err.1844133283 |
| Directory | /workspace/48.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_resume.1301053875 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 7909873950 ps |
| CPU time | 11.92 seconds |
| Started | Aug 15 05:34:19 PM PDT 24 |
| Finished | Aug 15 05:34:32 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-289ac0ce-f4bf-46d1-8d16-5a46e08db2c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13010 53875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_resume.1301053875 |
| Directory | /workspace/48.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_suspend.2401958133 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 8458813423 ps |
| CPU time | 11.78 seconds |
| Started | Aug 15 05:34:33 PM PDT 24 |
| Finished | Aug 15 05:34:44 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-611d8659-edc6-4630-b3f3-d0c68e2be49f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24019 58133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_suspend.2401958133 |
| Directory | /workspace/48.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/48.usbdev_low_speed_traffic.2662735718 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 3341253340 ps |
| CPU time | 25.37 seconds |
| Started | Aug 15 05:34:29 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-a87dfcb3-8400-46bf-a808-32a1505d0fc8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2662735718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.2662735718 |
| Directory | /workspace/48.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_inter_pkt_delay.3695745568 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 2660690455 ps |
| CPU time | 74.49 seconds |
| Started | Aug 15 05:34:35 PM PDT 24 |
| Finished | Aug 15 05:35:49 PM PDT 24 |
| Peak memory | 215736 kb |
| Host | smart-ed492916-dffc-44ae-99b6-74ffe7c599fd |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3695745568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.3695745568 |
| Directory | /workspace/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_length_in_transaction.796519865 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 274649456 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-3d12d949-f2b8-4e68-80a2-d72ee17f1f17 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=796519865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.796519865 |
| Directory | /workspace/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_length_out_transaction.4085249599 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 207918417 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:29 PM PDT 24 |
| Finished | Aug 15 05:34:30 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-ff7485c9-2488-4748-893d-58cc440efe3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40852 49599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.4085249599 |
| Directory | /workspace/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_inter_pkt_delay.1845798937 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 1800881537 ps |
| CPU time | 17.42 seconds |
| Started | Aug 15 05:34:30 PM PDT 24 |
| Finished | Aug 15 05:34:47 PM PDT 24 |
| Peak memory | 224008 kb |
| Host | smart-c60b5431-79bd-4123-a649-43e2ca679c95 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1845798937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.1845798937 |
| Directory | /workspace/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_length_in_transaction.3692563679 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 176367524 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:37 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-f50f09e6-b72d-48cc-8ddc-b009953d470b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3692563679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.3692563679 |
| Directory | /workspace/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_length_out_transaction.3824181619 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 145602295 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:30 PM PDT 24 |
| Finished | Aug 15 05:34:31 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-939c05bf-dfef-459a-938b-45c97249d202 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38241 81619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.3824181619 |
| Directory | /workspace/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_nak_trans.754937007 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 250235731 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:35 PM PDT 24 |
| Finished | Aug 15 05:34:36 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-b7a0bee2-1f80-4c74-841d-ed876ccdaaaf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75493 7007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_nak_trans.754937007 |
| Directory | /workspace/48.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_iso.744432158 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 187390078 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f3f8983a-f4b6-4ef7-8f48-83cfeddbc93c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74443 2158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_iso.744432158 |
| Directory | /workspace/48.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_stall.1158838588 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 170278170 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:31 PM PDT 24 |
| Finished | Aug 15 05:34:32 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-e2205ad0-14ae-41c1-85fb-2eda30a882bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11588 38588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_stall.1158838588 |
| Directory | /workspace/48.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_trans_nak.2032842363 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 220637029 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:34:31 PM PDT 24 |
| Finished | Aug 15 05:34:32 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-34213457-5520-4d38-81bb-783e52da3d4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20328 42363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_trans_nak.2032842363 |
| Directory | /workspace/48.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/48.usbdev_pending_in_trans.1102940155 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 172090921 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:42 PM PDT 24 |
| Finished | Aug 15 05:34:43 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-aaee7f3a-46ba-46b5-ad1a-adb975bbc82b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11029 40155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pending_in_trans.1102940155 |
| Directory | /workspace/48.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_config_pinflip.1887718883 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 196370581 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:34:33 PM PDT 24 |
| Finished | Aug 15 05:34:34 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-36a5b5b3-94f2-452e-8407-bf59dd0603fd |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1887718883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.1887718883 |
| Directory | /workspace/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_config_usb_ref_disable.954528894 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 169034870 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:34:35 PM PDT 24 |
| Finished | Aug 15 05:34:36 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5c2877f8-f879-4f52-898d-0da06661f4df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95452 8894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.954528894 |
| Directory | /workspace/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_pins_sense.1655300101 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 37911028 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-701b84b1-96f5-42dd-8aa8-216653be7eed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16553 00101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.1655300101 |
| Directory | /workspace/48.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_buffer.3903624934 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 8614289226 ps |
| CPU time | 20.76 seconds |
| Started | Aug 15 05:34:31 PM PDT 24 |
| Finished | Aug 15 05:34:52 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-7fba87ad-a5f9-4624-bd43-ede50167e14f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39036 24934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_buffer.3903624934 |
| Directory | /workspace/48.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_received.3918698605 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 193189734 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:35 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-51d105d1-475d-4fd5-ab4a-8502e1759c15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39186 98605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_received.3918698605 |
| Directory | /workspace/48.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_sent.801773836 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 193071509 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:28 PM PDT 24 |
| Finished | Aug 15 05:34:29 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-7cf3a7c5-57f7-47cc-a895-01d14d055df4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80177 3836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_sent.801773836 |
| Directory | /workspace/48.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/48.usbdev_random_length_in_transaction.524767012 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 245883972 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:34:34 PM PDT 24 |
| Finished | Aug 15 05:34:35 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-b203b8c2-f526-4401-a8c8-4cf1a36f242c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52476 7012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_in_transaction.524767012 |
| Directory | /workspace/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_random_length_out_transaction.3781917146 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 194728999 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:34:26 PM PDT 24 |
| Finished | Aug 15 05:34:27 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-9a198b67-509a-4bcd-a558-5b7a9de8c4cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37819 17146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.3781917146 |
| Directory | /workspace/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_rx_crc_err.2446306543 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 209888834 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:29 PM PDT 24 |
| Finished | Aug 15 05:34:30 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-b2889687-fb6e-4b0c-905f-5f153a916f84 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24463 06543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_rx_crc_err.2446306543 |
| Directory | /workspace/48.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_rx_full.4225358092 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 393545905 ps |
| CPU time | 1.32 seconds |
| Started | Aug 15 05:34:32 PM PDT 24 |
| Finished | Aug 15 05:34:33 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-bcf96f29-7929-4151-b794-15fe224b681e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42253 58092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_rx_full.4225358092 |
| Directory | /workspace/48.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/48.usbdev_setup_stage.1607444186 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 176352736 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:34:39 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-b5284ed9-699c-4a2c-bb5b-e095e649457f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16074 44186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_setup_stage.1607444186 |
| Directory | /workspace/48.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/48.usbdev_setup_trans_ignored.3177706063 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 162574634 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:34:34 PM PDT 24 |
| Finished | Aug 15 05:34:35 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-71f0e9c3-c6a2-49df-aad7-c8a8bd635669 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31777 06063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_setup_trans_ignored.3177706063 |
| Directory | /workspace/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/48.usbdev_smoke.1188046182 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 183562807 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:34:28 PM PDT 24 |
| Finished | Aug 15 05:34:29 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-f6fe16c6-e92c-4ad3-ac6a-8f1fd25ce7f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11880 46182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.1188046182 |
| Directory | /workspace/48.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/48.usbdev_spurious_pids_ignored.3601602779 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 1930912236 ps |
| CPU time | 18.65 seconds |
| Started | Aug 15 05:34:30 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 224000 kb |
| Host | smart-ad86c9d9-a4ac-4813-abcf-aa3f25e4f3a9 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3601602779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.3601602779 |
| Directory | /workspace/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/48.usbdev_stall_priority_over_nak.3420650857 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 198102622 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-747a8ecf-fdaf-4895-9a76-a7f3bd23446f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34206 50857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.3420650857 |
| Directory | /workspace/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/48.usbdev_stall_trans.1679398571 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 177292603 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:35 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-7b427328-26ac-464b-bde2-70826bf1d349 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16793 98571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_trans.1679398571 |
| Directory | /workspace/48.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_stream_len_max.2676492724 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 283733970 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:34:40 PM PDT 24 |
| Finished | Aug 15 05:34:41 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-9b2ec05b-1876-4ed0-95ea-a2a6f15f3c40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26764 92724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.2676492724 |
| Directory | /workspace/48.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/48.usbdev_streaming_out.2810338820 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 2545365012 ps |
| CPU time | 74.97 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:35:56 PM PDT 24 |
| Peak memory | 217564 kb |
| Host | smart-c9ba6276-ac60-4df6-ac7a-93ada545fbc6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28103 38820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_streaming_out.2810338820 |
| Directory | /workspace/48.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/48.usbdev_timeout_missing_host_handshake.4015152455 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 5684652815 ps |
| CPU time | 48.35 seconds |
| Started | Aug 15 05:34:07 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-a19cc8aa-3bfc-4187-a608-cbec7980135f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4015152455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_hos t_handshake.4015152455 |
| Directory | /workspace/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/48.usbdev_tx_rx_disruption.1127217472 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 577639179 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-d997f3b1-ce24-4498-82ce-6e836230ea1b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1127217472 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_tx_rx_disruption.1127217472 |
| Directory | /workspace/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/480.usbdev_tx_rx_disruption.1106156161 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 661617814 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:36:06 PM PDT 24 |
| Finished | Aug 15 05:36:07 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d2fa0bab-eaa0-4a3c-b444-5dfd9fc7fbf4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1106156161 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 480.usbdev_tx_rx_disruption.1106156161 |
| Directory | /workspace/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/481.usbdev_tx_rx_disruption.3802136406 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 437449773 ps |
| CPU time | 1.37 seconds |
| Started | Aug 15 05:35:56 PM PDT 24 |
| Finished | Aug 15 05:35:57 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-d18e8c08-bf97-4dbc-aa1a-902255245dd7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3802136406 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 481.usbdev_tx_rx_disruption.3802136406 |
| Directory | /workspace/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/482.usbdev_tx_rx_disruption.3581219317 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 526945018 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:36:02 PM PDT 24 |
| Finished | Aug 15 05:36:04 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-a6ced830-5d21-4a22-9ec2-140f95606e38 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3581219317 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 482.usbdev_tx_rx_disruption.3581219317 |
| Directory | /workspace/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/483.usbdev_tx_rx_disruption.3764579517 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 544447514 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:35:49 PM PDT 24 |
| Finished | Aug 15 05:35:51 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-6bb9a6ad-b4e7-4a71-a763-89a96ac7295e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3764579517 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 483.usbdev_tx_rx_disruption.3764579517 |
| Directory | /workspace/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/484.usbdev_tx_rx_disruption.1806213899 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 457441079 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:36:19 PM PDT 24 |
| Finished | Aug 15 05:36:21 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-6571f921-77c1-436f-b86d-b47d41033358 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1806213899 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 484.usbdev_tx_rx_disruption.1806213899 |
| Directory | /workspace/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/485.usbdev_tx_rx_disruption.4194017290 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 621617436 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:35:47 PM PDT 24 |
| Finished | Aug 15 05:35:59 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-b9accc1f-adae-4950-bf0d-ce48dc1c8de8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4194017290 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 485.usbdev_tx_rx_disruption.4194017290 |
| Directory | /workspace/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/486.usbdev_tx_rx_disruption.3121340586 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 493907652 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:36:27 PM PDT 24 |
| Finished | Aug 15 05:36:29 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-e8d0993f-eaff-452d-9649-87bf5c3235da |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3121340586 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 486.usbdev_tx_rx_disruption.3121340586 |
| Directory | /workspace/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/487.usbdev_tx_rx_disruption.3696499671 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 565759566 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:35:50 PM PDT 24 |
| Finished | Aug 15 05:35:52 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-a50e0365-4030-4a45-a13a-a078175dbfbc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3696499671 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 487.usbdev_tx_rx_disruption.3696499671 |
| Directory | /workspace/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/488.usbdev_tx_rx_disruption.3777821872 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 627206101 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:36:06 PM PDT 24 |
| Finished | Aug 15 05:36:07 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-35cf83c5-ce0d-4dc4-b8ee-fd88a7ad54df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3777821872 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 488.usbdev_tx_rx_disruption.3777821872 |
| Directory | /workspace/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/489.usbdev_tx_rx_disruption.882079940 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 458409011 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:35:51 PM PDT 24 |
| Finished | Aug 15 05:35:52 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-7b4eb021-bdd0-4ae4-8209-853592b93b00 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=882079940 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 489.usbdev_tx_rx_disruption.882079940 |
| Directory | /workspace/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/49.usbdev_alert_test.3880795440 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 44944286 ps |
| CPU time | 0.65 seconds |
| Started | Aug 15 05:34:45 PM PDT 24 |
| Finished | Aug 15 05:34:47 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-40805eca-9edf-40eb-b88f-37343074aef4 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3880795440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.3880795440 |
| Directory | /workspace/49.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_disconnect.609375196 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 3815666717 ps |
| CPU time | 5.52 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:34:47 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-afa79364-3d1a-4a27-a4df-51816bcfad41 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=609375196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_ao n_wake_disconnect.609375196 |
| Directory | /workspace/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_reset.657599358 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 16151825776 ps |
| CPU time | 21.88 seconds |
| Started | Aug 15 05:34:37 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-f0c28f29-aae8-4081-9694-051e81f8091d |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=657599358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.657599358 |
| Directory | /workspace/49.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_resume.2366590513 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 26286794306 ps |
| CPU time | 32.72 seconds |
| Started | Aug 15 05:34:30 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-4c110229-d850-4370-b749-ebfed7b39830 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2366590513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_a on_wake_resume.2366590513 |
| Directory | /workspace/49.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/49.usbdev_av_buffer.3996006679 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 177084283 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:34:39 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-394c8dfb-2152-414e-a468-854fc4a68ffd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39960 06679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_av_buffer.3996006679 |
| Directory | /workspace/49.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/49.usbdev_bitstuff_err.495514402 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 173463362 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:42 PM PDT 24 |
| Finished | Aug 15 05:34:43 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-7dede804-8d9a-4610-9d14-7055f75a56f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49551 4402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_bitstuff_err.495514402 |
| Directory | /workspace/49.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_data_toggle_clear.2369248860 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 423201877 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-4e141776-d171-404a-a60b-83b53a9d4c86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23692 48860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_clear.2369248860 |
| Directory | /workspace/49.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/49.usbdev_data_toggle_restore.1205491743 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 371841995 ps |
| CPU time | 1.27 seconds |
| Started | Aug 15 05:34:39 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-ac569041-b7e5-4115-85dd-011251a8250f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1205491743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.1205491743 |
| Directory | /workspace/49.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/49.usbdev_device_address.1527382798 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 35164559758 ps |
| CPU time | 63.59 seconds |
| Started | Aug 15 05:34:33 PM PDT 24 |
| Finished | Aug 15 05:35:36 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-dece91ed-351c-4aaf-8133-4ca60520e529 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15273 82798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.1527382798 |
| Directory | /workspace/49.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/49.usbdev_device_timeout.733233797 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 280861712 ps |
| CPU time | 4.26 seconds |
| Started | Aug 15 05:34:35 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-5a607121-522e-4593-a8f4-04a4e10a6c06 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=733233797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.733233797 |
| Directory | /workspace/49.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/49.usbdev_disable_endpoint.1253503664 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 592507433 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7893ab66-869b-4803-863f-275472e5812e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12535 03664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_disable_endpoint.1253503664 |
| Directory | /workspace/49.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/49.usbdev_disconnected.1517324642 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 143467391 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:34:37 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-4175eaee-a2be-4c11-9a07-9ef4ac4ac530 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15173 24642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_disconnected.1517324642 |
| Directory | /workspace/49.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/49.usbdev_enable.609347313 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 72486595 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:34:33 PM PDT 24 |
| Finished | Aug 15 05:34:34 PM PDT 24 |
| Peak memory | 207320 kb |
| Host | smart-160e8b91-42bd-4838-81cc-3ab668557e5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60934 7313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_enable.609347313 |
| Directory | /workspace/49.usbdev_enable/latest |
| Test location | /workspace/coverage/default/49.usbdev_endpoint_access.3657279121 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 952237244 ps |
| CPU time | 2.51 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:34:41 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-7b25f601-4ec5-428d-8100-a6d994c53aba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36572 79121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3657279121 |
| Directory | /workspace/49.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/49.usbdev_endpoint_types.3082655724 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 380360013 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:34:35 PM PDT 24 |
| Finished | Aug 15 05:34:36 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c1385e8d-ed6f-4256-a49c-f9c2dff6325e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3082655724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.3082655724 |
| Directory | /workspace/49.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/49.usbdev_fifo_rst.3447048298 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 320924742 ps |
| CPU time | 2.19 seconds |
| Started | Aug 15 05:34:34 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-53c72c69-a69d-4ab1-b28f-b9a32cbcfa60 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34470 48298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_fifo_rst.3447048298 |
| Directory | /workspace/49.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_iso.4077560001 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 181771415 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:34:31 PM PDT 24 |
| Finished | Aug 15 05:34:33 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-ac30b895-fc03-4912-bd22-ebe9fafbaa9e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4077560001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.4077560001 |
| Directory | /workspace/49.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_stall.1740038586 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 140936915 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:34:39 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-f08ceb4f-b698-40e1-b8ff-db583d3bc817 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17400 38586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_stall.1740038586 |
| Directory | /workspace/49.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_trans.4291227335 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 212385575 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:34:45 PM PDT 24 |
| Finished | Aug 15 05:34:46 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-6da20f01-aad3-4f1d-8c64-2b7633a59939 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42912 27335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_trans.4291227335 |
| Directory | /workspace/49.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_invalid_sync.2816932588 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 3130142255 ps |
| CPU time | 23.89 seconds |
| Started | Aug 15 05:34:32 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-36f88838-f1fe-43b4-b8ca-732ac28d2870 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2816932588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.2816932588 |
| Directory | /workspace/49.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/49.usbdev_iso_retraction.509159760 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 6347171934 ps |
| CPU time | 41.68 seconds |
| Started | Aug 15 05:34:33 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-59837feb-912f-4e3d-9c2e-9291bb9e7a72 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=509159760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.509159760 |
| Directory | /workspace/49.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_in_err.2309287238 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 186621622 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:34:34 PM PDT 24 |
| Finished | Aug 15 05:34:35 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-e3d6a890-1448-42e0-b2b7-dd0a2ce3ea73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23092 87238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_in_err.2309287238 |
| Directory | /workspace/49.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_resume.298332992 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 27878658839 ps |
| CPU time | 46.06 seconds |
| Started | Aug 15 05:34:25 PM PDT 24 |
| Finished | Aug 15 05:35:12 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-54d9b3cd-ad56-4ad1-8caa-537250d48ea5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29833 2992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_resume.298332992 |
| Directory | /workspace/49.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_suspend.3081104909 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 9970509461 ps |
| CPU time | 11.99 seconds |
| Started | Aug 15 05:34:45 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-8df4f16d-c395-4469-862d-6351f94383d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30811 04909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_suspend.3081104909 |
| Directory | /workspace/49.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/49.usbdev_low_speed_traffic.4230500253 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 3321794040 ps |
| CPU time | 33.21 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:35:14 PM PDT 24 |
| Peak memory | 218876 kb |
| Host | smart-03cc99ab-0091-4580-a106-b37b26249c3d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4230500253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.4230500253 |
| Directory | /workspace/49.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_inter_pkt_delay.4033948994 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 2691531040 ps |
| CPU time | 26.51 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:35:04 PM PDT 24 |
| Peak memory | 216868 kb |
| Host | smart-04eeb16e-607e-42f4-9def-5ccf229b32ea |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4033948994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.4033948994 |
| Directory | /workspace/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_length_in_transaction.2263595805 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 261944428 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207304 kb |
| Host | smart-9a9b4dcf-e86e-4f28-9c47-0b7d420d1f09 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2263595805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.2263595805 |
| Directory | /workspace/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_length_out_transaction.652438520 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 197705872 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-31cd60dd-e161-42c8-b2bd-0b6d1c4f3b1f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65243 8520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.652438520 |
| Directory | /workspace/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_inter_pkt_delay.2975980450 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 2772252420 ps |
| CPU time | 27.03 seconds |
| Started | Aug 15 05:34:40 PM PDT 24 |
| Finished | Aug 15 05:35:07 PM PDT 24 |
| Peak memory | 224072 kb |
| Host | smart-6660e429-6567-4d64-9912-e3781544737c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2975980450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.2975980450 |
| Directory | /workspace/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_length_in_transaction.1575908697 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 145650652 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:34:35 PM PDT 24 |
| Finished | Aug 15 05:34:36 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f8a907d7-37ea-42f2-93c7-5b838acb8f72 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1575908697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.1575908697 |
| Directory | /workspace/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_length_out_transaction.766314059 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 150797504 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-428abdb6-b79f-4de1-b6a3-798a6a20ce81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76631 4059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.766314059 |
| Directory | /workspace/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_nak_trans.2194433181 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 205845762 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:34:40 PM PDT 24 |
| Finished | Aug 15 05:34:41 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-e8347835-f3c2-48ac-bd7f-95326807d5e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21944 33181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_nak_trans.2194433181 |
| Directory | /workspace/49.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_iso.1599238752 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 191532965 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-17b2f67f-7818-4f77-bb8f-59eb2e8f4bd0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15992 38752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_iso.1599238752 |
| Directory | /workspace/49.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_stall.1616118412 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 193995930 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:44 PM PDT 24 |
| Finished | Aug 15 05:34:45 PM PDT 24 |
| Peak memory | 207248 kb |
| Host | smart-5491eba5-980e-4ed0-b1c7-8ea70a80e624 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16161 18412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_stall.1616118412 |
| Directory | /workspace/49.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_trans_nak.2625077545 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 162864626 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-a6940fe4-d981-4313-af57-4e42f1fb6d82 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26250 77545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_trans_nak.2625077545 |
| Directory | /workspace/49.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/49.usbdev_pending_in_trans.3223763950 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 188086903 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-156d500a-634e-4c01-a42d-2b49b248c855 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32237 63950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pending_in_trans.3223763950 |
| Directory | /workspace/49.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_config_pinflip.2946887794 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 238338825 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:34:42 PM PDT 24 |
| Finished | Aug 15 05:34:43 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-d9c36bd0-9e90-49b9-bd97-d64735dcecd3 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2946887794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.2946887794 |
| Directory | /workspace/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_config_usb_ref_disable.4067143264 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 194101732 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 207260 kb |
| Host | smart-f57dbfac-35ae-4ae0-9b9c-dfc2a7bc805a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40671 43264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.4067143264 |
| Directory | /workspace/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_pins_sense.1282702750 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 54967148 ps |
| CPU time | 0.73 seconds |
| Started | Aug 15 05:34:37 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-26962e8d-bee0-480a-86da-136cb1b26fde |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12827 02750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.1282702750 |
| Directory | /workspace/49.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_buffer.3227503049 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 9214455651 ps |
| CPU time | 26.53 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-7a83f4fe-df7b-408b-bfb2-e0b2fd0f893f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32275 03049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_buffer.3227503049 |
| Directory | /workspace/49.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_received.2906749336 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 182703435 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-c198e34e-9490-44de-addd-70d51cee8fe7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29067 49336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_received.2906749336 |
| Directory | /workspace/49.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_sent.3559500097 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 212080251 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-05519516-a933-4896-8232-93f50fce186b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35595 00097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_sent.3559500097 |
| Directory | /workspace/49.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/49.usbdev_random_length_in_transaction.4096802186 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 188422702 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:34:39 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-99d9ab11-6be7-48fe-bb18-98d76b2ed785 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40968 02186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_in_transaction.4096802186 |
| Directory | /workspace/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_random_length_out_transaction.681634217 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 169620816 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:34:42 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-914e3be8-7798-4126-8365-82b86482aba2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68163 4217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.681634217 |
| Directory | /workspace/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_rx_crc_err.2647869054 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 183141229 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-66089ae6-9024-46f3-a06d-5b00017cdd34 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26478 69054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_rx_crc_err.2647869054 |
| Directory | /workspace/49.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_rx_full.3822789050 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 256616530 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-6a137edc-a492-4784-969b-16501dcd97fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38227 89050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_rx_full.3822789050 |
| Directory | /workspace/49.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/49.usbdev_setup_stage.3074994182 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 165389309 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:45 PM PDT 24 |
| Finished | Aug 15 05:34:46 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-47d55e49-c71e-40dc-ba96-d2b5d8a06c5c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30749 94182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_setup_stage.3074994182 |
| Directory | /workspace/49.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/49.usbdev_setup_trans_ignored.333813543 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 146318639 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-115ed42f-fd48-49c7-9adb-610bd64e9573 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33381 3543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_setup_trans_ignored.333813543 |
| Directory | /workspace/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/49.usbdev_smoke.3837478797 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 250274010 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:37 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-46bd16da-4fa4-4d89-a880-d5abefe9d1f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38374 78797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.3837478797 |
| Directory | /workspace/49.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/49.usbdev_spurious_pids_ignored.4022015293 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 2156571423 ps |
| CPU time | 61.91 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:35:39 PM PDT 24 |
| Peak memory | 217404 kb |
| Host | smart-f1a56617-ea28-4edd-8b86-992b1adbed2b |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4022015293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.4022015293 |
| Directory | /workspace/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/49.usbdev_stall_priority_over_nak.1947052101 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 159093391 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-26673847-6608-4041-96f5-2f6bf070962e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19470 52101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.1947052101 |
| Directory | /workspace/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/49.usbdev_stall_trans.2053413166 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 188127006 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:45 PM PDT 24 |
| Finished | Aug 15 05:34:46 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-3148ed81-3f20-43fc-8d5b-7a654678cabb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20534 13166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_trans.2053413166 |
| Directory | /workspace/49.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_stream_len_max.4201712648 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 929388130 ps |
| CPU time | 2.35 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-54d2858c-ef58-4dd7-8970-5f07a7aff1de |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42017 12648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.4201712648 |
| Directory | /workspace/49.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/49.usbdev_streaming_out.2521849988 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 3892239248 ps |
| CPU time | 101.42 seconds |
| Started | Aug 15 05:34:46 PM PDT 24 |
| Finished | Aug 15 05:36:27 PM PDT 24 |
| Peak memory | 217512 kb |
| Host | smart-ad34b48f-b10f-4324-8ac7-3f0e3eca3991 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25218 49988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_streaming_out.2521849988 |
| Directory | /workspace/49.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/49.usbdev_timeout_missing_host_handshake.1087362239 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 1053456275 ps |
| CPU time | 21.49 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-54225d9d-f6fa-46d9-a5df-a35d72761b14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1087362239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_hos t_handshake.1087362239 |
| Directory | /workspace/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/49.usbdev_tx_rx_disruption.899979630 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 646916727 ps |
| CPU time | 1.75 seconds |
| Started | Aug 15 05:34:37 PM PDT 24 |
| Finished | Aug 15 05:34:39 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-b3323b8d-3ade-4021-8224-7bb372027045 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=899979630 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 49.usbdev_tx_rx_disruption.899979630 |
| Directory | /workspace/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/490.usbdev_tx_rx_disruption.2909896189 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 609782116 ps |
| CPU time | 1.7 seconds |
| Started | Aug 15 05:36:17 PM PDT 24 |
| Finished | Aug 15 05:36:19 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-cfe17aa0-039c-4f15-a208-27ebe706800a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2909896189 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 490.usbdev_tx_rx_disruption.2909896189 |
| Directory | /workspace/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/491.usbdev_tx_rx_disruption.3974350175 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 571144283 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:35:52 PM PDT 24 |
| Finished | Aug 15 05:35:54 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-e6990aae-2812-4008-a3a3-375874649964 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3974350175 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 491.usbdev_tx_rx_disruption.3974350175 |
| Directory | /workspace/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/492.usbdev_tx_rx_disruption.2561695645 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 423720997 ps |
| CPU time | 1.43 seconds |
| Started | Aug 15 05:35:44 PM PDT 24 |
| Finished | Aug 15 05:35:46 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-55b17ca1-2344-45a6-a5db-44f437968b37 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2561695645 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 492.usbdev_tx_rx_disruption.2561695645 |
| Directory | /workspace/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/493.usbdev_tx_rx_disruption.3184849630 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 622151113 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:36:12 PM PDT 24 |
| Finished | Aug 15 05:36:13 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d1280b69-a9e4-4eca-899a-1b5d3264fe37 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3184849630 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 493.usbdev_tx_rx_disruption.3184849630 |
| Directory | /workspace/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/495.usbdev_tx_rx_disruption.2746972431 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 671172518 ps |
| CPU time | 1.8 seconds |
| Started | Aug 15 05:35:57 PM PDT 24 |
| Finished | Aug 15 05:35:59 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-3ce8f667-0710-4b31-929e-97e3140402eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2746972431 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 495.usbdev_tx_rx_disruption.2746972431 |
| Directory | /workspace/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/496.usbdev_tx_rx_disruption.2725918146 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 540847583 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:35:43 PM PDT 24 |
| Finished | Aug 15 05:35:44 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-3aed36d0-37d3-44f7-8bfa-e91a18e28683 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2725918146 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 496.usbdev_tx_rx_disruption.2725918146 |
| Directory | /workspace/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/497.usbdev_tx_rx_disruption.511997513 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 581114117 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:36:10 PM PDT 24 |
| Finished | Aug 15 05:36:11 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-a7656a50-1d0c-4460-a530-e5bc4d07091d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=511997513 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 497.usbdev_tx_rx_disruption.511997513 |
| Directory | /workspace/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/498.usbdev_tx_rx_disruption.3823305217 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 519501361 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:36:09 PM PDT 24 |
| Finished | Aug 15 05:36:11 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-9600666c-6602-40aa-a0c0-7a677276b529 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3823305217 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 498.usbdev_tx_rx_disruption.3823305217 |
| Directory | /workspace/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/499.usbdev_tx_rx_disruption.839487509 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 457699601 ps |
| CPU time | 1.41 seconds |
| Started | Aug 15 05:36:00 PM PDT 24 |
| Finished | Aug 15 05:36:02 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-f278947e-7b6f-4d2e-ad76-f82b3c7fe6de |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=839487509 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 499.usbdev_tx_rx_disruption.839487509 |
| Directory | /workspace/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/5.usbdev_alert_test.4252532570 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 87652895 ps |
| CPU time | 0.72 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:40 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-1dbba670-db0c-4521-bdcc-af99e41c282b |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4252532570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.4252532570 |
| Directory | /workspace/5.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_disconnect.4207963660 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 11211133187 ps |
| CPU time | 14.29 seconds |
| Started | Aug 15 05:28:18 PM PDT 24 |
| Finished | Aug 15 05:28:33 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-6e8b93f5-eb37-459c-92e5-0fa0fa65a8d6 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4207963660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_ao n_wake_disconnect.4207963660 |
| Directory | /workspace/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_reset.176678004 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 13689851936 ps |
| CPU time | 15.94 seconds |
| Started | Aug 15 05:28:15 PM PDT 24 |
| Finished | Aug 15 05:28:31 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-dd16a1fd-0e89-46b8-a7ff-017da52cc389 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=176678004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.176678004 |
| Directory | /workspace/5.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_resume.3810180786 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 28671591816 ps |
| CPU time | 33.9 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:28:50 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-dc22da6b-2be0-4e81-86f5-20f58d644ced |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3810180786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_ao n_wake_resume.3810180786 |
| Directory | /workspace/5.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/5.usbdev_av_buffer.2135771891 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 183396247 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-16a34af0-3432-43f0-a595-2c558be27942 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21357 71891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_av_buffer.2135771891 |
| Directory | /workspace/5.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/5.usbdev_bitstuff_err.3952908235 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 158555630 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:28:27 PM PDT 24 |
| Finished | Aug 15 05:28:28 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-90b07651-68d4-4135-ae12-0605d387fb0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39529 08235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_bitstuff_err.3952908235 |
| Directory | /workspace/5.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_data_toggle_clear.1465128465 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 208976809 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:28:25 PM PDT 24 |
| Finished | Aug 15 05:28:26 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-7bd768e7-b6b9-4b06-b78c-ce5b684a5fbc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14651 28465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_clear.1465128465 |
| Directory | /workspace/5.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/5.usbdev_data_toggle_restore.3211376822 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 911094888 ps |
| CPU time | 2.64 seconds |
| Started | Aug 15 05:28:27 PM PDT 24 |
| Finished | Aug 15 05:28:30 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-1ec7779d-2c65-4840-83ab-3d7a6c75716a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3211376822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.3211376822 |
| Directory | /workspace/5.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/5.usbdev_device_address.4194965536 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 21967847020 ps |
| CPU time | 36.3 seconds |
| Started | Aug 15 05:28:18 PM PDT 24 |
| Finished | Aug 15 05:28:55 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-32198b23-fa23-4fdb-964b-338a29224e03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41949 65536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.4194965536 |
| Directory | /workspace/5.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/5.usbdev_device_timeout.53630582 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 193827949 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:19 PM PDT 24 |
| Finished | Aug 15 05:28:20 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f5fd8ec0-993b-4b9e-98c0-7945ddd2064d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53630582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.53630582 |
| Directory | /workspace/5.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/5.usbdev_disable_endpoint.75629555 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 572154766 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:28:22 PM PDT 24 |
| Finished | Aug 15 05:28:24 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-66221f03-dae6-4242-bf41-48a9170ba339 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75629 555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_disable_endpoint.75629555 |
| Directory | /workspace/5.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/5.usbdev_disconnected.2007230759 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 148490642 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:22 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-437ab0f0-9490-41ba-8b6a-f37c09b1f9b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20072 30759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_disconnected.2007230759 |
| Directory | /workspace/5.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/5.usbdev_enable.1552411815 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 43996399 ps |
| CPU time | 0.7 seconds |
| Started | Aug 15 05:28:22 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a509c77a-114f-45af-8fdc-cad39b2b8209 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15524 11815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_enable.1552411815 |
| Directory | /workspace/5.usbdev_enable/latest |
| Test location | /workspace/coverage/default/5.usbdev_endpoint_access.1461797777 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 870617198 ps |
| CPU time | 2.2 seconds |
| Started | Aug 15 05:28:15 PM PDT 24 |
| Finished | Aug 15 05:28:17 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-ee38f601-2fe1-4a2b-904a-17b8687d5b66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14617 97777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.1461797777 |
| Directory | /workspace/5.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/5.usbdev_endpoint_types.2205058027 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 303470277 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-d517ef90-814b-4021-90f0-fab4a0abaeb0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2205058027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.2205058027 |
| Directory | /workspace/5.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/5.usbdev_fifo_rst.2751250451 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 276882148 ps |
| CPU time | 2.3 seconds |
| Started | Aug 15 05:28:21 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-23ed0796-5530-47f0-9969-21d29fb37383 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27512 50451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_fifo_rst.2751250451 |
| Directory | /workspace/5.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_iso.3832758772 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 159038421 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:28:17 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-4a6fad8e-083d-41e8-bdd3-32c835d12c77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3832758772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.3832758772 |
| Directory | /workspace/5.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_stall.3440275994 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 157581232 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:34 PM PDT 24 |
| Finished | Aug 15 05:28:35 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-2b0454ca-b952-445a-821d-540b7017b5d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34402 75994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_stall.3440275994 |
| Directory | /workspace/5.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_trans.2627474766 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 204402153 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:28:17 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-4e8950ee-8b75-4ecb-87f5-d2c2fae0f726 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26274 74766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_trans.2627474766 |
| Directory | /workspace/5.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_invalid_sync.3590527823 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 4825568136 ps |
| CPU time | 40.69 seconds |
| Started | Aug 15 05:28:15 PM PDT 24 |
| Finished | Aug 15 05:28:56 PM PDT 24 |
| Peak memory | 216020 kb |
| Host | smart-f027133e-60fd-4985-adac-b2baa09cada6 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3590527823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.3590527823 |
| Directory | /workspace/5.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/5.usbdev_iso_retraction.3725082624 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 10276747989 ps |
| CPU time | 67.74 seconds |
| Started | Aug 15 05:28:31 PM PDT 24 |
| Finished | Aug 15 05:29:39 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-b1315fb2-bf34-48fa-a8b0-99349b451f4c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3725082624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.3725082624 |
| Directory | /workspace/5.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_in_err.1945270575 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 219935104 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:28:16 PM PDT 24 |
| Finished | Aug 15 05:28:18 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-17142e82-0931-43d9-ba0d-9ee566de364d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19452 70575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_in_err.1945270575 |
| Directory | /workspace/5.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_resume.2628368798 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 31074815690 ps |
| CPU time | 49.12 seconds |
| Started | Aug 15 05:28:21 PM PDT 24 |
| Finished | Aug 15 05:29:11 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-11930650-e623-4a68-a905-c4cfc1f9d56e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26283 68798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_resume.2628368798 |
| Directory | /workspace/5.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_suspend.2459172203 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 4483403317 ps |
| CPU time | 7.11 seconds |
| Started | Aug 15 05:28:21 PM PDT 24 |
| Finished | Aug 15 05:28:29 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-42530bc3-3df1-4458-981f-ccbe2d0e6c3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24591 72203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_suspend.2459172203 |
| Directory | /workspace/5.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/5.usbdev_low_speed_traffic.4149709810 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 5386405647 ps |
| CPU time | 56.1 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 218756 kb |
| Host | smart-9e9e037c-aa2b-4620-b8bf-49e14c6674d7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4149709810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.4149709810 |
| Directory | /workspace/5.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_inter_pkt_delay.3970222727 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 2124980266 ps |
| CPU time | 16.24 seconds |
| Started | Aug 15 05:28:27 PM PDT 24 |
| Finished | Aug 15 05:28:44 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-b4054ab8-e23a-4722-a6cc-f7ea20daa962 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3970222727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.3970222727 |
| Directory | /workspace/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_length_in_transaction.3391336833 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 239113107 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:28:29 PM PDT 24 |
| Finished | Aug 15 05:28:30 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-b30404d1-d7ce-426f-b05b-f411b9657d0e |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3391336833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.3391336833 |
| Directory | /workspace/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_length_out_transaction.3644652520 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 264930421 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:28:22 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b8452d2a-e53a-4a11-934f-5b814fa8a204 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36446 52520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.3644652520 |
| Directory | /workspace/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_non_iso_usb_traffic.2640696472 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 2974888980 ps |
| CPU time | 28.95 seconds |
| Started | Aug 15 05:28:31 PM PDT 24 |
| Finished | Aug 15 05:29:00 PM PDT 24 |
| Peak memory | 217916 kb |
| Host | smart-3e59893c-03b3-4383-bd1d-9a9a20e8dc48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26406 96472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.2640696472 |
| Directory | /workspace/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_usb_traffic.2970923163 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 2319899399 ps |
| CPU time | 70.23 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:29:43 PM PDT 24 |
| Peak memory | 217856 kb |
| Host | smart-3e8a2b1f-165b-4b64-9355-6486983a68a0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2970923163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.2970923163 |
| Directory | /workspace/5.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_inter_pkt_delay.365948949 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 2208292452 ps |
| CPU time | 23.26 seconds |
| Started | Aug 15 05:28:20 PM PDT 24 |
| Finished | Aug 15 05:28:44 PM PDT 24 |
| Peak memory | 216768 kb |
| Host | smart-bf8d3f8d-022d-44b9-a8d1-66c87d6cc998 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=365948949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.365948949 |
| Directory | /workspace/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_length_in_transaction.274165785 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 192258225 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:28:35 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-91bbdc52-62df-423d-8192-e85754da4733 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=274165785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.274165785 |
| Directory | /workspace/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_length_out_transaction.426372996 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 156370131 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:28:34 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-5271b2b6-b732-4998-a46a-6a2c4ab14289 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42637 2996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.426372996 |
| Directory | /workspace/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_nak_trans.2857223129 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 183682955 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:28:21 PM PDT 24 |
| Finished | Aug 15 05:28:22 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-cb3bcc15-02af-49ae-bf0b-176a97859d3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28572 23129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_nak_trans.2857223129 |
| Directory | /workspace/5.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_iso.807733498 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 191528332 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-d0745efd-cf61-4c2b-bc65-42e6c64da5e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80773 3498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_iso.807733498 |
| Directory | /workspace/5.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_stall.2797740033 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 185361644 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:27 PM PDT 24 |
| Finished | Aug 15 05:28:28 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-433c3d47-8100-4c81-986e-2856a45d2b0d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27977 40033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_stall.2797740033 |
| Directory | /workspace/5.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_trans_nak.2775115956 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 156646480 ps |
| CPU time | 0.8 seconds |
| Started | Aug 15 05:28:29 PM PDT 24 |
| Finished | Aug 15 05:28:30 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-5fc5ce7b-e770-4c12-a0dc-9a53a08ee3a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27751 15956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_trans_nak.2775115956 |
| Directory | /workspace/5.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/5.usbdev_pending_in_trans.3252131289 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 155372785 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:24 PM PDT 24 |
| Finished | Aug 15 05:28:25 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-83df7a30-cb48-4cd5-bd8a-d0c45030c8bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32521 31289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pending_in_trans.3252131289 |
| Directory | /workspace/5.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_config_pinflip.3814948223 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 208853717 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:21 PM PDT 24 |
| Finished | Aug 15 05:28:22 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-4ce6a7c3-abdb-470f-b1d2-3b07d687beb5 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3814948223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.3814948223 |
| Directory | /workspace/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_config_usb_ref_disable.2726427133 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 154798950 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-139c649d-cc6f-432a-93d1-899ac09bca79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27264 27133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.2726427133 |
| Directory | /workspace/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_pins_sense.2510792775 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 96822829 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-df39ebfd-8c07-4998-bbd0-72d6090fd45c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25107 92775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.2510792775 |
| Directory | /workspace/5.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_buffer.3615654469 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 11664838078 ps |
| CPU time | 29.48 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:29:10 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-8b985930-43de-4de5-bdd9-d88a54843cbb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36156 54469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_buffer.3615654469 |
| Directory | /workspace/5.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_received.434430083 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 195470545 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-64d7a4c4-1aaf-42fe-b21d-5ccff76f5dab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=43443 0083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_received.434430083 |
| Directory | /workspace/5.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_sent.3185825056 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 222714429 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:28:23 PM PDT 24 |
| Finished | Aug 15 05:28:24 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-b1abb50f-e4d5-47a9-80ab-eccfc184c739 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31858 25056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_sent.3185825056 |
| Directory | /workspace/5.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_bus_disconnects.123453110 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 6134780459 ps |
| CPU time | 30.41 seconds |
| Started | Aug 15 05:28:27 PM PDT 24 |
| Finished | Aug 15 05:28:58 PM PDT 24 |
| Peak memory | 219984 kb |
| Host | smart-28459a9f-1a1d-4b09-841b-d03c8411cd23 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=123453110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.123453110 |
| Directory | /workspace/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_bus_resets.3457352054 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 5502712612 ps |
| CPU time | 18.56 seconds |
| Started | Aug 15 05:28:23 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 219200 kb |
| Host | smart-c5a5fc99-8153-444d-8910-666fd59a8616 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3457352054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.3457352054 |
| Directory | /workspace/5.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_suspends.1860322402 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 6063572741 ps |
| CPU time | 23.16 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:29:03 PM PDT 24 |
| Peak memory | 219320 kb |
| Host | smart-c8c5380e-3e66-426a-9501-e18c013f72c9 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1860322402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.1860322402 |
| Directory | /workspace/5.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/5.usbdev_random_length_in_transaction.2369305165 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 191022407 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:28:24 PM PDT 24 |
| Finished | Aug 15 05:28:25 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8db450ec-a92c-47a5-9885-0e9a22ee7e1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23693 05165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_in_transaction.2369305165 |
| Directory | /workspace/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_random_length_out_transaction.3949272604 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 215363633 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:28:22 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-2e11cff4-a5e3-4d27-9ab6-962a6a280ac9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39492 72604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.3949272604 |
| Directory | /workspace/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_resume_link_active.180527337 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 20157781563 ps |
| CPU time | 26.57 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:29:04 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-02ab1948-5e5a-4a1e-831d-14edcd739672 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18052 7337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_resume_link_active.180527337 |
| Directory | /workspace/5.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/5.usbdev_rx_crc_err.1849571811 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 202725195 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:28:28 PM PDT 24 |
| Finished | Aug 15 05:28:29 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-8a179de5-be03-41e0-b865-2000a704543f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18495 71811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rx_crc_err.1849571811 |
| Directory | /workspace/5.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_rx_full.1194692801 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 404372099 ps |
| CPU time | 1.32 seconds |
| Started | Aug 15 05:28:24 PM PDT 24 |
| Finished | Aug 15 05:28:26 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-f8d6d023-3a91-4984-80e3-818a6d5abbc8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11946 92801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rx_full.1194692801 |
| Directory | /workspace/5.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/5.usbdev_setup_stage.2877406237 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 150648939 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:28:22 PM PDT 24 |
| Finished | Aug 15 05:28:23 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-5b35f874-1979-4583-91a4-e1b7c6566c68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28774 06237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_setup_stage.2877406237 |
| Directory | /workspace/5.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/5.usbdev_setup_trans_ignored.160100024 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 144853504 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:28 PM PDT 24 |
| Finished | Aug 15 05:28:29 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-e393d4a2-bdb3-469d-871b-20ad62282877 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16010 0024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_setup_trans_ignored.160100024 |
| Directory | /workspace/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/5.usbdev_smoke.3388829579 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 254481733 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:28:23 PM PDT 24 |
| Finished | Aug 15 05:28:24 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-a1b4e47b-2f8f-4014-9ddb-96ae53b1f988 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33888 29579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.3388829579 |
| Directory | /workspace/5.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/5.usbdev_spurious_pids_ignored.1663233228 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 2327248676 ps |
| CPU time | 23.16 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 224096 kb |
| Host | smart-7e846df7-0d9c-448d-af32-d1a0de705b7a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1663233228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.1663233228 |
| Directory | /workspace/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/5.usbdev_stall_priority_over_nak.3934470978 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 213302096 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:28:32 PM PDT 24 |
| Finished | Aug 15 05:28:33 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-e9626596-fc31-4134-b725-78225a493b9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39344 70978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.3934470978 |
| Directory | /workspace/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/5.usbdev_stall_trans.891332049 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 157325668 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:28:24 PM PDT 24 |
| Finished | Aug 15 05:28:25 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-c2511847-fe2d-4ea0-92cc-5bf6a752160d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89133 2049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_trans.891332049 |
| Directory | /workspace/5.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_stream_len_max.101336496 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 1318921445 ps |
| CPU time | 2.99 seconds |
| Started | Aug 15 05:28:23 PM PDT 24 |
| Finished | Aug 15 05:28:26 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-3d726abe-22d4-4bc7-9341-1fde24565ce4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10133 6496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.101336496 |
| Directory | /workspace/5.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/5.usbdev_streaming_out.3256090771 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 2308472759 ps |
| CPU time | 67.26 seconds |
| Started | Aug 15 05:28:26 PM PDT 24 |
| Finished | Aug 15 05:29:33 PM PDT 24 |
| Peak memory | 217332 kb |
| Host | smart-9c972d73-0cb1-4e9b-9654-6fb50df4ac60 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32560 90771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_streaming_out.3256090771 |
| Directory | /workspace/5.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/5.usbdev_timeout_missing_host_handshake.3729203034 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 604791669 ps |
| CPU time | 11.73 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:48 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-6640e20e-aba8-427b-b5a9-e07febf66faf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3729203034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host _handshake.3729203034 |
| Directory | /workspace/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/5.usbdev_tx_rx_disruption.3301284031 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 663391542 ps |
| CPU time | 1.83 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-9f964361-ea7d-4d5b-bc2c-3772c7ca6452 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3301284031 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_tx_rx_disruption.3301284031 |
| Directory | /workspace/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/50.usbdev_endpoint_types.1361349716 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 502048050 ps |
| CPU time | 1.39 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:34:42 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-09ac763c-c0a1-4de6-b613-dfe697fc4c4a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1361349716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.1361349716 |
| Directory | /workspace/50.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/50.usbdev_tx_rx_disruption.3868194158 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 586783077 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:34:45 PM PDT 24 |
| Finished | Aug 15 05:34:46 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-10a1d333-bf88-4e35-89bf-75989a25cc7e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3868194158 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 50.usbdev_tx_rx_disruption.3868194158 |
| Directory | /workspace/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/51.usbdev_endpoint_types.179404335 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 280204285 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:34:39 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-a91ce3de-fd6d-40e5-954b-b0a0705d9fd7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=179404335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.179404335 |
| Directory | /workspace/51.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/51.usbdev_tx_rx_disruption.1549474076 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 542358287 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:34:43 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-34c64674-31be-402f-8cb4-7160a92df2f2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1549474076 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 51.usbdev_tx_rx_disruption.1549474076 |
| Directory | /workspace/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/52.usbdev_endpoint_types.1131119057 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 373163860 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:34:34 PM PDT 24 |
| Finished | Aug 15 05:34:35 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-61c59d47-a065-42ad-a96a-116e219ed15a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1131119057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.1131119057 |
| Directory | /workspace/52.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/52.usbdev_tx_rx_disruption.2785214640 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 459387081 ps |
| CPU time | 1.37 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-d28af789-ae7a-48d5-8372-35a28db0a8f7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2785214640 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 52.usbdev_tx_rx_disruption.2785214640 |
| Directory | /workspace/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/53.usbdev_endpoint_types.1036084813 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 172485618 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:34:46 PM PDT 24 |
| Finished | Aug 15 05:34:47 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a54f86c2-2f78-47a9-a50b-862122715487 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1036084813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.1036084813 |
| Directory | /workspace/53.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/53.usbdev_tx_rx_disruption.4045631423 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 637457850 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-60e4356f-4d75-422b-93d4-a71cb783463a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4045631423 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 53.usbdev_tx_rx_disruption.4045631423 |
| Directory | /workspace/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/54.usbdev_endpoint_types.1417599195 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 387329660 ps |
| CPU time | 1.34 seconds |
| Started | Aug 15 05:34:37 PM PDT 24 |
| Finished | Aug 15 05:34:39 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-eb4636b8-4e18-4493-b5ca-ace8d4802ca1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1417599195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.1417599195 |
| Directory | /workspace/54.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/54.usbdev_tx_rx_disruption.1099916874 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 659243853 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:34:43 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-cfdc385d-463f-4adf-bbb3-ded7719c0fc7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1099916874 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 54.usbdev_tx_rx_disruption.1099916874 |
| Directory | /workspace/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/55.usbdev_tx_rx_disruption.1142592236 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 456847145 ps |
| CPU time | 1.38 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-92a2d488-5712-4d56-bc80-e26d74399492 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1142592236 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 55.usbdev_tx_rx_disruption.1142592236 |
| Directory | /workspace/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/56.usbdev_endpoint_types.942437831 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 681187270 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:34:39 PM PDT 24 |
| Finished | Aug 15 05:34:41 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-96da1881-a69c-4fa3-9fd9-83cf855dc769 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=942437831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.942437831 |
| Directory | /workspace/56.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/56.usbdev_tx_rx_disruption.1575566084 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 545799647 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:34:43 PM PDT 24 |
| Finished | Aug 15 05:34:45 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-1b129d66-b821-4802-ae3f-76b30ab87f4a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1575566084 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 56.usbdev_tx_rx_disruption.1575566084 |
| Directory | /workspace/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/57.usbdev_tx_rx_disruption.3992126496 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 435398964 ps |
| CPU time | 1.38 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:34:43 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-53cfb176-d596-4f6f-9f2b-c5469975009d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3992126496 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 57.usbdev_tx_rx_disruption.3992126496 |
| Directory | /workspace/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/58.usbdev_tx_rx_disruption.50552332 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 600742032 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-ed054850-9e0a-40f0-931f-5ce8e95c1bae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50552332 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 58.usbdev_tx_rx_disruption.50552332 |
| Directory | /workspace/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/59.usbdev_endpoint_types.595915857 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 250956249 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e9c91c15-b4c1-40e1-8e08-8be15dcf10ee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=595915857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.595915857 |
| Directory | /workspace/59.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/59.usbdev_tx_rx_disruption.3771915579 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 618632473 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:34:38 PM PDT 24 |
| Finished | Aug 15 05:34:40 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e56d1578-3098-4376-b47b-815aa18798cf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3771915579 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 59.usbdev_tx_rx_disruption.3771915579 |
| Directory | /workspace/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/6.usbdev_alert_test.610116866 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 43906396 ps |
| CPU time | 0.68 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-3ddcc054-358f-4394-bcda-64d51fddf36f |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=610116866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.610116866 |
| Directory | /workspace/6.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_disconnect.879298804 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 4259708955 ps |
| CPU time | 6.36 seconds |
| Started | Aug 15 05:28:28 PM PDT 24 |
| Finished | Aug 15 05:28:35 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-a5cb504b-80f6-4546-acdd-8072fea0e6fd |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=879298804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon _wake_disconnect.879298804 |
| Directory | /workspace/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_reset.4095356146 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 15079690314 ps |
| CPU time | 17.32 seconds |
| Started | Aug 15 05:28:24 PM PDT 24 |
| Finished | Aug 15 05:28:42 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-563e2017-22f2-4527-a5d1-2092fe3c124c |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4095356146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.4095356146 |
| Directory | /workspace/6.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_resume.2373498422 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 31030560128 ps |
| CPU time | 45.83 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:29:24 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-5c25a735-a035-4d96-929e-aef2a14a0589 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2373498422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_ao n_wake_resume.2373498422 |
| Directory | /workspace/6.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/6.usbdev_av_buffer.1129779610 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 226815159 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:28:34 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-665e8c3e-9f52-4125-b291-37cee8b81738 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11297 79610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_av_buffer.1129779610 |
| Directory | /workspace/6.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/6.usbdev_bitstuff_err.3782107634 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 154981953 ps |
| CPU time | 0.81 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-79d68261-1922-4e4f-802d-d05f5622420f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37821 07634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_bitstuff_err.3782107634 |
| Directory | /workspace/6.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_data_toggle_clear.2741639879 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 214636177 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:28:26 PM PDT 24 |
| Finished | Aug 15 05:28:27 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-4171a03b-960a-496d-b6c4-e5c83f665110 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27416 39879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_clear.2741639879 |
| Directory | /workspace/6.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/6.usbdev_data_toggle_restore.1767824426 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 810810773 ps |
| CPU time | 2.09 seconds |
| Started | Aug 15 05:28:24 PM PDT 24 |
| Finished | Aug 15 05:28:26 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-201d12ae-47a4-43a8-9c60-6835838c18a5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1767824426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.1767824426 |
| Directory | /workspace/6.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/6.usbdev_device_address.1095611741 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 34620277238 ps |
| CPU time | 58.09 seconds |
| Started | Aug 15 05:28:26 PM PDT 24 |
| Finished | Aug 15 05:29:24 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-446b7894-9482-4702-a30b-e057b6c38eae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10956 11741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.1095611741 |
| Directory | /workspace/6.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/6.usbdev_device_timeout.262163612 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 1328537858 ps |
| CPU time | 9.68 seconds |
| Started | Aug 15 05:28:27 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-2d99c24e-e687-4c7a-9ce6-52ee9269b524 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=262163612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.262163612 |
| Directory | /workspace/6.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/6.usbdev_disable_endpoint.2206074027 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 387832633 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-98c999b2-1c57-4214-beae-c6781905901c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22060 74027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disable_endpoint.2206074027 |
| Directory | /workspace/6.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/6.usbdev_disconnected.1554918 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 173800087 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:34 PM PDT 24 |
| Finished | Aug 15 05:28:35 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-7323b77d-6216-4bb9-8ae2-c7a343445db7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15549 18 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disconnected.1554918 |
| Directory | /workspace/6.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/6.usbdev_enable.305278901 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 83663529 ps |
| CPU time | 0.77 seconds |
| Started | Aug 15 05:28:24 PM PDT 24 |
| Finished | Aug 15 05:28:24 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-1b895ae4-709a-496d-b8c9-4b0a0a658259 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30527 8901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_enable.305278901 |
| Directory | /workspace/6.usbdev_enable/latest |
| Test location | /workspace/coverage/default/6.usbdev_endpoint_access.802571908 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 893583341 ps |
| CPU time | 2.41 seconds |
| Started | Aug 15 05:28:22 PM PDT 24 |
| Finished | Aug 15 05:28:25 PM PDT 24 |
| Peak memory | 207948 kb |
| Host | smart-5f92bbd1-0482-4bcd-ad0d-bc67ffca84d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80257 1908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.802571908 |
| Directory | /workspace/6.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/6.usbdev_endpoint_types.609792543 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 151519632 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:28:26 PM PDT 24 |
| Finished | Aug 15 05:28:27 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-2af23443-e695-43ce-9e89-2147653ec6d5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=609792543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.609792543 |
| Directory | /workspace/6.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/6.usbdev_fifo_rst.292502959 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 387661388 ps |
| CPU time | 2.66 seconds |
| Started | Aug 15 05:28:34 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-44cf7d81-365e-46bc-b656-cee629b30c48 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29250 2959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_fifo_rst.292502959 |
| Directory | /workspace/6.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_iso.4240986278 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 246694681 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:28:26 PM PDT 24 |
| Finished | Aug 15 05:28:28 PM PDT 24 |
| Peak memory | 215780 kb |
| Host | smart-2caa3862-c009-4e41-ab5d-96cdc206b000 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4240986278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.4240986278 |
| Directory | /workspace/6.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_stall.1999843627 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 143834320 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:28:27 PM PDT 24 |
| Finished | Aug 15 05:28:28 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-83eef586-f4ad-403f-aff1-367d4372960b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19998 43627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_stall.1999843627 |
| Directory | /workspace/6.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_trans.2885068279 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 170474464 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:40 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-ebc7c2f8-e38a-49a5-93e6-bc9c4bb65cdf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28850 68279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_trans.2885068279 |
| Directory | /workspace/6.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_invalid_sync.2604482723 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 4713494348 ps |
| CPU time | 134.03 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:30:51 PM PDT 24 |
| Peak memory | 224152 kb |
| Host | smart-060a2f54-aba7-4df0-a697-8fd15ee56cf6 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2604482723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.2604482723 |
| Directory | /workspace/6.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/6.usbdev_iso_retraction.3910544612 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 10580575391 ps |
| CPU time | 76.73 seconds |
| Started | Aug 15 05:28:31 PM PDT 24 |
| Finished | Aug 15 05:29:48 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-6dd42c6b-fc1d-48e3-8748-600b17968f3e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3910544612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.3910544612 |
| Directory | /workspace/6.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_in_err.1895673040 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 233479140 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:28:34 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-a70f1127-9d50-40c0-974c-93364bdd5ba5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18956 73040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_in_err.1895673040 |
| Directory | /workspace/6.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_resume.1251642140 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 29530072454 ps |
| CPU time | 38.62 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:29:15 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-cddffc92-6f11-4dec-86c2-bafc0fe14d87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12516 42140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_resume.1251642140 |
| Directory | /workspace/6.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_suspend.3903853188 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 10278166497 ps |
| CPU time | 14.28 seconds |
| Started | Aug 15 05:28:32 PM PDT 24 |
| Finished | Aug 15 05:28:46 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-9bcb4900-fc8d-4406-ac22-3158f34eb056 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39038 53188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_suspend.3903853188 |
| Directory | /workspace/6.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/6.usbdev_low_speed_traffic.3648882626 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 5322214859 ps |
| CPU time | 44.35 seconds |
| Started | Aug 15 05:28:26 PM PDT 24 |
| Finished | Aug 15 05:29:10 PM PDT 24 |
| Peak memory | 216012 kb |
| Host | smart-3edbfd1d-b43d-4763-a4bb-71d9bf3cabce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3648882626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.3648882626 |
| Directory | /workspace/6.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_inter_pkt_delay.2376577123 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 2184952725 ps |
| CPU time | 62.13 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:29:38 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-e4a030b4-6298-42d5-8bad-c005259a5371 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2376577123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.2376577123 |
| Directory | /workspace/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_length_in_transaction.1605483665 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 258427985 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-4fd3002b-fe04-49ec-9e99-5b7abf42eb9d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1605483665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.1605483665 |
| Directory | /workspace/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_length_out_transaction.4178016858 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 195054644 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-3299894a-8c27-4c62-bdd4-3146d94adaf9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41780 16858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.4178016858 |
| Directory | /workspace/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_non_iso_usb_traffic.2734622580 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 3153232316 ps |
| CPU time | 26.03 seconds |
| Started | Aug 15 05:28:21 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 217980 kb |
| Host | smart-166e23a7-1989-4224-9f40-b37c9c56da21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27346 22580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.2734622580 |
| Directory | /workspace/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_usb_traffic.2048657693 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 2808056557 ps |
| CPU time | 29.23 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:29:07 PM PDT 24 |
| Peak memory | 218140 kb |
| Host | smart-08c06358-492c-4bad-b12a-25c5b01e79fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2048657693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.2048657693 |
| Directory | /workspace/6.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_inter_pkt_delay.3411077306 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 2104089307 ps |
| CPU time | 19.99 seconds |
| Started | Aug 15 05:28:31 PM PDT 24 |
| Finished | Aug 15 05:28:52 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-98b325c8-0777-4558-9148-bb3371dda9a1 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3411077306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.3411077306 |
| Directory | /workspace/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_length_in_transaction.1285718930 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 178475582 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-722ca430-6566-4494-81d5-2c450d117400 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1285718930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.1285718930 |
| Directory | /workspace/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_length_out_transaction.1206923339 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 183161994 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-1dbb8e3c-ee99-46d3-9c0c-ae656f1fd4f5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12069 23339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.1206923339 |
| Directory | /workspace/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_nak_trans.1072425446 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 171005034 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-4dad561a-8884-4eda-b5ee-8c0f10b77c7d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10724 25446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_nak_trans.1072425446 |
| Directory | /workspace/6.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_iso.910600731 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 151215561 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-bd7bbdcd-0e4f-41cd-ac29-698932330f0f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91060 0731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_iso.910600731 |
| Directory | /workspace/6.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_stall.4236527193 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 174438344 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:40 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-406c734c-dc48-4aea-96ed-b0c5d3b8cad1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42365 27193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_stall.4236527193 |
| Directory | /workspace/6.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_trans_nak.3560874328 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 223145785 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:40 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-e3801694-e59d-4393-9cec-9b4156a4af5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35608 74328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_trans_nak.3560874328 |
| Directory | /workspace/6.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/6.usbdev_pending_in_trans.3924281472 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 164634039 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-d202706e-a6ab-4890-aa9b-45b1aae97577 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39242 81472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pending_in_trans.3924281472 |
| Directory | /workspace/6.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_config_pinflip.2104267614 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 226962473 ps |
| CPU time | 1.13 seconds |
| Started | Aug 15 05:28:42 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-dd21435e-796a-457b-81cf-feaa9e9e6c6e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2104267614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.2104267614 |
| Directory | /workspace/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_config_usb_ref_disable.489599898 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 150451211 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-4667a332-1496-4116-b863-440f1290b796 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48959 9898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.489599898 |
| Directory | /workspace/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_pins_sense.1334033457 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 106984584 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-31cd13e4-7063-44ea-b8b6-1e7fa6c1dba2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13340 33457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.1334033457 |
| Directory | /workspace/6.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_buffer.2919860053 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 11926245537 ps |
| CPU time | 30.04 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:29:05 PM PDT 24 |
| Peak memory | 215792 kb |
| Host | smart-68c42aea-e17d-41ac-91e1-f660f83fcd4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29198 60053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_buffer.2919860053 |
| Directory | /workspace/6.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_received.2810971145 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 196239068 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-0250e330-a5fb-4e5b-af74-2fd71a8281d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28109 71145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_received.2810971145 |
| Directory | /workspace/6.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_sent.3637558487 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 252942637 ps |
| CPU time | 1.02 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-75a45062-59bc-4eeb-ba5e-326371f7f29f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36375 58487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_sent.3637558487 |
| Directory | /workspace/6.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_bus_disconnects.3983446133 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 3504343542 ps |
| CPU time | 33.66 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:29:10 PM PDT 24 |
| Peak memory | 224004 kb |
| Host | smart-e5fffe57-4b28-4213-a4d1-b6a08de790ab |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3983446133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.3983446133 |
| Directory | /workspace/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_bus_resets.2884214610 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 4508585810 ps |
| CPU time | 42.54 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:29:21 PM PDT 24 |
| Peak memory | 223984 kb |
| Host | smart-674795bc-afd4-46d6-9450-14877e19bac4 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2884214610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.2884214610 |
| Directory | /workspace/6.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_suspends.1012187656 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 6274274119 ps |
| CPU time | 73.95 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:29:53 PM PDT 24 |
| Peak memory | 219664 kb |
| Host | smart-0f06ae5c-8f4f-40e4-9ef5-7b5d82d6184f |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1012187656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.1012187656 |
| Directory | /workspace/6.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/6.usbdev_random_length_in_transaction.2514935490 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 178511618 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-8782206c-d2b4-4112-9780-6f8513d71731 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25149 35490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_in_transaction.2514935490 |
| Directory | /workspace/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_random_length_out_transaction.3632747061 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 195724909 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:42 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c41237a4-ca35-41ea-a972-2a74b9f77359 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36327 47061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.3632747061 |
| Directory | /workspace/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_resume_link_active.38202571 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 20156258210 ps |
| CPU time | 25.86 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:29:06 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-b32eeb8d-fe96-4ddf-a617-b1b211410b6d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38202 571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_resume_link_active.38202571 |
| Directory | /workspace/6.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/6.usbdev_rx_crc_err.1282767876 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 184685662 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:40 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-976a98bf-f054-42a8-95b8-979e97701f6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12827 67876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rx_crc_err.1282767876 |
| Directory | /workspace/6.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_rx_full.356691844 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 378161793 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:28:41 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-4e4c6709-38b3-476c-938c-fa5eecf75f26 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35669 1844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rx_full.356691844 |
| Directory | /workspace/6.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/6.usbdev_setup_stage.1859776865 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 163712519 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-401adc66-0ecf-4d49-a112-b756e75c9569 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18597 76865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_setup_stage.1859776865 |
| Directory | /workspace/6.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/6.usbdev_setup_trans_ignored.3506333323 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 162331981 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-cd0566d8-03bf-479c-af0a-5988b39f76d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35063 33323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_setup_trans_ignored.3506333323 |
| Directory | /workspace/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/6.usbdev_smoke.3168875176 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 252805311 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:28:36 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-24519e05-cb5d-46f2-b185-dfe4f0d48a86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31688 75176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.3168875176 |
| Directory | /workspace/6.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/6.usbdev_spurious_pids_ignored.1471671879 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 2106128993 ps |
| CPU time | 20.06 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:59 PM PDT 24 |
| Peak memory | 216880 kb |
| Host | smart-02f48fc3-3c10-4f05-9b0a-edc729a3ddd5 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1471671879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.1471671879 |
| Directory | /workspace/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/6.usbdev_stall_priority_over_nak.2745760812 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 166306783 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:43 PM PDT 24 |
| Finished | Aug 15 05:28:44 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a2b9e067-f9dd-47d2-a4c7-8a097f9c1211 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27457 60812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.2745760812 |
| Directory | /workspace/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/6.usbdev_stall_trans.3883108709 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 183201564 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-d20bd2b4-4424-4fb4-9cb6-b9a41c23447d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38831 08709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_trans.3883108709 |
| Directory | /workspace/6.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_stream_len_max.2345659516 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 574038085 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:42 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8ec6398e-6083-41e0-81a2-04f6a6f60756 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23456 59516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.2345659516 |
| Directory | /workspace/6.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/6.usbdev_streaming_out.1219759373 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 2249320066 ps |
| CPU time | 22.08 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 215812 kb |
| Host | smart-4cf0dc14-7759-4fcd-8e15-c74f31feca00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12197 59373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_streaming_out.1219759373 |
| Directory | /workspace/6.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/6.usbdev_timeout_missing_host_handshake.3273129743 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 2949677084 ps |
| CPU time | 18.68 seconds |
| Started | Aug 15 05:28:32 PM PDT 24 |
| Finished | Aug 15 05:28:51 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-109f5b52-7b38-49a1-8a2d-425b06d7a48a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3273129743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host _handshake.3273129743 |
| Directory | /workspace/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/6.usbdev_tx_rx_disruption.95771065 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 484916944 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-42520336-4ce0-4492-96ee-f8425159b7cd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95771065 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_tx_rx_disruption.95771065 |
| Directory | /workspace/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/60.usbdev_endpoint_types.2759614206 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 633456560 ps |
| CPU time | 1.78 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:34:43 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-51e4ef71-f8af-4a0d-8da0-1b8db9e1579a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2759614206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.2759614206 |
| Directory | /workspace/60.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/60.usbdev_tx_rx_disruption.1159396553 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 518834053 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-2dff24a3-1f32-4ca9-9dcf-898c8b50494f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1159396553 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 60.usbdev_tx_rx_disruption.1159396553 |
| Directory | /workspace/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/61.usbdev_endpoint_types.3294443640 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 606593923 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:34:40 PM PDT 24 |
| Finished | Aug 15 05:34:42 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-61e60a03-1715-4b55-8dce-d52648c43348 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3294443640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.3294443640 |
| Directory | /workspace/61.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/61.usbdev_tx_rx_disruption.3509311594 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 490686208 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-edecae63-23bf-4bb4-aab8-2ecb0579f37a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3509311594 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 61.usbdev_tx_rx_disruption.3509311594 |
| Directory | /workspace/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/62.usbdev_endpoint_types.1716397569 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 456058043 ps |
| CPU time | 1.44 seconds |
| Started | Aug 15 05:34:34 PM PDT 24 |
| Finished | Aug 15 05:34:35 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-c5d3d6ab-0861-4ccf-8e8b-f88bcb17ef34 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1716397569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.1716397569 |
| Directory | /workspace/62.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/63.usbdev_endpoint_types.3466773009 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 161552368 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:34:41 PM PDT 24 |
| Finished | Aug 15 05:34:42 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-8b83c9c9-0e30-40c8-a319-223e136d95c3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3466773009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.3466773009 |
| Directory | /workspace/63.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/63.usbdev_tx_rx_disruption.1812198052 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 429900376 ps |
| CPU time | 1.35 seconds |
| Started | Aug 15 05:34:46 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-31150d94-cf9e-4625-861c-c71b42b266a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1812198052 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 63.usbdev_tx_rx_disruption.1812198052 |
| Directory | /workspace/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/64.usbdev_endpoint_types.2774971479 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 493395762 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c0206291-235c-404c-bd11-1a0acc3c87d3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2774971479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.2774971479 |
| Directory | /workspace/64.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/64.usbdev_tx_rx_disruption.2834755490 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 625274498 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:01 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-9e5139c4-3a11-4cc5-b433-1fcdd21b481c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2834755490 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 64.usbdev_tx_rx_disruption.2834755490 |
| Directory | /workspace/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/65.usbdev_endpoint_types.1061906128 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 717083769 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-f4c89e04-8bfb-4665-b8a5-5da6134c20e6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1061906128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.1061906128 |
| Directory | /workspace/65.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/65.usbdev_tx_rx_disruption.1689893367 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 576002087 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-376c1908-ecb3-4133-a409-c60d697d8958 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1689893367 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 65.usbdev_tx_rx_disruption.1689893367 |
| Directory | /workspace/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/66.usbdev_endpoint_types.3465542014 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 435702079 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:34:37 PM PDT 24 |
| Finished | Aug 15 05:34:39 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-19187830-2e9f-47ee-902c-2e2d0bac49fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3465542014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.3465542014 |
| Directory | /workspace/66.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/66.usbdev_tx_rx_disruption.929392016 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 590622744 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-e6881dd7-9aa7-4516-a664-64fefd1bc76c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=929392016 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 66.usbdev_tx_rx_disruption.929392016 |
| Directory | /workspace/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/67.usbdev_tx_rx_disruption.1549199509 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 537018149 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:35:00 PM PDT 24 |
| Finished | Aug 15 05:35:02 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a6d347ae-c4b2-4b58-b029-7344a5e17e01 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1549199509 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 67.usbdev_tx_rx_disruption.1549199509 |
| Directory | /workspace/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/68.usbdev_endpoint_types.3573413946 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 528966862 ps |
| CPU time | 1.45 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ec89fc03-ceb1-412d-8163-f7cd8086b426 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3573413946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.3573413946 |
| Directory | /workspace/68.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/68.usbdev_tx_rx_disruption.1170619794 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 403078233 ps |
| CPU time | 1.39 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-cabb641c-d0d0-4686-8191-57e512fd97cc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1170619794 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 68.usbdev_tx_rx_disruption.1170619794 |
| Directory | /workspace/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/69.usbdev_endpoint_types.3643957842 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 307793805 ps |
| CPU time | 1.14 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:52 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-cb390fa5-1776-4860-b65a-299717186bb6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3643957842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.3643957842 |
| Directory | /workspace/69.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/69.usbdev_tx_rx_disruption.1110350136 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 621229281 ps |
| CPU time | 1.58 seconds |
| Started | Aug 15 05:35:07 PM PDT 24 |
| Finished | Aug 15 05:35:09 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-34c96b93-5a00-4773-a94f-6554e0155ba6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1110350136 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 69.usbdev_tx_rx_disruption.1110350136 |
| Directory | /workspace/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/7.usbdev_alert_test.447143987 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 37820075 ps |
| CPU time | 0.65 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-2c1d4eec-2d36-4f5c-9af1-b4a11d2a5e2e |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=447143987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.447143987 |
| Directory | /workspace/7.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_disconnect.2382236139 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 6982788188 ps |
| CPU time | 9.5 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:46 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-c1e7e26f-9dee-4f72-82d2-f117c92b5546 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2382236139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_ao n_wake_disconnect.2382236139 |
| Directory | /workspace/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_reset.691575915 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 20303943549 ps |
| CPU time | 22.91 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:28:58 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-2846139d-7187-44c5-8323-df1f3595a52c |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=691575915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.691575915 |
| Directory | /workspace/7.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_resume.198114783 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 25023959500 ps |
| CPU time | 30.53 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:29:10 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-045f77fb-2357-41d3-a883-f2c4d6d6d56c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=198114783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon _wake_resume.198114783 |
| Directory | /workspace/7.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/7.usbdev_av_buffer.495897167 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 167302152 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:28:43 PM PDT 24 |
| Finished | Aug 15 05:28:44 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-944341dd-6555-4c6b-9260-5349618d216c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49589 7167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_av_buffer.495897167 |
| Directory | /workspace/7.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/7.usbdev_bitstuff_err.2513760267 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 160493361 ps |
| CPU time | 0.85 seconds |
| Started | Aug 15 05:28:43 PM PDT 24 |
| Finished | Aug 15 05:28:44 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-7698493a-f9d4-4def-9fba-8e39d4d50476 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25137 60267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_bitstuff_err.2513760267 |
| Directory | /workspace/7.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_data_toggle_clear.2524382284 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 222392499 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d60b6e59-78bd-4fd5-ab9a-3f12d9a6b4cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25243 82284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_clear.2524382284 |
| Directory | /workspace/7.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/7.usbdev_data_toggle_restore.350612034 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 589972712 ps |
| CPU time | 1.63 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a6035318-fdf2-4d2f-936e-b0f886b228f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=350612034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.350612034 |
| Directory | /workspace/7.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/7.usbdev_device_address.3222112329 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 16284370317 ps |
| CPU time | 29.86 seconds |
| Started | Aug 15 05:28:44 PM PDT 24 |
| Finished | Aug 15 05:29:14 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-001227aa-f1ee-4268-a841-58b5214a6e88 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32221 12329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.3222112329 |
| Directory | /workspace/7.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/7.usbdev_device_timeout.978966721 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 166895674 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-c33a7e50-aa00-49e8-86d9-1908d2f1630f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=978966721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.978966721 |
| Directory | /workspace/7.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/7.usbdev_disable_endpoint.2835318597 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 711808704 ps |
| CPU time | 1.83 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-c330ebcb-5356-42af-8146-f0f22bf1d386 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28353 18597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disable_endpoint.2835318597 |
| Directory | /workspace/7.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/7.usbdev_disconnected.2737275698 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 143429578 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-ed147be6-dab8-43cf-88d5-96f96acb86ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27372 75698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disconnected.2737275698 |
| Directory | /workspace/7.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/7.usbdev_enable.1326444989 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 81988044 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 05:28:34 PM PDT 24 |
| Finished | Aug 15 05:28:35 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-20fd4ac3-fe2a-470a-becb-297db063c6da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13264 44989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_enable.1326444989 |
| Directory | /workspace/7.usbdev_enable/latest |
| Test location | /workspace/coverage/default/7.usbdev_endpoint_access.3285452198 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 954869003 ps |
| CPU time | 2.51 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-828224ce-5685-4bdb-92c4-c7ddb5c29bfd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32854 52198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.3285452198 |
| Directory | /workspace/7.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/7.usbdev_endpoint_types.3508581813 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 492469826 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-1ab18eb0-720e-4ca8-b4e7-e35fa64c221d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3508581813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.3508581813 |
| Directory | /workspace/7.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/7.usbdev_fifo_rst.716896759 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 189307221 ps |
| CPU time | 1.96 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-82795cb8-0fc0-463a-9695-6e8d74918bc0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71689 6759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_fifo_rst.716896759 |
| Directory | /workspace/7.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_iso.147188954 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 204169170 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:28:34 PM PDT 24 |
| Peak memory | 215840 kb |
| Host | smart-e509e9ae-c514-48d2-a77e-13cf1a9d75a2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=147188954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.147188954 |
| Directory | /workspace/7.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_stall.3284699762 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 154926169 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-33081203-bdf6-41c0-b418-efa711c6606e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32846 99762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_stall.3284699762 |
| Directory | /workspace/7.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_trans.3810838892 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 257110458 ps |
| CPU time | 1.12 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-af11b4d4-609a-4468-80c6-a7a7d8cdd2e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38108 38892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_trans.3810838892 |
| Directory | /workspace/7.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_invalid_sync.2639639474 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 2339988929 ps |
| CPU time | 64.86 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:29:44 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-851ea0d5-993a-419e-b713-e0a902881155 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2639639474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.2639639474 |
| Directory | /workspace/7.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/7.usbdev_iso_retraction.2589807335 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 4554074673 ps |
| CPU time | 51.09 seconds |
| Started | Aug 15 05:28:35 PM PDT 24 |
| Finished | Aug 15 05:29:26 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-470ede22-b6c6-4ab1-b29e-96e6102749d1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2589807335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.2589807335 |
| Directory | /workspace/7.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_in_err.647448937 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 209557887 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-8eea136d-2d50-49ec-a3ad-5442d6f5500e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64744 8937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_in_err.647448937 |
| Directory | /workspace/7.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_resume.3057886844 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 14110905305 ps |
| CPU time | 20.79 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:29:01 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-6f40a38a-c424-476f-96f4-1e41d7feb9ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30578 86844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_resume.3057886844 |
| Directory | /workspace/7.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_suspend.29164936 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 9830777298 ps |
| CPU time | 12.52 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:51 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-71b01571-9e0d-4dff-bea3-32448e42ce94 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29164 936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_suspend.29164936 |
| Directory | /workspace/7.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/7.usbdev_low_speed_traffic.3700747142 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 5159518754 ps |
| CPU time | 51.81 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-64f7b077-6240-4f8e-b33b-b7eb3e6fdbe3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3700747142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.3700747142 |
| Directory | /workspace/7.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_inter_pkt_delay.4071576034 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 3701833802 ps |
| CPU time | 28.54 seconds |
| Started | Aug 15 05:28:43 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-8cbf6067-87c4-45b2-b649-d31dfb537b10 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4071576034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.4071576034 |
| Directory | /workspace/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_length_in_transaction.721868582 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 259147605 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-5b93dfd2-4216-46e0-a150-b757b7fc806d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=721868582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.721868582 |
| Directory | /workspace/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_length_out_transaction.869255881 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 190407809 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:48 PM PDT 24 |
| Finished | Aug 15 05:28:49 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-2d70626c-5bdd-4d66-b199-7d1ed18e79eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=86925 5881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.869255881 |
| Directory | /workspace/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_non_iso_usb_traffic.3868786684 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 2867284652 ps |
| CPU time | 74.96 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:30:01 PM PDT 24 |
| Peak memory | 223844 kb |
| Host | smart-8b590efc-3ccc-40b8-960f-ba608229c18b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38687 86684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.3868786684 |
| Directory | /workspace/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_usb_traffic.3996698294 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 2726396311 ps |
| CPU time | 81.72 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:29:55 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-d0f8a9a5-5d47-49bd-9bcd-fa77cc6f4036 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3996698294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.3996698294 |
| Directory | /workspace/7.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_inter_pkt_delay.2221202110 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 2727669974 ps |
| CPU time | 26.87 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:29:06 PM PDT 24 |
| Peak memory | 217556 kb |
| Host | smart-4425b66b-b7c8-4e60-9bf5-1809a3f60d37 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2221202110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.2221202110 |
| Directory | /workspace/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_length_in_transaction.770670545 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 190450574 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207276 kb |
| Host | smart-be43062c-824a-416d-a5c2-b9556143adee |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=770670545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.770670545 |
| Directory | /workspace/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_length_out_transaction.1497771659 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 145797093 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:45 PM PDT 24 |
| Finished | Aug 15 05:28:46 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-47c87640-6c4d-4f34-b64b-4b94817f8669 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14977 71659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.1497771659 |
| Directory | /workspace/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_nak_trans.2281318735 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 234912340 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-548a4cdc-90ac-4462-891b-407f715dd0b7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22813 18735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_nak_trans.2281318735 |
| Directory | /workspace/7.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_iso.555611128 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 187493836 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:28:32 PM PDT 24 |
| Finished | Aug 15 05:28:33 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-24830ad2-65f8-437c-bb62-7f76780e5d6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55561 1128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_iso.555611128 |
| Directory | /workspace/7.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_stall.3352871240 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 171871130 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8fabbaba-c041-4b99-8b2b-202307be21d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33528 71240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_stall.3352871240 |
| Directory | /workspace/7.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_trans_nak.1519804674 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 173678037 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-a07b5684-d30d-4c5d-a221-1ce2af441ca8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15198 04674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_trans_nak.1519804674 |
| Directory | /workspace/7.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/7.usbdev_pending_in_trans.1621926493 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 150545236 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:42 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5fc5fbf5-c4db-47be-b463-a043bb7d176e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16219 26493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pending_in_trans.1621926493 |
| Directory | /workspace/7.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_config_pinflip.1035360485 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 196515773 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-339a1197-bc93-4ccf-9d6c-bc246ee6c670 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1035360485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.1035360485 |
| Directory | /workspace/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_config_usb_ref_disable.1195751069 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 146347692 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-30661c19-3dcc-45a0-b3c5-dff7e4f1e757 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11957 51069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.1195751069 |
| Directory | /workspace/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_pins_sense.3016081498 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 41723716 ps |
| CPU time | 0.74 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e665a3f4-7a12-4d0d-ba12-bcf3ebe49786 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30160 81498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.3016081498 |
| Directory | /workspace/7.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_buffer.3837185113 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 7667425894 ps |
| CPU time | 21.04 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:29:07 PM PDT 24 |
| Peak memory | 220280 kb |
| Host | smart-3c688df6-adbb-4d30-82f8-71c048ed94dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38371 85113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_buffer.3837185113 |
| Directory | /workspace/7.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_received.1601135824 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 180346085 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:45 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-66871fe7-d2cc-42fb-bb4e-187936e71680 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16011 35824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_received.1601135824 |
| Directory | /workspace/7.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_sent.3270820426 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 210103371 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b1066d3a-f6fa-4469-9294-599f4c660c81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32708 20426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_sent.3270820426 |
| Directory | /workspace/7.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_bus_disconnects.3909726424 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 5610141261 ps |
| CPU time | 19.72 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:58 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-2b1f7b34-a873-4488-a025-81f9b73ea896 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3909726424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.3909726424 |
| Directory | /workspace/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_bus_resets.3884127950 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 6621870775 ps |
| CPU time | 93.67 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:30:20 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-8232e57a-bbf5-4b43-9fcb-43358a0c3ae4 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3884127950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.3884127950 |
| Directory | /workspace/7.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_suspends.2203526837 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 6237806307 ps |
| CPU time | 28.74 seconds |
| Started | Aug 15 05:28:33 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 224176 kb |
| Host | smart-66dc39b8-fdb9-45d2-80c3-54cf459f6458 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2203526837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.2203526837 |
| Directory | /workspace/7.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/7.usbdev_random_length_in_transaction.1879224968 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 204642195 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207264 kb |
| Host | smart-b7ce0efc-86c3-45a0-a341-478af7df8f2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18792 24968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_in_transaction.1879224968 |
| Directory | /workspace/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_random_length_out_transaction.244349498 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 156608339 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:28:39 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-b3bb9a8a-10e4-4504-b0b6-57d8c863d70d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24434 9498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.244349498 |
| Directory | /workspace/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_resume_link_active.3857821900 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 20155498594 ps |
| CPU time | 28.38 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:29:08 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-29ffd749-9af1-409f-9097-1d62dc478f1f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38578 21900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_resume_link_active.3857821900 |
| Directory | /workspace/7.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/7.usbdev_rx_crc_err.3464792303 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 177349742 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207312 kb |
| Host | smart-52d01106-92f6-415e-872e-54dc5a79c1dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34647 92303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rx_crc_err.3464792303 |
| Directory | /workspace/7.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_rx_full.2771811340 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 254750088 ps |
| CPU time | 1.05 seconds |
| Started | Aug 15 05:28:36 PM PDT 24 |
| Finished | Aug 15 05:28:37 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-5d636825-170c-42f1-b708-e2965a2c98d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27718 11340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rx_full.2771811340 |
| Directory | /workspace/7.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/7.usbdev_setup_stage.119713759 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 177266606 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207244 kb |
| Host | smart-dffd0473-73ae-44b8-9e64-4f3fc88e956d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11971 3759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_setup_stage.119713759 |
| Directory | /workspace/7.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/7.usbdev_setup_trans_ignored.9789172 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 149358319 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:28:42 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-fb67abed-636c-4e3b-85f4-068ea0f12a53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97891 72 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_setup_trans_ignored.9789172 |
| Directory | /workspace/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/7.usbdev_smoke.2048369692 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 234701917 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207272 kb |
| Host | smart-0fc6e364-7cba-485e-a685-9f13aa249994 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20483 69692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.2048369692 |
| Directory | /workspace/7.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/7.usbdev_spurious_pids_ignored.2342857475 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 3908472049 ps |
| CPU time | 27.47 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 215664 kb |
| Host | smart-2c4416c1-5dc1-42d7-b57e-d4144c2f27d8 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2342857475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.2342857475 |
| Directory | /workspace/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/7.usbdev_stall_priority_over_nak.3712895351 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 176534386 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:40 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4c57b53f-88ce-4c99-a20d-553fa45d6e37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37128 95351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.3712895351 |
| Directory | /workspace/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/7.usbdev_stall_trans.662008037 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 168929749 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:52 PM PDT 24 |
| Peak memory | 207280 kb |
| Host | smart-c0beb4cc-4c79-486a-9735-7653d31cafef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66200 8037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_trans.662008037 |
| Directory | /workspace/7.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_stream_len_max.2557197263 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 526962959 ps |
| CPU time | 1.56 seconds |
| Started | Aug 15 05:28:37 PM PDT 24 |
| Finished | Aug 15 05:28:38 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a2137333-74e4-43ff-a99f-41869d6e94b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25571 97263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.2557197263 |
| Directory | /workspace/7.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/7.usbdev_streaming_out.2964593814 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 2948172423 ps |
| CPU time | 29.68 seconds |
| Started | Aug 15 05:28:38 PM PDT 24 |
| Finished | Aug 15 05:29:08 PM PDT 24 |
| Peak memory | 217200 kb |
| Host | smart-f9f6a926-36e2-4a0d-9532-4baab50b2e1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29645 93814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_streaming_out.2964593814 |
| Directory | /workspace/7.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/7.usbdev_timeout_missing_host_handshake.3469884818 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 606790233 ps |
| CPU time | 5.02 seconds |
| Started | Aug 15 05:28:41 PM PDT 24 |
| Finished | Aug 15 05:28:46 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-1e79ab12-15cb-49c7-b14f-383651a27293 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3469884818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host _handshake.3469884818 |
| Directory | /workspace/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/7.usbdev_tx_rx_disruption.882128845 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 471348448 ps |
| CPU time | 1.43 seconds |
| Started | Aug 15 05:28:42 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-95dab1b9-21d1-4d27-a9b4-8990edee3439 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=882128845 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_tx_rx_disruption.882128845 |
| Directory | /workspace/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/70.usbdev_endpoint_types.695951308 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 155996219 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:52 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-b06b0151-25e3-4e97-80a8-f8caf22f6376 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=695951308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.695951308 |
| Directory | /workspace/70.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/70.usbdev_tx_rx_disruption.1459116180 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 481404740 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:34:44 PM PDT 24 |
| Finished | Aug 15 05:34:46 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-55847898-5bf9-404d-a37b-87f0094229fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1459116180 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 70.usbdev_tx_rx_disruption.1459116180 |
| Directory | /workspace/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/71.usbdev_endpoint_types.724759146 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 256916836 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-57fc685d-e450-443c-ba0a-5b7dd8d43c8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=724759146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.724759146 |
| Directory | /workspace/71.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/71.usbdev_tx_rx_disruption.1388249077 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 557257069 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:34:42 PM PDT 24 |
| Finished | Aug 15 05:34:44 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f03fdcb6-0a3a-48e6-a522-db84aebe67ab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1388249077 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 71.usbdev_tx_rx_disruption.1388249077 |
| Directory | /workspace/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/72.usbdev_endpoint_types.3982701166 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 229682378 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-8f8a2ada-3dee-4b80-9651-7ddd6e5ca2b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3982701166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.3982701166 |
| Directory | /workspace/72.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/72.usbdev_tx_rx_disruption.354029000 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 544506966 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:34:52 PM PDT 24 |
| Finished | Aug 15 05:34:54 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-0e04fa37-dd97-4eaf-a802-f8db1b933c59 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=354029000 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 72.usbdev_tx_rx_disruption.354029000 |
| Directory | /workspace/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/73.usbdev_endpoint_types.752748571 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 241787193 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-b4a3099f-9649-46e7-a39f-8b9442df0b32 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=752748571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.752748571 |
| Directory | /workspace/73.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/73.usbdev_tx_rx_disruption.1011709008 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 543534745 ps |
| CPU time | 1.61 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-2cdd6e2b-0caa-4b3d-b0aa-a5a5199dd7b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1011709008 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 73.usbdev_tx_rx_disruption.1011709008 |
| Directory | /workspace/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/74.usbdev_endpoint_types.897589113 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 456743649 ps |
| CPU time | 1.28 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6a45ddd8-3ee2-43e0-a9f7-d28d7c849f92 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=897589113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.897589113 |
| Directory | /workspace/74.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/74.usbdev_tx_rx_disruption.2887411200 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 529582978 ps |
| CPU time | 1.69 seconds |
| Started | Aug 15 05:35:07 PM PDT 24 |
| Finished | Aug 15 05:35:13 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-03c6a0c2-cb49-4ecc-8d27-ad52194c25b5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2887411200 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 74.usbdev_tx_rx_disruption.2887411200 |
| Directory | /workspace/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/75.usbdev_endpoint_types.1723582500 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 304183737 ps |
| CPU time | 1.18 seconds |
| Started | Aug 15 05:35:01 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-c7c886b2-6579-4aa7-a869-c4e1693bd868 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1723582500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.1723582500 |
| Directory | /workspace/75.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/75.usbdev_tx_rx_disruption.3384981740 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 562111839 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:35:01 PM PDT 24 |
| Finished | Aug 15 05:35:03 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-566f55fa-63b1-40d9-95fe-4e3debaebc64 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3384981740 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 75.usbdev_tx_rx_disruption.3384981740 |
| Directory | /workspace/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/76.usbdev_endpoint_types.928274675 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 285975202 ps |
| CPU time | 1.09 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-28e0f10a-2b3e-4075-8f8a-fc39c020d172 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=928274675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.928274675 |
| Directory | /workspace/76.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/76.usbdev_tx_rx_disruption.3559419984 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 594452275 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-b07dc973-63e7-405f-81a8-46e91db68987 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3559419984 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 76.usbdev_tx_rx_disruption.3559419984 |
| Directory | /workspace/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/77.usbdev_tx_rx_disruption.4250585930 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 467882519 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-eef4e930-d5bf-44cb-b7a3-81b377fa183a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4250585930 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 77.usbdev_tx_rx_disruption.4250585930 |
| Directory | /workspace/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/78.usbdev_endpoint_types.1794072668 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 172323152 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:35:05 PM PDT 24 |
| Finished | Aug 15 05:35:06 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-65088c87-837c-4c21-ae92-7c3a6420deb0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1794072668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.1794072668 |
| Directory | /workspace/78.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/78.usbdev_tx_rx_disruption.473437075 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 557594058 ps |
| CPU time | 1.76 seconds |
| Started | Aug 15 05:34:46 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-ebbe9808-f53d-454d-9500-c13d36a58a5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=473437075 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 78.usbdev_tx_rx_disruption.473437075 |
| Directory | /workspace/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/79.usbdev_endpoint_types.549008943 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 190942823 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-70de1d5f-6e5d-483c-885e-fccd71c2657e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=549008943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.549008943 |
| Directory | /workspace/79.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/79.usbdev_tx_rx_disruption.1206972442 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 471450684 ps |
| CPU time | 1.6 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-7adaa941-8fc8-4ac9-ba72-5c2f4a6f1176 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1206972442 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 79.usbdev_tx_rx_disruption.1206972442 |
| Directory | /workspace/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/8.usbdev_alert_test.2524456991 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 120470903 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 05:29:07 PM PDT 24 |
| Finished | Aug 15 05:29:08 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-5f170612-a8f8-40cb-b8d3-0002e59d1680 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2524456991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.2524456991 |
| Directory | /workspace/8.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_disconnect.3747030733 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 12044899013 ps |
| CPU time | 18.25 seconds |
| Started | Aug 15 05:28:42 PM PDT 24 |
| Finished | Aug 15 05:29:01 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-8a562531-e203-4583-8218-c37adf5294b4 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3747030733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_ao n_wake_disconnect.3747030733 |
| Directory | /workspace/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_resume.1028965662 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 24581343637 ps |
| CPU time | 33.42 seconds |
| Started | Aug 15 05:28:41 PM PDT 24 |
| Finished | Aug 15 05:29:14 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-67327040-cfc9-4ee4-b7d4-f2e62a7e088b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1028965662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_ao n_wake_resume.1028965662 |
| Directory | /workspace/8.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/8.usbdev_av_buffer.2462655970 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 154829789 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:43 PM PDT 24 |
| Finished | Aug 15 05:28:44 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-422fb904-4e15-4e24-b931-a7d57884c6f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24626 55970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_av_buffer.2462655970 |
| Directory | /workspace/8.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/8.usbdev_bitstuff_err.3015405515 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 157374820 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:28:44 PM PDT 24 |
| Finished | Aug 15 05:28:45 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-d7eae268-76ff-4e41-9321-8489ae34087c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30154 05515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_bitstuff_err.3015405515 |
| Directory | /workspace/8.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_data_toggle_clear.1776652647 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 543216995 ps |
| CPU time | 1.78 seconds |
| Started | Aug 15 05:28:41 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-301d2020-c5f5-40d4-aee3-f84c42ddcab7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17766 52647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_clear.1776652647 |
| Directory | /workspace/8.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/8.usbdev_data_toggle_restore.4246887195 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 1191478245 ps |
| CPU time | 3.09 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-12ff41b9-f710-4615-b2f5-749e074dcb2f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4246887195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.4246887195 |
| Directory | /workspace/8.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/8.usbdev_device_address.1128069800 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 26424421519 ps |
| CPU time | 42.13 seconds |
| Started | Aug 15 05:28:50 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-a86b0513-1aeb-478a-8839-1b12e7e4a087 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11280 69800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.1128069800 |
| Directory | /workspace/8.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/8.usbdev_device_timeout.1424454968 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 430926114 ps |
| CPU time | 8.4 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:05 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-fb1b5852-8001-43e3-aa18-4bbee9b0acac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1424454968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.1424454968 |
| Directory | /workspace/8.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/8.usbdev_disable_endpoint.3036345098 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 1060556670 ps |
| CPU time | 2.37 seconds |
| Started | Aug 15 05:28:43 PM PDT 24 |
| Finished | Aug 15 05:28:46 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ea033816-4808-4127-b4ac-4b997d29e937 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30363 45098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disable_endpoint.3036345098 |
| Directory | /workspace/8.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/8.usbdev_disconnected.3426444113 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 149477043 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:01 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-98a7f1f6-650d-4fea-aea4-4b8bc5712914 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34264 44113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disconnected.3426444113 |
| Directory | /workspace/8.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/8.usbdev_enable.1453653173 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 78503540 ps |
| CPU time | 0.76 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-b118956b-deac-4f9a-9247-e896e194e77b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14536 53173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_enable.1453653173 |
| Directory | /workspace/8.usbdev_enable/latest |
| Test location | /workspace/coverage/default/8.usbdev_endpoint_access.669106090 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 712990316 ps |
| CPU time | 2.18 seconds |
| Started | Aug 15 05:28:51 PM PDT 24 |
| Finished | Aug 15 05:28:54 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-fd7bb289-9219-4bb0-ba69-7cb633b52c03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66910 6090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.669106090 |
| Directory | /workspace/8.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/8.usbdev_endpoint_types.1592217628 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 409608549 ps |
| CPU time | 1.24 seconds |
| Started | Aug 15 05:28:45 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4fcf3fa6-9551-4e91-b04a-01593a4bf34b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1592217628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.1592217628 |
| Directory | /workspace/8.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/8.usbdev_fifo_rst.160019862 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 282992243 ps |
| CPU time | 2.37 seconds |
| Started | Aug 15 05:28:45 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-dae3daca-a188-4417-a70b-b90ccc648248 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16001 9862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_fifo_rst.160019862 |
| Directory | /workspace/8.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_iso.3151333867 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 194999226 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:28:39 PM PDT 24 |
| Finished | Aug 15 05:28:40 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-ac5bc28d-a205-419d-9dad-adea3cee7f51 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3151333867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.3151333867 |
| Directory | /workspace/8.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_stall.1051030550 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 179287076 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-7cf4b690-da08-4072-bc8e-85b0bd58c609 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10510 30550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_stall.1051030550 |
| Directory | /workspace/8.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_trans.3932473756 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 213905979 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:28:41 PM PDT 24 |
| Finished | Aug 15 05:28:42 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-4b72f094-05fb-429a-b6bb-82f1a5243961 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39324 73756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_trans.3932473756 |
| Directory | /workspace/8.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_invalid_sync.4047049961 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 3458911487 ps |
| CPU time | 97.9 seconds |
| Started | Aug 15 05:28:52 PM PDT 24 |
| Finished | Aug 15 05:30:30 PM PDT 24 |
| Peak memory | 218292 kb |
| Host | smart-124116bc-089a-4bd8-a952-0c9493354c57 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4047049961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.4047049961 |
| Directory | /workspace/8.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/8.usbdev_iso_retraction.3897724969 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 10899949632 ps |
| CPU time | 143.71 seconds |
| Started | Aug 15 05:28:45 PM PDT 24 |
| Finished | Aug 15 05:31:09 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-e4ec3f36-d1d1-47b7-b356-323b58901f5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3897724969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.3897724969 |
| Directory | /workspace/8.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_in_err.3043438160 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 202071333 ps |
| CPU time | 0.94 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:42 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e3533d29-04dd-4e60-b340-85ed39379d6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30434 38160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_in_err.3043438160 |
| Directory | /workspace/8.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_resume.2820030610 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 13759820608 ps |
| CPU time | 22.12 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:18 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-94631dc5-0501-435f-bc79-78daa7623511 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28200 30610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_resume.2820030610 |
| Directory | /workspace/8.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_suspend.90173521 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 3833421567 ps |
| CPU time | 5.64 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:46 PM PDT 24 |
| Peak memory | 216772 kb |
| Host | smart-6b1f22a2-b494-4c3e-a8b2-f722a9924ec0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90173 521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_suspend.90173521 |
| Directory | /workspace/8.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/8.usbdev_low_speed_traffic.525301971 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 3639325451 ps |
| CPU time | 36.28 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:32 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-328411fc-18f0-43ba-b8f2-173d665a6327 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=525301971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.525301971 |
| Directory | /workspace/8.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_inter_pkt_delay.2407745560 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 2592944899 ps |
| CPU time | 20.19 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 217628 kb |
| Host | smart-3b5571aa-b4e7-4950-a4f4-82cf6c730aab |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2407745560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.2407745560 |
| Directory | /workspace/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_length_in_transaction.3979768314 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 246061810 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:28:41 PM PDT 24 |
| Finished | Aug 15 05:28:42 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-1fb078ba-53be-44cd-b3ef-d42d8906aa79 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3979768314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.3979768314 |
| Directory | /workspace/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_length_out_transaction.4108481863 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 186164693 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-46db7bae-120d-4d7c-bf81-4731c7843ccd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41084 81863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.4108481863 |
| Directory | /workspace/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_non_iso_usb_traffic.3320542582 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 3765256949 ps |
| CPU time | 30.31 seconds |
| Started | Aug 15 05:28:48 PM PDT 24 |
| Finished | Aug 15 05:29:18 PM PDT 24 |
| Peak memory | 224052 kb |
| Host | smart-0707646a-3d6b-4e29-98da-ae0cb7b4f3e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33205 42582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.3320542582 |
| Directory | /workspace/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_usb_traffic.1210065547 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 1815026256 ps |
| CPU time | 56.19 seconds |
| Started | Aug 15 05:28:43 PM PDT 24 |
| Finished | Aug 15 05:29:39 PM PDT 24 |
| Peak memory | 224052 kb |
| Host | smart-1bea2f23-3b5b-41fc-892e-4b86fe076b66 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1210065547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.1210065547 |
| Directory | /workspace/8.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_inter_pkt_delay.3558976384 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 2015934672 ps |
| CPU time | 59.93 seconds |
| Started | Aug 15 05:28:47 PM PDT 24 |
| Finished | Aug 15 05:29:47 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-33ed08c2-dd25-4d4c-a2a4-9d182f315239 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3558976384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.3558976384 |
| Directory | /workspace/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_length_in_transaction.1421800072 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 206392632 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:28:44 PM PDT 24 |
| Finished | Aug 15 05:28:46 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3377a93f-9603-446b-be71-55ccf2ae8f8c |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1421800072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.1421800072 |
| Directory | /workspace/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_length_out_transaction.2667061042 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 144206716 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207004 kb |
| Host | smart-9ed37d8a-9457-4372-bc81-46501d5e65c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26670 61042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.2667061042 |
| Directory | /workspace/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_nak_trans.398108288 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 182225317 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:28:48 PM PDT 24 |
| Finished | Aug 15 05:28:49 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c04d108b-9fb9-47ba-a8db-21a48f11b8a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39810 8288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_nak_trans.398108288 |
| Directory | /workspace/8.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_iso.910526695 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 170309135 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:28:43 PM PDT 24 |
| Finished | Aug 15 05:28:44 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6b092202-eee5-4084-a3a0-e250f759f0c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91052 6695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_iso.910526695 |
| Directory | /workspace/8.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_stall.3625368246 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 210823643 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:28:46 PM PDT 24 |
| Finished | Aug 15 05:28:47 PM PDT 24 |
| Peak memory | 207052 kb |
| Host | smart-823093bb-4703-4068-9163-b77b5e7c8e10 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36253 68246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_stall.3625368246 |
| Directory | /workspace/8.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_trans_nak.1654945093 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 154422336 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:29:00 PM PDT 24 |
| Finished | Aug 15 05:29:01 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d3657702-c446-4736-8ea4-ea0d321555c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16549 45093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_trans_nak.1654945093 |
| Directory | /workspace/8.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/8.usbdev_pending_in_trans.716911214 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 159046576 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:28:50 PM PDT 24 |
| Finished | Aug 15 05:28:51 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-9ab1e2c3-d338-4257-8331-07537accbb4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71691 1214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pending_in_trans.716911214 |
| Directory | /workspace/8.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_config_pinflip.930599148 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 217572803 ps |
| CPU time | 1.01 seconds |
| Started | Aug 15 05:28:44 PM PDT 24 |
| Finished | Aug 15 05:28:45 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-515561a4-a75d-484f-b0d3-bb773f725051 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=930599148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.930599148 |
| Directory | /workspace/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_config_usb_ref_disable.3519668419 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 140986862 ps |
| CPU time | 0.82 seconds |
| Started | Aug 15 05:28:42 PM PDT 24 |
| Finished | Aug 15 05:28:43 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-29aafc84-4550-439d-8185-fc5cfc182a65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35196 68419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.3519668419 |
| Directory | /workspace/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_pins_sense.3676202573 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 35427167 ps |
| CPU time | 0.71 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:28:57 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-f8c09d9a-92d2-4173-8e19-8ae4a6b61804 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36762 02573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.3676202573 |
| Directory | /workspace/8.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_buffer.1647556080 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 13405117450 ps |
| CPU time | 34.2 seconds |
| Started | Aug 15 05:28:57 PM PDT 24 |
| Finished | Aug 15 05:29:31 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-278fcf72-4497-464d-be5e-7faaf9a2e177 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16475 56080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_buffer.1647556080 |
| Directory | /workspace/8.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_received.3147238895 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 167834713 ps |
| CPU time | 0.91 seconds |
| Started | Aug 15 05:28:40 PM PDT 24 |
| Finished | Aug 15 05:28:41 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-1596cabc-94f2-4072-888b-1443daf79f6a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31472 38895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_received.3147238895 |
| Directory | /workspace/8.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_sent.3429609069 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 199741944 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:28:44 PM PDT 24 |
| Finished | Aug 15 05:28:45 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a6f38adb-b795-4689-a6ea-be6c7c0fb583 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34296 09069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_sent.3429609069 |
| Directory | /workspace/8.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_bus_disconnects.1724786859 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 5843600312 ps |
| CPU time | 24.24 seconds |
| Started | Aug 15 05:28:52 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 224056 kb |
| Host | smart-9462c687-f921-4a08-95bd-adb0342bd6b5 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1724786859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.1724786859 |
| Directory | /workspace/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_bus_resets.1901610105 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 6970910049 ps |
| CPU time | 37.2 seconds |
| Started | Aug 15 05:28:59 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 219204 kb |
| Host | smart-58a4097d-c4e3-4891-b219-514cbc8d1b0f |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1901610105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.1901610105 |
| Directory | /workspace/8.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_suspends.1877652179 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 9744273799 ps |
| CPU time | 54.44 seconds |
| Started | Aug 15 05:28:41 PM PDT 24 |
| Finished | Aug 15 05:29:36 PM PDT 24 |
| Peak memory | 218848 kb |
| Host | smart-b789ee47-3cfc-4db0-8cfc-3762a2cf7198 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1877652179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.1877652179 |
| Directory | /workspace/8.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/8.usbdev_random_length_in_transaction.277501545 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 206192567 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:28:47 PM PDT 24 |
| Finished | Aug 15 05:28:48 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-5ec61e35-56f0-407a-915e-fc50b0837ee7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27750 1545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_in_transaction.277501545 |
| Directory | /workspace/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_random_length_out_transaction.258050097 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 160537353 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:55 PM PDT 24 |
| Finished | Aug 15 05:28:56 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-df8b2dbb-313d-4c4f-8689-4d0259a09a05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25805 0097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.258050097 |
| Directory | /workspace/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_resume_link_active.1492792354 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 20205583166 ps |
| CPU time | 24.1 seconds |
| Started | Aug 15 05:29:03 PM PDT 24 |
| Finished | Aug 15 05:29:27 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-10080fa3-beac-4f3d-b98c-3062ad4a6e1f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14927 92354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_resume_link_active.1492792354 |
| Directory | /workspace/8.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/8.usbdev_rx_crc_err.2939476796 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 206323525 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:29:02 PM PDT 24 |
| Finished | Aug 15 05:29:03 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-04b09887-8925-4512-b0ac-aa2f5379790f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29394 76796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rx_crc_err.2939476796 |
| Directory | /workspace/8.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_rx_full.3810826267 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 262409485 ps |
| CPU time | 1.17 seconds |
| Started | Aug 15 05:28:54 PM PDT 24 |
| Finished | Aug 15 05:28:55 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-7a440fb1-a473-454c-a769-7e49ec2884ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38108 26267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rx_full.3810826267 |
| Directory | /workspace/8.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/8.usbdev_setup_stage.1104370625 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 209528217 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:29:01 PM PDT 24 |
| Finished | Aug 15 05:29:02 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-47b97afd-a146-422f-bce8-863c11af14ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11043 70625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_setup_stage.1104370625 |
| Directory | /workspace/8.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/8.usbdev_setup_trans_ignored.4056632335 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 159111276 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:29:05 PM PDT 24 |
| Finished | Aug 15 05:29:06 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-4357410e-e414-4acf-bbbb-a7ebf15a94f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40566 32335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_setup_trans_ignored.4056632335 |
| Directory | /workspace/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/8.usbdev_smoke.1097511109 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 198948174 ps |
| CPU time | 1.06 seconds |
| Started | Aug 15 05:28:52 PM PDT 24 |
| Finished | Aug 15 05:28:53 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-c288f13b-0917-4ecd-9687-84b6dc475f45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10975 11109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.1097511109 |
| Directory | /workspace/8.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/8.usbdev_spurious_pids_ignored.725962678 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 1737609014 ps |
| CPU time | 16.39 seconds |
| Started | Aug 15 05:28:52 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 216956 kb |
| Host | smart-cfb074f7-9337-489e-89d2-b49ad8099b0f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=725962678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.725962678 |
| Directory | /workspace/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/8.usbdev_stall_priority_over_nak.1323191680 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 172167778 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:54 PM PDT 24 |
| Finished | Aug 15 05:28:55 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-c42e342c-dc5a-42fa-ad52-0f096da3e5ed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13231 91680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.1323191680 |
| Directory | /workspace/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/8.usbdev_stall_trans.704173124 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 194679541 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:28:57 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-6a6d15dd-3629-476b-80cc-5848122f7589 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70417 3124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_trans.704173124 |
| Directory | /workspace/8.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_stream_len_max.500268535 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 554428113 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:29:01 PM PDT 24 |
| Finished | Aug 15 05:29:03 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-24c8c058-5e38-4aaa-8d96-9b84604e110f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50026 8535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.500268535 |
| Directory | /workspace/8.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/8.usbdev_streaming_out.772546782 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 2067440218 ps |
| CPU time | 21.79 seconds |
| Started | Aug 15 05:28:55 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 223940 kb |
| Host | smart-1482b19b-b739-46db-a52a-cf7bb2232afd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77254 6782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_streaming_out.772546782 |
| Directory | /workspace/8.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/8.usbdev_timeout_missing_host_handshake.2167131793 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 1935041268 ps |
| CPU time | 13.13 seconds |
| Started | Aug 15 05:28:45 PM PDT 24 |
| Finished | Aug 15 05:28:58 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-82216bff-29a3-4b7a-8c31-1943020c85b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2167131793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host _handshake.2167131793 |
| Directory | /workspace/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/8.usbdev_tx_rx_disruption.1067546593 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 581722221 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:29:09 PM PDT 24 |
| Finished | Aug 15 05:29:10 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c7f722e4-ab92-4608-9998-f844876ff812 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1067546593 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_tx_rx_disruption.1067546593 |
| Directory | /workspace/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/80.usbdev_endpoint_types.2672447464 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 174655403 ps |
| CPU time | 0.95 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6edd61e2-2871-4ca7-8083-4cdc28c01839 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2672447464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.2672447464 |
| Directory | /workspace/80.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/80.usbdev_tx_rx_disruption.3405450470 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 536604313 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:35:00 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-e3c99d56-0d7c-4883-8199-cdca076aec08 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3405450470 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 80.usbdev_tx_rx_disruption.3405450470 |
| Directory | /workspace/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/81.usbdev_endpoint_types.1607897371 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 449317796 ps |
| CPU time | 1.47 seconds |
| Started | Aug 15 05:34:36 PM PDT 24 |
| Finished | Aug 15 05:34:38 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d0e6eee4-fbca-499b-a299-14471a9a4e9a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1607897371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.1607897371 |
| Directory | /workspace/81.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/81.usbdev_tx_rx_disruption.2931570749 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 526243824 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-bc8d45b3-3c8d-4c62-b606-d834e001c98c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2931570749 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 81.usbdev_tx_rx_disruption.2931570749 |
| Directory | /workspace/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/82.usbdev_endpoint_types.1889962174 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 472075542 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:34:58 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-14f0a46f-e605-447b-af42-39b50b3ed717 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1889962174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.1889962174 |
| Directory | /workspace/82.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/82.usbdev_tx_rx_disruption.1011070711 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 476010739 ps |
| CPU time | 1.51 seconds |
| Started | Aug 15 05:35:07 PM PDT 24 |
| Finished | Aug 15 05:35:08 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5e5ee308-00a9-46fb-aeb8-a98c3072d422 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1011070711 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 82.usbdev_tx_rx_disruption.1011070711 |
| Directory | /workspace/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/83.usbdev_endpoint_types.4112527293 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 319080355 ps |
| CPU time | 1.11 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:52 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-fec8b409-17f0-4836-9d7d-486eceaa22d1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4112527293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.4112527293 |
| Directory | /workspace/83.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/83.usbdev_tx_rx_disruption.3243941341 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 630435688 ps |
| CPU time | 1.57 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:52 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-89c5e397-9a8b-41c0-9fb0-75612ff5da2e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3243941341 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 83.usbdev_tx_rx_disruption.3243941341 |
| Directory | /workspace/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/84.usbdev_endpoint_types.2123097033 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 252001935 ps |
| CPU time | 1.04 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-e810bc40-9f48-4c07-b83f-eac88fc32db1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2123097033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.2123097033 |
| Directory | /workspace/84.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/84.usbdev_tx_rx_disruption.3532596601 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 529605224 ps |
| CPU time | 1.55 seconds |
| Started | Aug 15 05:34:44 PM PDT 24 |
| Finished | Aug 15 05:34:46 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-229c025d-cd40-41b6-9ee2-ce3539f8a9a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3532596601 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 84.usbdev_tx_rx_disruption.3532596601 |
| Directory | /workspace/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/85.usbdev_endpoint_types.3604503302 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 565617324 ps |
| CPU time | 1.52 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207328 kb |
| Host | smart-4ae8c051-3340-4671-a856-918df26c6956 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3604503302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.3604503302 |
| Directory | /workspace/85.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/85.usbdev_tx_rx_disruption.2835465742 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 625657136 ps |
| CPU time | 1.79 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:58 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-4268eefb-9526-4265-b63b-373398c592a5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2835465742 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 85.usbdev_tx_rx_disruption.2835465742 |
| Directory | /workspace/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/86.usbdev_endpoint_types.3997428408 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 456436313 ps |
| CPU time | 1.37 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-ce38e473-7ef6-48ac-ae76-4dc57932d0f4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3997428408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.3997428408 |
| Directory | /workspace/86.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/86.usbdev_tx_rx_disruption.1943256066 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 640950701 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-0168d5b9-db1f-4eb9-9baa-079957261b6b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1943256066 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 86.usbdev_tx_rx_disruption.1943256066 |
| Directory | /workspace/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/87.usbdev_endpoint_types.1026599939 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 537640556 ps |
| CPU time | 1.42 seconds |
| Started | Aug 15 05:34:54 PM PDT 24 |
| Finished | Aug 15 05:34:56 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0ae19bfb-7227-465a-9e93-914d312f71b3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1026599939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.1026599939 |
| Directory | /workspace/87.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/87.usbdev_tx_rx_disruption.3745589950 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 616839006 ps |
| CPU time | 1.71 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-f7774b37-585a-4022-a986-14e811ec68f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3745589950 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 87.usbdev_tx_rx_disruption.3745589950 |
| Directory | /workspace/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/88.usbdev_endpoint_types.771065442 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 403916066 ps |
| CPU time | 1.36 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-98619d73-ce9f-443f-a53f-0db66f6e7cb8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=771065442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.771065442 |
| Directory | /workspace/88.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/88.usbdev_tx_rx_disruption.3690152637 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 675506775 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-f1824124-c347-4e3c-a839-b24223adebad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3690152637 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 88.usbdev_tx_rx_disruption.3690152637 |
| Directory | /workspace/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/89.usbdev_tx_rx_disruption.1214937780 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 472119595 ps |
| CPU time | 1.4 seconds |
| Started | Aug 15 05:34:57 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-383d2257-ea55-48e9-93da-e903bdfa7920 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1214937780 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 89.usbdev_tx_rx_disruption.1214937780 |
| Directory | /workspace/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/9.usbdev_alert_test.3500478854 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 62013021 ps |
| CPU time | 0.69 seconds |
| Started | Aug 15 05:29:06 PM PDT 24 |
| Finished | Aug 15 05:29:07 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-eca061d0-80fc-49fd-a625-f4de5e068af2 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3500478854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.3500478854 |
| Directory | /workspace/9.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_disconnect.2619016509 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 5290348984 ps |
| CPU time | 6.92 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:03 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-949894de-294a-4ad0-9755-252bcbc85c40 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2619016509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_ao n_wake_disconnect.2619016509 |
| Directory | /workspace/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_reset.702180012 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 20100570874 ps |
| CPU time | 23.63 seconds |
| Started | Aug 15 05:29:05 PM PDT 24 |
| Finished | Aug 15 05:29:29 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-99b568b0-a07c-4d6d-acc8-c10352ee61e9 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=702180012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.702180012 |
| Directory | /workspace/9.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_resume.1243620993 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 24922329754 ps |
| CPU time | 30.59 seconds |
| Started | Aug 15 05:28:53 PM PDT 24 |
| Finished | Aug 15 05:29:24 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-29b1ecb6-98a8-43ed-80e2-10d5dfd3e655 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1243620993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_ao n_wake_resume.1243620993 |
| Directory | /workspace/9.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/9.usbdev_av_buffer.3226801116 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 158247406 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:28:59 PM PDT 24 |
| Finished | Aug 15 05:29:00 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-8c659576-7787-497c-ad4a-c9c2c291006a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32268 01116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_av_buffer.3226801116 |
| Directory | /workspace/9.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/9.usbdev_bitstuff_err.3692469653 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 140637333 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:28:54 PM PDT 24 |
| Finished | Aug 15 05:28:55 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-be728195-f805-4e94-8627-c715fd382e9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36924 69653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_bitstuff_err.3692469653 |
| Directory | /workspace/9.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_data_toggle_clear.2687102439 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 233089750 ps |
| CPU time | 0.97 seconds |
| Started | Aug 15 05:28:55 PM PDT 24 |
| Finished | Aug 15 05:28:57 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-3534b8ab-fe2b-4787-a040-990f3f17459f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26871 02439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_clear.2687102439 |
| Directory | /workspace/9.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/9.usbdev_data_toggle_restore.753784274 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 397747990 ps |
| CPU time | 1.29 seconds |
| Started | Aug 15 05:28:55 PM PDT 24 |
| Finished | Aug 15 05:28:56 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-76effa30-08ef-4568-9041-09e001c11c64 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=753784274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.753784274 |
| Directory | /workspace/9.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/9.usbdev_device_address.1690402448 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 18629901519 ps |
| CPU time | 31.12 seconds |
| Started | Aug 15 05:28:53 PM PDT 24 |
| Finished | Aug 15 05:29:24 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-9d916b46-9dd8-4079-80a6-a0b55202ca4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16904 02448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.1690402448 |
| Directory | /workspace/9.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/9.usbdev_device_timeout.1066507565 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 6730498551 ps |
| CPU time | 46.8 seconds |
| Started | Aug 15 05:29:01 PM PDT 24 |
| Finished | Aug 15 05:29:47 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-d37a3958-9465-4bb2-913a-5525dac1ead4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1066507565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.1066507565 |
| Directory | /workspace/9.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/9.usbdev_disable_endpoint.2523172302 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 832987104 ps |
| CPU time | 1.91 seconds |
| Started | Aug 15 05:29:05 PM PDT 24 |
| Finished | Aug 15 05:29:07 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-6cf72f67-5162-44b0-a96d-306bab7aca41 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25231 72302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_disable_endpoint.2523172302 |
| Directory | /workspace/9.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/9.usbdev_disconnected.2691046388 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 162991574 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:28:57 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-899d8176-1be2-4e5f-9013-853521fb649c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26910 46388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_disconnected.2691046388 |
| Directory | /workspace/9.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/9.usbdev_enable.2247786704 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 104789393 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:05 PM PDT 24 |
| Finished | Aug 15 05:29:06 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-77d98ea7-29e6-4287-b2f6-5c76a7498503 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22477 86704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_enable.2247786704 |
| Directory | /workspace/9.usbdev_enable/latest |
| Test location | /workspace/coverage/default/9.usbdev_endpoint_access.1864810846 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 993570413 ps |
| CPU time | 2.91 seconds |
| Started | Aug 15 05:29:06 PM PDT 24 |
| Finished | Aug 15 05:29:09 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-355b2bdd-0555-4282-960e-51eea5a4598c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18648 10846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.1864810846 |
| Directory | /workspace/9.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/9.usbdev_endpoint_types.3213801844 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 449300807 ps |
| CPU time | 1.28 seconds |
| Started | Aug 15 05:29:01 PM PDT 24 |
| Finished | Aug 15 05:29:03 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-287e937e-2a02-4895-baf0-d78cae78301d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3213801844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.3213801844 |
| Directory | /workspace/9.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/9.usbdev_fifo_rst.1945102266 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 184845339 ps |
| CPU time | 2.1 seconds |
| Started | Aug 15 05:29:09 PM PDT 24 |
| Finished | Aug 15 05:29:11 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-63e08d29-6b58-4f34-b78b-0da7cd95104e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19451 02266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_fifo_rst.1945102266 |
| Directory | /workspace/9.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_iso.3897351861 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 241956160 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:29:13 PM PDT 24 |
| Finished | Aug 15 05:29:15 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-d2dfa64f-b3fd-4822-af61-b6f1579ee833 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3897351861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.3897351861 |
| Directory | /workspace/9.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_stall.1921306807 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 142868800 ps |
| CPU time | 0.88 seconds |
| Started | Aug 15 05:28:59 PM PDT 24 |
| Finished | Aug 15 05:29:00 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-cf43cba1-3a66-401e-b4be-241be663e95c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19213 06807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_stall.1921306807 |
| Directory | /workspace/9.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_trans.1532846730 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 182895172 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:29:06 PM PDT 24 |
| Finished | Aug 15 05:29:07 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6c051e8b-3660-4356-89c7-0d2d84a42cf3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15328 46730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_trans.1532846730 |
| Directory | /workspace/9.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_invalid_sync.941576463 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 2284177599 ps |
| CPU time | 18.21 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:14 PM PDT 24 |
| Peak memory | 224004 kb |
| Host | smart-f6897217-0898-4dd1-b08c-5d3de0b646ec |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=941576463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.941576463 |
| Directory | /workspace/9.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/9.usbdev_iso_retraction.1090712253 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 3726385019 ps |
| CPU time | 25.03 seconds |
| Started | Aug 15 05:28:54 PM PDT 24 |
| Finished | Aug 15 05:29:19 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-5160d798-2ff7-4c59-bdc1-b5461d849a25 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1090712253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.1090712253 |
| Directory | /workspace/9.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_in_err.3233741825 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 180297821 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:28:57 PM PDT 24 |
| Finished | Aug 15 05:28:58 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a8bd6a12-2a1b-4dce-86fd-4d9d04870a79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32337 41825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_in_err.3233741825 |
| Directory | /workspace/9.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_resume.1089087599 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 13785922377 ps |
| CPU time | 21.95 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:19 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-52d5daf9-2b61-4b49-919c-d3316cdcae01 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10890 87599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_resume.1089087599 |
| Directory | /workspace/9.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_suspend.914106507 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 10650513250 ps |
| CPU time | 13.19 seconds |
| Started | Aug 15 05:29:02 PM PDT 24 |
| Finished | Aug 15 05:29:15 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-42196334-a742-4776-9b8d-9dfa45a79b04 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91410 6507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_suspend.914106507 |
| Directory | /workspace/9.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_inter_pkt_delay.3165068047 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 1819921500 ps |
| CPU time | 51.21 seconds |
| Started | Aug 15 05:29:00 PM PDT 24 |
| Finished | Aug 15 05:29:52 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-67652309-77b8-4fd8-9c5b-8d1894935bae |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3165068047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.3165068047 |
| Directory | /workspace/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_length_in_transaction.2590060631 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 243502656 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:28:51 PM PDT 24 |
| Finished | Aug 15 05:28:52 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8396dd61-bfca-4e38-90e8-88262930e1be |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2590060631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.2590060631 |
| Directory | /workspace/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_length_out_transaction.4068461069 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 202431481 ps |
| CPU time | 0.96 seconds |
| Started | Aug 15 05:29:06 PM PDT 24 |
| Finished | Aug 15 05:29:07 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-0f0dc1b7-031e-4f30-967f-c1bac794b0f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40684 61069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.4068461069 |
| Directory | /workspace/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_non_iso_usb_traffic.4005662764 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 2846770686 ps |
| CPU time | 21.68 seconds |
| Started | Aug 15 05:28:55 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 224008 kb |
| Host | smart-1050dea2-10b8-4af8-8d3e-18c7f8ace980 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40056 62764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.4005662764 |
| Directory | /workspace/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_usb_traffic.1491701984 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 3346695149 ps |
| CPU time | 39.19 seconds |
| Started | Aug 15 05:29:03 PM PDT 24 |
| Finished | Aug 15 05:29:42 PM PDT 24 |
| Peak memory | 224172 kb |
| Host | smart-80216565-3981-4f58-8d81-7e6e7ea87838 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1491701984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.1491701984 |
| Directory | /workspace/9.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_inter_pkt_delay.3544081105 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 3230200562 ps |
| CPU time | 25.67 seconds |
| Started | Aug 15 05:28:56 PM PDT 24 |
| Finished | Aug 15 05:29:22 PM PDT 24 |
| Peak memory | 215964 kb |
| Host | smart-f2f70bfb-1441-41a0-91e3-4340aefd611f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3544081105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.3544081105 |
| Directory | /workspace/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_length_in_transaction.1450258369 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 211085749 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-449e313d-7c03-41f8-a115-1776f1ded704 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1450258369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.1450258369 |
| Directory | /workspace/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_length_out_transaction.2829651087 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 141084938 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:28:55 PM PDT 24 |
| Finished | Aug 15 05:28:56 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d7ba0149-8f74-4bec-83a3-61cf7188ff68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28296 51087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.2829651087 |
| Directory | /workspace/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_nak_trans.1884882057 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 223332709 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:28:55 PM PDT 24 |
| Finished | Aug 15 05:28:56 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-42de035c-3b4c-4273-b127-cccf6195f600 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18848 82057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_nak_trans.1884882057 |
| Directory | /workspace/9.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_iso.3179312505 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 168765496 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:29:05 PM PDT 24 |
| Finished | Aug 15 05:29:06 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d602006a-7cd8-41b3-9948-504e470fda06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31793 12505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_iso.3179312505 |
| Directory | /workspace/9.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_stall.3226216145 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 153042831 ps |
| CPU time | 0.83 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-69d35264-59dc-411b-a775-d7c06ac4425a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32262 16145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_stall.3226216145 |
| Directory | /workspace/9.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_trans_nak.531222451 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 196429290 ps |
| CPU time | 0.93 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:29:11 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d90fb766-dd87-4ccd-be0b-cba1e7791981 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53122 2451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_trans_nak.531222451 |
| Directory | /workspace/9.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/9.usbdev_pending_in_trans.66661652 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 164006946 ps |
| CPU time | 0.92 seconds |
| Started | Aug 15 05:29:16 PM PDT 24 |
| Finished | Aug 15 05:29:17 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-ad2edcfb-4448-499d-81cf-4431832874e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66661 652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pending_in_trans.66661652 |
| Directory | /workspace/9.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_config_pinflip.2978878352 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 237326518 ps |
| CPU time | 0.99 seconds |
| Started | Aug 15 05:29:13 PM PDT 24 |
| Finished | Aug 15 05:29:15 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-8b5dfcfb-617e-4a0c-82cf-92c1da6d5eb9 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2978878352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.2978878352 |
| Directory | /workspace/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_config_usb_ref_disable.4011191732 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 150794274 ps |
| CPU time | 0.87 seconds |
| Started | Aug 15 05:29:15 PM PDT 24 |
| Finished | Aug 15 05:29:16 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-869f514a-217f-4702-a0ad-4ac65c9eef06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40111 91732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.4011191732 |
| Directory | /workspace/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_pins_sense.2631473223 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 56160483 ps |
| CPU time | 0.75 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-1b09de62-2f23-43d2-b50c-c2e8ae42db09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26314 73223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.2631473223 |
| Directory | /workspace/9.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_received.3013799368 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 174506917 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:05 PM PDT 24 |
| Finished | Aug 15 05:29:06 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-36b065b9-e266-46f4-9fe9-97a98aaa0690 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30137 99368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_received.3013799368 |
| Directory | /workspace/9.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_sent.3655653723 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 184154308 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:29:11 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-2faf8210-7f9d-49ad-822a-9d0c1a4e588e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36556 53723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_sent.3655653723 |
| Directory | /workspace/9.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_bus_disconnects.2801223774 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 3574184210 ps |
| CPU time | 84.35 seconds |
| Started | Aug 15 05:29:03 PM PDT 24 |
| Finished | Aug 15 05:30:28 PM PDT 24 |
| Peak memory | 224008 kb |
| Host | smart-ac5c4648-1191-4157-a7e3-5c56619ab494 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2801223774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.2801223774 |
| Directory | /workspace/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_suspends.4129562459 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 12206410667 ps |
| CPU time | 261.44 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:33:31 PM PDT 24 |
| Peak memory | 218320 kb |
| Host | smart-8864f7de-4445-46ba-9258-59324a868189 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=4129562459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.4129562459 |
| Directory | /workspace/9.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/9.usbdev_random_length_in_transaction.2255526175 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 239524955 ps |
| CPU time | 1.03 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:15 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-928d0ca1-c901-41c0-9c6d-a6b630254349 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22555 26175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_in_transaction.2255526175 |
| Directory | /workspace/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_random_length_out_transaction.3976902542 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 164939886 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:02 PM PDT 24 |
| Finished | Aug 15 05:29:03 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-00ff2b3a-6299-43b5-8769-cab9c5154b35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39769 02542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.3976902542 |
| Directory | /workspace/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_resume_link_active.2591969271 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 20176179760 ps |
| CPU time | 24.18 seconds |
| Started | Aug 15 05:29:14 PM PDT 24 |
| Finished | Aug 15 05:29:38 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-1aa6d066-d6ba-48b5-a3e9-58cc4d6a606d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25919 69271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_resume_link_active.2591969271 |
| Directory | /workspace/9.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/9.usbdev_rx_crc_err.2642992237 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 175878106 ps |
| CPU time | 0.89 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:29:11 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-fc22aca0-1247-41db-9166-9c078f03d72f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26429 92237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rx_crc_err.2642992237 |
| Directory | /workspace/9.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_rx_full.980760872 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 410303964 ps |
| CPU time | 1.36 seconds |
| Started | Aug 15 05:29:12 PM PDT 24 |
| Finished | Aug 15 05:29:13 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-314e5b6c-d367-448a-a65c-609ffc142664 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98076 0872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rx_full.980760872 |
| Directory | /workspace/9.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/9.usbdev_setup_stage.2458132450 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 155725692 ps |
| CPU time | 0.84 seconds |
| Started | Aug 15 05:29:07 PM PDT 24 |
| Finished | Aug 15 05:29:08 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-a1525c42-494c-4ed5-85e7-94ca9f6f7ee8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24581 32450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_setup_stage.2458132450 |
| Directory | /workspace/9.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/9.usbdev_setup_trans_ignored.3136130626 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 159349828 ps |
| CPU time | 0.9 seconds |
| Started | Aug 15 05:28:59 PM PDT 24 |
| Finished | Aug 15 05:29:00 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-f1dc2f6c-7c37-4135-8d74-a25dc5cf7c6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31361 30626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_setup_trans_ignored.3136130626 |
| Directory | /workspace/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/9.usbdev_smoke.3351736881 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 224759751 ps |
| CPU time | 1 seconds |
| Started | Aug 15 05:29:08 PM PDT 24 |
| Finished | Aug 15 05:29:10 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-c3627f91-0341-4919-b700-ee4d989a3983 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33517 36881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.3351736881 |
| Directory | /workspace/9.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/9.usbdev_spurious_pids_ignored.4159120992 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 2779388975 ps |
| CPU time | 81.45 seconds |
| Started | Aug 15 05:29:02 PM PDT 24 |
| Finished | Aug 15 05:30:24 PM PDT 24 |
| Peak memory | 217724 kb |
| Host | smart-4421bb20-b41f-4e41-ae31-70f3e3898900 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4159120992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.4159120992 |
| Directory | /workspace/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/9.usbdev_stall_priority_over_nak.3179427237 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 160623974 ps |
| CPU time | 0.86 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:29:11 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-74f12b0f-ec03-4e64-832e-f6132504ba08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31794 27237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.3179427237 |
| Directory | /workspace/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/9.usbdev_stall_trans.3013742622 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 186283006 ps |
| CPU time | 0.98 seconds |
| Started | Aug 15 05:29:04 PM PDT 24 |
| Finished | Aug 15 05:29:05 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-5d0d5dbc-5296-4312-a80d-1ba79753f56b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30137 42622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_trans.3013742622 |
| Directory | /workspace/9.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_stream_len_max.883084364 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 527872176 ps |
| CPU time | 1.59 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-328dab7e-de03-4e67-bf32-cca040cfca6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88308 4364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.883084364 |
| Directory | /workspace/9.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/9.usbdev_streaming_out.4009508493 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 3810397628 ps |
| CPU time | 40.08 seconds |
| Started | Aug 15 05:29:03 PM PDT 24 |
| Finished | Aug 15 05:29:44 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-c1353d7a-1643-4bbe-ad25-21df6fe7dda7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40095 08493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_streaming_out.4009508493 |
| Directory | /workspace/9.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/9.usbdev_timeout_missing_host_handshake.3675062176 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 3116697494 ps |
| CPU time | 21.18 seconds |
| Started | Aug 15 05:29:05 PM PDT 24 |
| Finished | Aug 15 05:29:27 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-1489c6ca-c1c3-4711-b577-6ca0f0250a00 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3675062176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host _handshake.3675062176 |
| Directory | /workspace/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/9.usbdev_tx_rx_disruption.2027707842 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 645152765 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:29:10 PM PDT 24 |
| Finished | Aug 15 05:29:12 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-b769f41f-ccf7-4230-8ce9-d8872af5e104 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2027707842 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_tx_rx_disruption.2027707842 |
| Directory | /workspace/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/90.usbdev_endpoint_types.3287176867 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 646046847 ps |
| CPU time | 1.65 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-c1ca5110-faba-4906-95bd-e88e03bcf7ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3287176867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.3287176867 |
| Directory | /workspace/90.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/90.usbdev_tx_rx_disruption.72251067 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 598324498 ps |
| CPU time | 1.73 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-18159754-7412-4f88-bba0-b23e48a4ac8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72251067 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 90.usbdev_tx_rx_disruption.72251067 |
| Directory | /workspace/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/91.usbdev_endpoint_types.2211831732 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 447860860 ps |
| CPU time | 1.31 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:59 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-5cc47c6c-c241-4e34-8d1f-b5fdffa70f1c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2211831732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.2211831732 |
| Directory | /workspace/91.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/91.usbdev_tx_rx_disruption.1949340426 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 649997601 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:34:45 PM PDT 24 |
| Finished | Aug 15 05:34:48 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-fc74fa4e-f853-4803-b681-9a9cd10aa15a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1949340426 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 91.usbdev_tx_rx_disruption.1949340426 |
| Directory | /workspace/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/92.usbdev_tx_rx_disruption.2601970147 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 438170630 ps |
| CPU time | 1.4 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-1a17a584-5bfc-470d-8cae-734d023188a7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2601970147 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 92.usbdev_tx_rx_disruption.2601970147 |
| Directory | /workspace/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/93.usbdev_endpoint_types.2422171072 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 494730230 ps |
| CPU time | 1.39 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-05ce0cb9-6c36-47f5-99b6-e378367ffa77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2422171072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.2422171072 |
| Directory | /workspace/93.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/93.usbdev_tx_rx_disruption.1632472678 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 487820976 ps |
| CPU time | 1.62 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-81350363-7e34-418a-999e-18f33302136d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1632472678 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 93.usbdev_tx_rx_disruption.1632472678 |
| Directory | /workspace/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/94.usbdev_tx_rx_disruption.2561338702 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 496150124 ps |
| CPU time | 1.54 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-5c9511c6-77ce-4863-bd30-bd66473c31f4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2561338702 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 94.usbdev_tx_rx_disruption.2561338702 |
| Directory | /workspace/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/95.usbdev_endpoint_types.2316982332 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 593949310 ps |
| CPU time | 1.48 seconds |
| Started | Aug 15 05:35:04 PM PDT 24 |
| Finished | Aug 15 05:35:06 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-f4c48ceb-0db5-4cac-9798-0e324cbc6364 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2316982332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.2316982332 |
| Directory | /workspace/95.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/95.usbdev_tx_rx_disruption.159769565 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 476985621 ps |
| CPU time | 1.46 seconds |
| Started | Aug 15 05:34:48 PM PDT 24 |
| Finished | Aug 15 05:34:50 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-d14895bf-c1d7-4811-be2a-a175069672c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=159769565 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 95.usbdev_tx_rx_disruption.159769565 |
| Directory | /workspace/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/96.usbdev_endpoint_types.2705039977 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 408632091 ps |
| CPU time | 1.2 seconds |
| Started | Aug 15 05:34:50 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-a2f3a333-d378-4293-af1e-2c7393df6405 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2705039977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.2705039977 |
| Directory | /workspace/96.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/96.usbdev_tx_rx_disruption.1553637794 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 552788180 ps |
| CPU time | 1.64 seconds |
| Started | Aug 15 05:34:53 PM PDT 24 |
| Finished | Aug 15 05:34:55 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-613b4a84-aa4c-419f-b8aa-f8e64171ec2c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1553637794 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 96.usbdev_tx_rx_disruption.1553637794 |
| Directory | /workspace/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/97.usbdev_endpoint_types.2687824779 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 381289470 ps |
| CPU time | 1.3 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-b942c32a-3686-40cc-92e0-0287379aaf7b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2687824779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.2687824779 |
| Directory | /workspace/97.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/97.usbdev_tx_rx_disruption.3942510801 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 592778965 ps |
| CPU time | 1.67 seconds |
| Started | Aug 15 05:35:12 PM PDT 24 |
| Finished | Aug 15 05:35:19 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-efc7ee6d-7aaf-4172-9d76-9bc36a75264b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3942510801 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 97.usbdev_tx_rx_disruption.3942510801 |
| Directory | /workspace/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/98.usbdev_endpoint_types.3031733221 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 315251459 ps |
| CPU time | 1.1 seconds |
| Started | Aug 15 05:34:56 PM PDT 24 |
| Finished | Aug 15 05:34:57 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f2edf3f4-69d3-48b6-b6d6-9e0dfb8a36d5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3031733221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.3031733221 |
| Directory | /workspace/98.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/98.usbdev_tx_rx_disruption.1960202365 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 678544366 ps |
| CPU time | 1.82 seconds |
| Started | Aug 15 05:34:49 PM PDT 24 |
| Finished | Aug 15 05:34:51 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-19b95ccf-eab9-46cd-a003-482386ed9f3b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1960202365 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 98.usbdev_tx_rx_disruption.1960202365 |
| Directory | /workspace/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/99.usbdev_endpoint_types.1241734817 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 689343197 ps |
| CPU time | 1.68 seconds |
| Started | Aug 15 05:34:47 PM PDT 24 |
| Finished | Aug 15 05:34:49 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-f1665f6d-ce4c-4f71-8940-68c303d842d3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1241734817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.1241734817 |
| Directory | /workspace/99.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/99.usbdev_tx_rx_disruption.3155324700 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 501082609 ps |
| CPU time | 1.5 seconds |
| Started | Aug 15 05:34:51 PM PDT 24 |
| Finished | Aug 15 05:34:53 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-01f34d27-88cd-40c0-9740-96de16d243df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3155324700 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 99.usbdev_tx_rx_disruption.3155324700 |
| Directory | /workspace/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |